1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2005, 2006 IBM Corporation 4 * Copyright (C) 2014, 2015 Intel Corporation 5 * 6 * Authors: 7 * Leendert van Doorn <leendert@watson.ibm.com> 8 * Kylene Hall <kjhall@us.ibm.com> 9 * 10 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 11 * 12 * Device driver for TCG/TCPA TPM (trusted platform module). 13 * Specifications at www.trustedcomputinggroup.org 14 * 15 * This device driver implements the TPM interface as defined in 16 * the TCG TPM Interface Spec version 1.2, revision 1.0. 17 */ 18 #include <linux/init.h> 19 #include <linux/module.h> 20 #include <linux/moduleparam.h> 21 #include <linux/pnp.h> 22 #include <linux/slab.h> 23 #include <linux/interrupt.h> 24 #include <linux/wait.h> 25 #include <linux/acpi.h> 26 #include <linux/freezer.h> 27 #include <linux/dmi.h> 28 #include "tpm.h" 29 #include "tpm_tis_core.h" 30 31 #define TPM_TIS_MAX_UNHANDLED_IRQS 1000 32 33 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value); 34 35 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask, 36 bool check_cancel, bool *canceled) 37 { 38 u8 status = chip->ops->status(chip); 39 40 *canceled = false; 41 if ((status & mask) == mask) 42 return true; 43 if (check_cancel && chip->ops->req_canceled(chip, status)) { 44 *canceled = true; 45 return true; 46 } 47 return false; 48 } 49 50 static u8 tpm_tis_filter_sts_mask(u8 int_mask, u8 sts_mask) 51 { 52 if (!(int_mask & TPM_INTF_STS_VALID_INT)) 53 sts_mask &= ~TPM_STS_VALID; 54 55 if (!(int_mask & TPM_INTF_DATA_AVAIL_INT)) 56 sts_mask &= ~TPM_STS_DATA_AVAIL; 57 58 if (!(int_mask & TPM_INTF_CMD_READY_INT)) 59 sts_mask &= ~TPM_STS_COMMAND_READY; 60 61 return sts_mask; 62 } 63 64 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask, 65 unsigned long timeout, wait_queue_head_t *queue, 66 bool check_cancel) 67 { 68 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 69 unsigned long stop; 70 long rc; 71 u8 status; 72 bool canceled = false; 73 u8 sts_mask; 74 int ret = 0; 75 76 /* check current status */ 77 status = chip->ops->status(chip); 78 if ((status & mask) == mask) 79 return 0; 80 81 sts_mask = mask & (TPM_STS_VALID | TPM_STS_DATA_AVAIL | 82 TPM_STS_COMMAND_READY); 83 /* check what status changes can be handled by irqs */ 84 sts_mask = tpm_tis_filter_sts_mask(priv->int_mask, sts_mask); 85 86 stop = jiffies + timeout; 87 /* process status changes with irq support */ 88 if (sts_mask) { 89 ret = -ETIME; 90 again: 91 timeout = stop - jiffies; 92 if ((long)timeout <= 0) 93 return -ETIME; 94 rc = wait_event_interruptible_timeout(*queue, 95 wait_for_tpm_stat_cond(chip, sts_mask, check_cancel, 96 &canceled), 97 timeout); 98 if (rc > 0) { 99 if (canceled) 100 return -ECANCELED; 101 ret = 0; 102 } 103 if (rc == -ERESTARTSYS && freezing(current)) { 104 clear_thread_flag(TIF_SIGPENDING); 105 goto again; 106 } 107 } 108 109 if (ret) 110 return ret; 111 112 mask &= ~sts_mask; 113 if (!mask) /* all done */ 114 return 0; 115 /* process status changes without irq support */ 116 do { 117 status = chip->ops->status(chip); 118 if ((status & mask) == mask) 119 return 0; 120 usleep_range(priv->timeout_min, 121 priv->timeout_max); 122 } while (time_before(jiffies, stop)); 123 return -ETIME; 124 } 125 126 /* Before we attempt to access the TPM we must see that the valid bit is set. 127 * The specification says that this bit is 0 at reset and remains 0 until the 128 * 'TPM has gone through its self test and initialization and has established 129 * correct values in the other bits.' 130 */ 131 static int wait_startup(struct tpm_chip *chip, int l) 132 { 133 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 134 unsigned long stop = jiffies + chip->timeout_a; 135 136 do { 137 int rc; 138 u8 access; 139 140 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 141 if (rc < 0) 142 return rc; 143 144 if (access & TPM_ACCESS_VALID) 145 return 0; 146 tpm_msleep(TPM_TIMEOUT); 147 } while (time_before(jiffies, stop)); 148 return -1; 149 } 150 151 static bool check_locality(struct tpm_chip *chip, int l) 152 { 153 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 154 int rc; 155 u8 access; 156 157 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 158 if (rc < 0) 159 return false; 160 161 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID 162 | TPM_ACCESS_REQUEST_USE)) == 163 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) { 164 priv->locality = l; 165 return true; 166 } 167 168 return false; 169 } 170 171 static int __tpm_tis_relinquish_locality(struct tpm_tis_data *priv, int l) 172 { 173 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY); 174 175 return 0; 176 } 177 178 static int tpm_tis_relinquish_locality(struct tpm_chip *chip, int l) 179 { 180 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 181 182 mutex_lock(&priv->locality_count_mutex); 183 priv->locality_count--; 184 if (priv->locality_count == 0) 185 __tpm_tis_relinquish_locality(priv, l); 186 mutex_unlock(&priv->locality_count_mutex); 187 188 return 0; 189 } 190 191 static int __tpm_tis_request_locality(struct tpm_chip *chip, int l) 192 { 193 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 194 unsigned long stop, timeout; 195 long rc; 196 197 if (check_locality(chip, l)) 198 return l; 199 200 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE); 201 if (rc < 0) 202 return rc; 203 204 stop = jiffies + chip->timeout_a; 205 206 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 207 again: 208 timeout = stop - jiffies; 209 if ((long)timeout <= 0) 210 return -1; 211 rc = wait_event_interruptible_timeout(priv->int_queue, 212 (check_locality 213 (chip, l)), 214 timeout); 215 if (rc > 0) 216 return l; 217 if (rc == -ERESTARTSYS && freezing(current)) { 218 clear_thread_flag(TIF_SIGPENDING); 219 goto again; 220 } 221 } else { 222 /* wait for burstcount */ 223 do { 224 if (check_locality(chip, l)) 225 return l; 226 tpm_msleep(TPM_TIMEOUT); 227 } while (time_before(jiffies, stop)); 228 } 229 return -1; 230 } 231 232 static int tpm_tis_request_locality(struct tpm_chip *chip, int l) 233 { 234 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 235 int ret = 0; 236 237 mutex_lock(&priv->locality_count_mutex); 238 if (priv->locality_count == 0) 239 ret = __tpm_tis_request_locality(chip, l); 240 if (!ret) 241 priv->locality_count++; 242 mutex_unlock(&priv->locality_count_mutex); 243 return ret; 244 } 245 246 static u8 tpm_tis_status(struct tpm_chip *chip) 247 { 248 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 249 int rc; 250 u8 status; 251 252 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status); 253 if (rc < 0) 254 return 0; 255 256 if (unlikely((status & TPM_STS_READ_ZERO) != 0)) { 257 if (!test_and_set_bit(TPM_TIS_INVALID_STATUS, &priv->flags)) { 258 /* 259 * If this trips, the chances are the read is 260 * returning 0xff because the locality hasn't been 261 * acquired. Usually because tpm_try_get_ops() hasn't 262 * been called before doing a TPM operation. 263 */ 264 dev_err(&chip->dev, "invalid TPM_STS.x 0x%02x, dumping stack for forensics\n", 265 status); 266 267 /* 268 * Dump stack for forensics, as invalid TPM_STS.x could be 269 * potentially triggered by impaired tpm_try_get_ops() or 270 * tpm_find_get_ops(). 271 */ 272 dump_stack(); 273 } 274 275 return 0; 276 } 277 278 return status; 279 } 280 281 static void tpm_tis_ready(struct tpm_chip *chip) 282 { 283 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 284 285 /* this causes the current command to be aborted */ 286 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY); 287 } 288 289 static int get_burstcount(struct tpm_chip *chip) 290 { 291 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 292 unsigned long stop; 293 int burstcnt, rc; 294 u32 value; 295 296 /* wait for burstcount */ 297 if (chip->flags & TPM_CHIP_FLAG_TPM2) 298 stop = jiffies + chip->timeout_a; 299 else 300 stop = jiffies + chip->timeout_d; 301 do { 302 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value); 303 if (rc < 0) 304 return rc; 305 306 burstcnt = (value >> 8) & 0xFFFF; 307 if (burstcnt) 308 return burstcnt; 309 usleep_range(TPM_TIMEOUT_USECS_MIN, TPM_TIMEOUT_USECS_MAX); 310 } while (time_before(jiffies, stop)); 311 return -EBUSY; 312 } 313 314 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) 315 { 316 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 317 int size = 0, burstcnt, rc; 318 319 while (size < count) { 320 rc = wait_for_tpm_stat(chip, 321 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 322 chip->timeout_c, 323 &priv->read_queue, true); 324 if (rc < 0) 325 return rc; 326 burstcnt = get_burstcount(chip); 327 if (burstcnt < 0) { 328 dev_err(&chip->dev, "Unable to read burstcount\n"); 329 return burstcnt; 330 } 331 burstcnt = min_t(int, burstcnt, count - size); 332 333 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality), 334 burstcnt, buf + size); 335 if (rc < 0) 336 return rc; 337 338 size += burstcnt; 339 } 340 return size; 341 } 342 343 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count) 344 { 345 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 346 int size = 0; 347 int status; 348 u32 expected; 349 int rc; 350 351 if (count < TPM_HEADER_SIZE) { 352 size = -EIO; 353 goto out; 354 } 355 356 size = recv_data(chip, buf, TPM_HEADER_SIZE); 357 /* read first 10 bytes, including tag, paramsize, and result */ 358 if (size < TPM_HEADER_SIZE) { 359 dev_err(&chip->dev, "Unable to read header\n"); 360 goto out; 361 } 362 363 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 364 if (expected > count || expected < TPM_HEADER_SIZE) { 365 size = -EIO; 366 goto out; 367 } 368 369 rc = recv_data(chip, &buf[TPM_HEADER_SIZE], 370 expected - TPM_HEADER_SIZE); 371 if (rc < 0) { 372 size = rc; 373 goto out; 374 } 375 size += rc; 376 if (size < expected) { 377 dev_err(&chip->dev, "Unable to read remainder of result\n"); 378 size = -ETIME; 379 goto out; 380 } 381 382 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 383 &priv->int_queue, false) < 0) { 384 size = -ETIME; 385 goto out; 386 } 387 status = tpm_tis_status(chip); 388 if (status & TPM_STS_DATA_AVAIL) { /* retry? */ 389 dev_err(&chip->dev, "Error left over data\n"); 390 size = -EIO; 391 goto out; 392 } 393 394 rc = tpm_tis_verify_crc(priv, (size_t)size, buf); 395 if (rc < 0) { 396 dev_err(&chip->dev, "CRC mismatch for response.\n"); 397 size = rc; 398 goto out; 399 } 400 401 out: 402 tpm_tis_ready(chip); 403 return size; 404 } 405 406 /* 407 * If interrupts are used (signaled by an irq set in the vendor structure) 408 * tpm.c can skip polling for the data to be available as the interrupt is 409 * waited for here 410 */ 411 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len) 412 { 413 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 414 int rc, status, burstcnt; 415 size_t count = 0; 416 bool itpm = test_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags); 417 418 status = tpm_tis_status(chip); 419 if ((status & TPM_STS_COMMAND_READY) == 0) { 420 tpm_tis_ready(chip); 421 if (wait_for_tpm_stat 422 (chip, TPM_STS_COMMAND_READY, chip->timeout_b, 423 &priv->int_queue, false) < 0) { 424 rc = -ETIME; 425 goto out_err; 426 } 427 } 428 429 while (count < len - 1) { 430 burstcnt = get_burstcount(chip); 431 if (burstcnt < 0) { 432 dev_err(&chip->dev, "Unable to read burstcount\n"); 433 rc = burstcnt; 434 goto out_err; 435 } 436 burstcnt = min_t(int, burstcnt, len - count - 1); 437 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality), 438 burstcnt, buf + count); 439 if (rc < 0) 440 goto out_err; 441 442 count += burstcnt; 443 444 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 445 &priv->int_queue, false) < 0) { 446 rc = -ETIME; 447 goto out_err; 448 } 449 status = tpm_tis_status(chip); 450 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) { 451 rc = -EIO; 452 goto out_err; 453 } 454 } 455 456 /* write last byte */ 457 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]); 458 if (rc < 0) 459 goto out_err; 460 461 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 462 &priv->int_queue, false) < 0) { 463 rc = -ETIME; 464 goto out_err; 465 } 466 status = tpm_tis_status(chip); 467 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) { 468 rc = -EIO; 469 goto out_err; 470 } 471 472 return 0; 473 474 out_err: 475 tpm_tis_ready(chip); 476 return rc; 477 } 478 479 static void __tpm_tis_disable_interrupts(struct tpm_chip *chip) 480 { 481 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 482 u32 int_mask = 0; 483 484 tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &int_mask); 485 int_mask &= ~TPM_GLOBAL_INT_ENABLE; 486 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), int_mask); 487 488 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 489 } 490 491 static void tpm_tis_disable_interrupts(struct tpm_chip *chip) 492 { 493 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 494 495 if (priv->irq == 0) 496 return; 497 498 __tpm_tis_disable_interrupts(chip); 499 500 devm_free_irq(chip->dev.parent, priv->irq, chip); 501 priv->irq = 0; 502 } 503 504 /* 505 * If interrupts are used (signaled by an irq set in the vendor structure) 506 * tpm.c can skip polling for the data to be available as the interrupt is 507 * waited for here 508 */ 509 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len) 510 { 511 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 512 int rc; 513 u32 ordinal; 514 unsigned long dur; 515 516 rc = tpm_tis_send_data(chip, buf, len); 517 if (rc < 0) 518 return rc; 519 520 rc = tpm_tis_verify_crc(priv, len, buf); 521 if (rc < 0) { 522 dev_err(&chip->dev, "CRC mismatch for command.\n"); 523 return rc; 524 } 525 526 /* go and do it */ 527 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO); 528 if (rc < 0) 529 goto out_err; 530 531 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 532 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 533 534 dur = tpm_calc_ordinal_duration(chip, ordinal); 535 if (wait_for_tpm_stat 536 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur, 537 &priv->read_queue, false) < 0) { 538 rc = -ETIME; 539 goto out_err; 540 } 541 } 542 return 0; 543 out_err: 544 tpm_tis_ready(chip); 545 return rc; 546 } 547 548 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len) 549 { 550 int rc, irq; 551 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 552 553 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || 554 test_bit(TPM_TIS_IRQ_TESTED, &priv->flags)) 555 return tpm_tis_send_main(chip, buf, len); 556 557 /* Verify receipt of the expected IRQ */ 558 irq = priv->irq; 559 priv->irq = 0; 560 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 561 rc = tpm_tis_send_main(chip, buf, len); 562 priv->irq = irq; 563 chip->flags |= TPM_CHIP_FLAG_IRQ; 564 if (!test_bit(TPM_TIS_IRQ_TESTED, &priv->flags)) 565 tpm_msleep(1); 566 if (!test_bit(TPM_TIS_IRQ_TESTED, &priv->flags)) 567 tpm_tis_disable_interrupts(chip); 568 set_bit(TPM_TIS_IRQ_TESTED, &priv->flags); 569 return rc; 570 } 571 572 struct tis_vendor_durations_override { 573 u32 did_vid; 574 struct tpm1_version version; 575 unsigned long durations[3]; 576 }; 577 578 static const struct tis_vendor_durations_override vendor_dur_overrides[] = { 579 /* STMicroelectronics 0x104a */ 580 { 0x0000104a, 581 { 1, 2, 8, 28 }, 582 { (2 * 60 * HZ), (2 * 60 * HZ), (2 * 60 * HZ) } }, 583 }; 584 585 static void tpm_tis_update_durations(struct tpm_chip *chip, 586 unsigned long *duration_cap) 587 { 588 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 589 struct tpm1_version *version; 590 u32 did_vid; 591 int i, rc; 592 cap_t cap; 593 594 chip->duration_adjusted = false; 595 596 if (chip->ops->clk_enable != NULL) 597 chip->ops->clk_enable(chip, true); 598 599 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid); 600 if (rc < 0) { 601 dev_warn(&chip->dev, "%s: failed to read did_vid. %d\n", 602 __func__, rc); 603 goto out; 604 } 605 606 /* Try to get a TPM version 1.2 or 1.1 TPM_CAP_VERSION_INFO */ 607 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_2, &cap, 608 "attempting to determine the 1.2 version", 609 sizeof(cap.version2)); 610 if (!rc) { 611 version = &cap.version2.version; 612 } else { 613 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_1, &cap, 614 "attempting to determine the 1.1 version", 615 sizeof(cap.version1)); 616 617 if (rc) 618 goto out; 619 620 version = &cap.version1; 621 } 622 623 for (i = 0; i != ARRAY_SIZE(vendor_dur_overrides); i++) { 624 if (vendor_dur_overrides[i].did_vid != did_vid) 625 continue; 626 627 if ((version->major == 628 vendor_dur_overrides[i].version.major) && 629 (version->minor == 630 vendor_dur_overrides[i].version.minor) && 631 (version->rev_major == 632 vendor_dur_overrides[i].version.rev_major) && 633 (version->rev_minor == 634 vendor_dur_overrides[i].version.rev_minor)) { 635 636 memcpy(duration_cap, 637 vendor_dur_overrides[i].durations, 638 sizeof(vendor_dur_overrides[i].durations)); 639 640 chip->duration_adjusted = true; 641 goto out; 642 } 643 } 644 645 out: 646 if (chip->ops->clk_enable != NULL) 647 chip->ops->clk_enable(chip, false); 648 } 649 650 struct tis_vendor_timeout_override { 651 u32 did_vid; 652 unsigned long timeout_us[4]; 653 }; 654 655 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = { 656 /* Atmel 3204 */ 657 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000), 658 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, 659 }; 660 661 static void tpm_tis_update_timeouts(struct tpm_chip *chip, 662 unsigned long *timeout_cap) 663 { 664 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 665 int i, rc; 666 u32 did_vid; 667 668 chip->timeout_adjusted = false; 669 670 if (chip->ops->clk_enable != NULL) 671 chip->ops->clk_enable(chip, true); 672 673 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid); 674 if (rc < 0) { 675 dev_warn(&chip->dev, "%s: failed to read did_vid: %d\n", 676 __func__, rc); 677 goto out; 678 } 679 680 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) { 681 if (vendor_timeout_overrides[i].did_vid != did_vid) 682 continue; 683 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us, 684 sizeof(vendor_timeout_overrides[i].timeout_us)); 685 chip->timeout_adjusted = true; 686 } 687 688 out: 689 if (chip->ops->clk_enable != NULL) 690 chip->ops->clk_enable(chip, false); 691 692 return; 693 } 694 695 /* 696 * Early probing for iTPM with STS_DATA_EXPECT flaw. 697 * Try sending command without itpm flag set and if that 698 * fails, repeat with itpm flag set. 699 */ 700 static int probe_itpm(struct tpm_chip *chip) 701 { 702 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 703 int rc = 0; 704 static const u8 cmd_getticks[] = { 705 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a, 706 0x00, 0x00, 0x00, 0xf1 707 }; 708 size_t len = sizeof(cmd_getticks); 709 u16 vendor; 710 711 if (test_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags)) 712 return 0; 713 714 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor); 715 if (rc < 0) 716 return rc; 717 718 /* probe only iTPMS */ 719 if (vendor != TPM_VID_INTEL) 720 return 0; 721 722 if (tpm_tis_request_locality(chip, 0) != 0) 723 return -EBUSY; 724 725 rc = tpm_tis_send_data(chip, cmd_getticks, len); 726 if (rc == 0) 727 goto out; 728 729 tpm_tis_ready(chip); 730 731 set_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags); 732 733 rc = tpm_tis_send_data(chip, cmd_getticks, len); 734 if (rc == 0) 735 dev_info(&chip->dev, "Detected an iTPM.\n"); 736 else { 737 clear_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags); 738 rc = -EFAULT; 739 } 740 741 out: 742 tpm_tis_ready(chip); 743 tpm_tis_relinquish_locality(chip, priv->locality); 744 745 return rc; 746 } 747 748 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status) 749 { 750 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 751 752 if (!test_bit(TPM_TIS_DEFAULT_CANCELLATION, &priv->flags)) { 753 switch (priv->manufacturer_id) { 754 case TPM_VID_WINBOND: 755 return ((status == TPM_STS_VALID) || 756 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY))); 757 case TPM_VID_STM: 758 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)); 759 default: 760 break; 761 } 762 } 763 764 return status == TPM_STS_COMMAND_READY; 765 } 766 767 static irqreturn_t tpm_tis_revert_interrupts(struct tpm_chip *chip) 768 { 769 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 770 const char *product; 771 const char *vendor; 772 773 dev_warn(&chip->dev, FW_BUG 774 "TPM interrupt storm detected, polling instead\n"); 775 776 vendor = dmi_get_system_info(DMI_SYS_VENDOR); 777 product = dmi_get_system_info(DMI_PRODUCT_VERSION); 778 779 if (vendor && product) { 780 dev_info(&chip->dev, 781 "Consider adding the following entry to tpm_tis_dmi_table:\n"); 782 dev_info(&chip->dev, "\tDMI_SYS_VENDOR: %s\n", vendor); 783 dev_info(&chip->dev, "\tDMI_PRODUCT_VERSION: %s\n", product); 784 } 785 786 if (tpm_tis_request_locality(chip, 0) != 0) 787 return IRQ_NONE; 788 789 __tpm_tis_disable_interrupts(chip); 790 tpm_tis_relinquish_locality(chip, 0); 791 792 schedule_work(&priv->free_irq_work); 793 794 return IRQ_HANDLED; 795 } 796 797 static irqreturn_t tpm_tis_update_unhandled_irqs(struct tpm_chip *chip) 798 { 799 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 800 irqreturn_t irqret = IRQ_HANDLED; 801 802 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) 803 return IRQ_HANDLED; 804 805 if (time_after(jiffies, priv->last_unhandled_irq + HZ/10)) 806 priv->unhandled_irqs = 1; 807 else 808 priv->unhandled_irqs++; 809 810 priv->last_unhandled_irq = jiffies; 811 812 if (priv->unhandled_irqs > TPM_TIS_MAX_UNHANDLED_IRQS) 813 irqret = tpm_tis_revert_interrupts(chip); 814 815 return irqret; 816 } 817 818 static irqreturn_t tis_int_handler(int dummy, void *dev_id) 819 { 820 struct tpm_chip *chip = dev_id; 821 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 822 u32 interrupt; 823 int rc; 824 825 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt); 826 if (rc < 0) 827 goto err; 828 829 if (interrupt == 0) 830 goto err; 831 832 set_bit(TPM_TIS_IRQ_TESTED, &priv->flags); 833 if (interrupt & TPM_INTF_DATA_AVAIL_INT) 834 wake_up_interruptible(&priv->read_queue); 835 836 if (interrupt & 837 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT | 838 TPM_INTF_CMD_READY_INT)) 839 wake_up_interruptible(&priv->int_queue); 840 841 /* Clear interrupts handled with TPM_EOI */ 842 tpm_tis_request_locality(chip, 0); 843 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt); 844 tpm_tis_relinquish_locality(chip, 0); 845 if (rc < 0) 846 goto err; 847 848 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt); 849 return IRQ_HANDLED; 850 851 err: 852 return tpm_tis_update_unhandled_irqs(chip); 853 } 854 855 static void tpm_tis_gen_interrupt(struct tpm_chip *chip) 856 { 857 const char *desc = "attempting to generate an interrupt"; 858 u32 cap2; 859 cap_t cap; 860 int ret; 861 862 chip->flags |= TPM_CHIP_FLAG_IRQ; 863 864 if (chip->flags & TPM_CHIP_FLAG_TPM2) 865 ret = tpm2_get_tpm_pt(chip, 0x100, &cap2, desc); 866 else 867 ret = tpm1_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc, 0); 868 869 if (ret) 870 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 871 } 872 873 static void tpm_tis_free_irq_func(struct work_struct *work) 874 { 875 struct tpm_tis_data *priv = container_of(work, typeof(*priv), free_irq_work); 876 struct tpm_chip *chip = priv->chip; 877 878 devm_free_irq(chip->dev.parent, priv->irq, chip); 879 priv->irq = 0; 880 } 881 882 /* Register the IRQ and issue a command that will cause an interrupt. If an 883 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse 884 * everything and leave in polling mode. Returns 0 on success. 885 */ 886 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask, 887 int flags, int irq) 888 { 889 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 890 u8 original_int_vec; 891 int rc; 892 u32 int_status; 893 894 INIT_WORK(&priv->free_irq_work, tpm_tis_free_irq_func); 895 896 rc = devm_request_threaded_irq(chip->dev.parent, irq, NULL, 897 tis_int_handler, IRQF_ONESHOT | flags, 898 dev_name(&chip->dev), chip); 899 if (rc) { 900 dev_info(&chip->dev, "Unable to request irq: %d for probe\n", 901 irq); 902 return -1; 903 } 904 priv->irq = irq; 905 906 rc = tpm_tis_request_locality(chip, 0); 907 if (rc < 0) 908 return rc; 909 910 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality), 911 &original_int_vec); 912 if (rc < 0) { 913 tpm_tis_relinquish_locality(chip, priv->locality); 914 return rc; 915 } 916 917 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq); 918 if (rc < 0) 919 goto restore_irqs; 920 921 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status); 922 if (rc < 0) 923 goto restore_irqs; 924 925 /* Clear all existing */ 926 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status); 927 if (rc < 0) 928 goto restore_irqs; 929 /* Turn on */ 930 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), 931 intmask | TPM_GLOBAL_INT_ENABLE); 932 if (rc < 0) 933 goto restore_irqs; 934 935 clear_bit(TPM_TIS_IRQ_TESTED, &priv->flags); 936 937 /* Generate an interrupt by having the core call through to 938 * tpm_tis_send 939 */ 940 tpm_tis_gen_interrupt(chip); 941 942 restore_irqs: 943 /* tpm_tis_send will either confirm the interrupt is working or it 944 * will call disable_irq which undoes all of the above. 945 */ 946 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) { 947 tpm_tis_write8(priv, original_int_vec, 948 TPM_INT_VECTOR(priv->locality)); 949 rc = -1; 950 } 951 952 tpm_tis_relinquish_locality(chip, priv->locality); 953 954 return rc; 955 } 956 957 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that 958 * do not have ACPI/etc. We typically expect the interrupt to be declared if 959 * present. 960 */ 961 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask) 962 { 963 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 964 u8 original_int_vec; 965 int i, rc; 966 967 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality), 968 &original_int_vec); 969 if (rc < 0) 970 return; 971 972 if (!original_int_vec) { 973 if (IS_ENABLED(CONFIG_X86)) 974 for (i = 3; i <= 15; i++) 975 if (!tpm_tis_probe_irq_single(chip, intmask, 0, 976 i)) 977 return; 978 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0, 979 original_int_vec)) 980 return; 981 } 982 983 void tpm_tis_remove(struct tpm_chip *chip) 984 { 985 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 986 u32 reg = TPM_INT_ENABLE(priv->locality); 987 u32 interrupt; 988 int rc; 989 990 tpm_tis_clkrun_enable(chip, true); 991 992 rc = tpm_tis_read32(priv, reg, &interrupt); 993 if (rc < 0) 994 interrupt = 0; 995 996 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt); 997 flush_work(&priv->free_irq_work); 998 999 tpm_tis_clkrun_enable(chip, false); 1000 1001 if (priv->ilb_base_addr) 1002 iounmap(priv->ilb_base_addr); 1003 } 1004 EXPORT_SYMBOL_GPL(tpm_tis_remove); 1005 1006 /** 1007 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration 1008 * of a single TPM command 1009 * @chip: TPM chip to use 1010 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running 1011 * 0 - Enable CLKRUN protocol 1012 * Call this function directly in tpm_tis_remove() in error or driver removal 1013 * path, since the chip->ops is set to NULL in tpm_chip_unregister(). 1014 */ 1015 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value) 1016 { 1017 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev); 1018 u32 clkrun_val; 1019 1020 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() || 1021 !data->ilb_base_addr) 1022 return; 1023 1024 if (value) { 1025 data->clkrun_enabled++; 1026 if (data->clkrun_enabled > 1) 1027 return; 1028 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET); 1029 1030 /* Disable LPC CLKRUN# */ 1031 clkrun_val &= ~LPC_CLKRUN_EN; 1032 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET); 1033 1034 /* 1035 * Write any random value on port 0x80 which is on LPC, to make 1036 * sure LPC clock is running before sending any TPM command. 1037 */ 1038 outb(0xCC, 0x80); 1039 } else { 1040 data->clkrun_enabled--; 1041 if (data->clkrun_enabled) 1042 return; 1043 1044 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET); 1045 1046 /* Enable LPC CLKRUN# */ 1047 clkrun_val |= LPC_CLKRUN_EN; 1048 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET); 1049 1050 /* 1051 * Write any random value on port 0x80 which is on LPC, to make 1052 * sure LPC clock is running before sending any TPM command. 1053 */ 1054 outb(0xCC, 0x80); 1055 } 1056 } 1057 1058 static const struct tpm_class_ops tpm_tis = { 1059 .flags = TPM_OPS_AUTO_STARTUP, 1060 .status = tpm_tis_status, 1061 .recv = tpm_tis_recv, 1062 .send = tpm_tis_send, 1063 .cancel = tpm_tis_ready, 1064 .update_timeouts = tpm_tis_update_timeouts, 1065 .update_durations = tpm_tis_update_durations, 1066 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 1067 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 1068 .req_canceled = tpm_tis_req_canceled, 1069 .request_locality = tpm_tis_request_locality, 1070 .relinquish_locality = tpm_tis_relinquish_locality, 1071 .clk_enable = tpm_tis_clkrun_enable, 1072 }; 1073 1074 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq, 1075 const struct tpm_tis_phy_ops *phy_ops, 1076 acpi_handle acpi_dev_handle) 1077 { 1078 u32 vendor; 1079 u32 intfcaps; 1080 u32 intmask; 1081 u32 clkrun_val; 1082 u8 rid; 1083 int rc, probe; 1084 struct tpm_chip *chip; 1085 1086 chip = tpmm_chip_alloc(dev, &tpm_tis); 1087 if (IS_ERR(chip)) 1088 return PTR_ERR(chip); 1089 1090 #ifdef CONFIG_ACPI 1091 chip->acpi_dev_handle = acpi_dev_handle; 1092 #endif 1093 1094 chip->hwrng.quality = priv->rng_quality; 1095 1096 /* Maximum timeouts */ 1097 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX); 1098 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX); 1099 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX); 1100 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX); 1101 priv->chip = chip; 1102 priv->timeout_min = TPM_TIMEOUT_USECS_MIN; 1103 priv->timeout_max = TPM_TIMEOUT_USECS_MAX; 1104 priv->phy_ops = phy_ops; 1105 priv->locality_count = 0; 1106 mutex_init(&priv->locality_count_mutex); 1107 1108 dev_set_drvdata(&chip->dev, priv); 1109 1110 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor); 1111 if (rc < 0) 1112 return rc; 1113 1114 priv->manufacturer_id = vendor; 1115 1116 if (priv->manufacturer_id == TPM_VID_ATML && 1117 !(chip->flags & TPM_CHIP_FLAG_TPM2)) { 1118 priv->timeout_min = TIS_TIMEOUT_MIN_ATML; 1119 priv->timeout_max = TIS_TIMEOUT_MAX_ATML; 1120 } 1121 1122 if (is_bsw()) { 1123 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR, 1124 ILB_REMAP_SIZE); 1125 if (!priv->ilb_base_addr) 1126 return -ENOMEM; 1127 1128 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET); 1129 /* Check if CLKRUN# is already not enabled in the LPC bus */ 1130 if (!(clkrun_val & LPC_CLKRUN_EN)) { 1131 iounmap(priv->ilb_base_addr); 1132 priv->ilb_base_addr = NULL; 1133 } 1134 } 1135 1136 if (chip->ops->clk_enable != NULL) 1137 chip->ops->clk_enable(chip, true); 1138 1139 if (wait_startup(chip, 0) != 0) { 1140 rc = -ENODEV; 1141 goto out_err; 1142 } 1143 1144 /* Take control of the TPM's interrupt hardware and shut it off */ 1145 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 1146 if (rc < 0) 1147 goto out_err; 1148 1149 /* Figure out the capabilities */ 1150 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps); 1151 if (rc < 0) 1152 goto out_err; 1153 1154 dev_dbg(dev, "TPM interface capabilities (0x%x):\n", 1155 intfcaps); 1156 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC) 1157 dev_dbg(dev, "\tBurst Count Static\n"); 1158 if (intfcaps & TPM_INTF_CMD_READY_INT) { 1159 intmask |= TPM_INTF_CMD_READY_INT; 1160 dev_dbg(dev, "\tCommand Ready Int Support\n"); 1161 } 1162 if (intfcaps & TPM_INTF_INT_EDGE_FALLING) 1163 dev_dbg(dev, "\tInterrupt Edge Falling\n"); 1164 if (intfcaps & TPM_INTF_INT_EDGE_RISING) 1165 dev_dbg(dev, "\tInterrupt Edge Rising\n"); 1166 if (intfcaps & TPM_INTF_INT_LEVEL_LOW) 1167 dev_dbg(dev, "\tInterrupt Level Low\n"); 1168 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH) 1169 dev_dbg(dev, "\tInterrupt Level High\n"); 1170 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) { 1171 intmask |= TPM_INTF_LOCALITY_CHANGE_INT; 1172 dev_dbg(dev, "\tLocality Change Int Support\n"); 1173 } 1174 if (intfcaps & TPM_INTF_STS_VALID_INT) { 1175 intmask |= TPM_INTF_STS_VALID_INT; 1176 dev_dbg(dev, "\tSts Valid Int Support\n"); 1177 } 1178 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) { 1179 intmask |= TPM_INTF_DATA_AVAIL_INT; 1180 dev_dbg(dev, "\tData Avail Int Support\n"); 1181 } 1182 1183 intmask &= ~TPM_GLOBAL_INT_ENABLE; 1184 1185 rc = tpm_tis_request_locality(chip, 0); 1186 if (rc < 0) { 1187 rc = -ENODEV; 1188 goto out_err; 1189 } 1190 1191 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 1192 tpm_tis_relinquish_locality(chip, 0); 1193 1194 rc = tpm_chip_start(chip); 1195 if (rc) 1196 goto out_err; 1197 rc = tpm2_probe(chip); 1198 tpm_chip_stop(chip); 1199 if (rc) 1200 goto out_err; 1201 1202 rc = tpm_tis_read8(priv, TPM_RID(0), &rid); 1203 if (rc < 0) 1204 goto out_err; 1205 1206 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n", 1207 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2", 1208 vendor >> 16, rid); 1209 1210 probe = probe_itpm(chip); 1211 if (probe < 0) { 1212 rc = -ENODEV; 1213 goto out_err; 1214 } 1215 1216 /* INTERRUPT Setup */ 1217 init_waitqueue_head(&priv->read_queue); 1218 init_waitqueue_head(&priv->int_queue); 1219 1220 rc = tpm_chip_bootstrap(chip); 1221 if (rc) 1222 goto out_err; 1223 1224 if (irq != -1) { 1225 /* 1226 * Before doing irq testing issue a command to the TPM in polling mode 1227 * to make sure it works. May as well use that command to set the 1228 * proper timeouts for the driver. 1229 */ 1230 1231 rc = tpm_tis_request_locality(chip, 0); 1232 if (rc < 0) 1233 goto out_err; 1234 1235 rc = tpm_get_timeouts(chip); 1236 1237 tpm_tis_relinquish_locality(chip, 0); 1238 1239 if (rc) { 1240 dev_err(dev, "Could not get TPM timeouts and durations\n"); 1241 rc = -ENODEV; 1242 goto out_err; 1243 } 1244 1245 if (irq) 1246 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED, 1247 irq); 1248 else 1249 tpm_tis_probe_irq(chip, intmask); 1250 1251 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 1252 priv->int_mask = intmask; 1253 } else { 1254 dev_err(&chip->dev, FW_BUG 1255 "TPM interrupt not working, polling instead\n"); 1256 1257 rc = tpm_tis_request_locality(chip, 0); 1258 if (rc < 0) 1259 goto out_err; 1260 tpm_tis_disable_interrupts(chip); 1261 tpm_tis_relinquish_locality(chip, 0); 1262 } 1263 } 1264 1265 rc = tpm_chip_register(chip); 1266 if (rc) 1267 goto out_err; 1268 1269 if (chip->ops->clk_enable != NULL) 1270 chip->ops->clk_enable(chip, false); 1271 1272 return 0; 1273 out_err: 1274 if (chip->ops->clk_enable != NULL) 1275 chip->ops->clk_enable(chip, false); 1276 1277 tpm_tis_remove(chip); 1278 1279 return rc; 1280 } 1281 EXPORT_SYMBOL_GPL(tpm_tis_core_init); 1282 1283 #ifdef CONFIG_PM_SLEEP 1284 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip) 1285 { 1286 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 1287 u32 intmask; 1288 int rc; 1289 1290 /* 1291 * Re-enable interrupts that device may have lost or BIOS/firmware may 1292 * have disabled. 1293 */ 1294 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq); 1295 if (rc < 0) { 1296 dev_err(&chip->dev, "Setting IRQ failed.\n"); 1297 return; 1298 } 1299 1300 intmask = priv->int_mask | TPM_GLOBAL_INT_ENABLE; 1301 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 1302 if (rc < 0) 1303 dev_err(&chip->dev, "Enabling interrupts failed.\n"); 1304 } 1305 1306 int tpm_tis_resume(struct device *dev) 1307 { 1308 struct tpm_chip *chip = dev_get_drvdata(dev); 1309 int ret; 1310 1311 ret = tpm_chip_start(chip); 1312 if (ret) 1313 return ret; 1314 1315 if (chip->flags & TPM_CHIP_FLAG_IRQ) 1316 tpm_tis_reenable_interrupts(chip); 1317 1318 /* 1319 * TPM 1.2 requires self-test on resume. This function actually returns 1320 * an error code but for unknown reason it isn't handled. 1321 */ 1322 if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) 1323 tpm1_do_selftest(chip); 1324 1325 tpm_chip_stop(chip); 1326 1327 ret = tpm_pm_resume(dev); 1328 if (ret) 1329 return ret; 1330 1331 return 0; 1332 } 1333 EXPORT_SYMBOL_GPL(tpm_tis_resume); 1334 #endif 1335 1336 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); 1337 MODULE_DESCRIPTION("TPM Driver"); 1338 MODULE_VERSION("2.0"); 1339 MODULE_LICENSE("GPL"); 1340