1 /* 2 * Copyright (C) 2005, 2006 IBM Corporation 3 * Copyright (C) 2014, 2015 Intel Corporation 4 * 5 * Authors: 6 * Leendert van Doorn <leendert@watson.ibm.com> 7 * Kylene Hall <kjhall@us.ibm.com> 8 * 9 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 10 * 11 * Device driver for TCG/TCPA TPM (trusted platform module). 12 * Specifications at www.trustedcomputinggroup.org 13 * 14 * This device driver implements the TPM interface as defined in 15 * the TCG TPM Interface Spec version 1.2, revision 1.0. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation, version 2 of the 20 * License. 21 */ 22 #include <linux/init.h> 23 #include <linux/module.h> 24 #include <linux/moduleparam.h> 25 #include <linux/pnp.h> 26 #include <linux/slab.h> 27 #include <linux/interrupt.h> 28 #include <linux/wait.h> 29 #include <linux/acpi.h> 30 #include <linux/freezer.h> 31 #include "tpm.h" 32 #include "tpm_tis_core.h" 33 34 /* This is a polling delay to check for status and burstcount. 35 * As per ddwg input, expectation is that status check and burstcount 36 * check should return within few usecs. 37 */ 38 #define TPM_POLL_SLEEP 1 /* msec */ 39 40 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value); 41 42 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask, 43 bool check_cancel, bool *canceled) 44 { 45 u8 status = chip->ops->status(chip); 46 47 *canceled = false; 48 if ((status & mask) == mask) 49 return true; 50 if (check_cancel && chip->ops->req_canceled(chip, status)) { 51 *canceled = true; 52 return true; 53 } 54 return false; 55 } 56 57 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask, 58 unsigned long timeout, wait_queue_head_t *queue, 59 bool check_cancel) 60 { 61 unsigned long stop; 62 long rc; 63 u8 status; 64 bool canceled = false; 65 66 /* check current status */ 67 status = chip->ops->status(chip); 68 if ((status & mask) == mask) 69 return 0; 70 71 stop = jiffies + timeout; 72 73 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 74 again: 75 timeout = stop - jiffies; 76 if ((long)timeout <= 0) 77 return -ETIME; 78 rc = wait_event_interruptible_timeout(*queue, 79 wait_for_tpm_stat_cond(chip, mask, check_cancel, 80 &canceled), 81 timeout); 82 if (rc > 0) { 83 if (canceled) 84 return -ECANCELED; 85 return 0; 86 } 87 if (rc == -ERESTARTSYS && freezing(current)) { 88 clear_thread_flag(TIF_SIGPENDING); 89 goto again; 90 } 91 } else { 92 do { 93 tpm_msleep(TPM_POLL_SLEEP); 94 status = chip->ops->status(chip); 95 if ((status & mask) == mask) 96 return 0; 97 } while (time_before(jiffies, stop)); 98 } 99 return -ETIME; 100 } 101 102 /* Before we attempt to access the TPM we must see that the valid bit is set. 103 * The specification says that this bit is 0 at reset and remains 0 until the 104 * 'TPM has gone through its self test and initialization and has established 105 * correct values in the other bits.' 106 */ 107 static int wait_startup(struct tpm_chip *chip, int l) 108 { 109 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 110 unsigned long stop = jiffies + chip->timeout_a; 111 112 do { 113 int rc; 114 u8 access; 115 116 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 117 if (rc < 0) 118 return rc; 119 120 if (access & TPM_ACCESS_VALID) 121 return 0; 122 tpm_msleep(TPM_TIMEOUT); 123 } while (time_before(jiffies, stop)); 124 return -1; 125 } 126 127 static bool check_locality(struct tpm_chip *chip, int l) 128 { 129 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 130 int rc; 131 u8 access; 132 133 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 134 if (rc < 0) 135 return false; 136 137 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == 138 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) { 139 priv->locality = l; 140 return true; 141 } 142 143 return false; 144 } 145 146 static int release_locality(struct tpm_chip *chip, int l) 147 { 148 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 149 150 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY); 151 152 return 0; 153 } 154 155 static int request_locality(struct tpm_chip *chip, int l) 156 { 157 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 158 unsigned long stop, timeout; 159 long rc; 160 161 if (check_locality(chip, l)) 162 return l; 163 164 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE); 165 if (rc < 0) 166 return rc; 167 168 stop = jiffies + chip->timeout_a; 169 170 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 171 again: 172 timeout = stop - jiffies; 173 if ((long)timeout <= 0) 174 return -1; 175 rc = wait_event_interruptible_timeout(priv->int_queue, 176 (check_locality 177 (chip, l)), 178 timeout); 179 if (rc > 0) 180 return l; 181 if (rc == -ERESTARTSYS && freezing(current)) { 182 clear_thread_flag(TIF_SIGPENDING); 183 goto again; 184 } 185 } else { 186 /* wait for burstcount */ 187 do { 188 if (check_locality(chip, l)) 189 return l; 190 tpm_msleep(TPM_TIMEOUT); 191 } while (time_before(jiffies, stop)); 192 } 193 return -1; 194 } 195 196 static u8 tpm_tis_status(struct tpm_chip *chip) 197 { 198 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 199 int rc; 200 u8 status; 201 202 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status); 203 if (rc < 0) 204 return 0; 205 206 return status; 207 } 208 209 static void tpm_tis_ready(struct tpm_chip *chip) 210 { 211 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 212 213 /* this causes the current command to be aborted */ 214 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY); 215 } 216 217 static int get_burstcount(struct tpm_chip *chip) 218 { 219 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 220 unsigned long stop; 221 int burstcnt, rc; 222 u32 value; 223 224 /* wait for burstcount */ 225 if (chip->flags & TPM_CHIP_FLAG_TPM2) 226 stop = jiffies + chip->timeout_a; 227 else 228 stop = jiffies + chip->timeout_d; 229 do { 230 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value); 231 if (rc < 0) 232 return rc; 233 234 burstcnt = (value >> 8) & 0xFFFF; 235 if (burstcnt) 236 return burstcnt; 237 tpm_msleep(TPM_POLL_SLEEP); 238 } while (time_before(jiffies, stop)); 239 return -EBUSY; 240 } 241 242 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) 243 { 244 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 245 int size = 0, burstcnt, rc; 246 247 while (size < count) { 248 rc = wait_for_tpm_stat(chip, 249 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 250 chip->timeout_c, 251 &priv->read_queue, true); 252 if (rc < 0) 253 return rc; 254 burstcnt = get_burstcount(chip); 255 if (burstcnt < 0) { 256 dev_err(&chip->dev, "Unable to read burstcount\n"); 257 return burstcnt; 258 } 259 burstcnt = min_t(int, burstcnt, count - size); 260 261 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality), 262 burstcnt, buf + size); 263 if (rc < 0) 264 return rc; 265 266 size += burstcnt; 267 } 268 return size; 269 } 270 271 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count) 272 { 273 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 274 int size = 0; 275 int status; 276 u32 expected; 277 278 if (count < TPM_HEADER_SIZE) { 279 size = -EIO; 280 goto out; 281 } 282 283 size = recv_data(chip, buf, TPM_HEADER_SIZE); 284 /* read first 10 bytes, including tag, paramsize, and result */ 285 if (size < TPM_HEADER_SIZE) { 286 dev_err(&chip->dev, "Unable to read header\n"); 287 goto out; 288 } 289 290 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 291 if (expected > count || expected < TPM_HEADER_SIZE) { 292 size = -EIO; 293 goto out; 294 } 295 296 size += recv_data(chip, &buf[TPM_HEADER_SIZE], 297 expected - TPM_HEADER_SIZE); 298 if (size < expected) { 299 dev_err(&chip->dev, "Unable to read remainder of result\n"); 300 size = -ETIME; 301 goto out; 302 } 303 304 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 305 &priv->int_queue, false) < 0) { 306 size = -ETIME; 307 goto out; 308 } 309 status = tpm_tis_status(chip); 310 if (status & TPM_STS_DATA_AVAIL) { /* retry? */ 311 dev_err(&chip->dev, "Error left over data\n"); 312 size = -EIO; 313 goto out; 314 } 315 316 out: 317 tpm_tis_ready(chip); 318 return size; 319 } 320 321 /* 322 * If interrupts are used (signaled by an irq set in the vendor structure) 323 * tpm.c can skip polling for the data to be available as the interrupt is 324 * waited for here 325 */ 326 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len) 327 { 328 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 329 int rc, status, burstcnt; 330 size_t count = 0; 331 bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND; 332 333 status = tpm_tis_status(chip); 334 if ((status & TPM_STS_COMMAND_READY) == 0) { 335 tpm_tis_ready(chip); 336 if (wait_for_tpm_stat 337 (chip, TPM_STS_COMMAND_READY, chip->timeout_b, 338 &priv->int_queue, false) < 0) { 339 rc = -ETIME; 340 goto out_err; 341 } 342 } 343 344 while (count < len - 1) { 345 burstcnt = get_burstcount(chip); 346 if (burstcnt < 0) { 347 dev_err(&chip->dev, "Unable to read burstcount\n"); 348 rc = burstcnt; 349 goto out_err; 350 } 351 burstcnt = min_t(int, burstcnt, len - count - 1); 352 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality), 353 burstcnt, buf + count); 354 if (rc < 0) 355 goto out_err; 356 357 count += burstcnt; 358 359 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 360 &priv->int_queue, false) < 0) { 361 rc = -ETIME; 362 goto out_err; 363 } 364 status = tpm_tis_status(chip); 365 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) { 366 rc = -EIO; 367 goto out_err; 368 } 369 } 370 371 /* write last byte */ 372 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]); 373 if (rc < 0) 374 goto out_err; 375 376 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 377 &priv->int_queue, false) < 0) { 378 rc = -ETIME; 379 goto out_err; 380 } 381 status = tpm_tis_status(chip); 382 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) { 383 rc = -EIO; 384 goto out_err; 385 } 386 387 return 0; 388 389 out_err: 390 tpm_tis_ready(chip); 391 return rc; 392 } 393 394 static void disable_interrupts(struct tpm_chip *chip) 395 { 396 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 397 u32 intmask; 398 int rc; 399 400 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 401 if (rc < 0) 402 intmask = 0; 403 404 intmask &= ~TPM_GLOBAL_INT_ENABLE; 405 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 406 407 devm_free_irq(chip->dev.parent, priv->irq, chip); 408 priv->irq = 0; 409 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 410 } 411 412 /* 413 * If interrupts are used (signaled by an irq set in the vendor structure) 414 * tpm.c can skip polling for the data to be available as the interrupt is 415 * waited for here 416 */ 417 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len) 418 { 419 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 420 int rc; 421 u32 ordinal; 422 unsigned long dur; 423 424 rc = tpm_tis_send_data(chip, buf, len); 425 if (rc < 0) 426 return rc; 427 428 /* go and do it */ 429 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO); 430 if (rc < 0) 431 goto out_err; 432 433 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 434 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 435 436 if (chip->flags & TPM_CHIP_FLAG_TPM2) 437 dur = tpm2_calc_ordinal_duration(chip, ordinal); 438 else 439 dur = tpm_calc_ordinal_duration(chip, ordinal); 440 441 if (wait_for_tpm_stat 442 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur, 443 &priv->read_queue, false) < 0) { 444 rc = -ETIME; 445 goto out_err; 446 } 447 } 448 return len; 449 out_err: 450 tpm_tis_ready(chip); 451 return rc; 452 } 453 454 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len) 455 { 456 int rc, irq; 457 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 458 459 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested) 460 return tpm_tis_send_main(chip, buf, len); 461 462 /* Verify receipt of the expected IRQ */ 463 irq = priv->irq; 464 priv->irq = 0; 465 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 466 rc = tpm_tis_send_main(chip, buf, len); 467 priv->irq = irq; 468 chip->flags |= TPM_CHIP_FLAG_IRQ; 469 if (!priv->irq_tested) 470 tpm_msleep(1); 471 if (!priv->irq_tested) 472 disable_interrupts(chip); 473 priv->irq_tested = true; 474 return rc; 475 } 476 477 struct tis_vendor_timeout_override { 478 u32 did_vid; 479 unsigned long timeout_us[4]; 480 }; 481 482 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = { 483 /* Atmel 3204 */ 484 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000), 485 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, 486 }; 487 488 static bool tpm_tis_update_timeouts(struct tpm_chip *chip, 489 unsigned long *timeout_cap) 490 { 491 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 492 int i, rc; 493 u32 did_vid; 494 495 if (chip->ops->clk_enable != NULL) 496 chip->ops->clk_enable(chip, true); 497 498 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid); 499 if (rc < 0) 500 goto out; 501 502 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) { 503 if (vendor_timeout_overrides[i].did_vid != did_vid) 504 continue; 505 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us, 506 sizeof(vendor_timeout_overrides[i].timeout_us)); 507 rc = true; 508 } 509 510 rc = false; 511 512 out: 513 if (chip->ops->clk_enable != NULL) 514 chip->ops->clk_enable(chip, false); 515 516 return rc; 517 } 518 519 /* 520 * Early probing for iTPM with STS_DATA_EXPECT flaw. 521 * Try sending command without itpm flag set and if that 522 * fails, repeat with itpm flag set. 523 */ 524 static int probe_itpm(struct tpm_chip *chip) 525 { 526 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 527 int rc = 0; 528 static const u8 cmd_getticks[] = { 529 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a, 530 0x00, 0x00, 0x00, 0xf1 531 }; 532 size_t len = sizeof(cmd_getticks); 533 u16 vendor; 534 535 if (priv->flags & TPM_TIS_ITPM_WORKAROUND) 536 return 0; 537 538 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor); 539 if (rc < 0) 540 return rc; 541 542 /* probe only iTPMS */ 543 if (vendor != TPM_VID_INTEL) 544 return 0; 545 546 if (request_locality(chip, 0) != 0) 547 return -EBUSY; 548 549 rc = tpm_tis_send_data(chip, cmd_getticks, len); 550 if (rc == 0) 551 goto out; 552 553 tpm_tis_ready(chip); 554 555 priv->flags |= TPM_TIS_ITPM_WORKAROUND; 556 557 rc = tpm_tis_send_data(chip, cmd_getticks, len); 558 if (rc == 0) 559 dev_info(&chip->dev, "Detected an iTPM.\n"); 560 else { 561 priv->flags &= ~TPM_TIS_ITPM_WORKAROUND; 562 rc = -EFAULT; 563 } 564 565 out: 566 tpm_tis_ready(chip); 567 release_locality(chip, priv->locality); 568 569 return rc; 570 } 571 572 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status) 573 { 574 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 575 576 switch (priv->manufacturer_id) { 577 case TPM_VID_WINBOND: 578 return ((status == TPM_STS_VALID) || 579 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY))); 580 case TPM_VID_STM: 581 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)); 582 default: 583 return (status == TPM_STS_COMMAND_READY); 584 } 585 } 586 587 static irqreturn_t tis_int_handler(int dummy, void *dev_id) 588 { 589 struct tpm_chip *chip = dev_id; 590 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 591 u32 interrupt; 592 int i, rc; 593 594 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt); 595 if (rc < 0) 596 return IRQ_NONE; 597 598 if (interrupt == 0) 599 return IRQ_NONE; 600 601 priv->irq_tested = true; 602 if (interrupt & TPM_INTF_DATA_AVAIL_INT) 603 wake_up_interruptible(&priv->read_queue); 604 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT) 605 for (i = 0; i < 5; i++) 606 if (check_locality(chip, i)) 607 break; 608 if (interrupt & 609 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT | 610 TPM_INTF_CMD_READY_INT)) 611 wake_up_interruptible(&priv->int_queue); 612 613 /* Clear interrupts handled with TPM_EOI */ 614 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt); 615 if (rc < 0) 616 return IRQ_NONE; 617 618 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt); 619 return IRQ_HANDLED; 620 } 621 622 static int tpm_tis_gen_interrupt(struct tpm_chip *chip) 623 { 624 const char *desc = "attempting to generate an interrupt"; 625 u32 cap2; 626 cap_t cap; 627 628 if (chip->flags & TPM_CHIP_FLAG_TPM2) 629 return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc); 630 else 631 return tpm_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc, 632 0); 633 } 634 635 /* Register the IRQ and issue a command that will cause an interrupt. If an 636 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse 637 * everything and leave in polling mode. Returns 0 on success. 638 */ 639 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask, 640 int flags, int irq) 641 { 642 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 643 u8 original_int_vec; 644 int rc; 645 u32 int_status; 646 647 if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags, 648 dev_name(&chip->dev), chip) != 0) { 649 dev_info(&chip->dev, "Unable to request irq: %d for probe\n", 650 irq); 651 return -1; 652 } 653 priv->irq = irq; 654 655 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality), 656 &original_int_vec); 657 if (rc < 0) 658 return rc; 659 660 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq); 661 if (rc < 0) 662 return rc; 663 664 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status); 665 if (rc < 0) 666 return rc; 667 668 /* Clear all existing */ 669 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status); 670 if (rc < 0) 671 return rc; 672 673 /* Turn on */ 674 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), 675 intmask | TPM_GLOBAL_INT_ENABLE); 676 if (rc < 0) 677 return rc; 678 679 priv->irq_tested = false; 680 681 /* Generate an interrupt by having the core call through to 682 * tpm_tis_send 683 */ 684 rc = tpm_tis_gen_interrupt(chip); 685 if (rc < 0) 686 return rc; 687 688 /* tpm_tis_send will either confirm the interrupt is working or it 689 * will call disable_irq which undoes all of the above. 690 */ 691 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) { 692 rc = tpm_tis_write8(priv, original_int_vec, 693 TPM_INT_VECTOR(priv->locality)); 694 if (rc < 0) 695 return rc; 696 697 return 1; 698 } 699 700 return 0; 701 } 702 703 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that 704 * do not have ACPI/etc. We typically expect the interrupt to be declared if 705 * present. 706 */ 707 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask) 708 { 709 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 710 u8 original_int_vec; 711 int i, rc; 712 713 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality), 714 &original_int_vec); 715 if (rc < 0) 716 return; 717 718 if (!original_int_vec) { 719 if (IS_ENABLED(CONFIG_X86)) 720 for (i = 3; i <= 15; i++) 721 if (!tpm_tis_probe_irq_single(chip, intmask, 0, 722 i)) 723 return; 724 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0, 725 original_int_vec)) 726 return; 727 } 728 729 void tpm_tis_remove(struct tpm_chip *chip) 730 { 731 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 732 u32 reg = TPM_INT_ENABLE(priv->locality); 733 u32 interrupt; 734 int rc; 735 736 tpm_tis_clkrun_enable(chip, true); 737 738 rc = tpm_tis_read32(priv, reg, &interrupt); 739 if (rc < 0) 740 interrupt = 0; 741 742 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt); 743 744 tpm_tis_clkrun_enable(chip, false); 745 746 if (priv->ilb_base_addr) 747 iounmap(priv->ilb_base_addr); 748 } 749 EXPORT_SYMBOL_GPL(tpm_tis_remove); 750 751 /** 752 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration 753 * of a single TPM command 754 * @chip: TPM chip to use 755 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running 756 * 0 - Enable CLKRUN protocol 757 * Call this function directly in tpm_tis_remove() in error or driver removal 758 * path, since the chip->ops is set to NULL in tpm_chip_unregister(). 759 */ 760 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value) 761 { 762 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev); 763 u32 clkrun_val; 764 765 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() || 766 !data->ilb_base_addr) 767 return; 768 769 if (value) { 770 data->clkrun_enabled++; 771 if (data->clkrun_enabled > 1) 772 return; 773 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET); 774 775 /* Disable LPC CLKRUN# */ 776 clkrun_val &= ~LPC_CLKRUN_EN; 777 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET); 778 779 /* 780 * Write any random value on port 0x80 which is on LPC, to make 781 * sure LPC clock is running before sending any TPM command. 782 */ 783 outb(0xCC, 0x80); 784 } else { 785 data->clkrun_enabled--; 786 if (data->clkrun_enabled) 787 return; 788 789 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET); 790 791 /* Enable LPC CLKRUN# */ 792 clkrun_val |= LPC_CLKRUN_EN; 793 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET); 794 795 /* 796 * Write any random value on port 0x80 which is on LPC, to make 797 * sure LPC clock is running before sending any TPM command. 798 */ 799 outb(0xCC, 0x80); 800 } 801 } 802 803 static const struct tpm_class_ops tpm_tis = { 804 .flags = TPM_OPS_AUTO_STARTUP, 805 .status = tpm_tis_status, 806 .recv = tpm_tis_recv, 807 .send = tpm_tis_send, 808 .cancel = tpm_tis_ready, 809 .update_timeouts = tpm_tis_update_timeouts, 810 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 811 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 812 .req_canceled = tpm_tis_req_canceled, 813 .request_locality = request_locality, 814 .relinquish_locality = release_locality, 815 .clk_enable = tpm_tis_clkrun_enable, 816 }; 817 818 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq, 819 const struct tpm_tis_phy_ops *phy_ops, 820 acpi_handle acpi_dev_handle) 821 { 822 u32 vendor; 823 u32 intfcaps; 824 u32 intmask; 825 u32 clkrun_val; 826 u8 rid; 827 int rc, probe; 828 struct tpm_chip *chip; 829 830 chip = tpmm_chip_alloc(dev, &tpm_tis); 831 if (IS_ERR(chip)) 832 return PTR_ERR(chip); 833 834 #ifdef CONFIG_ACPI 835 chip->acpi_dev_handle = acpi_dev_handle; 836 #endif 837 838 /* Maximum timeouts */ 839 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX); 840 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX); 841 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX); 842 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX); 843 priv->phy_ops = phy_ops; 844 dev_set_drvdata(&chip->dev, priv); 845 846 if (is_bsw()) { 847 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR, 848 ILB_REMAP_SIZE); 849 if (!priv->ilb_base_addr) 850 return -ENOMEM; 851 852 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET); 853 /* Check if CLKRUN# is already not enabled in the LPC bus */ 854 if (!(clkrun_val & LPC_CLKRUN_EN)) { 855 iounmap(priv->ilb_base_addr); 856 priv->ilb_base_addr = NULL; 857 } 858 } 859 860 if (chip->ops->clk_enable != NULL) 861 chip->ops->clk_enable(chip, true); 862 863 if (wait_startup(chip, 0) != 0) { 864 rc = -ENODEV; 865 goto out_err; 866 } 867 868 /* Take control of the TPM's interrupt hardware and shut it off */ 869 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 870 if (rc < 0) 871 goto out_err; 872 873 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT | 874 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT; 875 intmask &= ~TPM_GLOBAL_INT_ENABLE; 876 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 877 878 rc = tpm2_probe(chip); 879 if (rc) 880 goto out_err; 881 882 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor); 883 if (rc < 0) 884 goto out_err; 885 886 priv->manufacturer_id = vendor; 887 888 rc = tpm_tis_read8(priv, TPM_RID(0), &rid); 889 if (rc < 0) 890 goto out_err; 891 892 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n", 893 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2", 894 vendor >> 16, rid); 895 896 probe = probe_itpm(chip); 897 if (probe < 0) { 898 rc = -ENODEV; 899 goto out_err; 900 } 901 902 /* Figure out the capabilities */ 903 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps); 904 if (rc < 0) 905 goto out_err; 906 907 dev_dbg(dev, "TPM interface capabilities (0x%x):\n", 908 intfcaps); 909 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC) 910 dev_dbg(dev, "\tBurst Count Static\n"); 911 if (intfcaps & TPM_INTF_CMD_READY_INT) 912 dev_dbg(dev, "\tCommand Ready Int Support\n"); 913 if (intfcaps & TPM_INTF_INT_EDGE_FALLING) 914 dev_dbg(dev, "\tInterrupt Edge Falling\n"); 915 if (intfcaps & TPM_INTF_INT_EDGE_RISING) 916 dev_dbg(dev, "\tInterrupt Edge Rising\n"); 917 if (intfcaps & TPM_INTF_INT_LEVEL_LOW) 918 dev_dbg(dev, "\tInterrupt Level Low\n"); 919 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH) 920 dev_dbg(dev, "\tInterrupt Level High\n"); 921 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) 922 dev_dbg(dev, "\tLocality Change Int Support\n"); 923 if (intfcaps & TPM_INTF_STS_VALID_INT) 924 dev_dbg(dev, "\tSts Valid Int Support\n"); 925 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) 926 dev_dbg(dev, "\tData Avail Int Support\n"); 927 928 /* INTERRUPT Setup */ 929 init_waitqueue_head(&priv->read_queue); 930 init_waitqueue_head(&priv->int_queue); 931 if (irq != -1) { 932 /* Before doing irq testing issue a command to the TPM in polling mode 933 * to make sure it works. May as well use that command to set the 934 * proper timeouts for the driver. 935 */ 936 if (tpm_get_timeouts(chip)) { 937 dev_err(dev, "Could not get TPM timeouts and durations\n"); 938 rc = -ENODEV; 939 goto out_err; 940 } 941 942 if (irq) { 943 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED, 944 irq); 945 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) 946 dev_err(&chip->dev, FW_BUG 947 "TPM interrupt not working, polling instead\n"); 948 } else { 949 tpm_tis_probe_irq(chip, intmask); 950 } 951 } 952 953 rc = tpm_chip_register(chip); 954 if (rc) 955 goto out_err; 956 957 if (chip->ops->clk_enable != NULL) 958 chip->ops->clk_enable(chip, false); 959 960 return 0; 961 out_err: 962 if ((chip->ops != NULL) && (chip->ops->clk_enable != NULL)) 963 chip->ops->clk_enable(chip, false); 964 965 tpm_tis_remove(chip); 966 967 return rc; 968 } 969 EXPORT_SYMBOL_GPL(tpm_tis_core_init); 970 971 #ifdef CONFIG_PM_SLEEP 972 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip) 973 { 974 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 975 u32 intmask; 976 int rc; 977 978 if (chip->ops->clk_enable != NULL) 979 chip->ops->clk_enable(chip, true); 980 981 /* reenable interrupts that device may have lost or 982 * BIOS/firmware may have disabled 983 */ 984 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq); 985 if (rc < 0) 986 goto out; 987 988 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 989 if (rc < 0) 990 goto out; 991 992 intmask |= TPM_INTF_CMD_READY_INT 993 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT 994 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE; 995 996 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 997 998 out: 999 if (chip->ops->clk_enable != NULL) 1000 chip->ops->clk_enable(chip, false); 1001 1002 return; 1003 } 1004 1005 int tpm_tis_resume(struct device *dev) 1006 { 1007 struct tpm_chip *chip = dev_get_drvdata(dev); 1008 int ret; 1009 1010 if (chip->flags & TPM_CHIP_FLAG_IRQ) 1011 tpm_tis_reenable_interrupts(chip); 1012 1013 ret = tpm_pm_resume(dev); 1014 if (ret) 1015 return ret; 1016 1017 /* TPM 1.2 requires self-test on resume. This function actually returns 1018 * an error code but for unknown reason it isn't handled. 1019 */ 1020 if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) 1021 tpm_do_selftest(chip); 1022 1023 return 0; 1024 } 1025 EXPORT_SYMBOL_GPL(tpm_tis_resume); 1026 #endif 1027 1028 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); 1029 MODULE_DESCRIPTION("TPM Driver"); 1030 MODULE_VERSION("2.0"); 1031 MODULE_LICENSE("GPL"); 1032