1 /* 2 * Copyright (C) 2005, 2006 IBM Corporation 3 * Copyright (C) 2014, 2015 Intel Corporation 4 * 5 * Authors: 6 * Leendert van Doorn <leendert@watson.ibm.com> 7 * Kylene Hall <kjhall@us.ibm.com> 8 * 9 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 10 * 11 * Device driver for TCG/TCPA TPM (trusted platform module). 12 * Specifications at www.trustedcomputinggroup.org 13 * 14 * This device driver implements the TPM interface as defined in 15 * the TCG TPM Interface Spec version 1.2, revision 1.0. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation, version 2 of the 20 * License. 21 */ 22 #include <linux/init.h> 23 #include <linux/module.h> 24 #include <linux/moduleparam.h> 25 #include <linux/pnp.h> 26 #include <linux/slab.h> 27 #include <linux/interrupt.h> 28 #include <linux/wait.h> 29 #include <linux/acpi.h> 30 #include <linux/freezer.h> 31 #include "tpm.h" 32 #include "tpm_tis_core.h" 33 34 /* This is a polling delay to check for status and burstcount. 35 * As per ddwg input, expectation is that status check and burstcount 36 * check should return within few usecs. 37 */ 38 #define TPM_POLL_SLEEP 1 /* msec */ 39 40 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value); 41 42 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask, 43 bool check_cancel, bool *canceled) 44 { 45 u8 status = chip->ops->status(chip); 46 47 *canceled = false; 48 if ((status & mask) == mask) 49 return true; 50 if (check_cancel && chip->ops->req_canceled(chip, status)) { 51 *canceled = true; 52 return true; 53 } 54 return false; 55 } 56 57 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask, 58 unsigned long timeout, wait_queue_head_t *queue, 59 bool check_cancel) 60 { 61 unsigned long stop; 62 long rc; 63 u8 status; 64 bool canceled = false; 65 66 /* check current status */ 67 status = chip->ops->status(chip); 68 if ((status & mask) == mask) 69 return 0; 70 71 stop = jiffies + timeout; 72 73 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 74 again: 75 timeout = stop - jiffies; 76 if ((long)timeout <= 0) 77 return -ETIME; 78 rc = wait_event_interruptible_timeout(*queue, 79 wait_for_tpm_stat_cond(chip, mask, check_cancel, 80 &canceled), 81 timeout); 82 if (rc > 0) { 83 if (canceled) 84 return -ECANCELED; 85 return 0; 86 } 87 if (rc == -ERESTARTSYS && freezing(current)) { 88 clear_thread_flag(TIF_SIGPENDING); 89 goto again; 90 } 91 } else { 92 do { 93 tpm_msleep(TPM_POLL_SLEEP); 94 status = chip->ops->status(chip); 95 if ((status & mask) == mask) 96 return 0; 97 } while (time_before(jiffies, stop)); 98 } 99 return -ETIME; 100 } 101 102 /* Before we attempt to access the TPM we must see that the valid bit is set. 103 * The specification says that this bit is 0 at reset and remains 0 until the 104 * 'TPM has gone through its self test and initialization and has established 105 * correct values in the other bits.' 106 */ 107 static int wait_startup(struct tpm_chip *chip, int l) 108 { 109 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 110 unsigned long stop = jiffies + chip->timeout_a; 111 112 do { 113 int rc; 114 u8 access; 115 116 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 117 if (rc < 0) 118 return rc; 119 120 if (access & TPM_ACCESS_VALID) 121 return 0; 122 tpm_msleep(TPM_TIMEOUT); 123 } while (time_before(jiffies, stop)); 124 return -1; 125 } 126 127 static bool check_locality(struct tpm_chip *chip, int l) 128 { 129 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 130 int rc; 131 u8 access; 132 133 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 134 if (rc < 0) 135 return false; 136 137 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == 138 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) { 139 priv->locality = l; 140 return true; 141 } 142 143 return false; 144 } 145 146 static void release_locality(struct tpm_chip *chip, int l) 147 { 148 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 149 150 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY); 151 } 152 153 static int request_locality(struct tpm_chip *chip, int l) 154 { 155 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 156 unsigned long stop, timeout; 157 long rc; 158 159 if (check_locality(chip, l)) 160 return l; 161 162 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE); 163 if (rc < 0) 164 return rc; 165 166 stop = jiffies + chip->timeout_a; 167 168 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 169 again: 170 timeout = stop - jiffies; 171 if ((long)timeout <= 0) 172 return -1; 173 rc = wait_event_interruptible_timeout(priv->int_queue, 174 (check_locality 175 (chip, l)), 176 timeout); 177 if (rc > 0) 178 return l; 179 if (rc == -ERESTARTSYS && freezing(current)) { 180 clear_thread_flag(TIF_SIGPENDING); 181 goto again; 182 } 183 } else { 184 /* wait for burstcount */ 185 do { 186 if (check_locality(chip, l)) 187 return l; 188 tpm_msleep(TPM_TIMEOUT); 189 } while (time_before(jiffies, stop)); 190 } 191 return -1; 192 } 193 194 static u8 tpm_tis_status(struct tpm_chip *chip) 195 { 196 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 197 int rc; 198 u8 status; 199 200 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status); 201 if (rc < 0) 202 return 0; 203 204 return status; 205 } 206 207 static void tpm_tis_ready(struct tpm_chip *chip) 208 { 209 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 210 211 /* this causes the current command to be aborted */ 212 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY); 213 } 214 215 static int get_burstcount(struct tpm_chip *chip) 216 { 217 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 218 unsigned long stop; 219 int burstcnt, rc; 220 u32 value; 221 222 /* wait for burstcount */ 223 if (chip->flags & TPM_CHIP_FLAG_TPM2) 224 stop = jiffies + chip->timeout_a; 225 else 226 stop = jiffies + chip->timeout_d; 227 do { 228 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value); 229 if (rc < 0) 230 return rc; 231 232 burstcnt = (value >> 8) & 0xFFFF; 233 if (burstcnt) 234 return burstcnt; 235 tpm_msleep(TPM_POLL_SLEEP); 236 } while (time_before(jiffies, stop)); 237 return -EBUSY; 238 } 239 240 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) 241 { 242 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 243 int size = 0, burstcnt, rc; 244 245 while (size < count) { 246 rc = wait_for_tpm_stat(chip, 247 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 248 chip->timeout_c, 249 &priv->read_queue, true); 250 if (rc < 0) 251 return rc; 252 burstcnt = get_burstcount(chip); 253 if (burstcnt < 0) { 254 dev_err(&chip->dev, "Unable to read burstcount\n"); 255 return burstcnt; 256 } 257 burstcnt = min_t(int, burstcnt, count - size); 258 259 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality), 260 burstcnt, buf + size); 261 if (rc < 0) 262 return rc; 263 264 size += burstcnt; 265 } 266 return size; 267 } 268 269 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count) 270 { 271 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 272 int size = 0; 273 int expected, status; 274 275 if (count < TPM_HEADER_SIZE) { 276 size = -EIO; 277 goto out; 278 } 279 280 size = recv_data(chip, buf, TPM_HEADER_SIZE); 281 /* read first 10 bytes, including tag, paramsize, and result */ 282 if (size < TPM_HEADER_SIZE) { 283 dev_err(&chip->dev, "Unable to read header\n"); 284 goto out; 285 } 286 287 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 288 if (expected > count) { 289 size = -EIO; 290 goto out; 291 } 292 293 size += recv_data(chip, &buf[TPM_HEADER_SIZE], 294 expected - TPM_HEADER_SIZE); 295 if (size < expected) { 296 dev_err(&chip->dev, "Unable to read remainder of result\n"); 297 size = -ETIME; 298 goto out; 299 } 300 301 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 302 &priv->int_queue, false) < 0) { 303 size = -ETIME; 304 goto out; 305 } 306 status = tpm_tis_status(chip); 307 if (status & TPM_STS_DATA_AVAIL) { /* retry? */ 308 dev_err(&chip->dev, "Error left over data\n"); 309 size = -EIO; 310 goto out; 311 } 312 313 out: 314 tpm_tis_ready(chip); 315 return size; 316 } 317 318 /* 319 * If interrupts are used (signaled by an irq set in the vendor structure) 320 * tpm.c can skip polling for the data to be available as the interrupt is 321 * waited for here 322 */ 323 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len) 324 { 325 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 326 int rc, status, burstcnt; 327 size_t count = 0; 328 bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND; 329 330 status = tpm_tis_status(chip); 331 if ((status & TPM_STS_COMMAND_READY) == 0) { 332 tpm_tis_ready(chip); 333 if (wait_for_tpm_stat 334 (chip, TPM_STS_COMMAND_READY, chip->timeout_b, 335 &priv->int_queue, false) < 0) { 336 rc = -ETIME; 337 goto out_err; 338 } 339 } 340 341 while (count < len - 1) { 342 burstcnt = get_burstcount(chip); 343 if (burstcnt < 0) { 344 dev_err(&chip->dev, "Unable to read burstcount\n"); 345 rc = burstcnt; 346 goto out_err; 347 } 348 burstcnt = min_t(int, burstcnt, len - count - 1); 349 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality), 350 burstcnt, buf + count); 351 if (rc < 0) 352 goto out_err; 353 354 count += burstcnt; 355 356 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 357 &priv->int_queue, false) < 0) { 358 rc = -ETIME; 359 goto out_err; 360 } 361 status = tpm_tis_status(chip); 362 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) { 363 rc = -EIO; 364 goto out_err; 365 } 366 } 367 368 /* write last byte */ 369 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]); 370 if (rc < 0) 371 goto out_err; 372 373 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 374 &priv->int_queue, false) < 0) { 375 rc = -ETIME; 376 goto out_err; 377 } 378 status = tpm_tis_status(chip); 379 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) { 380 rc = -EIO; 381 goto out_err; 382 } 383 384 return 0; 385 386 out_err: 387 tpm_tis_ready(chip); 388 return rc; 389 } 390 391 static void disable_interrupts(struct tpm_chip *chip) 392 { 393 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 394 u32 intmask; 395 int rc; 396 397 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 398 if (rc < 0) 399 intmask = 0; 400 401 intmask &= ~TPM_GLOBAL_INT_ENABLE; 402 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 403 404 devm_free_irq(chip->dev.parent, priv->irq, chip); 405 priv->irq = 0; 406 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 407 } 408 409 /* 410 * If interrupts are used (signaled by an irq set in the vendor structure) 411 * tpm.c can skip polling for the data to be available as the interrupt is 412 * waited for here 413 */ 414 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len) 415 { 416 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 417 int rc; 418 u32 ordinal; 419 unsigned long dur; 420 421 rc = tpm_tis_send_data(chip, buf, len); 422 if (rc < 0) 423 return rc; 424 425 /* go and do it */ 426 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO); 427 if (rc < 0) 428 goto out_err; 429 430 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 431 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 432 433 if (chip->flags & TPM_CHIP_FLAG_TPM2) 434 dur = tpm2_calc_ordinal_duration(chip, ordinal); 435 else 436 dur = tpm_calc_ordinal_duration(chip, ordinal); 437 438 if (wait_for_tpm_stat 439 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur, 440 &priv->read_queue, false) < 0) { 441 rc = -ETIME; 442 goto out_err; 443 } 444 } 445 return len; 446 out_err: 447 tpm_tis_ready(chip); 448 return rc; 449 } 450 451 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len) 452 { 453 int rc, irq; 454 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 455 456 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested) 457 return tpm_tis_send_main(chip, buf, len); 458 459 /* Verify receipt of the expected IRQ */ 460 irq = priv->irq; 461 priv->irq = 0; 462 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 463 rc = tpm_tis_send_main(chip, buf, len); 464 priv->irq = irq; 465 chip->flags |= TPM_CHIP_FLAG_IRQ; 466 if (!priv->irq_tested) 467 tpm_msleep(1); 468 if (!priv->irq_tested) 469 disable_interrupts(chip); 470 priv->irq_tested = true; 471 return rc; 472 } 473 474 struct tis_vendor_timeout_override { 475 u32 did_vid; 476 unsigned long timeout_us[4]; 477 }; 478 479 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = { 480 /* Atmel 3204 */ 481 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000), 482 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, 483 }; 484 485 static bool tpm_tis_update_timeouts(struct tpm_chip *chip, 486 unsigned long *timeout_cap) 487 { 488 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 489 int i, rc; 490 u32 did_vid; 491 492 if (chip->ops->clk_enable != NULL) 493 chip->ops->clk_enable(chip, true); 494 495 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid); 496 if (rc < 0) 497 goto out; 498 499 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) { 500 if (vendor_timeout_overrides[i].did_vid != did_vid) 501 continue; 502 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us, 503 sizeof(vendor_timeout_overrides[i].timeout_us)); 504 rc = true; 505 } 506 507 rc = false; 508 509 out: 510 if (chip->ops->clk_enable != NULL) 511 chip->ops->clk_enable(chip, false); 512 513 return rc; 514 } 515 516 /* 517 * Early probing for iTPM with STS_DATA_EXPECT flaw. 518 * Try sending command without itpm flag set and if that 519 * fails, repeat with itpm flag set. 520 */ 521 static int probe_itpm(struct tpm_chip *chip) 522 { 523 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 524 int rc = 0; 525 static const u8 cmd_getticks[] = { 526 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a, 527 0x00, 0x00, 0x00, 0xf1 528 }; 529 size_t len = sizeof(cmd_getticks); 530 u16 vendor; 531 532 if (priv->flags & TPM_TIS_ITPM_WORKAROUND) 533 return 0; 534 535 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor); 536 if (rc < 0) 537 return rc; 538 539 /* probe only iTPMS */ 540 if (vendor != TPM_VID_INTEL) 541 return 0; 542 543 if (request_locality(chip, 0) != 0) 544 return -EBUSY; 545 546 rc = tpm_tis_send_data(chip, cmd_getticks, len); 547 if (rc == 0) 548 goto out; 549 550 tpm_tis_ready(chip); 551 552 priv->flags |= TPM_TIS_ITPM_WORKAROUND; 553 554 rc = tpm_tis_send_data(chip, cmd_getticks, len); 555 if (rc == 0) 556 dev_info(&chip->dev, "Detected an iTPM.\n"); 557 else { 558 priv->flags &= ~TPM_TIS_ITPM_WORKAROUND; 559 rc = -EFAULT; 560 } 561 562 out: 563 tpm_tis_ready(chip); 564 release_locality(chip, priv->locality); 565 566 return rc; 567 } 568 569 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status) 570 { 571 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 572 573 switch (priv->manufacturer_id) { 574 case TPM_VID_WINBOND: 575 return ((status == TPM_STS_VALID) || 576 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY))); 577 case TPM_VID_STM: 578 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)); 579 default: 580 return (status == TPM_STS_COMMAND_READY); 581 } 582 } 583 584 static irqreturn_t tis_int_handler(int dummy, void *dev_id) 585 { 586 struct tpm_chip *chip = dev_id; 587 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 588 u32 interrupt; 589 int i, rc; 590 591 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt); 592 if (rc < 0) 593 return IRQ_NONE; 594 595 if (interrupt == 0) 596 return IRQ_NONE; 597 598 priv->irq_tested = true; 599 if (interrupt & TPM_INTF_DATA_AVAIL_INT) 600 wake_up_interruptible(&priv->read_queue); 601 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT) 602 for (i = 0; i < 5; i++) 603 if (check_locality(chip, i)) 604 break; 605 if (interrupt & 606 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT | 607 TPM_INTF_CMD_READY_INT)) 608 wake_up_interruptible(&priv->int_queue); 609 610 /* Clear interrupts handled with TPM_EOI */ 611 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt); 612 if (rc < 0) 613 return IRQ_NONE; 614 615 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt); 616 return IRQ_HANDLED; 617 } 618 619 static int tpm_tis_gen_interrupt(struct tpm_chip *chip) 620 { 621 const char *desc = "attempting to generate an interrupt"; 622 u32 cap2; 623 cap_t cap; 624 625 if (chip->flags & TPM_CHIP_FLAG_TPM2) 626 return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc); 627 else 628 return tpm_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc, 629 0); 630 } 631 632 /* Register the IRQ and issue a command that will cause an interrupt. If an 633 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse 634 * everything and leave in polling mode. Returns 0 on success. 635 */ 636 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask, 637 int flags, int irq) 638 { 639 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 640 u8 original_int_vec; 641 int rc; 642 u32 int_status; 643 644 if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags, 645 dev_name(&chip->dev), chip) != 0) { 646 dev_info(&chip->dev, "Unable to request irq: %d for probe\n", 647 irq); 648 return -1; 649 } 650 priv->irq = irq; 651 652 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality), 653 &original_int_vec); 654 if (rc < 0) 655 return rc; 656 657 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq); 658 if (rc < 0) 659 return rc; 660 661 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status); 662 if (rc < 0) 663 return rc; 664 665 /* Clear all existing */ 666 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status); 667 if (rc < 0) 668 return rc; 669 670 /* Turn on */ 671 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), 672 intmask | TPM_GLOBAL_INT_ENABLE); 673 if (rc < 0) 674 return rc; 675 676 priv->irq_tested = false; 677 678 /* Generate an interrupt by having the core call through to 679 * tpm_tis_send 680 */ 681 rc = tpm_tis_gen_interrupt(chip); 682 if (rc < 0) 683 return rc; 684 685 /* tpm_tis_send will either confirm the interrupt is working or it 686 * will call disable_irq which undoes all of the above. 687 */ 688 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) { 689 rc = tpm_tis_write8(priv, original_int_vec, 690 TPM_INT_VECTOR(priv->locality)); 691 if (rc < 0) 692 return rc; 693 694 return 1; 695 } 696 697 return 0; 698 } 699 700 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that 701 * do not have ACPI/etc. We typically expect the interrupt to be declared if 702 * present. 703 */ 704 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask) 705 { 706 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 707 u8 original_int_vec; 708 int i, rc; 709 710 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality), 711 &original_int_vec); 712 if (rc < 0) 713 return; 714 715 if (!original_int_vec) { 716 if (IS_ENABLED(CONFIG_X86)) 717 for (i = 3; i <= 15; i++) 718 if (!tpm_tis_probe_irq_single(chip, intmask, 0, 719 i)) 720 return; 721 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0, 722 original_int_vec)) 723 return; 724 } 725 726 void tpm_tis_remove(struct tpm_chip *chip) 727 { 728 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 729 u32 reg = TPM_INT_ENABLE(priv->locality); 730 u32 interrupt; 731 int rc; 732 733 tpm_tis_clkrun_enable(chip, true); 734 735 rc = tpm_tis_read32(priv, reg, &interrupt); 736 if (rc < 0) 737 interrupt = 0; 738 739 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt); 740 741 tpm_tis_clkrun_enable(chip, false); 742 743 if (priv->ilb_base_addr) 744 iounmap(priv->ilb_base_addr); 745 } 746 EXPORT_SYMBOL_GPL(tpm_tis_remove); 747 748 /** 749 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration 750 * of a single TPM command 751 * @chip: TPM chip to use 752 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running 753 * 0 - Enable CLKRUN protocol 754 * Call this function directly in tpm_tis_remove() in error or driver removal 755 * path, since the chip->ops is set to NULL in tpm_chip_unregister(). 756 */ 757 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value) 758 { 759 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev); 760 u32 clkrun_val; 761 762 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() || 763 !data->ilb_base_addr) 764 return; 765 766 if (value) { 767 data->clkrun_enabled++; 768 if (data->clkrun_enabled > 1) 769 return; 770 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET); 771 772 /* Disable LPC CLKRUN# */ 773 clkrun_val &= ~LPC_CLKRUN_EN; 774 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET); 775 776 /* 777 * Write any random value on port 0x80 which is on LPC, to make 778 * sure LPC clock is running before sending any TPM command. 779 */ 780 outb(0xCC, 0x80); 781 } else { 782 data->clkrun_enabled--; 783 if (data->clkrun_enabled) 784 return; 785 786 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET); 787 788 /* Enable LPC CLKRUN# */ 789 clkrun_val |= LPC_CLKRUN_EN; 790 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET); 791 792 /* 793 * Write any random value on port 0x80 which is on LPC, to make 794 * sure LPC clock is running before sending any TPM command. 795 */ 796 outb(0xCC, 0x80); 797 } 798 } 799 800 static const struct tpm_class_ops tpm_tis = { 801 .flags = TPM_OPS_AUTO_STARTUP, 802 .status = tpm_tis_status, 803 .recv = tpm_tis_recv, 804 .send = tpm_tis_send, 805 .cancel = tpm_tis_ready, 806 .update_timeouts = tpm_tis_update_timeouts, 807 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 808 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 809 .req_canceled = tpm_tis_req_canceled, 810 .request_locality = request_locality, 811 .relinquish_locality = release_locality, 812 .clk_enable = tpm_tis_clkrun_enable, 813 }; 814 815 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq, 816 const struct tpm_tis_phy_ops *phy_ops, 817 acpi_handle acpi_dev_handle) 818 { 819 u32 vendor; 820 u32 intfcaps; 821 u32 intmask; 822 u32 clkrun_val; 823 u8 rid; 824 int rc, probe; 825 struct tpm_chip *chip; 826 827 chip = tpmm_chip_alloc(dev, &tpm_tis); 828 if (IS_ERR(chip)) 829 return PTR_ERR(chip); 830 831 #ifdef CONFIG_ACPI 832 chip->acpi_dev_handle = acpi_dev_handle; 833 #endif 834 835 /* Maximum timeouts */ 836 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX); 837 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX); 838 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX); 839 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX); 840 priv->phy_ops = phy_ops; 841 dev_set_drvdata(&chip->dev, priv); 842 843 if (is_bsw()) { 844 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR, 845 ILB_REMAP_SIZE); 846 if (!priv->ilb_base_addr) 847 return -ENOMEM; 848 849 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET); 850 /* Check if CLKRUN# is already not enabled in the LPC bus */ 851 if (!(clkrun_val & LPC_CLKRUN_EN)) { 852 iounmap(priv->ilb_base_addr); 853 priv->ilb_base_addr = NULL; 854 } 855 } 856 857 if (chip->ops->clk_enable != NULL) 858 chip->ops->clk_enable(chip, true); 859 860 if (wait_startup(chip, 0) != 0) { 861 rc = -ENODEV; 862 goto out_err; 863 } 864 865 /* Take control of the TPM's interrupt hardware and shut it off */ 866 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 867 if (rc < 0) 868 goto out_err; 869 870 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT | 871 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT; 872 intmask &= ~TPM_GLOBAL_INT_ENABLE; 873 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 874 875 rc = tpm2_probe(chip); 876 if (rc) 877 goto out_err; 878 879 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor); 880 if (rc < 0) 881 goto out_err; 882 883 priv->manufacturer_id = vendor; 884 885 rc = tpm_tis_read8(priv, TPM_RID(0), &rid); 886 if (rc < 0) 887 goto out_err; 888 889 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n", 890 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2", 891 vendor >> 16, rid); 892 893 probe = probe_itpm(chip); 894 if (probe < 0) { 895 rc = -ENODEV; 896 goto out_err; 897 } 898 899 /* Figure out the capabilities */ 900 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps); 901 if (rc < 0) 902 goto out_err; 903 904 dev_dbg(dev, "TPM interface capabilities (0x%x):\n", 905 intfcaps); 906 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC) 907 dev_dbg(dev, "\tBurst Count Static\n"); 908 if (intfcaps & TPM_INTF_CMD_READY_INT) 909 dev_dbg(dev, "\tCommand Ready Int Support\n"); 910 if (intfcaps & TPM_INTF_INT_EDGE_FALLING) 911 dev_dbg(dev, "\tInterrupt Edge Falling\n"); 912 if (intfcaps & TPM_INTF_INT_EDGE_RISING) 913 dev_dbg(dev, "\tInterrupt Edge Rising\n"); 914 if (intfcaps & TPM_INTF_INT_LEVEL_LOW) 915 dev_dbg(dev, "\tInterrupt Level Low\n"); 916 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH) 917 dev_dbg(dev, "\tInterrupt Level High\n"); 918 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) 919 dev_dbg(dev, "\tLocality Change Int Support\n"); 920 if (intfcaps & TPM_INTF_STS_VALID_INT) 921 dev_dbg(dev, "\tSts Valid Int Support\n"); 922 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) 923 dev_dbg(dev, "\tData Avail Int Support\n"); 924 925 /* INTERRUPT Setup */ 926 init_waitqueue_head(&priv->read_queue); 927 init_waitqueue_head(&priv->int_queue); 928 if (irq != -1) { 929 /* Before doing irq testing issue a command to the TPM in polling mode 930 * to make sure it works. May as well use that command to set the 931 * proper timeouts for the driver. 932 */ 933 if (tpm_get_timeouts(chip)) { 934 dev_err(dev, "Could not get TPM timeouts and durations\n"); 935 rc = -ENODEV; 936 goto out_err; 937 } 938 939 if (irq) { 940 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED, 941 irq); 942 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) 943 dev_err(&chip->dev, FW_BUG 944 "TPM interrupt not working, polling instead\n"); 945 } else { 946 tpm_tis_probe_irq(chip, intmask); 947 } 948 } 949 950 rc = tpm_chip_register(chip); 951 if (rc) 952 goto out_err; 953 954 if (chip->ops->clk_enable != NULL) 955 chip->ops->clk_enable(chip, false); 956 957 return 0; 958 out_err: 959 if ((chip->ops != NULL) && (chip->ops->clk_enable != NULL)) 960 chip->ops->clk_enable(chip, false); 961 962 tpm_tis_remove(chip); 963 964 return rc; 965 } 966 EXPORT_SYMBOL_GPL(tpm_tis_core_init); 967 968 #ifdef CONFIG_PM_SLEEP 969 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip) 970 { 971 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 972 u32 intmask; 973 int rc; 974 975 if (chip->ops->clk_enable != NULL) 976 chip->ops->clk_enable(chip, true); 977 978 /* reenable interrupts that device may have lost or 979 * BIOS/firmware may have disabled 980 */ 981 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq); 982 if (rc < 0) 983 goto out; 984 985 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 986 if (rc < 0) 987 goto out; 988 989 intmask |= TPM_INTF_CMD_READY_INT 990 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT 991 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE; 992 993 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 994 995 out: 996 if (chip->ops->clk_enable != NULL) 997 chip->ops->clk_enable(chip, false); 998 999 return; 1000 } 1001 1002 int tpm_tis_resume(struct device *dev) 1003 { 1004 struct tpm_chip *chip = dev_get_drvdata(dev); 1005 int ret; 1006 1007 if (chip->flags & TPM_CHIP_FLAG_IRQ) 1008 tpm_tis_reenable_interrupts(chip); 1009 1010 ret = tpm_pm_resume(dev); 1011 if (ret) 1012 return ret; 1013 1014 /* TPM 1.2 requires self-test on resume. This function actually returns 1015 * an error code but for unknown reason it isn't handled. 1016 */ 1017 if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) 1018 tpm_do_selftest(chip); 1019 1020 return 0; 1021 } 1022 EXPORT_SYMBOL_GPL(tpm_tis_resume); 1023 #endif 1024 1025 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); 1026 MODULE_DESCRIPTION("TPM Driver"); 1027 MODULE_VERSION("2.0"); 1028 MODULE_LICENSE("GPL"); 1029