1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2005, 2006 IBM Corporation 4 * Copyright (C) 2014, 2015 Intel Corporation 5 * 6 * Authors: 7 * Leendert van Doorn <leendert@watson.ibm.com> 8 * Kylene Hall <kjhall@us.ibm.com> 9 * 10 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 11 * 12 * Device driver for TCG/TCPA TPM (trusted platform module). 13 * Specifications at www.trustedcomputinggroup.org 14 * 15 * This device driver implements the TPM interface as defined in 16 * the TCG TPM Interface Spec version 1.2, revision 1.0. 17 */ 18 #include <linux/init.h> 19 #include <linux/module.h> 20 #include <linux/moduleparam.h> 21 #include <linux/pnp.h> 22 #include <linux/slab.h> 23 #include <linux/interrupt.h> 24 #include <linux/wait.h> 25 #include <linux/acpi.h> 26 #include <linux/freezer.h> 27 #include <linux/dmi.h> 28 #include "tpm.h" 29 #include "tpm_tis_core.h" 30 31 #define TPM_TIS_MAX_UNHANDLED_IRQS 1000 32 33 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value); 34 35 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask, 36 bool check_cancel, bool *canceled) 37 { 38 u8 status = chip->ops->status(chip); 39 40 *canceled = false; 41 if ((status & mask) == mask) 42 return true; 43 if (check_cancel && chip->ops->req_canceled(chip, status)) { 44 *canceled = true; 45 return true; 46 } 47 return false; 48 } 49 50 static u8 tpm_tis_filter_sts_mask(u8 int_mask, u8 sts_mask) 51 { 52 if (!(int_mask & TPM_INTF_STS_VALID_INT)) 53 sts_mask &= ~TPM_STS_VALID; 54 55 if (!(int_mask & TPM_INTF_DATA_AVAIL_INT)) 56 sts_mask &= ~TPM_STS_DATA_AVAIL; 57 58 if (!(int_mask & TPM_INTF_CMD_READY_INT)) 59 sts_mask &= ~TPM_STS_COMMAND_READY; 60 61 return sts_mask; 62 } 63 64 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask, 65 unsigned long timeout, wait_queue_head_t *queue, 66 bool check_cancel) 67 { 68 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 69 unsigned long stop; 70 long rc; 71 u8 status; 72 bool canceled = false; 73 u8 sts_mask; 74 int ret = 0; 75 76 /* check current status */ 77 status = chip->ops->status(chip); 78 if ((status & mask) == mask) 79 return 0; 80 81 sts_mask = mask & (TPM_STS_VALID | TPM_STS_DATA_AVAIL | 82 TPM_STS_COMMAND_READY); 83 /* check what status changes can be handled by irqs */ 84 sts_mask = tpm_tis_filter_sts_mask(priv->int_mask, sts_mask); 85 86 stop = jiffies + timeout; 87 /* process status changes with irq support */ 88 if (sts_mask) { 89 ret = -ETIME; 90 again: 91 timeout = stop - jiffies; 92 if ((long)timeout <= 0) 93 return -ETIME; 94 rc = wait_event_interruptible_timeout(*queue, 95 wait_for_tpm_stat_cond(chip, sts_mask, check_cancel, 96 &canceled), 97 timeout); 98 if (rc > 0) { 99 if (canceled) 100 return -ECANCELED; 101 ret = 0; 102 } 103 if (rc == -ERESTARTSYS && freezing(current)) { 104 clear_thread_flag(TIF_SIGPENDING); 105 goto again; 106 } 107 } 108 109 if (ret) 110 return ret; 111 112 mask &= ~sts_mask; 113 if (!mask) /* all done */ 114 return 0; 115 /* process status changes without irq support */ 116 do { 117 status = chip->ops->status(chip); 118 if ((status & mask) == mask) 119 return 0; 120 usleep_range(priv->timeout_min, 121 priv->timeout_max); 122 } while (time_before(jiffies, stop)); 123 return -ETIME; 124 } 125 126 /* Before we attempt to access the TPM we must see that the valid bit is set. 127 * The specification says that this bit is 0 at reset and remains 0 until the 128 * 'TPM has gone through its self test and initialization and has established 129 * correct values in the other bits.' 130 */ 131 static int wait_startup(struct tpm_chip *chip, int l) 132 { 133 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 134 unsigned long stop = jiffies + chip->timeout_a; 135 136 do { 137 int rc; 138 u8 access; 139 140 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 141 if (rc < 0) 142 return rc; 143 144 if (access & TPM_ACCESS_VALID) 145 return 0; 146 tpm_msleep(TPM_TIMEOUT); 147 } while (time_before(jiffies, stop)); 148 return -1; 149 } 150 151 static bool check_locality(struct tpm_chip *chip, int l) 152 { 153 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 154 int rc; 155 u8 access; 156 157 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 158 if (rc < 0) 159 return false; 160 161 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID 162 | TPM_ACCESS_REQUEST_USE)) == 163 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) { 164 priv->locality = l; 165 return true; 166 } 167 168 return false; 169 } 170 171 static int __tpm_tis_relinquish_locality(struct tpm_tis_data *priv, int l) 172 { 173 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY); 174 175 return 0; 176 } 177 178 static int tpm_tis_relinquish_locality(struct tpm_chip *chip, int l) 179 { 180 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 181 182 mutex_lock(&priv->locality_count_mutex); 183 priv->locality_count--; 184 if (priv->locality_count == 0) 185 __tpm_tis_relinquish_locality(priv, l); 186 mutex_unlock(&priv->locality_count_mutex); 187 188 return 0; 189 } 190 191 static int __tpm_tis_request_locality(struct tpm_chip *chip, int l) 192 { 193 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 194 unsigned long stop, timeout; 195 long rc; 196 197 if (check_locality(chip, l)) 198 return l; 199 200 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE); 201 if (rc < 0) 202 return rc; 203 204 stop = jiffies + chip->timeout_a; 205 206 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 207 again: 208 timeout = stop - jiffies; 209 if ((long)timeout <= 0) 210 return -1; 211 rc = wait_event_interruptible_timeout(priv->int_queue, 212 (check_locality 213 (chip, l)), 214 timeout); 215 if (rc > 0) 216 return l; 217 if (rc == -ERESTARTSYS && freezing(current)) { 218 clear_thread_flag(TIF_SIGPENDING); 219 goto again; 220 } 221 } else { 222 /* wait for burstcount */ 223 do { 224 if (check_locality(chip, l)) 225 return l; 226 tpm_msleep(TPM_TIMEOUT); 227 } while (time_before(jiffies, stop)); 228 } 229 return -1; 230 } 231 232 static int tpm_tis_request_locality(struct tpm_chip *chip, int l) 233 { 234 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 235 int ret = 0; 236 237 mutex_lock(&priv->locality_count_mutex); 238 if (priv->locality_count == 0) 239 ret = __tpm_tis_request_locality(chip, l); 240 if (!ret) 241 priv->locality_count++; 242 mutex_unlock(&priv->locality_count_mutex); 243 return ret; 244 } 245 246 static u8 tpm_tis_status(struct tpm_chip *chip) 247 { 248 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 249 int rc; 250 u8 status; 251 252 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status); 253 if (rc < 0) 254 return 0; 255 256 if (unlikely((status & TPM_STS_READ_ZERO) != 0)) { 257 if (!test_and_set_bit(TPM_TIS_INVALID_STATUS, &priv->flags)) { 258 /* 259 * If this trips, the chances are the read is 260 * returning 0xff because the locality hasn't been 261 * acquired. Usually because tpm_try_get_ops() hasn't 262 * been called before doing a TPM operation. 263 */ 264 dev_err(&chip->dev, "invalid TPM_STS.x 0x%02x, dumping stack for forensics\n", 265 status); 266 267 /* 268 * Dump stack for forensics, as invalid TPM_STS.x could be 269 * potentially triggered by impaired tpm_try_get_ops() or 270 * tpm_find_get_ops(). 271 */ 272 dump_stack(); 273 } 274 275 return 0; 276 } 277 278 return status; 279 } 280 281 static void tpm_tis_ready(struct tpm_chip *chip) 282 { 283 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 284 285 /* this causes the current command to be aborted */ 286 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY); 287 } 288 289 static int get_burstcount(struct tpm_chip *chip) 290 { 291 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 292 unsigned long stop; 293 int burstcnt, rc; 294 u32 value; 295 296 /* wait for burstcount */ 297 if (chip->flags & TPM_CHIP_FLAG_TPM2) 298 stop = jiffies + chip->timeout_a; 299 else 300 stop = jiffies + chip->timeout_d; 301 do { 302 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value); 303 if (rc < 0) 304 return rc; 305 306 burstcnt = (value >> 8) & 0xFFFF; 307 if (burstcnt) 308 return burstcnt; 309 usleep_range(TPM_TIMEOUT_USECS_MIN, TPM_TIMEOUT_USECS_MAX); 310 } while (time_before(jiffies, stop)); 311 return -EBUSY; 312 } 313 314 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) 315 { 316 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 317 int size = 0, burstcnt, rc; 318 319 while (size < count) { 320 rc = wait_for_tpm_stat(chip, 321 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 322 chip->timeout_c, 323 &priv->read_queue, true); 324 if (rc < 0) 325 return rc; 326 burstcnt = get_burstcount(chip); 327 if (burstcnt < 0) { 328 dev_err(&chip->dev, "Unable to read burstcount\n"); 329 return burstcnt; 330 } 331 burstcnt = min_t(int, burstcnt, count - size); 332 333 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality), 334 burstcnt, buf + size); 335 if (rc < 0) 336 return rc; 337 338 size += burstcnt; 339 } 340 return size; 341 } 342 343 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count) 344 { 345 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 346 int size = 0; 347 int status; 348 u32 expected; 349 int rc; 350 351 if (count < TPM_HEADER_SIZE) { 352 size = -EIO; 353 goto out; 354 } 355 356 size = recv_data(chip, buf, TPM_HEADER_SIZE); 357 /* read first 10 bytes, including tag, paramsize, and result */ 358 if (size < TPM_HEADER_SIZE) { 359 dev_err(&chip->dev, "Unable to read header\n"); 360 goto out; 361 } 362 363 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 364 if (expected > count || expected < TPM_HEADER_SIZE) { 365 size = -EIO; 366 goto out; 367 } 368 369 size += recv_data(chip, &buf[TPM_HEADER_SIZE], 370 expected - TPM_HEADER_SIZE); 371 if (size < expected) { 372 dev_err(&chip->dev, "Unable to read remainder of result\n"); 373 size = -ETIME; 374 goto out; 375 } 376 377 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 378 &priv->int_queue, false) < 0) { 379 size = -ETIME; 380 goto out; 381 } 382 status = tpm_tis_status(chip); 383 if (status & TPM_STS_DATA_AVAIL) { /* retry? */ 384 dev_err(&chip->dev, "Error left over data\n"); 385 size = -EIO; 386 goto out; 387 } 388 389 rc = tpm_tis_verify_crc(priv, (size_t)size, buf); 390 if (rc < 0) { 391 dev_err(&chip->dev, "CRC mismatch for response.\n"); 392 size = rc; 393 goto out; 394 } 395 396 out: 397 tpm_tis_ready(chip); 398 return size; 399 } 400 401 /* 402 * If interrupts are used (signaled by an irq set in the vendor structure) 403 * tpm.c can skip polling for the data to be available as the interrupt is 404 * waited for here 405 */ 406 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len) 407 { 408 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 409 int rc, status, burstcnt; 410 size_t count = 0; 411 bool itpm = test_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags); 412 413 status = tpm_tis_status(chip); 414 if ((status & TPM_STS_COMMAND_READY) == 0) { 415 tpm_tis_ready(chip); 416 if (wait_for_tpm_stat 417 (chip, TPM_STS_COMMAND_READY, chip->timeout_b, 418 &priv->int_queue, false) < 0) { 419 rc = -ETIME; 420 goto out_err; 421 } 422 } 423 424 while (count < len - 1) { 425 burstcnt = get_burstcount(chip); 426 if (burstcnt < 0) { 427 dev_err(&chip->dev, "Unable to read burstcount\n"); 428 rc = burstcnt; 429 goto out_err; 430 } 431 burstcnt = min_t(int, burstcnt, len - count - 1); 432 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality), 433 burstcnt, buf + count); 434 if (rc < 0) 435 goto out_err; 436 437 count += burstcnt; 438 439 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 440 &priv->int_queue, false) < 0) { 441 rc = -ETIME; 442 goto out_err; 443 } 444 status = tpm_tis_status(chip); 445 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) { 446 rc = -EIO; 447 goto out_err; 448 } 449 } 450 451 /* write last byte */ 452 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]); 453 if (rc < 0) 454 goto out_err; 455 456 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 457 &priv->int_queue, false) < 0) { 458 rc = -ETIME; 459 goto out_err; 460 } 461 status = tpm_tis_status(chip); 462 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) { 463 rc = -EIO; 464 goto out_err; 465 } 466 467 return 0; 468 469 out_err: 470 tpm_tis_ready(chip); 471 return rc; 472 } 473 474 static void __tpm_tis_disable_interrupts(struct tpm_chip *chip) 475 { 476 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 477 u32 int_mask = 0; 478 479 tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &int_mask); 480 int_mask &= ~TPM_GLOBAL_INT_ENABLE; 481 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), int_mask); 482 483 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 484 } 485 486 static void tpm_tis_disable_interrupts(struct tpm_chip *chip) 487 { 488 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 489 490 if (priv->irq == 0) 491 return; 492 493 __tpm_tis_disable_interrupts(chip); 494 495 devm_free_irq(chip->dev.parent, priv->irq, chip); 496 priv->irq = 0; 497 } 498 499 /* 500 * If interrupts are used (signaled by an irq set in the vendor structure) 501 * tpm.c can skip polling for the data to be available as the interrupt is 502 * waited for here 503 */ 504 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len) 505 { 506 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 507 int rc; 508 u32 ordinal; 509 unsigned long dur; 510 511 rc = tpm_tis_send_data(chip, buf, len); 512 if (rc < 0) 513 return rc; 514 515 rc = tpm_tis_verify_crc(priv, len, buf); 516 if (rc < 0) { 517 dev_err(&chip->dev, "CRC mismatch for command.\n"); 518 return rc; 519 } 520 521 /* go and do it */ 522 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO); 523 if (rc < 0) 524 goto out_err; 525 526 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 527 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 528 529 dur = tpm_calc_ordinal_duration(chip, ordinal); 530 if (wait_for_tpm_stat 531 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur, 532 &priv->read_queue, false) < 0) { 533 rc = -ETIME; 534 goto out_err; 535 } 536 } 537 return 0; 538 out_err: 539 tpm_tis_ready(chip); 540 return rc; 541 } 542 543 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len) 544 { 545 int rc, irq; 546 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 547 548 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || 549 test_bit(TPM_TIS_IRQ_TESTED, &priv->flags)) 550 return tpm_tis_send_main(chip, buf, len); 551 552 /* Verify receipt of the expected IRQ */ 553 irq = priv->irq; 554 priv->irq = 0; 555 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 556 rc = tpm_tis_send_main(chip, buf, len); 557 priv->irq = irq; 558 chip->flags |= TPM_CHIP_FLAG_IRQ; 559 if (!test_bit(TPM_TIS_IRQ_TESTED, &priv->flags)) 560 tpm_msleep(1); 561 if (!test_bit(TPM_TIS_IRQ_TESTED, &priv->flags)) 562 tpm_tis_disable_interrupts(chip); 563 set_bit(TPM_TIS_IRQ_TESTED, &priv->flags); 564 return rc; 565 } 566 567 struct tis_vendor_durations_override { 568 u32 did_vid; 569 struct tpm1_version version; 570 unsigned long durations[3]; 571 }; 572 573 static const struct tis_vendor_durations_override vendor_dur_overrides[] = { 574 /* STMicroelectronics 0x104a */ 575 { 0x0000104a, 576 { 1, 2, 8, 28 }, 577 { (2 * 60 * HZ), (2 * 60 * HZ), (2 * 60 * HZ) } }, 578 }; 579 580 static void tpm_tis_update_durations(struct tpm_chip *chip, 581 unsigned long *duration_cap) 582 { 583 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 584 struct tpm1_version *version; 585 u32 did_vid; 586 int i, rc; 587 cap_t cap; 588 589 chip->duration_adjusted = false; 590 591 if (chip->ops->clk_enable != NULL) 592 chip->ops->clk_enable(chip, true); 593 594 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid); 595 if (rc < 0) { 596 dev_warn(&chip->dev, "%s: failed to read did_vid. %d\n", 597 __func__, rc); 598 goto out; 599 } 600 601 /* Try to get a TPM version 1.2 or 1.1 TPM_CAP_VERSION_INFO */ 602 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_2, &cap, 603 "attempting to determine the 1.2 version", 604 sizeof(cap.version2)); 605 if (!rc) { 606 version = &cap.version2.version; 607 } else { 608 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_1, &cap, 609 "attempting to determine the 1.1 version", 610 sizeof(cap.version1)); 611 612 if (rc) 613 goto out; 614 615 version = &cap.version1; 616 } 617 618 for (i = 0; i != ARRAY_SIZE(vendor_dur_overrides); i++) { 619 if (vendor_dur_overrides[i].did_vid != did_vid) 620 continue; 621 622 if ((version->major == 623 vendor_dur_overrides[i].version.major) && 624 (version->minor == 625 vendor_dur_overrides[i].version.minor) && 626 (version->rev_major == 627 vendor_dur_overrides[i].version.rev_major) && 628 (version->rev_minor == 629 vendor_dur_overrides[i].version.rev_minor)) { 630 631 memcpy(duration_cap, 632 vendor_dur_overrides[i].durations, 633 sizeof(vendor_dur_overrides[i].durations)); 634 635 chip->duration_adjusted = true; 636 goto out; 637 } 638 } 639 640 out: 641 if (chip->ops->clk_enable != NULL) 642 chip->ops->clk_enable(chip, false); 643 } 644 645 struct tis_vendor_timeout_override { 646 u32 did_vid; 647 unsigned long timeout_us[4]; 648 }; 649 650 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = { 651 /* Atmel 3204 */ 652 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000), 653 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, 654 }; 655 656 static void tpm_tis_update_timeouts(struct tpm_chip *chip, 657 unsigned long *timeout_cap) 658 { 659 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 660 int i, rc; 661 u32 did_vid; 662 663 chip->timeout_adjusted = false; 664 665 if (chip->ops->clk_enable != NULL) 666 chip->ops->clk_enable(chip, true); 667 668 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid); 669 if (rc < 0) { 670 dev_warn(&chip->dev, "%s: failed to read did_vid: %d\n", 671 __func__, rc); 672 goto out; 673 } 674 675 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) { 676 if (vendor_timeout_overrides[i].did_vid != did_vid) 677 continue; 678 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us, 679 sizeof(vendor_timeout_overrides[i].timeout_us)); 680 chip->timeout_adjusted = true; 681 } 682 683 out: 684 if (chip->ops->clk_enable != NULL) 685 chip->ops->clk_enable(chip, false); 686 687 return; 688 } 689 690 /* 691 * Early probing for iTPM with STS_DATA_EXPECT flaw. 692 * Try sending command without itpm flag set and if that 693 * fails, repeat with itpm flag set. 694 */ 695 static int probe_itpm(struct tpm_chip *chip) 696 { 697 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 698 int rc = 0; 699 static const u8 cmd_getticks[] = { 700 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a, 701 0x00, 0x00, 0x00, 0xf1 702 }; 703 size_t len = sizeof(cmd_getticks); 704 u16 vendor; 705 706 if (test_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags)) 707 return 0; 708 709 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor); 710 if (rc < 0) 711 return rc; 712 713 /* probe only iTPMS */ 714 if (vendor != TPM_VID_INTEL) 715 return 0; 716 717 if (tpm_tis_request_locality(chip, 0) != 0) 718 return -EBUSY; 719 720 rc = tpm_tis_send_data(chip, cmd_getticks, len); 721 if (rc == 0) 722 goto out; 723 724 tpm_tis_ready(chip); 725 726 set_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags); 727 728 rc = tpm_tis_send_data(chip, cmd_getticks, len); 729 if (rc == 0) 730 dev_info(&chip->dev, "Detected an iTPM.\n"); 731 else { 732 clear_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags); 733 rc = -EFAULT; 734 } 735 736 out: 737 tpm_tis_ready(chip); 738 tpm_tis_relinquish_locality(chip, priv->locality); 739 740 return rc; 741 } 742 743 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status) 744 { 745 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 746 747 if (!test_bit(TPM_TIS_DEFAULT_CANCELLATION, &priv->flags)) { 748 switch (priv->manufacturer_id) { 749 case TPM_VID_WINBOND: 750 return ((status == TPM_STS_VALID) || 751 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY))); 752 case TPM_VID_STM: 753 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)); 754 default: 755 break; 756 } 757 } 758 759 return status == TPM_STS_COMMAND_READY; 760 } 761 762 static irqreturn_t tpm_tis_revert_interrupts(struct tpm_chip *chip) 763 { 764 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 765 const char *product; 766 const char *vendor; 767 768 dev_warn(&chip->dev, FW_BUG 769 "TPM interrupt storm detected, polling instead\n"); 770 771 vendor = dmi_get_system_info(DMI_SYS_VENDOR); 772 product = dmi_get_system_info(DMI_PRODUCT_VERSION); 773 774 if (vendor && product) { 775 dev_info(&chip->dev, 776 "Consider adding the following entry to tpm_tis_dmi_table:\n"); 777 dev_info(&chip->dev, "\tDMI_SYS_VENDOR: %s\n", vendor); 778 dev_info(&chip->dev, "\tDMI_PRODUCT_VERSION: %s\n", product); 779 } 780 781 if (tpm_tis_request_locality(chip, 0) != 0) 782 return IRQ_NONE; 783 784 __tpm_tis_disable_interrupts(chip); 785 tpm_tis_relinquish_locality(chip, 0); 786 787 schedule_work(&priv->free_irq_work); 788 789 return IRQ_HANDLED; 790 } 791 792 static irqreturn_t tpm_tis_update_unhandled_irqs(struct tpm_chip *chip) 793 { 794 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 795 irqreturn_t irqret = IRQ_HANDLED; 796 797 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) 798 return IRQ_HANDLED; 799 800 if (time_after(jiffies, priv->last_unhandled_irq + HZ/10)) 801 priv->unhandled_irqs = 1; 802 else 803 priv->unhandled_irqs++; 804 805 priv->last_unhandled_irq = jiffies; 806 807 if (priv->unhandled_irqs > TPM_TIS_MAX_UNHANDLED_IRQS) 808 irqret = tpm_tis_revert_interrupts(chip); 809 810 return irqret; 811 } 812 813 static irqreturn_t tis_int_handler(int dummy, void *dev_id) 814 { 815 struct tpm_chip *chip = dev_id; 816 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 817 u32 interrupt; 818 int rc; 819 820 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt); 821 if (rc < 0) 822 goto err; 823 824 if (interrupt == 0) 825 goto err; 826 827 set_bit(TPM_TIS_IRQ_TESTED, &priv->flags); 828 if (interrupt & TPM_INTF_DATA_AVAIL_INT) 829 wake_up_interruptible(&priv->read_queue); 830 831 if (interrupt & 832 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT | 833 TPM_INTF_CMD_READY_INT)) 834 wake_up_interruptible(&priv->int_queue); 835 836 /* Clear interrupts handled with TPM_EOI */ 837 tpm_tis_request_locality(chip, 0); 838 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt); 839 tpm_tis_relinquish_locality(chip, 0); 840 if (rc < 0) 841 goto err; 842 843 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt); 844 return IRQ_HANDLED; 845 846 err: 847 return tpm_tis_update_unhandled_irqs(chip); 848 } 849 850 static void tpm_tis_gen_interrupt(struct tpm_chip *chip) 851 { 852 const char *desc = "attempting to generate an interrupt"; 853 u32 cap2; 854 cap_t cap; 855 int ret; 856 857 chip->flags |= TPM_CHIP_FLAG_IRQ; 858 859 if (chip->flags & TPM_CHIP_FLAG_TPM2) 860 ret = tpm2_get_tpm_pt(chip, 0x100, &cap2, desc); 861 else 862 ret = tpm1_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc, 0); 863 864 if (ret) 865 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 866 } 867 868 static void tpm_tis_free_irq_func(struct work_struct *work) 869 { 870 struct tpm_tis_data *priv = container_of(work, typeof(*priv), free_irq_work); 871 struct tpm_chip *chip = priv->chip; 872 873 devm_free_irq(chip->dev.parent, priv->irq, chip); 874 priv->irq = 0; 875 } 876 877 /* Register the IRQ and issue a command that will cause an interrupt. If an 878 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse 879 * everything and leave in polling mode. Returns 0 on success. 880 */ 881 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask, 882 int flags, int irq) 883 { 884 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 885 u8 original_int_vec; 886 int rc; 887 u32 int_status; 888 889 INIT_WORK(&priv->free_irq_work, tpm_tis_free_irq_func); 890 891 rc = devm_request_threaded_irq(chip->dev.parent, irq, NULL, 892 tis_int_handler, IRQF_ONESHOT | flags, 893 dev_name(&chip->dev), chip); 894 if (rc) { 895 dev_info(&chip->dev, "Unable to request irq: %d for probe\n", 896 irq); 897 return -1; 898 } 899 priv->irq = irq; 900 901 rc = tpm_tis_request_locality(chip, 0); 902 if (rc < 0) 903 return rc; 904 905 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality), 906 &original_int_vec); 907 if (rc < 0) { 908 tpm_tis_relinquish_locality(chip, priv->locality); 909 return rc; 910 } 911 912 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq); 913 if (rc < 0) 914 goto restore_irqs; 915 916 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status); 917 if (rc < 0) 918 goto restore_irqs; 919 920 /* Clear all existing */ 921 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status); 922 if (rc < 0) 923 goto restore_irqs; 924 /* Turn on */ 925 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), 926 intmask | TPM_GLOBAL_INT_ENABLE); 927 if (rc < 0) 928 goto restore_irqs; 929 930 clear_bit(TPM_TIS_IRQ_TESTED, &priv->flags); 931 932 /* Generate an interrupt by having the core call through to 933 * tpm_tis_send 934 */ 935 tpm_tis_gen_interrupt(chip); 936 937 restore_irqs: 938 /* tpm_tis_send will either confirm the interrupt is working or it 939 * will call disable_irq which undoes all of the above. 940 */ 941 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) { 942 tpm_tis_write8(priv, original_int_vec, 943 TPM_INT_VECTOR(priv->locality)); 944 rc = -1; 945 } 946 947 tpm_tis_relinquish_locality(chip, priv->locality); 948 949 return rc; 950 } 951 952 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that 953 * do not have ACPI/etc. We typically expect the interrupt to be declared if 954 * present. 955 */ 956 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask) 957 { 958 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 959 u8 original_int_vec; 960 int i, rc; 961 962 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality), 963 &original_int_vec); 964 if (rc < 0) 965 return; 966 967 if (!original_int_vec) { 968 if (IS_ENABLED(CONFIG_X86)) 969 for (i = 3; i <= 15; i++) 970 if (!tpm_tis_probe_irq_single(chip, intmask, 0, 971 i)) 972 return; 973 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0, 974 original_int_vec)) 975 return; 976 } 977 978 void tpm_tis_remove(struct tpm_chip *chip) 979 { 980 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 981 u32 reg = TPM_INT_ENABLE(priv->locality); 982 u32 interrupt; 983 int rc; 984 985 tpm_tis_clkrun_enable(chip, true); 986 987 rc = tpm_tis_read32(priv, reg, &interrupt); 988 if (rc < 0) 989 interrupt = 0; 990 991 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt); 992 flush_work(&priv->free_irq_work); 993 994 tpm_tis_clkrun_enable(chip, false); 995 996 if (priv->ilb_base_addr) 997 iounmap(priv->ilb_base_addr); 998 } 999 EXPORT_SYMBOL_GPL(tpm_tis_remove); 1000 1001 /** 1002 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration 1003 * of a single TPM command 1004 * @chip: TPM chip to use 1005 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running 1006 * 0 - Enable CLKRUN protocol 1007 * Call this function directly in tpm_tis_remove() in error or driver removal 1008 * path, since the chip->ops is set to NULL in tpm_chip_unregister(). 1009 */ 1010 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value) 1011 { 1012 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev); 1013 u32 clkrun_val; 1014 1015 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() || 1016 !data->ilb_base_addr) 1017 return; 1018 1019 if (value) { 1020 data->clkrun_enabled++; 1021 if (data->clkrun_enabled > 1) 1022 return; 1023 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET); 1024 1025 /* Disable LPC CLKRUN# */ 1026 clkrun_val &= ~LPC_CLKRUN_EN; 1027 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET); 1028 1029 /* 1030 * Write any random value on port 0x80 which is on LPC, to make 1031 * sure LPC clock is running before sending any TPM command. 1032 */ 1033 outb(0xCC, 0x80); 1034 } else { 1035 data->clkrun_enabled--; 1036 if (data->clkrun_enabled) 1037 return; 1038 1039 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET); 1040 1041 /* Enable LPC CLKRUN# */ 1042 clkrun_val |= LPC_CLKRUN_EN; 1043 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET); 1044 1045 /* 1046 * Write any random value on port 0x80 which is on LPC, to make 1047 * sure LPC clock is running before sending any TPM command. 1048 */ 1049 outb(0xCC, 0x80); 1050 } 1051 } 1052 1053 static const struct tpm_class_ops tpm_tis = { 1054 .flags = TPM_OPS_AUTO_STARTUP, 1055 .status = tpm_tis_status, 1056 .recv = tpm_tis_recv, 1057 .send = tpm_tis_send, 1058 .cancel = tpm_tis_ready, 1059 .update_timeouts = tpm_tis_update_timeouts, 1060 .update_durations = tpm_tis_update_durations, 1061 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 1062 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 1063 .req_canceled = tpm_tis_req_canceled, 1064 .request_locality = tpm_tis_request_locality, 1065 .relinquish_locality = tpm_tis_relinquish_locality, 1066 .clk_enable = tpm_tis_clkrun_enable, 1067 }; 1068 1069 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq, 1070 const struct tpm_tis_phy_ops *phy_ops, 1071 acpi_handle acpi_dev_handle) 1072 { 1073 u32 vendor; 1074 u32 intfcaps; 1075 u32 intmask; 1076 u32 clkrun_val; 1077 u8 rid; 1078 int rc, probe; 1079 struct tpm_chip *chip; 1080 1081 chip = tpmm_chip_alloc(dev, &tpm_tis); 1082 if (IS_ERR(chip)) 1083 return PTR_ERR(chip); 1084 1085 #ifdef CONFIG_ACPI 1086 chip->acpi_dev_handle = acpi_dev_handle; 1087 #endif 1088 1089 chip->hwrng.quality = priv->rng_quality; 1090 1091 /* Maximum timeouts */ 1092 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX); 1093 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX); 1094 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX); 1095 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX); 1096 priv->chip = chip; 1097 priv->timeout_min = TPM_TIMEOUT_USECS_MIN; 1098 priv->timeout_max = TPM_TIMEOUT_USECS_MAX; 1099 priv->phy_ops = phy_ops; 1100 priv->locality_count = 0; 1101 mutex_init(&priv->locality_count_mutex); 1102 1103 dev_set_drvdata(&chip->dev, priv); 1104 1105 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor); 1106 if (rc < 0) 1107 return rc; 1108 1109 priv->manufacturer_id = vendor; 1110 1111 if (priv->manufacturer_id == TPM_VID_ATML && 1112 !(chip->flags & TPM_CHIP_FLAG_TPM2)) { 1113 priv->timeout_min = TIS_TIMEOUT_MIN_ATML; 1114 priv->timeout_max = TIS_TIMEOUT_MAX_ATML; 1115 } 1116 1117 if (is_bsw()) { 1118 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR, 1119 ILB_REMAP_SIZE); 1120 if (!priv->ilb_base_addr) 1121 return -ENOMEM; 1122 1123 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET); 1124 /* Check if CLKRUN# is already not enabled in the LPC bus */ 1125 if (!(clkrun_val & LPC_CLKRUN_EN)) { 1126 iounmap(priv->ilb_base_addr); 1127 priv->ilb_base_addr = NULL; 1128 } 1129 } 1130 1131 if (chip->ops->clk_enable != NULL) 1132 chip->ops->clk_enable(chip, true); 1133 1134 if (wait_startup(chip, 0) != 0) { 1135 rc = -ENODEV; 1136 goto out_err; 1137 } 1138 1139 /* Take control of the TPM's interrupt hardware and shut it off */ 1140 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 1141 if (rc < 0) 1142 goto out_err; 1143 1144 /* Figure out the capabilities */ 1145 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps); 1146 if (rc < 0) 1147 goto out_err; 1148 1149 dev_dbg(dev, "TPM interface capabilities (0x%x):\n", 1150 intfcaps); 1151 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC) 1152 dev_dbg(dev, "\tBurst Count Static\n"); 1153 if (intfcaps & TPM_INTF_CMD_READY_INT) { 1154 intmask |= TPM_INTF_CMD_READY_INT; 1155 dev_dbg(dev, "\tCommand Ready Int Support\n"); 1156 } 1157 if (intfcaps & TPM_INTF_INT_EDGE_FALLING) 1158 dev_dbg(dev, "\tInterrupt Edge Falling\n"); 1159 if (intfcaps & TPM_INTF_INT_EDGE_RISING) 1160 dev_dbg(dev, "\tInterrupt Edge Rising\n"); 1161 if (intfcaps & TPM_INTF_INT_LEVEL_LOW) 1162 dev_dbg(dev, "\tInterrupt Level Low\n"); 1163 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH) 1164 dev_dbg(dev, "\tInterrupt Level High\n"); 1165 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) { 1166 intmask |= TPM_INTF_LOCALITY_CHANGE_INT; 1167 dev_dbg(dev, "\tLocality Change Int Support\n"); 1168 } 1169 if (intfcaps & TPM_INTF_STS_VALID_INT) { 1170 intmask |= TPM_INTF_STS_VALID_INT; 1171 dev_dbg(dev, "\tSts Valid Int Support\n"); 1172 } 1173 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) { 1174 intmask |= TPM_INTF_DATA_AVAIL_INT; 1175 dev_dbg(dev, "\tData Avail Int Support\n"); 1176 } 1177 1178 intmask &= ~TPM_GLOBAL_INT_ENABLE; 1179 1180 rc = tpm_tis_request_locality(chip, 0); 1181 if (rc < 0) { 1182 rc = -ENODEV; 1183 goto out_err; 1184 } 1185 1186 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 1187 tpm_tis_relinquish_locality(chip, 0); 1188 1189 rc = tpm_chip_start(chip); 1190 if (rc) 1191 goto out_err; 1192 rc = tpm2_probe(chip); 1193 tpm_chip_stop(chip); 1194 if (rc) 1195 goto out_err; 1196 1197 rc = tpm_tis_read8(priv, TPM_RID(0), &rid); 1198 if (rc < 0) 1199 goto out_err; 1200 1201 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n", 1202 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2", 1203 vendor >> 16, rid); 1204 1205 probe = probe_itpm(chip); 1206 if (probe < 0) { 1207 rc = -ENODEV; 1208 goto out_err; 1209 } 1210 1211 /* INTERRUPT Setup */ 1212 init_waitqueue_head(&priv->read_queue); 1213 init_waitqueue_head(&priv->int_queue); 1214 1215 rc = tpm_chip_bootstrap(chip); 1216 if (rc) 1217 goto out_err; 1218 1219 if (irq != -1) { 1220 /* 1221 * Before doing irq testing issue a command to the TPM in polling mode 1222 * to make sure it works. May as well use that command to set the 1223 * proper timeouts for the driver. 1224 */ 1225 1226 rc = tpm_tis_request_locality(chip, 0); 1227 if (rc < 0) 1228 goto out_err; 1229 1230 rc = tpm_get_timeouts(chip); 1231 1232 tpm_tis_relinquish_locality(chip, 0); 1233 1234 if (rc) { 1235 dev_err(dev, "Could not get TPM timeouts and durations\n"); 1236 rc = -ENODEV; 1237 goto out_err; 1238 } 1239 1240 if (irq) 1241 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED, 1242 irq); 1243 else 1244 tpm_tis_probe_irq(chip, intmask); 1245 1246 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 1247 priv->int_mask = intmask; 1248 } else { 1249 dev_err(&chip->dev, FW_BUG 1250 "TPM interrupt not working, polling instead\n"); 1251 1252 rc = tpm_tis_request_locality(chip, 0); 1253 if (rc < 0) 1254 goto out_err; 1255 tpm_tis_disable_interrupts(chip); 1256 tpm_tis_relinquish_locality(chip, 0); 1257 } 1258 } 1259 1260 rc = tpm_chip_register(chip); 1261 if (rc) 1262 goto out_err; 1263 1264 if (chip->ops->clk_enable != NULL) 1265 chip->ops->clk_enable(chip, false); 1266 1267 return 0; 1268 out_err: 1269 if (chip->ops->clk_enable != NULL) 1270 chip->ops->clk_enable(chip, false); 1271 1272 tpm_tis_remove(chip); 1273 1274 return rc; 1275 } 1276 EXPORT_SYMBOL_GPL(tpm_tis_core_init); 1277 1278 #ifdef CONFIG_PM_SLEEP 1279 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip) 1280 { 1281 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 1282 u32 intmask; 1283 int rc; 1284 1285 /* 1286 * Re-enable interrupts that device may have lost or BIOS/firmware may 1287 * have disabled. 1288 */ 1289 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq); 1290 if (rc < 0) { 1291 dev_err(&chip->dev, "Setting IRQ failed.\n"); 1292 return; 1293 } 1294 1295 intmask = priv->int_mask | TPM_GLOBAL_INT_ENABLE; 1296 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 1297 if (rc < 0) 1298 dev_err(&chip->dev, "Enabling interrupts failed.\n"); 1299 } 1300 1301 int tpm_tis_resume(struct device *dev) 1302 { 1303 struct tpm_chip *chip = dev_get_drvdata(dev); 1304 int ret; 1305 1306 ret = tpm_chip_start(chip); 1307 if (ret) 1308 return ret; 1309 1310 if (chip->flags & TPM_CHIP_FLAG_IRQ) 1311 tpm_tis_reenable_interrupts(chip); 1312 1313 /* 1314 * TPM 1.2 requires self-test on resume. This function actually returns 1315 * an error code but for unknown reason it isn't handled. 1316 */ 1317 if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) 1318 tpm1_do_selftest(chip); 1319 1320 tpm_chip_stop(chip); 1321 1322 ret = tpm_pm_resume(dev); 1323 if (ret) 1324 return ret; 1325 1326 return 0; 1327 } 1328 EXPORT_SYMBOL_GPL(tpm_tis_resume); 1329 #endif 1330 1331 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); 1332 MODULE_DESCRIPTION("TPM Driver"); 1333 MODULE_VERSION("2.0"); 1334 MODULE_LICENSE("GPL"); 1335