1 /* 2 * Copyright (C) 2005, 2006 IBM Corporation 3 * Copyright (C) 2014, 2015 Intel Corporation 4 * 5 * Authors: 6 * Leendert van Doorn <leendert@watson.ibm.com> 7 * Kylene Hall <kjhall@us.ibm.com> 8 * 9 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 10 * 11 * Device driver for TCG/TCPA TPM (trusted platform module). 12 * Specifications at www.trustedcomputinggroup.org 13 * 14 * This device driver implements the TPM interface as defined in 15 * the TCG TPM Interface Spec version 1.2, revision 1.0. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation, version 2 of the 20 * License. 21 */ 22 #include <linux/init.h> 23 #include <linux/module.h> 24 #include <linux/moduleparam.h> 25 #include <linux/pnp.h> 26 #include <linux/slab.h> 27 #include <linux/interrupt.h> 28 #include <linux/wait.h> 29 #include <linux/acpi.h> 30 #include <linux/freezer.h> 31 #include "tpm.h" 32 #include "tpm_tis_core.h" 33 34 /* Before we attempt to access the TPM we must see that the valid bit is set. 35 * The specification says that this bit is 0 at reset and remains 0 until the 36 * 'TPM has gone through its self test and initialization and has established 37 * correct values in the other bits.' 38 */ 39 static int wait_startup(struct tpm_chip *chip, int l) 40 { 41 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 42 unsigned long stop = jiffies + chip->timeout_a; 43 44 do { 45 int rc; 46 u8 access; 47 48 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 49 if (rc < 0) 50 return rc; 51 52 if (access & TPM_ACCESS_VALID) 53 return 0; 54 msleep(TPM_TIMEOUT); 55 } while (time_before(jiffies, stop)); 56 return -1; 57 } 58 59 static int check_locality(struct tpm_chip *chip, int l) 60 { 61 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 62 int rc; 63 u8 access; 64 65 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 66 if (rc < 0) 67 return rc; 68 69 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == 70 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) 71 return priv->locality = l; 72 73 return -1; 74 } 75 76 static void release_locality(struct tpm_chip *chip, int l, int force) 77 { 78 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 79 int rc; 80 u8 access; 81 82 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 83 if (rc < 0) 84 return; 85 86 if (force || (access & 87 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) == 88 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) 89 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY); 90 91 } 92 93 static int request_locality(struct tpm_chip *chip, int l) 94 { 95 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 96 unsigned long stop, timeout; 97 long rc; 98 99 if (check_locality(chip, l) >= 0) 100 return l; 101 102 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE); 103 if (rc < 0) 104 return rc; 105 106 stop = jiffies + chip->timeout_a; 107 108 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 109 again: 110 timeout = stop - jiffies; 111 if ((long)timeout <= 0) 112 return -1; 113 rc = wait_event_interruptible_timeout(priv->int_queue, 114 (check_locality 115 (chip, l) >= 0), 116 timeout); 117 if (rc > 0) 118 return l; 119 if (rc == -ERESTARTSYS && freezing(current)) { 120 clear_thread_flag(TIF_SIGPENDING); 121 goto again; 122 } 123 } else { 124 /* wait for burstcount */ 125 do { 126 if (check_locality(chip, l) >= 0) 127 return l; 128 msleep(TPM_TIMEOUT); 129 } while (time_before(jiffies, stop)); 130 } 131 return -1; 132 } 133 134 static u8 tpm_tis_status(struct tpm_chip *chip) 135 { 136 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 137 int rc; 138 u8 status; 139 140 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status); 141 if (rc < 0) 142 return 0; 143 144 return status; 145 } 146 147 static void tpm_tis_ready(struct tpm_chip *chip) 148 { 149 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 150 151 /* this causes the current command to be aborted */ 152 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY); 153 } 154 155 static int get_burstcount(struct tpm_chip *chip) 156 { 157 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 158 unsigned long stop; 159 int burstcnt, rc; 160 u32 value; 161 162 /* wait for burstcount */ 163 /* which timeout value, spec has 2 answers (c & d) */ 164 stop = jiffies + chip->timeout_d; 165 do { 166 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value); 167 if (rc < 0) 168 return rc; 169 170 burstcnt = (value >> 8) & 0xFFFF; 171 if (burstcnt) 172 return burstcnt; 173 msleep(TPM_TIMEOUT); 174 } while (time_before(jiffies, stop)); 175 return -EBUSY; 176 } 177 178 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) 179 { 180 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 181 int size = 0, burstcnt, rc; 182 183 while (size < count) { 184 rc = wait_for_tpm_stat(chip, 185 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 186 chip->timeout_c, 187 &priv->read_queue, true); 188 if (rc < 0) 189 return rc; 190 burstcnt = get_burstcount(chip); 191 if (burstcnt < 0) { 192 dev_err(&chip->dev, "Unable to read burstcount\n"); 193 return burstcnt; 194 } 195 burstcnt = min_t(int, burstcnt, count - size); 196 197 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality), 198 burstcnt, buf + size); 199 if (rc < 0) 200 return rc; 201 202 size += burstcnt; 203 } 204 return size; 205 } 206 207 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count) 208 { 209 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 210 int size = 0; 211 int expected, status; 212 213 if (count < TPM_HEADER_SIZE) { 214 size = -EIO; 215 goto out; 216 } 217 218 size = recv_data(chip, buf, TPM_HEADER_SIZE); 219 /* read first 10 bytes, including tag, paramsize, and result */ 220 if (size < TPM_HEADER_SIZE) { 221 dev_err(&chip->dev, "Unable to read header\n"); 222 goto out; 223 } 224 225 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 226 if (expected > count) { 227 size = -EIO; 228 goto out; 229 } 230 231 size += recv_data(chip, &buf[TPM_HEADER_SIZE], 232 expected - TPM_HEADER_SIZE); 233 if (size < expected) { 234 dev_err(&chip->dev, "Unable to read remainder of result\n"); 235 size = -ETIME; 236 goto out; 237 } 238 239 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 240 &priv->int_queue, false) < 0) { 241 size = -ETIME; 242 goto out; 243 } 244 status = tpm_tis_status(chip); 245 if (status & TPM_STS_DATA_AVAIL) { /* retry? */ 246 dev_err(&chip->dev, "Error left over data\n"); 247 size = -EIO; 248 goto out; 249 } 250 251 out: 252 tpm_tis_ready(chip); 253 release_locality(chip, priv->locality, 0); 254 return size; 255 } 256 257 /* 258 * If interrupts are used (signaled by an irq set in the vendor structure) 259 * tpm.c can skip polling for the data to be available as the interrupt is 260 * waited for here 261 */ 262 static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len) 263 { 264 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 265 int rc, status, burstcnt; 266 size_t count = 0; 267 bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND; 268 269 if (request_locality(chip, 0) < 0) 270 return -EBUSY; 271 272 status = tpm_tis_status(chip); 273 if ((status & TPM_STS_COMMAND_READY) == 0) { 274 tpm_tis_ready(chip); 275 if (wait_for_tpm_stat 276 (chip, TPM_STS_COMMAND_READY, chip->timeout_b, 277 &priv->int_queue, false) < 0) { 278 rc = -ETIME; 279 goto out_err; 280 } 281 } 282 283 while (count < len - 1) { 284 burstcnt = get_burstcount(chip); 285 if (burstcnt < 0) { 286 dev_err(&chip->dev, "Unable to read burstcount\n"); 287 rc = burstcnt; 288 goto out_err; 289 } 290 burstcnt = min_t(int, burstcnt, len - count - 1); 291 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality), 292 burstcnt, buf + count); 293 if (rc < 0) 294 goto out_err; 295 296 count += burstcnt; 297 298 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 299 &priv->int_queue, false) < 0) { 300 rc = -ETIME; 301 goto out_err; 302 } 303 status = tpm_tis_status(chip); 304 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) { 305 rc = -EIO; 306 goto out_err; 307 } 308 } 309 310 /* write last byte */ 311 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]); 312 if (rc < 0) 313 goto out_err; 314 315 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 316 &priv->int_queue, false) < 0) { 317 rc = -ETIME; 318 goto out_err; 319 } 320 status = tpm_tis_status(chip); 321 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) { 322 rc = -EIO; 323 goto out_err; 324 } 325 326 return 0; 327 328 out_err: 329 tpm_tis_ready(chip); 330 release_locality(chip, priv->locality, 0); 331 return rc; 332 } 333 334 static void disable_interrupts(struct tpm_chip *chip) 335 { 336 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 337 u32 intmask; 338 int rc; 339 340 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 341 if (rc < 0) 342 intmask = 0; 343 344 intmask &= ~TPM_GLOBAL_INT_ENABLE; 345 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 346 347 devm_free_irq(chip->dev.parent, priv->irq, chip); 348 priv->irq = 0; 349 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 350 } 351 352 /* 353 * If interrupts are used (signaled by an irq set in the vendor structure) 354 * tpm.c can skip polling for the data to be available as the interrupt is 355 * waited for here 356 */ 357 static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len) 358 { 359 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 360 int rc; 361 u32 ordinal; 362 unsigned long dur; 363 364 rc = tpm_tis_send_data(chip, buf, len); 365 if (rc < 0) 366 return rc; 367 368 /* go and do it */ 369 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO); 370 if (rc < 0) 371 goto out_err; 372 373 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 374 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 375 376 if (chip->flags & TPM_CHIP_FLAG_TPM2) 377 dur = tpm2_calc_ordinal_duration(chip, ordinal); 378 else 379 dur = tpm_calc_ordinal_duration(chip, ordinal); 380 381 if (wait_for_tpm_stat 382 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur, 383 &priv->read_queue, false) < 0) { 384 rc = -ETIME; 385 goto out_err; 386 } 387 } 388 return len; 389 out_err: 390 tpm_tis_ready(chip); 391 release_locality(chip, priv->locality, 0); 392 return rc; 393 } 394 395 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len) 396 { 397 int rc, irq; 398 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 399 400 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested) 401 return tpm_tis_send_main(chip, buf, len); 402 403 /* Verify receipt of the expected IRQ */ 404 irq = priv->irq; 405 priv->irq = 0; 406 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 407 rc = tpm_tis_send_main(chip, buf, len); 408 priv->irq = irq; 409 chip->flags |= TPM_CHIP_FLAG_IRQ; 410 if (!priv->irq_tested) 411 msleep(1); 412 if (!priv->irq_tested) 413 disable_interrupts(chip); 414 priv->irq_tested = true; 415 return rc; 416 } 417 418 struct tis_vendor_timeout_override { 419 u32 did_vid; 420 unsigned long timeout_us[4]; 421 }; 422 423 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = { 424 /* Atmel 3204 */ 425 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000), 426 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, 427 }; 428 429 static bool tpm_tis_update_timeouts(struct tpm_chip *chip, 430 unsigned long *timeout_cap) 431 { 432 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 433 int i, rc; 434 u32 did_vid; 435 436 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid); 437 if (rc < 0) 438 return rc; 439 440 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) { 441 if (vendor_timeout_overrides[i].did_vid != did_vid) 442 continue; 443 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us, 444 sizeof(vendor_timeout_overrides[i].timeout_us)); 445 return true; 446 } 447 448 return false; 449 } 450 451 /* 452 * Early probing for iTPM with STS_DATA_EXPECT flaw. 453 * Try sending command without itpm flag set and if that 454 * fails, repeat with itpm flag set. 455 */ 456 static int probe_itpm(struct tpm_chip *chip) 457 { 458 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 459 int rc = 0; 460 u8 cmd_getticks[] = { 461 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a, 462 0x00, 0x00, 0x00, 0xf1 463 }; 464 size_t len = sizeof(cmd_getticks); 465 u16 vendor; 466 467 if (priv->flags & TPM_TIS_ITPM_WORKAROUND) 468 return 0; 469 470 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor); 471 if (rc < 0) 472 return rc; 473 474 /* probe only iTPMS */ 475 if (vendor != TPM_VID_INTEL) 476 return 0; 477 478 rc = tpm_tis_send_data(chip, cmd_getticks, len); 479 if (rc == 0) 480 goto out; 481 482 tpm_tis_ready(chip); 483 release_locality(chip, priv->locality, 0); 484 485 priv->flags |= TPM_TIS_ITPM_WORKAROUND; 486 487 rc = tpm_tis_send_data(chip, cmd_getticks, len); 488 if (rc == 0) 489 dev_info(&chip->dev, "Detected an iTPM.\n"); 490 else { 491 priv->flags &= ~TPM_TIS_ITPM_WORKAROUND; 492 rc = -EFAULT; 493 } 494 495 out: 496 tpm_tis_ready(chip); 497 release_locality(chip, priv->locality, 0); 498 499 return rc; 500 } 501 502 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status) 503 { 504 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 505 506 switch (priv->manufacturer_id) { 507 case TPM_VID_WINBOND: 508 return ((status == TPM_STS_VALID) || 509 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY))); 510 case TPM_VID_STM: 511 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)); 512 default: 513 return (status == TPM_STS_COMMAND_READY); 514 } 515 } 516 517 static irqreturn_t tis_int_handler(int dummy, void *dev_id) 518 { 519 struct tpm_chip *chip = dev_id; 520 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 521 u32 interrupt; 522 int i, rc; 523 524 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt); 525 if (rc < 0) 526 return IRQ_NONE; 527 528 if (interrupt == 0) 529 return IRQ_NONE; 530 531 priv->irq_tested = true; 532 if (interrupt & TPM_INTF_DATA_AVAIL_INT) 533 wake_up_interruptible(&priv->read_queue); 534 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT) 535 for (i = 0; i < 5; i++) 536 if (check_locality(chip, i) >= 0) 537 break; 538 if (interrupt & 539 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT | 540 TPM_INTF_CMD_READY_INT)) 541 wake_up_interruptible(&priv->int_queue); 542 543 /* Clear interrupts handled with TPM_EOI */ 544 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt); 545 if (rc < 0) 546 return IRQ_NONE; 547 548 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt); 549 return IRQ_HANDLED; 550 } 551 552 static int tpm_tis_gen_interrupt(struct tpm_chip *chip) 553 { 554 const char *desc = "attempting to generate an interrupt"; 555 u32 cap2; 556 cap_t cap; 557 558 if (chip->flags & TPM_CHIP_FLAG_TPM2) 559 return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc); 560 else 561 return tpm_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc, 562 0); 563 } 564 565 /* Register the IRQ and issue a command that will cause an interrupt. If an 566 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse 567 * everything and leave in polling mode. Returns 0 on success. 568 */ 569 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask, 570 int flags, int irq) 571 { 572 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 573 u8 original_int_vec; 574 int rc; 575 u32 int_status; 576 577 if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags, 578 dev_name(&chip->dev), chip) != 0) { 579 dev_info(&chip->dev, "Unable to request irq: %d for probe\n", 580 irq); 581 return -1; 582 } 583 priv->irq = irq; 584 585 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality), 586 &original_int_vec); 587 if (rc < 0) 588 return rc; 589 590 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq); 591 if (rc < 0) 592 return rc; 593 594 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status); 595 if (rc < 0) 596 return rc; 597 598 /* Clear all existing */ 599 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status); 600 if (rc < 0) 601 return rc; 602 603 /* Turn on */ 604 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), 605 intmask | TPM_GLOBAL_INT_ENABLE); 606 if (rc < 0) 607 return rc; 608 609 priv->irq_tested = false; 610 611 /* Generate an interrupt by having the core call through to 612 * tpm_tis_send 613 */ 614 rc = tpm_tis_gen_interrupt(chip); 615 if (rc < 0) 616 return rc; 617 618 /* tpm_tis_send will either confirm the interrupt is working or it 619 * will call disable_irq which undoes all of the above. 620 */ 621 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) { 622 rc = tpm_tis_write8(priv, original_int_vec, 623 TPM_INT_VECTOR(priv->locality)); 624 if (rc < 0) 625 return rc; 626 627 return 1; 628 } 629 630 return 0; 631 } 632 633 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that 634 * do not have ACPI/etc. We typically expect the interrupt to be declared if 635 * present. 636 */ 637 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask) 638 { 639 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 640 u8 original_int_vec; 641 int i, rc; 642 643 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality), 644 &original_int_vec); 645 if (rc < 0) 646 return; 647 648 if (!original_int_vec) { 649 if (IS_ENABLED(CONFIG_X86)) 650 for (i = 3; i <= 15; i++) 651 if (!tpm_tis_probe_irq_single(chip, intmask, 0, 652 i)) 653 return; 654 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0, 655 original_int_vec)) 656 return; 657 } 658 659 void tpm_tis_remove(struct tpm_chip *chip) 660 { 661 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 662 u32 reg = TPM_INT_ENABLE(priv->locality); 663 u32 interrupt; 664 int rc; 665 666 rc = tpm_tis_read32(priv, reg, &interrupt); 667 if (rc < 0) 668 interrupt = 0; 669 670 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt); 671 release_locality(chip, priv->locality, 1); 672 } 673 EXPORT_SYMBOL_GPL(tpm_tis_remove); 674 675 static const struct tpm_class_ops tpm_tis = { 676 .flags = TPM_OPS_AUTO_STARTUP, 677 .status = tpm_tis_status, 678 .recv = tpm_tis_recv, 679 .send = tpm_tis_send, 680 .cancel = tpm_tis_ready, 681 .update_timeouts = tpm_tis_update_timeouts, 682 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 683 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 684 .req_canceled = tpm_tis_req_canceled, 685 }; 686 687 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq, 688 const struct tpm_tis_phy_ops *phy_ops, 689 acpi_handle acpi_dev_handle) 690 { 691 u32 vendor, intfcaps, intmask; 692 u8 rid; 693 int rc, probe; 694 struct tpm_chip *chip; 695 696 chip = tpmm_chip_alloc(dev, &tpm_tis); 697 if (IS_ERR(chip)) 698 return PTR_ERR(chip); 699 700 #ifdef CONFIG_ACPI 701 chip->acpi_dev_handle = acpi_dev_handle; 702 #endif 703 704 /* Maximum timeouts */ 705 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX); 706 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX); 707 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX); 708 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX); 709 priv->phy_ops = phy_ops; 710 dev_set_drvdata(&chip->dev, priv); 711 712 if (wait_startup(chip, 0) != 0) { 713 rc = -ENODEV; 714 goto out_err; 715 } 716 717 /* Take control of the TPM's interrupt hardware and shut it off */ 718 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 719 if (rc < 0) 720 goto out_err; 721 722 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT | 723 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT; 724 intmask &= ~TPM_GLOBAL_INT_ENABLE; 725 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 726 727 if (request_locality(chip, 0) != 0) { 728 rc = -ENODEV; 729 goto out_err; 730 } 731 732 rc = tpm2_probe(chip); 733 if (rc) 734 goto out_err; 735 736 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor); 737 if (rc < 0) 738 goto out_err; 739 740 priv->manufacturer_id = vendor; 741 742 rc = tpm_tis_read8(priv, TPM_RID(0), &rid); 743 if (rc < 0) 744 goto out_err; 745 746 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n", 747 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2", 748 vendor >> 16, rid); 749 750 probe = probe_itpm(chip); 751 if (probe < 0) { 752 rc = -ENODEV; 753 goto out_err; 754 } 755 756 /* Figure out the capabilities */ 757 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps); 758 if (rc < 0) 759 goto out_err; 760 761 dev_dbg(dev, "TPM interface capabilities (0x%x):\n", 762 intfcaps); 763 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC) 764 dev_dbg(dev, "\tBurst Count Static\n"); 765 if (intfcaps & TPM_INTF_CMD_READY_INT) 766 dev_dbg(dev, "\tCommand Ready Int Support\n"); 767 if (intfcaps & TPM_INTF_INT_EDGE_FALLING) 768 dev_dbg(dev, "\tInterrupt Edge Falling\n"); 769 if (intfcaps & TPM_INTF_INT_EDGE_RISING) 770 dev_dbg(dev, "\tInterrupt Edge Rising\n"); 771 if (intfcaps & TPM_INTF_INT_LEVEL_LOW) 772 dev_dbg(dev, "\tInterrupt Level Low\n"); 773 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH) 774 dev_dbg(dev, "\tInterrupt Level High\n"); 775 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) 776 dev_dbg(dev, "\tLocality Change Int Support\n"); 777 if (intfcaps & TPM_INTF_STS_VALID_INT) 778 dev_dbg(dev, "\tSts Valid Int Support\n"); 779 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) 780 dev_dbg(dev, "\tData Avail Int Support\n"); 781 782 /* INTERRUPT Setup */ 783 init_waitqueue_head(&priv->read_queue); 784 init_waitqueue_head(&priv->int_queue); 785 if (irq != -1) { 786 /* Before doing irq testing issue a command to the TPM in polling mode 787 * to make sure it works. May as well use that command to set the 788 * proper timeouts for the driver. 789 */ 790 if (tpm_get_timeouts(chip)) { 791 dev_err(dev, "Could not get TPM timeouts and durations\n"); 792 rc = -ENODEV; 793 goto out_err; 794 } 795 796 if (irq) { 797 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED, 798 irq); 799 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) 800 dev_err(&chip->dev, FW_BUG 801 "TPM interrupt not working, polling instead\n"); 802 } else { 803 tpm_tis_probe_irq(chip, intmask); 804 } 805 } 806 807 return tpm_chip_register(chip); 808 out_err: 809 tpm_tis_remove(chip); 810 return rc; 811 } 812 EXPORT_SYMBOL_GPL(tpm_tis_core_init); 813 814 #ifdef CONFIG_PM_SLEEP 815 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip) 816 { 817 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 818 u32 intmask; 819 int rc; 820 821 /* reenable interrupts that device may have lost or 822 * BIOS/firmware may have disabled 823 */ 824 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq); 825 if (rc < 0) 826 return; 827 828 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 829 if (rc < 0) 830 return; 831 832 intmask |= TPM_INTF_CMD_READY_INT 833 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT 834 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE; 835 836 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 837 } 838 839 int tpm_tis_resume(struct device *dev) 840 { 841 struct tpm_chip *chip = dev_get_drvdata(dev); 842 int ret; 843 844 if (chip->flags & TPM_CHIP_FLAG_IRQ) 845 tpm_tis_reenable_interrupts(chip); 846 847 ret = tpm_pm_resume(dev); 848 if (ret) 849 return ret; 850 851 /* TPM 1.2 requires self-test on resume. This function actually returns 852 * an error code but for unknown reason it isn't handled. 853 */ 854 if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) 855 tpm_do_selftest(chip); 856 857 return 0; 858 } 859 EXPORT_SYMBOL_GPL(tpm_tis_resume); 860 #endif 861 862 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); 863 MODULE_DESCRIPTION("TPM Driver"); 864 MODULE_VERSION("2.0"); 865 MODULE_LICENSE("GPL"); 866