1 /* 2 * Copyright (C) 2005, 2006 IBM Corporation 3 * Copyright (C) 2014, 2015 Intel Corporation 4 * 5 * Authors: 6 * Leendert van Doorn <leendert@watson.ibm.com> 7 * Kylene Hall <kjhall@us.ibm.com> 8 * 9 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 10 * 11 * Device driver for TCG/TCPA TPM (trusted platform module). 12 * Specifications at www.trustedcomputinggroup.org 13 * 14 * This device driver implements the TPM interface as defined in 15 * the TCG TPM Interface Spec version 1.2, revision 1.0. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation, version 2 of the 20 * License. 21 */ 22 #include <linux/init.h> 23 #include <linux/module.h> 24 #include <linux/moduleparam.h> 25 #include <linux/pnp.h> 26 #include <linux/slab.h> 27 #include <linux/interrupt.h> 28 #include <linux/wait.h> 29 #include <linux/acpi.h> 30 #include <linux/freezer.h> 31 #include <acpi/actbl2.h> 32 #include "tpm.h" 33 34 enum tis_access { 35 TPM_ACCESS_VALID = 0x80, 36 TPM_ACCESS_ACTIVE_LOCALITY = 0x20, 37 TPM_ACCESS_REQUEST_PENDING = 0x04, 38 TPM_ACCESS_REQUEST_USE = 0x02, 39 }; 40 41 enum tis_status { 42 TPM_STS_VALID = 0x80, 43 TPM_STS_COMMAND_READY = 0x40, 44 TPM_STS_GO = 0x20, 45 TPM_STS_DATA_AVAIL = 0x10, 46 TPM_STS_DATA_EXPECT = 0x08, 47 }; 48 49 enum tis_int_flags { 50 TPM_GLOBAL_INT_ENABLE = 0x80000000, 51 TPM_INTF_BURST_COUNT_STATIC = 0x100, 52 TPM_INTF_CMD_READY_INT = 0x080, 53 TPM_INTF_INT_EDGE_FALLING = 0x040, 54 TPM_INTF_INT_EDGE_RISING = 0x020, 55 TPM_INTF_INT_LEVEL_LOW = 0x010, 56 TPM_INTF_INT_LEVEL_HIGH = 0x008, 57 TPM_INTF_LOCALITY_CHANGE_INT = 0x004, 58 TPM_INTF_STS_VALID_INT = 0x002, 59 TPM_INTF_DATA_AVAIL_INT = 0x001, 60 }; 61 62 enum tis_defaults { 63 TIS_MEM_BASE = 0xFED40000, 64 TIS_MEM_LEN = 0x5000, 65 TIS_SHORT_TIMEOUT = 750, /* ms */ 66 TIS_LONG_TIMEOUT = 2000, /* 2 sec */ 67 }; 68 69 struct tpm_info { 70 unsigned long start; 71 unsigned long len; 72 unsigned int irq; 73 }; 74 75 static struct tpm_info tis_default_info = { 76 .start = TIS_MEM_BASE, 77 .len = TIS_MEM_LEN, 78 .irq = 0, 79 }; 80 81 /* Some timeout values are needed before it is known whether the chip is 82 * TPM 1.0 or TPM 2.0. 83 */ 84 #define TIS_TIMEOUT_A_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_A) 85 #define TIS_TIMEOUT_B_MAX max(TIS_LONG_TIMEOUT, TPM2_TIMEOUT_B) 86 #define TIS_TIMEOUT_C_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_C) 87 #define TIS_TIMEOUT_D_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_D) 88 89 #define TPM_ACCESS(l) (0x0000 | ((l) << 12)) 90 #define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12)) 91 #define TPM_INT_VECTOR(l) (0x000C | ((l) << 12)) 92 #define TPM_INT_STATUS(l) (0x0010 | ((l) << 12)) 93 #define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12)) 94 #define TPM_STS(l) (0x0018 | ((l) << 12)) 95 #define TPM_STS3(l) (0x001b | ((l) << 12)) 96 #define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12)) 97 98 #define TPM_DID_VID(l) (0x0F00 | ((l) << 12)) 99 #define TPM_RID(l) (0x0F04 | ((l) << 12)) 100 101 struct priv_data { 102 bool irq_tested; 103 }; 104 105 #if defined(CONFIG_PNP) && defined(CONFIG_ACPI) 106 static int has_hid(struct acpi_device *dev, const char *hid) 107 { 108 struct acpi_hardware_id *id; 109 110 list_for_each_entry(id, &dev->pnp.ids, list) 111 if (!strcmp(hid, id->id)) 112 return 1; 113 114 return 0; 115 } 116 117 static inline int is_itpm(struct acpi_device *dev) 118 { 119 return has_hid(dev, "INTC0102"); 120 } 121 122 static inline int is_fifo(struct acpi_device *dev) 123 { 124 struct acpi_table_tpm2 *tbl; 125 acpi_status st; 126 127 /* TPM 1.2 FIFO */ 128 if (!has_hid(dev, "MSFT0101")) 129 return 1; 130 131 st = acpi_get_table(ACPI_SIG_TPM2, 1, 132 (struct acpi_table_header **) &tbl); 133 if (ACPI_FAILURE(st)) { 134 dev_err(&dev->dev, "failed to get TPM2 ACPI table\n"); 135 return 0; 136 } 137 138 if (le32_to_cpu(tbl->start_method) != TPM2_START_FIFO) 139 return 0; 140 141 /* TPM 2.0 FIFO */ 142 return 1; 143 } 144 #else 145 static inline int is_itpm(struct acpi_device *dev) 146 { 147 return 0; 148 } 149 150 static inline int is_fifo(struct acpi_device *dev) 151 { 152 return 1; 153 } 154 #endif 155 156 /* Before we attempt to access the TPM we must see that the valid bit is set. 157 * The specification says that this bit is 0 at reset and remains 0 until the 158 * 'TPM has gone through its self test and initialization and has established 159 * correct values in the other bits.' */ 160 static int wait_startup(struct tpm_chip *chip, int l) 161 { 162 unsigned long stop = jiffies + chip->vendor.timeout_a; 163 do { 164 if (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & 165 TPM_ACCESS_VALID) 166 return 0; 167 msleep(TPM_TIMEOUT); 168 } while (time_before(jiffies, stop)); 169 return -1; 170 } 171 172 static int check_locality(struct tpm_chip *chip, int l) 173 { 174 if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & 175 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == 176 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) 177 return chip->vendor.locality = l; 178 179 return -1; 180 } 181 182 static void release_locality(struct tpm_chip *chip, int l, int force) 183 { 184 if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & 185 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) == 186 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) 187 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY, 188 chip->vendor.iobase + TPM_ACCESS(l)); 189 } 190 191 static int request_locality(struct tpm_chip *chip, int l) 192 { 193 unsigned long stop, timeout; 194 long rc; 195 196 if (check_locality(chip, l) >= 0) 197 return l; 198 199 iowrite8(TPM_ACCESS_REQUEST_USE, 200 chip->vendor.iobase + TPM_ACCESS(l)); 201 202 stop = jiffies + chip->vendor.timeout_a; 203 204 if (chip->vendor.irq) { 205 again: 206 timeout = stop - jiffies; 207 if ((long)timeout <= 0) 208 return -1; 209 rc = wait_event_interruptible_timeout(chip->vendor.int_queue, 210 (check_locality 211 (chip, l) >= 0), 212 timeout); 213 if (rc > 0) 214 return l; 215 if (rc == -ERESTARTSYS && freezing(current)) { 216 clear_thread_flag(TIF_SIGPENDING); 217 goto again; 218 } 219 } else { 220 /* wait for burstcount */ 221 do { 222 if (check_locality(chip, l) >= 0) 223 return l; 224 msleep(TPM_TIMEOUT); 225 } 226 while (time_before(jiffies, stop)); 227 } 228 return -1; 229 } 230 231 static u8 tpm_tis_status(struct tpm_chip *chip) 232 { 233 return ioread8(chip->vendor.iobase + 234 TPM_STS(chip->vendor.locality)); 235 } 236 237 static void tpm_tis_ready(struct tpm_chip *chip) 238 { 239 /* this causes the current command to be aborted */ 240 iowrite8(TPM_STS_COMMAND_READY, 241 chip->vendor.iobase + TPM_STS(chip->vendor.locality)); 242 } 243 244 static int get_burstcount(struct tpm_chip *chip) 245 { 246 unsigned long stop; 247 int burstcnt; 248 249 /* wait for burstcount */ 250 /* which timeout value, spec has 2 answers (c & d) */ 251 stop = jiffies + chip->vendor.timeout_d; 252 do { 253 burstcnt = ioread8(chip->vendor.iobase + 254 TPM_STS(chip->vendor.locality) + 1); 255 burstcnt += ioread8(chip->vendor.iobase + 256 TPM_STS(chip->vendor.locality) + 257 2) << 8; 258 if (burstcnt) 259 return burstcnt; 260 msleep(TPM_TIMEOUT); 261 } while (time_before(jiffies, stop)); 262 return -EBUSY; 263 } 264 265 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) 266 { 267 int size = 0, burstcnt; 268 while (size < count && 269 wait_for_tpm_stat(chip, 270 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 271 chip->vendor.timeout_c, 272 &chip->vendor.read_queue, true) 273 == 0) { 274 burstcnt = get_burstcount(chip); 275 for (; burstcnt > 0 && size < count; burstcnt--) 276 buf[size++] = ioread8(chip->vendor.iobase + 277 TPM_DATA_FIFO(chip->vendor. 278 locality)); 279 } 280 return size; 281 } 282 283 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count) 284 { 285 int size = 0; 286 int expected, status; 287 288 if (count < TPM_HEADER_SIZE) { 289 size = -EIO; 290 goto out; 291 } 292 293 /* read first 10 bytes, including tag, paramsize, and result */ 294 if ((size = 295 recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) { 296 dev_err(chip->pdev, "Unable to read header\n"); 297 goto out; 298 } 299 300 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 301 if (expected > count) { 302 size = -EIO; 303 goto out; 304 } 305 306 if ((size += 307 recv_data(chip, &buf[TPM_HEADER_SIZE], 308 expected - TPM_HEADER_SIZE)) < expected) { 309 dev_err(chip->pdev, "Unable to read remainder of result\n"); 310 size = -ETIME; 311 goto out; 312 } 313 314 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 315 &chip->vendor.int_queue, false); 316 status = tpm_tis_status(chip); 317 if (status & TPM_STS_DATA_AVAIL) { /* retry? */ 318 dev_err(chip->pdev, "Error left over data\n"); 319 size = -EIO; 320 goto out; 321 } 322 323 out: 324 tpm_tis_ready(chip); 325 release_locality(chip, chip->vendor.locality, 0); 326 return size; 327 } 328 329 static bool itpm; 330 module_param(itpm, bool, 0444); 331 MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)"); 332 333 /* 334 * If interrupts are used (signaled by an irq set in the vendor structure) 335 * tpm.c can skip polling for the data to be available as the interrupt is 336 * waited for here 337 */ 338 static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len) 339 { 340 int rc, status, burstcnt; 341 size_t count = 0; 342 343 if (request_locality(chip, 0) < 0) 344 return -EBUSY; 345 346 status = tpm_tis_status(chip); 347 if ((status & TPM_STS_COMMAND_READY) == 0) { 348 tpm_tis_ready(chip); 349 if (wait_for_tpm_stat 350 (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b, 351 &chip->vendor.int_queue, false) < 0) { 352 rc = -ETIME; 353 goto out_err; 354 } 355 } 356 357 while (count < len - 1) { 358 burstcnt = get_burstcount(chip); 359 for (; burstcnt > 0 && count < len - 1; burstcnt--) { 360 iowrite8(buf[count], chip->vendor.iobase + 361 TPM_DATA_FIFO(chip->vendor.locality)); 362 count++; 363 } 364 365 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 366 &chip->vendor.int_queue, false); 367 status = tpm_tis_status(chip); 368 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) { 369 rc = -EIO; 370 goto out_err; 371 } 372 } 373 374 /* write last byte */ 375 iowrite8(buf[count], 376 chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality)); 377 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 378 &chip->vendor.int_queue, false); 379 status = tpm_tis_status(chip); 380 if ((status & TPM_STS_DATA_EXPECT) != 0) { 381 rc = -EIO; 382 goto out_err; 383 } 384 385 return 0; 386 387 out_err: 388 tpm_tis_ready(chip); 389 release_locality(chip, chip->vendor.locality, 0); 390 return rc; 391 } 392 393 static void disable_interrupts(struct tpm_chip *chip) 394 { 395 u32 intmask; 396 397 intmask = 398 ioread32(chip->vendor.iobase + 399 TPM_INT_ENABLE(chip->vendor.locality)); 400 intmask &= ~TPM_GLOBAL_INT_ENABLE; 401 iowrite32(intmask, 402 chip->vendor.iobase + 403 TPM_INT_ENABLE(chip->vendor.locality)); 404 devm_free_irq(chip->pdev, chip->vendor.irq, chip); 405 chip->vendor.irq = 0; 406 } 407 408 /* 409 * If interrupts are used (signaled by an irq set in the vendor structure) 410 * tpm.c can skip polling for the data to be available as the interrupt is 411 * waited for here 412 */ 413 static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len) 414 { 415 int rc; 416 u32 ordinal; 417 unsigned long dur; 418 419 rc = tpm_tis_send_data(chip, buf, len); 420 if (rc < 0) 421 return rc; 422 423 /* go and do it */ 424 iowrite8(TPM_STS_GO, 425 chip->vendor.iobase + TPM_STS(chip->vendor.locality)); 426 427 if (chip->vendor.irq) { 428 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 429 430 if (chip->flags & TPM_CHIP_FLAG_TPM2) 431 dur = tpm2_calc_ordinal_duration(chip, ordinal); 432 else 433 dur = tpm_calc_ordinal_duration(chip, ordinal); 434 435 if (wait_for_tpm_stat 436 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur, 437 &chip->vendor.read_queue, false) < 0) { 438 rc = -ETIME; 439 goto out_err; 440 } 441 } 442 return len; 443 out_err: 444 tpm_tis_ready(chip); 445 release_locality(chip, chip->vendor.locality, 0); 446 return rc; 447 } 448 449 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len) 450 { 451 int rc, irq; 452 struct priv_data *priv = chip->vendor.priv; 453 454 if (!chip->vendor.irq || priv->irq_tested) 455 return tpm_tis_send_main(chip, buf, len); 456 457 /* Verify receipt of the expected IRQ */ 458 irq = chip->vendor.irq; 459 chip->vendor.irq = 0; 460 rc = tpm_tis_send_main(chip, buf, len); 461 chip->vendor.irq = irq; 462 if (!priv->irq_tested) 463 msleep(1); 464 if (!priv->irq_tested) 465 disable_interrupts(chip); 466 priv->irq_tested = true; 467 return rc; 468 } 469 470 struct tis_vendor_timeout_override { 471 u32 did_vid; 472 unsigned long timeout_us[4]; 473 }; 474 475 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = { 476 /* Atmel 3204 */ 477 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000), 478 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, 479 }; 480 481 static bool tpm_tis_update_timeouts(struct tpm_chip *chip, 482 unsigned long *timeout_cap) 483 { 484 int i; 485 u32 did_vid; 486 487 did_vid = ioread32(chip->vendor.iobase + TPM_DID_VID(0)); 488 489 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) { 490 if (vendor_timeout_overrides[i].did_vid != did_vid) 491 continue; 492 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us, 493 sizeof(vendor_timeout_overrides[i].timeout_us)); 494 return true; 495 } 496 497 return false; 498 } 499 500 /* 501 * Early probing for iTPM with STS_DATA_EXPECT flaw. 502 * Try sending command without itpm flag set and if that 503 * fails, repeat with itpm flag set. 504 */ 505 static int probe_itpm(struct tpm_chip *chip) 506 { 507 int rc = 0; 508 u8 cmd_getticks[] = { 509 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a, 510 0x00, 0x00, 0x00, 0xf1 511 }; 512 size_t len = sizeof(cmd_getticks); 513 bool rem_itpm = itpm; 514 u16 vendor = ioread16(chip->vendor.iobase + TPM_DID_VID(0)); 515 516 /* probe only iTPMS */ 517 if (vendor != TPM_VID_INTEL) 518 return 0; 519 520 itpm = false; 521 522 rc = tpm_tis_send_data(chip, cmd_getticks, len); 523 if (rc == 0) 524 goto out; 525 526 tpm_tis_ready(chip); 527 release_locality(chip, chip->vendor.locality, 0); 528 529 itpm = true; 530 531 rc = tpm_tis_send_data(chip, cmd_getticks, len); 532 if (rc == 0) { 533 dev_info(chip->pdev, "Detected an iTPM.\n"); 534 rc = 1; 535 } else 536 rc = -EFAULT; 537 538 out: 539 itpm = rem_itpm; 540 tpm_tis_ready(chip); 541 release_locality(chip, chip->vendor.locality, 0); 542 543 return rc; 544 } 545 546 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status) 547 { 548 switch (chip->vendor.manufacturer_id) { 549 case TPM_VID_WINBOND: 550 return ((status == TPM_STS_VALID) || 551 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY))); 552 case TPM_VID_STM: 553 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)); 554 default: 555 return (status == TPM_STS_COMMAND_READY); 556 } 557 } 558 559 static const struct tpm_class_ops tpm_tis = { 560 .status = tpm_tis_status, 561 .recv = tpm_tis_recv, 562 .send = tpm_tis_send, 563 .cancel = tpm_tis_ready, 564 .update_timeouts = tpm_tis_update_timeouts, 565 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 566 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 567 .req_canceled = tpm_tis_req_canceled, 568 }; 569 570 static irqreturn_t tis_int_handler(int dummy, void *dev_id) 571 { 572 struct tpm_chip *chip = dev_id; 573 u32 interrupt; 574 int i; 575 576 interrupt = ioread32(chip->vendor.iobase + 577 TPM_INT_STATUS(chip->vendor.locality)); 578 579 if (interrupt == 0) 580 return IRQ_NONE; 581 582 ((struct priv_data *)chip->vendor.priv)->irq_tested = true; 583 if (interrupt & TPM_INTF_DATA_AVAIL_INT) 584 wake_up_interruptible(&chip->vendor.read_queue); 585 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT) 586 for (i = 0; i < 5; i++) 587 if (check_locality(chip, i) >= 0) 588 break; 589 if (interrupt & 590 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT | 591 TPM_INTF_CMD_READY_INT)) 592 wake_up_interruptible(&chip->vendor.int_queue); 593 594 /* Clear interrupts handled with TPM_EOI */ 595 iowrite32(interrupt, 596 chip->vendor.iobase + 597 TPM_INT_STATUS(chip->vendor.locality)); 598 ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality)); 599 return IRQ_HANDLED; 600 } 601 602 /* Register the IRQ and issue a command that will cause an interrupt. If an 603 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse 604 * everything and leave in polling mode. Returns 0 on success. 605 */ 606 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask, 607 int flags, int irq) 608 { 609 struct priv_data *priv = chip->vendor.priv; 610 u8 original_int_vec; 611 612 if (devm_request_irq(chip->pdev, irq, tis_int_handler, flags, 613 chip->devname, chip) != 0) { 614 dev_info(chip->pdev, "Unable to request irq: %d for probe\n", 615 irq); 616 return -1; 617 } 618 chip->vendor.irq = irq; 619 620 original_int_vec = ioread8(chip->vendor.iobase + 621 TPM_INT_VECTOR(chip->vendor.locality)); 622 iowrite8(irq, 623 chip->vendor.iobase + TPM_INT_VECTOR(chip->vendor.locality)); 624 625 /* Clear all existing */ 626 iowrite32(ioread32(chip->vendor.iobase + 627 TPM_INT_STATUS(chip->vendor.locality)), 628 chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality)); 629 630 /* Turn on */ 631 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE, 632 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality)); 633 634 priv->irq_tested = false; 635 636 /* Generate an interrupt by having the core call through to 637 * tpm_tis_send 638 */ 639 if (chip->flags & TPM_CHIP_FLAG_TPM2) 640 tpm2_gen_interrupt(chip); 641 else 642 tpm_gen_interrupt(chip); 643 644 /* tpm_tis_send will either confirm the interrupt is working or it 645 * will call disable_irq which undoes all of the above. 646 */ 647 if (!chip->vendor.irq) { 648 iowrite8(original_int_vec, 649 chip->vendor.iobase + 650 TPM_INT_VECTOR(chip->vendor.locality)); 651 return 1; 652 } 653 654 return 0; 655 } 656 657 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that 658 * do not have ACPI/etc. We typically expect the interrupt to be declared if 659 * present. 660 */ 661 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask) 662 { 663 u8 original_int_vec; 664 int i; 665 666 original_int_vec = ioread8(chip->vendor.iobase + 667 TPM_INT_VECTOR(chip->vendor.locality)); 668 669 if (!original_int_vec) { 670 if (IS_ENABLED(CONFIG_X86)) 671 for (i = 3; i <= 15; i++) 672 if (!tpm_tis_probe_irq_single(chip, intmask, 0, 673 i)) 674 return; 675 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0, 676 original_int_vec)) 677 return; 678 } 679 680 static bool interrupts = true; 681 module_param(interrupts, bool, 0444); 682 MODULE_PARM_DESC(interrupts, "Enable interrupts"); 683 684 static void tpm_tis_remove(struct tpm_chip *chip) 685 { 686 if (chip->flags & TPM_CHIP_FLAG_TPM2) 687 tpm2_shutdown(chip, TPM2_SU_CLEAR); 688 689 iowrite32(~TPM_GLOBAL_INT_ENABLE & 690 ioread32(chip->vendor.iobase + 691 TPM_INT_ENABLE(chip->vendor. 692 locality)), 693 chip->vendor.iobase + 694 TPM_INT_ENABLE(chip->vendor.locality)); 695 release_locality(chip, chip->vendor.locality, 1); 696 } 697 698 static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info, 699 acpi_handle acpi_dev_handle) 700 { 701 u32 vendor, intfcaps, intmask; 702 int rc, probe; 703 struct tpm_chip *chip; 704 struct priv_data *priv; 705 706 priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL); 707 if (priv == NULL) 708 return -ENOMEM; 709 710 chip = tpmm_chip_alloc(dev, &tpm_tis); 711 if (IS_ERR(chip)) 712 return PTR_ERR(chip); 713 714 chip->vendor.priv = priv; 715 #ifdef CONFIG_ACPI 716 chip->acpi_dev_handle = acpi_dev_handle; 717 #endif 718 719 chip->vendor.iobase = devm_ioremap(dev, tpm_info->start, tpm_info->len); 720 if (!chip->vendor.iobase) 721 return -EIO; 722 723 /* Maximum timeouts */ 724 chip->vendor.timeout_a = TIS_TIMEOUT_A_MAX; 725 chip->vendor.timeout_b = TIS_TIMEOUT_B_MAX; 726 chip->vendor.timeout_c = TIS_TIMEOUT_C_MAX; 727 chip->vendor.timeout_d = TIS_TIMEOUT_D_MAX; 728 729 if (wait_startup(chip, 0) != 0) { 730 rc = -ENODEV; 731 goto out_err; 732 } 733 734 /* Take control of the TPM's interrupt hardware and shut it off */ 735 intmask = ioread32(chip->vendor.iobase + 736 TPM_INT_ENABLE(chip->vendor.locality)); 737 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT | 738 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT; 739 intmask &= ~TPM_GLOBAL_INT_ENABLE; 740 iowrite32(intmask, 741 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality)); 742 743 if (request_locality(chip, 0) != 0) { 744 rc = -ENODEV; 745 goto out_err; 746 } 747 748 rc = tpm2_probe(chip); 749 if (rc) 750 goto out_err; 751 752 vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0)); 753 chip->vendor.manufacturer_id = vendor; 754 755 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n", 756 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2", 757 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0))); 758 759 if (!itpm) { 760 probe = probe_itpm(chip); 761 if (probe < 0) { 762 rc = -ENODEV; 763 goto out_err; 764 } 765 itpm = !!probe; 766 } 767 768 if (itpm) 769 dev_info(dev, "Intel iTPM workaround enabled\n"); 770 771 772 /* Figure out the capabilities */ 773 intfcaps = 774 ioread32(chip->vendor.iobase + 775 TPM_INTF_CAPS(chip->vendor.locality)); 776 dev_dbg(dev, "TPM interface capabilities (0x%x):\n", 777 intfcaps); 778 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC) 779 dev_dbg(dev, "\tBurst Count Static\n"); 780 if (intfcaps & TPM_INTF_CMD_READY_INT) 781 dev_dbg(dev, "\tCommand Ready Int Support\n"); 782 if (intfcaps & TPM_INTF_INT_EDGE_FALLING) 783 dev_dbg(dev, "\tInterrupt Edge Falling\n"); 784 if (intfcaps & TPM_INTF_INT_EDGE_RISING) 785 dev_dbg(dev, "\tInterrupt Edge Rising\n"); 786 if (intfcaps & TPM_INTF_INT_LEVEL_LOW) 787 dev_dbg(dev, "\tInterrupt Level Low\n"); 788 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH) 789 dev_dbg(dev, "\tInterrupt Level High\n"); 790 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) 791 dev_dbg(dev, "\tLocality Change Int Support\n"); 792 if (intfcaps & TPM_INTF_STS_VALID_INT) 793 dev_dbg(dev, "\tSts Valid Int Support\n"); 794 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) 795 dev_dbg(dev, "\tData Avail Int Support\n"); 796 797 /* Very early on issue a command to the TPM in polling mode to make 798 * sure it works. May as well use that command to set the proper 799 * timeouts for the driver. 800 */ 801 if (tpm_get_timeouts(chip)) { 802 dev_err(dev, "Could not get TPM timeouts and durations\n"); 803 rc = -ENODEV; 804 goto out_err; 805 } 806 807 /* INTERRUPT Setup */ 808 init_waitqueue_head(&chip->vendor.read_queue); 809 init_waitqueue_head(&chip->vendor.int_queue); 810 if (interrupts) { 811 if (tpm_info->irq) { 812 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED, 813 tpm_info->irq); 814 if (!chip->vendor.irq) 815 dev_err(chip->pdev, FW_BUG 816 "TPM interrupt not working, polling instead\n"); 817 } else 818 tpm_tis_probe_irq(chip, intmask); 819 } 820 821 if (chip->flags & TPM_CHIP_FLAG_TPM2) { 822 rc = tpm2_do_selftest(chip); 823 if (rc == TPM2_RC_INITIALIZE) { 824 dev_warn(dev, "Firmware has not started TPM\n"); 825 rc = tpm2_startup(chip, TPM2_SU_CLEAR); 826 if (!rc) 827 rc = tpm2_do_selftest(chip); 828 } 829 830 if (rc) { 831 dev_err(dev, "TPM self test failed\n"); 832 if (rc > 0) 833 rc = -ENODEV; 834 goto out_err; 835 } 836 } else { 837 if (tpm_do_selftest(chip)) { 838 dev_err(dev, "TPM self test failed\n"); 839 rc = -ENODEV; 840 goto out_err; 841 } 842 } 843 844 return tpm_chip_register(chip); 845 out_err: 846 tpm_tis_remove(chip); 847 return rc; 848 } 849 850 #ifdef CONFIG_PM_SLEEP 851 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip) 852 { 853 u32 intmask; 854 855 /* reenable interrupts that device may have lost or 856 BIOS/firmware may have disabled */ 857 iowrite8(chip->vendor.irq, chip->vendor.iobase + 858 TPM_INT_VECTOR(chip->vendor.locality)); 859 860 intmask = 861 ioread32(chip->vendor.iobase + 862 TPM_INT_ENABLE(chip->vendor.locality)); 863 864 intmask |= TPM_INTF_CMD_READY_INT 865 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT 866 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE; 867 868 iowrite32(intmask, 869 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality)); 870 } 871 872 static int tpm_tis_resume(struct device *dev) 873 { 874 struct tpm_chip *chip = dev_get_drvdata(dev); 875 int ret; 876 877 if (chip->vendor.irq) 878 tpm_tis_reenable_interrupts(chip); 879 880 ret = tpm_pm_resume(dev); 881 if (ret) 882 return ret; 883 884 /* TPM 1.2 requires self-test on resume. This function actually returns 885 * an error code but for unknown reason it isn't handled. 886 */ 887 if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) 888 tpm_do_selftest(chip); 889 890 return 0; 891 } 892 #endif 893 894 static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume); 895 896 #ifdef CONFIG_PNP 897 static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev, 898 const struct pnp_device_id *pnp_id) 899 { 900 struct tpm_info tpm_info = tis_default_info; 901 acpi_handle acpi_dev_handle = NULL; 902 903 tpm_info.start = pnp_mem_start(pnp_dev, 0); 904 tpm_info.len = pnp_mem_len(pnp_dev, 0); 905 906 if (pnp_irq_valid(pnp_dev, 0)) 907 tpm_info.irq = pnp_irq(pnp_dev, 0); 908 else 909 interrupts = false; 910 911 #ifdef CONFIG_ACPI 912 if (pnp_acpi_device(pnp_dev)) { 913 if (is_itpm(pnp_acpi_device(pnp_dev))) 914 itpm = true; 915 916 acpi_dev_handle = pnp_acpi_device(pnp_dev)->handle; 917 } 918 #endif 919 920 return tpm_tis_init(&pnp_dev->dev, &tpm_info, acpi_dev_handle); 921 } 922 923 static struct pnp_device_id tpm_pnp_tbl[] = { 924 {"PNP0C31", 0}, /* TPM */ 925 {"ATM1200", 0}, /* Atmel */ 926 {"IFX0102", 0}, /* Infineon */ 927 {"BCM0101", 0}, /* Broadcom */ 928 {"BCM0102", 0}, /* Broadcom */ 929 {"NSC1200", 0}, /* National */ 930 {"ICO0102", 0}, /* Intel */ 931 /* Add new here */ 932 {"", 0}, /* User Specified */ 933 {"", 0} /* Terminator */ 934 }; 935 MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl); 936 937 static void tpm_tis_pnp_remove(struct pnp_dev *dev) 938 { 939 struct tpm_chip *chip = pnp_get_drvdata(dev); 940 941 tpm_chip_unregister(chip); 942 tpm_tis_remove(chip); 943 } 944 945 static struct pnp_driver tis_pnp_driver = { 946 .name = "tpm_tis", 947 .id_table = tpm_pnp_tbl, 948 .probe = tpm_tis_pnp_init, 949 .remove = tpm_tis_pnp_remove, 950 .driver = { 951 .pm = &tpm_tis_pm, 952 }, 953 }; 954 955 #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2 956 module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id, 957 sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444); 958 MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe"); 959 #endif 960 961 #ifdef CONFIG_ACPI 962 static int tpm_check_resource(struct acpi_resource *ares, void *data) 963 { 964 struct tpm_info *tpm_info = (struct tpm_info *) data; 965 struct resource res; 966 967 if (acpi_dev_resource_interrupt(ares, 0, &res)) { 968 tpm_info->irq = res.start; 969 } else if (acpi_dev_resource_memory(ares, &res)) { 970 tpm_info->start = res.start; 971 tpm_info->len = resource_size(&res); 972 } 973 974 return 1; 975 } 976 977 static int tpm_tis_acpi_init(struct acpi_device *acpi_dev) 978 { 979 struct list_head resources; 980 struct tpm_info tpm_info = tis_default_info; 981 int ret; 982 983 if (!is_fifo(acpi_dev)) 984 return -ENODEV; 985 986 INIT_LIST_HEAD(&resources); 987 ret = acpi_dev_get_resources(acpi_dev, &resources, tpm_check_resource, 988 &tpm_info); 989 if (ret < 0) 990 return ret; 991 992 acpi_dev_free_resource_list(&resources); 993 994 if (!tpm_info.irq) 995 interrupts = false; 996 997 if (is_itpm(acpi_dev)) 998 itpm = true; 999 1000 return tpm_tis_init(&acpi_dev->dev, &tpm_info, acpi_dev->handle); 1001 } 1002 1003 static int tpm_tis_acpi_remove(struct acpi_device *dev) 1004 { 1005 struct tpm_chip *chip = dev_get_drvdata(&dev->dev); 1006 1007 tpm_chip_unregister(chip); 1008 tpm_tis_remove(chip); 1009 1010 return 0; 1011 } 1012 1013 static struct acpi_device_id tpm_acpi_tbl[] = { 1014 {"MSFT0101", 0}, /* TPM 2.0 */ 1015 /* Add new here */ 1016 {"", 0}, /* User Specified */ 1017 {"", 0} /* Terminator */ 1018 }; 1019 MODULE_DEVICE_TABLE(acpi, tpm_acpi_tbl); 1020 1021 static struct acpi_driver tis_acpi_driver = { 1022 .name = "tpm_tis", 1023 .ids = tpm_acpi_tbl, 1024 .ops = { 1025 .add = tpm_tis_acpi_init, 1026 .remove = tpm_tis_acpi_remove, 1027 }, 1028 .drv = { 1029 .pm = &tpm_tis_pm, 1030 }, 1031 }; 1032 #endif 1033 1034 static struct platform_driver tis_drv = { 1035 .driver = { 1036 .name = "tpm_tis", 1037 .pm = &tpm_tis_pm, 1038 }, 1039 }; 1040 1041 static struct platform_device *pdev; 1042 1043 static bool force; 1044 module_param(force, bool, 0444); 1045 MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry"); 1046 static int __init init_tis(void) 1047 { 1048 int rc; 1049 #ifdef CONFIG_PNP 1050 if (!force) { 1051 rc = pnp_register_driver(&tis_pnp_driver); 1052 if (rc) 1053 return rc; 1054 } 1055 #endif 1056 #ifdef CONFIG_ACPI 1057 if (!force) { 1058 rc = acpi_bus_register_driver(&tis_acpi_driver); 1059 if (rc) { 1060 #ifdef CONFIG_PNP 1061 pnp_unregister_driver(&tis_pnp_driver); 1062 #endif 1063 return rc; 1064 } 1065 } 1066 #endif 1067 if (!force) 1068 return 0; 1069 1070 rc = platform_driver_register(&tis_drv); 1071 if (rc < 0) 1072 return rc; 1073 pdev = platform_device_register_simple("tpm_tis", -1, NULL, 0); 1074 if (IS_ERR(pdev)) { 1075 rc = PTR_ERR(pdev); 1076 goto err_dev; 1077 } 1078 rc = tpm_tis_init(&pdev->dev, &tis_default_info, NULL); 1079 if (rc) 1080 goto err_init; 1081 return 0; 1082 err_init: 1083 platform_device_unregister(pdev); 1084 err_dev: 1085 platform_driver_unregister(&tis_drv); 1086 return rc; 1087 } 1088 1089 static void __exit cleanup_tis(void) 1090 { 1091 struct tpm_chip *chip; 1092 #if defined(CONFIG_PNP) || defined(CONFIG_ACPI) 1093 if (!force) { 1094 #ifdef CONFIG_ACPI 1095 acpi_bus_unregister_driver(&tis_acpi_driver); 1096 #endif 1097 #ifdef CONFIG_PNP 1098 pnp_unregister_driver(&tis_pnp_driver); 1099 #endif 1100 return; 1101 } 1102 #endif 1103 chip = dev_get_drvdata(&pdev->dev); 1104 tpm_chip_unregister(chip); 1105 tpm_tis_remove(chip); 1106 platform_device_unregister(pdev); 1107 platform_driver_unregister(&tis_drv); 1108 } 1109 1110 module_init(init_tis); 1111 module_exit(cleanup_tis); 1112 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); 1113 MODULE_DESCRIPTION("TPM Driver"); 1114 MODULE_VERSION("2.0"); 1115 MODULE_LICENSE("GPL"); 1116