1 /* 2 * Copyright (C) 2005, 2006 IBM Corporation 3 * 4 * Authors: 5 * Leendert van Doorn <leendert@watson.ibm.com> 6 * Kylene Hall <kjhall@us.ibm.com> 7 * 8 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 9 * 10 * Device driver for TCG/TCPA TPM (trusted platform module). 11 * Specifications at www.trustedcomputinggroup.org 12 * 13 * This device driver implements the TPM interface as defined in 14 * the TCG TPM Interface Spec version 1.2, revision 1.0. 15 * 16 * This program is free software; you can redistribute it and/or 17 * modify it under the terms of the GNU General Public License as 18 * published by the Free Software Foundation, version 2 of the 19 * License. 20 */ 21 #include <linux/init.h> 22 #include <linux/module.h> 23 #include <linux/moduleparam.h> 24 #include <linux/pnp.h> 25 #include <linux/slab.h> 26 #include <linux/interrupt.h> 27 #include <linux/wait.h> 28 #include <linux/acpi.h> 29 #include <linux/freezer.h> 30 #include "tpm.h" 31 32 enum tis_access { 33 TPM_ACCESS_VALID = 0x80, 34 TPM_ACCESS_ACTIVE_LOCALITY = 0x20, 35 TPM_ACCESS_REQUEST_PENDING = 0x04, 36 TPM_ACCESS_REQUEST_USE = 0x02, 37 }; 38 39 enum tis_status { 40 TPM_STS_VALID = 0x80, 41 TPM_STS_COMMAND_READY = 0x40, 42 TPM_STS_GO = 0x20, 43 TPM_STS_DATA_AVAIL = 0x10, 44 TPM_STS_DATA_EXPECT = 0x08, 45 }; 46 47 enum tis_int_flags { 48 TPM_GLOBAL_INT_ENABLE = 0x80000000, 49 TPM_INTF_BURST_COUNT_STATIC = 0x100, 50 TPM_INTF_CMD_READY_INT = 0x080, 51 TPM_INTF_INT_EDGE_FALLING = 0x040, 52 TPM_INTF_INT_EDGE_RISING = 0x020, 53 TPM_INTF_INT_LEVEL_LOW = 0x010, 54 TPM_INTF_INT_LEVEL_HIGH = 0x008, 55 TPM_INTF_LOCALITY_CHANGE_INT = 0x004, 56 TPM_INTF_STS_VALID_INT = 0x002, 57 TPM_INTF_DATA_AVAIL_INT = 0x001, 58 }; 59 60 enum tis_defaults { 61 TIS_MEM_BASE = 0xFED40000, 62 TIS_MEM_LEN = 0x5000, 63 TIS_SHORT_TIMEOUT = 750, /* ms */ 64 TIS_LONG_TIMEOUT = 2000, /* 2 sec */ 65 }; 66 67 #define TPM_ACCESS(l) (0x0000 | ((l) << 12)) 68 #define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12)) 69 #define TPM_INT_VECTOR(l) (0x000C | ((l) << 12)) 70 #define TPM_INT_STATUS(l) (0x0010 | ((l) << 12)) 71 #define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12)) 72 #define TPM_STS(l) (0x0018 | ((l) << 12)) 73 #define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12)) 74 75 #define TPM_DID_VID(l) (0x0F00 | ((l) << 12)) 76 #define TPM_RID(l) (0x0F04 | ((l) << 12)) 77 78 static LIST_HEAD(tis_chips); 79 static DEFINE_MUTEX(tis_lock); 80 81 #if defined(CONFIG_PNP) && defined(CONFIG_ACPI) 82 static int is_itpm(struct pnp_dev *dev) 83 { 84 struct acpi_device *acpi = pnp_acpi_device(dev); 85 struct acpi_hardware_id *id; 86 87 if (!acpi) 88 return 0; 89 90 list_for_each_entry(id, &acpi->pnp.ids, list) { 91 if (!strcmp("INTC0102", id->id)) 92 return 1; 93 } 94 95 return 0; 96 } 97 #else 98 static inline int is_itpm(struct pnp_dev *dev) 99 { 100 return 0; 101 } 102 #endif 103 104 /* Before we attempt to access the TPM we must see that the valid bit is set. 105 * The specification says that this bit is 0 at reset and remains 0 until the 106 * 'TPM has gone through its self test and initialization and has established 107 * correct values in the other bits.' */ 108 static int wait_startup(struct tpm_chip *chip, int l) 109 { 110 unsigned long stop = jiffies + chip->vendor.timeout_a; 111 do { 112 if (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & 113 TPM_ACCESS_VALID) 114 return 0; 115 msleep(TPM_TIMEOUT); 116 } while (time_before(jiffies, stop)); 117 return -1; 118 } 119 120 static int check_locality(struct tpm_chip *chip, int l) 121 { 122 if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & 123 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == 124 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) 125 return chip->vendor.locality = l; 126 127 return -1; 128 } 129 130 static void release_locality(struct tpm_chip *chip, int l, int force) 131 { 132 if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & 133 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) == 134 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) 135 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY, 136 chip->vendor.iobase + TPM_ACCESS(l)); 137 } 138 139 static int request_locality(struct tpm_chip *chip, int l) 140 { 141 unsigned long stop, timeout; 142 long rc; 143 144 if (check_locality(chip, l) >= 0) 145 return l; 146 147 iowrite8(TPM_ACCESS_REQUEST_USE, 148 chip->vendor.iobase + TPM_ACCESS(l)); 149 150 stop = jiffies + chip->vendor.timeout_a; 151 152 if (chip->vendor.irq) { 153 again: 154 timeout = stop - jiffies; 155 if ((long)timeout <= 0) 156 return -1; 157 rc = wait_event_interruptible_timeout(chip->vendor.int_queue, 158 (check_locality 159 (chip, l) >= 0), 160 timeout); 161 if (rc > 0) 162 return l; 163 if (rc == -ERESTARTSYS && freezing(current)) { 164 clear_thread_flag(TIF_SIGPENDING); 165 goto again; 166 } 167 } else { 168 /* wait for burstcount */ 169 do { 170 if (check_locality(chip, l) >= 0) 171 return l; 172 msleep(TPM_TIMEOUT); 173 } 174 while (time_before(jiffies, stop)); 175 } 176 return -1; 177 } 178 179 static u8 tpm_tis_status(struct tpm_chip *chip) 180 { 181 return ioread8(chip->vendor.iobase + 182 TPM_STS(chip->vendor.locality)); 183 } 184 185 static void tpm_tis_ready(struct tpm_chip *chip) 186 { 187 /* this causes the current command to be aborted */ 188 iowrite8(TPM_STS_COMMAND_READY, 189 chip->vendor.iobase + TPM_STS(chip->vendor.locality)); 190 } 191 192 static int get_burstcount(struct tpm_chip *chip) 193 { 194 unsigned long stop; 195 int burstcnt; 196 197 /* wait for burstcount */ 198 /* which timeout value, spec has 2 answers (c & d) */ 199 stop = jiffies + chip->vendor.timeout_d; 200 do { 201 burstcnt = ioread8(chip->vendor.iobase + 202 TPM_STS(chip->vendor.locality) + 1); 203 burstcnt += ioread8(chip->vendor.iobase + 204 TPM_STS(chip->vendor.locality) + 205 2) << 8; 206 if (burstcnt) 207 return burstcnt; 208 msleep(TPM_TIMEOUT); 209 } while (time_before(jiffies, stop)); 210 return -EBUSY; 211 } 212 213 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) 214 { 215 int size = 0, burstcnt; 216 while (size < count && 217 wait_for_tpm_stat(chip, 218 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 219 chip->vendor.timeout_c, 220 &chip->vendor.read_queue, true) 221 == 0) { 222 burstcnt = get_burstcount(chip); 223 for (; burstcnt > 0 && size < count; burstcnt--) 224 buf[size++] = ioread8(chip->vendor.iobase + 225 TPM_DATA_FIFO(chip->vendor. 226 locality)); 227 } 228 return size; 229 } 230 231 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count) 232 { 233 int size = 0; 234 int expected, status; 235 236 if (count < TPM_HEADER_SIZE) { 237 size = -EIO; 238 goto out; 239 } 240 241 /* read first 10 bytes, including tag, paramsize, and result */ 242 if ((size = 243 recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) { 244 dev_err(chip->dev, "Unable to read header\n"); 245 goto out; 246 } 247 248 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 249 if (expected > count) { 250 size = -EIO; 251 goto out; 252 } 253 254 if ((size += 255 recv_data(chip, &buf[TPM_HEADER_SIZE], 256 expected - TPM_HEADER_SIZE)) < expected) { 257 dev_err(chip->dev, "Unable to read remainder of result\n"); 258 size = -ETIME; 259 goto out; 260 } 261 262 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 263 &chip->vendor.int_queue, false); 264 status = tpm_tis_status(chip); 265 if (status & TPM_STS_DATA_AVAIL) { /* retry? */ 266 dev_err(chip->dev, "Error left over data\n"); 267 size = -EIO; 268 goto out; 269 } 270 271 out: 272 tpm_tis_ready(chip); 273 release_locality(chip, chip->vendor.locality, 0); 274 return size; 275 } 276 277 static bool itpm; 278 module_param(itpm, bool, 0444); 279 MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)"); 280 281 /* 282 * If interrupts are used (signaled by an irq set in the vendor structure) 283 * tpm.c can skip polling for the data to be available as the interrupt is 284 * waited for here 285 */ 286 static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len) 287 { 288 int rc, status, burstcnt; 289 size_t count = 0; 290 291 if (request_locality(chip, 0) < 0) 292 return -EBUSY; 293 294 status = tpm_tis_status(chip); 295 if ((status & TPM_STS_COMMAND_READY) == 0) { 296 tpm_tis_ready(chip); 297 if (wait_for_tpm_stat 298 (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b, 299 &chip->vendor.int_queue, false) < 0) { 300 rc = -ETIME; 301 goto out_err; 302 } 303 } 304 305 while (count < len - 1) { 306 burstcnt = get_burstcount(chip); 307 for (; burstcnt > 0 && count < len - 1; burstcnt--) { 308 iowrite8(buf[count], chip->vendor.iobase + 309 TPM_DATA_FIFO(chip->vendor.locality)); 310 count++; 311 } 312 313 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 314 &chip->vendor.int_queue, false); 315 status = tpm_tis_status(chip); 316 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) { 317 rc = -EIO; 318 goto out_err; 319 } 320 } 321 322 /* write last byte */ 323 iowrite8(buf[count], 324 chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality)); 325 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 326 &chip->vendor.int_queue, false); 327 status = tpm_tis_status(chip); 328 if ((status & TPM_STS_DATA_EXPECT) != 0) { 329 rc = -EIO; 330 goto out_err; 331 } 332 333 return 0; 334 335 out_err: 336 tpm_tis_ready(chip); 337 release_locality(chip, chip->vendor.locality, 0); 338 return rc; 339 } 340 341 /* 342 * If interrupts are used (signaled by an irq set in the vendor structure) 343 * tpm.c can skip polling for the data to be available as the interrupt is 344 * waited for here 345 */ 346 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len) 347 { 348 int rc; 349 u32 ordinal; 350 351 rc = tpm_tis_send_data(chip, buf, len); 352 if (rc < 0) 353 return rc; 354 355 /* go and do it */ 356 iowrite8(TPM_STS_GO, 357 chip->vendor.iobase + TPM_STS(chip->vendor.locality)); 358 359 if (chip->vendor.irq) { 360 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 361 if (wait_for_tpm_stat 362 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, 363 tpm_calc_ordinal_duration(chip, ordinal), 364 &chip->vendor.read_queue, false) < 0) { 365 rc = -ETIME; 366 goto out_err; 367 } 368 } 369 return len; 370 out_err: 371 tpm_tis_ready(chip); 372 release_locality(chip, chip->vendor.locality, 0); 373 return rc; 374 } 375 376 /* 377 * Early probing for iTPM with STS_DATA_EXPECT flaw. 378 * Try sending command without itpm flag set and if that 379 * fails, repeat with itpm flag set. 380 */ 381 static int probe_itpm(struct tpm_chip *chip) 382 { 383 int rc = 0; 384 u8 cmd_getticks[] = { 385 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a, 386 0x00, 0x00, 0x00, 0xf1 387 }; 388 size_t len = sizeof(cmd_getticks); 389 bool rem_itpm = itpm; 390 u16 vendor = ioread16(chip->vendor.iobase + TPM_DID_VID(0)); 391 392 /* probe only iTPMS */ 393 if (vendor != TPM_VID_INTEL) 394 return 0; 395 396 itpm = false; 397 398 rc = tpm_tis_send_data(chip, cmd_getticks, len); 399 if (rc == 0) 400 goto out; 401 402 tpm_tis_ready(chip); 403 release_locality(chip, chip->vendor.locality, 0); 404 405 itpm = true; 406 407 rc = tpm_tis_send_data(chip, cmd_getticks, len); 408 if (rc == 0) { 409 dev_info(chip->dev, "Detected an iTPM.\n"); 410 rc = 1; 411 } else 412 rc = -EFAULT; 413 414 out: 415 itpm = rem_itpm; 416 tpm_tis_ready(chip); 417 release_locality(chip, chip->vendor.locality, 0); 418 419 return rc; 420 } 421 422 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status) 423 { 424 switch (chip->vendor.manufacturer_id) { 425 case TPM_VID_WINBOND: 426 return ((status == TPM_STS_VALID) || 427 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY))); 428 case TPM_VID_STM: 429 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)); 430 default: 431 return (status == TPM_STS_COMMAND_READY); 432 } 433 } 434 435 static const struct file_operations tis_ops = { 436 .owner = THIS_MODULE, 437 .llseek = no_llseek, 438 .open = tpm_open, 439 .read = tpm_read, 440 .write = tpm_write, 441 .release = tpm_release, 442 }; 443 444 static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL); 445 static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL); 446 static DEVICE_ATTR(enabled, S_IRUGO, tpm_show_enabled, NULL); 447 static DEVICE_ATTR(active, S_IRUGO, tpm_show_active, NULL); 448 static DEVICE_ATTR(owned, S_IRUGO, tpm_show_owned, NULL); 449 static DEVICE_ATTR(temp_deactivated, S_IRUGO, tpm_show_temp_deactivated, 450 NULL); 451 static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL); 452 static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel); 453 static DEVICE_ATTR(durations, S_IRUGO, tpm_show_durations, NULL); 454 static DEVICE_ATTR(timeouts, S_IRUGO, tpm_show_timeouts, NULL); 455 456 static struct attribute *tis_attrs[] = { 457 &dev_attr_pubek.attr, 458 &dev_attr_pcrs.attr, 459 &dev_attr_enabled.attr, 460 &dev_attr_active.attr, 461 &dev_attr_owned.attr, 462 &dev_attr_temp_deactivated.attr, 463 &dev_attr_caps.attr, 464 &dev_attr_cancel.attr, 465 &dev_attr_durations.attr, 466 &dev_attr_timeouts.attr, NULL, 467 }; 468 469 static struct attribute_group tis_attr_grp = { 470 .attrs = tis_attrs 471 }; 472 473 static struct tpm_vendor_specific tpm_tis = { 474 .status = tpm_tis_status, 475 .recv = tpm_tis_recv, 476 .send = tpm_tis_send, 477 .cancel = tpm_tis_ready, 478 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 479 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 480 .req_canceled = tpm_tis_req_canceled, 481 .attr_group = &tis_attr_grp, 482 .miscdev = { 483 .fops = &tis_ops,}, 484 }; 485 486 static irqreturn_t tis_int_probe(int irq, void *dev_id) 487 { 488 struct tpm_chip *chip = dev_id; 489 u32 interrupt; 490 491 interrupt = ioread32(chip->vendor.iobase + 492 TPM_INT_STATUS(chip->vendor.locality)); 493 494 if (interrupt == 0) 495 return IRQ_NONE; 496 497 chip->vendor.probed_irq = irq; 498 499 /* Clear interrupts handled with TPM_EOI */ 500 iowrite32(interrupt, 501 chip->vendor.iobase + 502 TPM_INT_STATUS(chip->vendor.locality)); 503 return IRQ_HANDLED; 504 } 505 506 static irqreturn_t tis_int_handler(int dummy, void *dev_id) 507 { 508 struct tpm_chip *chip = dev_id; 509 u32 interrupt; 510 int i; 511 512 interrupt = ioread32(chip->vendor.iobase + 513 TPM_INT_STATUS(chip->vendor.locality)); 514 515 if (interrupt == 0) 516 return IRQ_NONE; 517 518 if (interrupt & TPM_INTF_DATA_AVAIL_INT) 519 wake_up_interruptible(&chip->vendor.read_queue); 520 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT) 521 for (i = 0; i < 5; i++) 522 if (check_locality(chip, i) >= 0) 523 break; 524 if (interrupt & 525 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT | 526 TPM_INTF_CMD_READY_INT)) 527 wake_up_interruptible(&chip->vendor.int_queue); 528 529 /* Clear interrupts handled with TPM_EOI */ 530 iowrite32(interrupt, 531 chip->vendor.iobase + 532 TPM_INT_STATUS(chip->vendor.locality)); 533 ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality)); 534 return IRQ_HANDLED; 535 } 536 537 static bool interrupts = true; 538 module_param(interrupts, bool, 0444); 539 MODULE_PARM_DESC(interrupts, "Enable interrupts"); 540 541 static int tpm_tis_init(struct device *dev, resource_size_t start, 542 resource_size_t len, unsigned int irq) 543 { 544 u32 vendor, intfcaps, intmask; 545 int rc, i, irq_s, irq_e, probe; 546 struct tpm_chip *chip; 547 548 if (!(chip = tpm_register_hardware(dev, &tpm_tis))) 549 return -ENODEV; 550 551 chip->vendor.iobase = ioremap(start, len); 552 if (!chip->vendor.iobase) { 553 rc = -EIO; 554 goto out_err; 555 } 556 557 /* Default timeouts */ 558 chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT); 559 chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT); 560 chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT); 561 chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT); 562 563 if (wait_startup(chip, 0) != 0) { 564 rc = -ENODEV; 565 goto out_err; 566 } 567 568 if (request_locality(chip, 0) != 0) { 569 rc = -ENODEV; 570 goto out_err; 571 } 572 573 vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0)); 574 chip->vendor.manufacturer_id = vendor; 575 576 dev_info(dev, 577 "1.2 TPM (device-id 0x%X, rev-id %d)\n", 578 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0))); 579 580 if (!itpm) { 581 probe = probe_itpm(chip); 582 if (probe < 0) { 583 rc = -ENODEV; 584 goto out_err; 585 } 586 itpm = !!probe; 587 } 588 589 if (itpm) 590 dev_info(dev, "Intel iTPM workaround enabled\n"); 591 592 593 /* Figure out the capabilities */ 594 intfcaps = 595 ioread32(chip->vendor.iobase + 596 TPM_INTF_CAPS(chip->vendor.locality)); 597 dev_dbg(dev, "TPM interface capabilities (0x%x):\n", 598 intfcaps); 599 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC) 600 dev_dbg(dev, "\tBurst Count Static\n"); 601 if (intfcaps & TPM_INTF_CMD_READY_INT) 602 dev_dbg(dev, "\tCommand Ready Int Support\n"); 603 if (intfcaps & TPM_INTF_INT_EDGE_FALLING) 604 dev_dbg(dev, "\tInterrupt Edge Falling\n"); 605 if (intfcaps & TPM_INTF_INT_EDGE_RISING) 606 dev_dbg(dev, "\tInterrupt Edge Rising\n"); 607 if (intfcaps & TPM_INTF_INT_LEVEL_LOW) 608 dev_dbg(dev, "\tInterrupt Level Low\n"); 609 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH) 610 dev_dbg(dev, "\tInterrupt Level High\n"); 611 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) 612 dev_dbg(dev, "\tLocality Change Int Support\n"); 613 if (intfcaps & TPM_INTF_STS_VALID_INT) 614 dev_dbg(dev, "\tSts Valid Int Support\n"); 615 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) 616 dev_dbg(dev, "\tData Avail Int Support\n"); 617 618 /* get the timeouts before testing for irqs */ 619 if (tpm_get_timeouts(chip)) { 620 dev_err(dev, "Could not get TPM timeouts and durations\n"); 621 rc = -ENODEV; 622 goto out_err; 623 } 624 625 if (tpm_do_selftest(chip)) { 626 dev_err(dev, "TPM self test failed\n"); 627 rc = -ENODEV; 628 goto out_err; 629 } 630 631 /* INTERRUPT Setup */ 632 init_waitqueue_head(&chip->vendor.read_queue); 633 init_waitqueue_head(&chip->vendor.int_queue); 634 635 intmask = 636 ioread32(chip->vendor.iobase + 637 TPM_INT_ENABLE(chip->vendor.locality)); 638 639 intmask |= TPM_INTF_CMD_READY_INT 640 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT 641 | TPM_INTF_STS_VALID_INT; 642 643 iowrite32(intmask, 644 chip->vendor.iobase + 645 TPM_INT_ENABLE(chip->vendor.locality)); 646 if (interrupts) 647 chip->vendor.irq = irq; 648 if (interrupts && !chip->vendor.irq) { 649 irq_s = 650 ioread8(chip->vendor.iobase + 651 TPM_INT_VECTOR(chip->vendor.locality)); 652 if (irq_s) { 653 irq_e = irq_s; 654 } else { 655 irq_s = 3; 656 irq_e = 15; 657 } 658 659 for (i = irq_s; i <= irq_e && chip->vendor.irq == 0; i++) { 660 iowrite8(i, chip->vendor.iobase + 661 TPM_INT_VECTOR(chip->vendor.locality)); 662 if (request_irq 663 (i, tis_int_probe, IRQF_SHARED, 664 chip->vendor.miscdev.name, chip) != 0) { 665 dev_info(chip->dev, 666 "Unable to request irq: %d for probe\n", 667 i); 668 continue; 669 } 670 671 /* Clear all existing */ 672 iowrite32(ioread32 673 (chip->vendor.iobase + 674 TPM_INT_STATUS(chip->vendor.locality)), 675 chip->vendor.iobase + 676 TPM_INT_STATUS(chip->vendor.locality)); 677 678 /* Turn on */ 679 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE, 680 chip->vendor.iobase + 681 TPM_INT_ENABLE(chip->vendor.locality)); 682 683 chip->vendor.probed_irq = 0; 684 685 /* Generate Interrupts */ 686 tpm_gen_interrupt(chip); 687 688 chip->vendor.irq = chip->vendor.probed_irq; 689 690 /* free_irq will call into tis_int_probe; 691 clear all irqs we haven't seen while doing 692 tpm_gen_interrupt */ 693 iowrite32(ioread32 694 (chip->vendor.iobase + 695 TPM_INT_STATUS(chip->vendor.locality)), 696 chip->vendor.iobase + 697 TPM_INT_STATUS(chip->vendor.locality)); 698 699 /* Turn off */ 700 iowrite32(intmask, 701 chip->vendor.iobase + 702 TPM_INT_ENABLE(chip->vendor.locality)); 703 free_irq(i, chip); 704 } 705 } 706 if (chip->vendor.irq) { 707 iowrite8(chip->vendor.irq, 708 chip->vendor.iobase + 709 TPM_INT_VECTOR(chip->vendor.locality)); 710 if (request_irq 711 (chip->vendor.irq, tis_int_handler, IRQF_SHARED, 712 chip->vendor.miscdev.name, chip) != 0) { 713 dev_info(chip->dev, 714 "Unable to request irq: %d for use\n", 715 chip->vendor.irq); 716 chip->vendor.irq = 0; 717 } else { 718 /* Clear all existing */ 719 iowrite32(ioread32 720 (chip->vendor.iobase + 721 TPM_INT_STATUS(chip->vendor.locality)), 722 chip->vendor.iobase + 723 TPM_INT_STATUS(chip->vendor.locality)); 724 725 /* Turn on */ 726 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE, 727 chip->vendor.iobase + 728 TPM_INT_ENABLE(chip->vendor.locality)); 729 } 730 } 731 732 INIT_LIST_HEAD(&chip->vendor.list); 733 mutex_lock(&tis_lock); 734 list_add(&chip->vendor.list, &tis_chips); 735 mutex_unlock(&tis_lock); 736 737 738 return 0; 739 out_err: 740 if (chip->vendor.iobase) 741 iounmap(chip->vendor.iobase); 742 tpm_remove_hardware(chip->dev); 743 return rc; 744 } 745 746 #if defined(CONFIG_PNP) || defined(CONFIG_PM_SLEEP) 747 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip) 748 { 749 u32 intmask; 750 751 /* reenable interrupts that device may have lost or 752 BIOS/firmware may have disabled */ 753 iowrite8(chip->vendor.irq, chip->vendor.iobase + 754 TPM_INT_VECTOR(chip->vendor.locality)); 755 756 intmask = 757 ioread32(chip->vendor.iobase + 758 TPM_INT_ENABLE(chip->vendor.locality)); 759 760 intmask |= TPM_INTF_CMD_READY_INT 761 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT 762 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE; 763 764 iowrite32(intmask, 765 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality)); 766 } 767 #endif 768 769 #ifdef CONFIG_PNP 770 static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev, 771 const struct pnp_device_id *pnp_id) 772 { 773 resource_size_t start, len; 774 unsigned int irq = 0; 775 776 start = pnp_mem_start(pnp_dev, 0); 777 len = pnp_mem_len(pnp_dev, 0); 778 779 if (pnp_irq_valid(pnp_dev, 0)) 780 irq = pnp_irq(pnp_dev, 0); 781 else 782 interrupts = false; 783 784 if (is_itpm(pnp_dev)) 785 itpm = true; 786 787 return tpm_tis_init(&pnp_dev->dev, start, len, irq); 788 } 789 790 static int tpm_tis_pnp_suspend(struct pnp_dev *dev, pm_message_t msg) 791 { 792 return tpm_pm_suspend(&dev->dev); 793 } 794 795 static int tpm_tis_pnp_resume(struct pnp_dev *dev) 796 { 797 struct tpm_chip *chip = pnp_get_drvdata(dev); 798 int ret; 799 800 if (chip->vendor.irq) 801 tpm_tis_reenable_interrupts(chip); 802 803 ret = tpm_pm_resume(&dev->dev); 804 if (!ret) 805 tpm_do_selftest(chip); 806 807 return ret; 808 } 809 810 static struct pnp_device_id tpm_pnp_tbl[] = { 811 {"PNP0C31", 0}, /* TPM */ 812 {"ATM1200", 0}, /* Atmel */ 813 {"IFX0102", 0}, /* Infineon */ 814 {"BCM0101", 0}, /* Broadcom */ 815 {"BCM0102", 0}, /* Broadcom */ 816 {"NSC1200", 0}, /* National */ 817 {"ICO0102", 0}, /* Intel */ 818 /* Add new here */ 819 {"", 0}, /* User Specified */ 820 {"", 0} /* Terminator */ 821 }; 822 MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl); 823 824 static void tpm_tis_pnp_remove(struct pnp_dev *dev) 825 { 826 struct tpm_chip *chip = pnp_get_drvdata(dev); 827 828 tpm_dev_vendor_release(chip); 829 830 kfree(chip); 831 } 832 833 834 static struct pnp_driver tis_pnp_driver = { 835 .name = "tpm_tis", 836 .id_table = tpm_pnp_tbl, 837 .probe = tpm_tis_pnp_init, 838 .suspend = tpm_tis_pnp_suspend, 839 .resume = tpm_tis_pnp_resume, 840 .remove = tpm_tis_pnp_remove, 841 }; 842 843 #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2 844 module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id, 845 sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444); 846 MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe"); 847 #endif 848 849 #ifdef CONFIG_PM_SLEEP 850 static int tpm_tis_resume(struct device *dev) 851 { 852 struct tpm_chip *chip = dev_get_drvdata(dev); 853 854 if (chip->vendor.irq) 855 tpm_tis_reenable_interrupts(chip); 856 857 return tpm_pm_resume(dev); 858 } 859 #endif 860 861 static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume); 862 863 static struct platform_driver tis_drv = { 864 .driver = { 865 .name = "tpm_tis", 866 .owner = THIS_MODULE, 867 .pm = &tpm_tis_pm, 868 }, 869 }; 870 871 static struct platform_device *pdev; 872 873 static bool force; 874 module_param(force, bool, 0444); 875 MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry"); 876 static int __init init_tis(void) 877 { 878 int rc; 879 #ifdef CONFIG_PNP 880 if (!force) 881 return pnp_register_driver(&tis_pnp_driver); 882 #endif 883 884 rc = platform_driver_register(&tis_drv); 885 if (rc < 0) 886 return rc; 887 if (IS_ERR(pdev=platform_device_register_simple("tpm_tis", -1, NULL, 0))) 888 return PTR_ERR(pdev); 889 if((rc=tpm_tis_init(&pdev->dev, TIS_MEM_BASE, TIS_MEM_LEN, 0)) != 0) { 890 platform_device_unregister(pdev); 891 platform_driver_unregister(&tis_drv); 892 } 893 return rc; 894 } 895 896 static void __exit cleanup_tis(void) 897 { 898 struct tpm_vendor_specific *i, *j; 899 struct tpm_chip *chip; 900 mutex_lock(&tis_lock); 901 list_for_each_entry_safe(i, j, &tis_chips, list) { 902 chip = to_tpm_chip(i); 903 tpm_remove_hardware(chip->dev); 904 iowrite32(~TPM_GLOBAL_INT_ENABLE & 905 ioread32(chip->vendor.iobase + 906 TPM_INT_ENABLE(chip->vendor. 907 locality)), 908 chip->vendor.iobase + 909 TPM_INT_ENABLE(chip->vendor.locality)); 910 release_locality(chip, chip->vendor.locality, 1); 911 if (chip->vendor.irq) 912 free_irq(chip->vendor.irq, chip); 913 iounmap(i->iobase); 914 list_del(&i->list); 915 } 916 mutex_unlock(&tis_lock); 917 #ifdef CONFIG_PNP 918 if (!force) { 919 pnp_unregister_driver(&tis_pnp_driver); 920 return; 921 } 922 #endif 923 platform_device_unregister(pdev); 924 platform_driver_unregister(&tis_drv); 925 } 926 927 module_init(init_tis); 928 module_exit(cleanup_tis); 929 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); 930 MODULE_DESCRIPTION("TPM Driver"); 931 MODULE_VERSION("2.0"); 932 MODULE_LICENSE("GPL"); 933