1 /* 2 * Copyright (C) 2005, 2006 IBM Corporation 3 * 4 * Authors: 5 * Leendert van Doorn <leendert@watson.ibm.com> 6 * Kylene Hall <kjhall@us.ibm.com> 7 * 8 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 9 * 10 * Device driver for TCG/TCPA TPM (trusted platform module). 11 * Specifications at www.trustedcomputinggroup.org 12 * 13 * This device driver implements the TPM interface as defined in 14 * the TCG TPM Interface Spec version 1.2, revision 1.0. 15 * 16 * This program is free software; you can redistribute it and/or 17 * modify it under the terms of the GNU General Public License as 18 * published by the Free Software Foundation, version 2 of the 19 * License. 20 */ 21 #include <linux/init.h> 22 #include <linux/module.h> 23 #include <linux/moduleparam.h> 24 #include <linux/pnp.h> 25 #include <linux/slab.h> 26 #include <linux/interrupt.h> 27 #include <linux/wait.h> 28 #include <linux/acpi.h> 29 #include <linux/freezer.h> 30 #include "tpm.h" 31 32 #define TPM_HEADER_SIZE 10 33 34 enum tis_access { 35 TPM_ACCESS_VALID = 0x80, 36 TPM_ACCESS_ACTIVE_LOCALITY = 0x20, 37 TPM_ACCESS_REQUEST_PENDING = 0x04, 38 TPM_ACCESS_REQUEST_USE = 0x02, 39 }; 40 41 enum tis_status { 42 TPM_STS_VALID = 0x80, 43 TPM_STS_COMMAND_READY = 0x40, 44 TPM_STS_GO = 0x20, 45 TPM_STS_DATA_AVAIL = 0x10, 46 TPM_STS_DATA_EXPECT = 0x08, 47 }; 48 49 enum tis_int_flags { 50 TPM_GLOBAL_INT_ENABLE = 0x80000000, 51 TPM_INTF_BURST_COUNT_STATIC = 0x100, 52 TPM_INTF_CMD_READY_INT = 0x080, 53 TPM_INTF_INT_EDGE_FALLING = 0x040, 54 TPM_INTF_INT_EDGE_RISING = 0x020, 55 TPM_INTF_INT_LEVEL_LOW = 0x010, 56 TPM_INTF_INT_LEVEL_HIGH = 0x008, 57 TPM_INTF_LOCALITY_CHANGE_INT = 0x004, 58 TPM_INTF_STS_VALID_INT = 0x002, 59 TPM_INTF_DATA_AVAIL_INT = 0x001, 60 }; 61 62 enum tis_defaults { 63 TIS_MEM_BASE = 0xFED40000, 64 TIS_MEM_LEN = 0x5000, 65 TIS_SHORT_TIMEOUT = 750, /* ms */ 66 TIS_LONG_TIMEOUT = 2000, /* 2 sec */ 67 }; 68 69 #define TPM_ACCESS(l) (0x0000 | ((l) << 12)) 70 #define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12)) 71 #define TPM_INT_VECTOR(l) (0x000C | ((l) << 12)) 72 #define TPM_INT_STATUS(l) (0x0010 | ((l) << 12)) 73 #define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12)) 74 #define TPM_STS(l) (0x0018 | ((l) << 12)) 75 #define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12)) 76 77 #define TPM_DID_VID(l) (0x0F00 | ((l) << 12)) 78 #define TPM_RID(l) (0x0F04 | ((l) << 12)) 79 80 static LIST_HEAD(tis_chips); 81 static DEFINE_SPINLOCK(tis_lock); 82 83 #if defined(CONFIG_PNP) && defined(CONFIG_ACPI) 84 static int is_itpm(struct pnp_dev *dev) 85 { 86 struct acpi_device *acpi = pnp_acpi_device(dev); 87 struct acpi_hardware_id *id; 88 89 list_for_each_entry(id, &acpi->pnp.ids, list) { 90 if (!strcmp("INTC0102", id->id)) 91 return 1; 92 } 93 94 return 0; 95 } 96 #else 97 static inline int is_itpm(struct pnp_dev *dev) 98 { 99 return 0; 100 } 101 #endif 102 103 static int check_locality(struct tpm_chip *chip, int l) 104 { 105 if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & 106 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == 107 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) 108 return chip->vendor.locality = l; 109 110 return -1; 111 } 112 113 static void release_locality(struct tpm_chip *chip, int l, int force) 114 { 115 if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & 116 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) == 117 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) 118 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY, 119 chip->vendor.iobase + TPM_ACCESS(l)); 120 } 121 122 static int request_locality(struct tpm_chip *chip, int l) 123 { 124 unsigned long stop, timeout; 125 long rc; 126 127 if (check_locality(chip, l) >= 0) 128 return l; 129 130 iowrite8(TPM_ACCESS_REQUEST_USE, 131 chip->vendor.iobase + TPM_ACCESS(l)); 132 133 stop = jiffies + chip->vendor.timeout_a; 134 135 if (chip->vendor.irq) { 136 again: 137 timeout = stop - jiffies; 138 if ((long)timeout <= 0) 139 return -1; 140 rc = wait_event_interruptible_timeout(chip->vendor.int_queue, 141 (check_locality 142 (chip, l) >= 0), 143 timeout); 144 if (rc > 0) 145 return l; 146 if (rc == -ERESTARTSYS && freezing(current)) { 147 clear_thread_flag(TIF_SIGPENDING); 148 goto again; 149 } 150 } else { 151 /* wait for burstcount */ 152 do { 153 if (check_locality(chip, l) >= 0) 154 return l; 155 msleep(TPM_TIMEOUT); 156 } 157 while (time_before(jiffies, stop)); 158 } 159 return -1; 160 } 161 162 static u8 tpm_tis_status(struct tpm_chip *chip) 163 { 164 return ioread8(chip->vendor.iobase + 165 TPM_STS(chip->vendor.locality)); 166 } 167 168 static void tpm_tis_ready(struct tpm_chip *chip) 169 { 170 /* this causes the current command to be aborted */ 171 iowrite8(TPM_STS_COMMAND_READY, 172 chip->vendor.iobase + TPM_STS(chip->vendor.locality)); 173 } 174 175 static int get_burstcount(struct tpm_chip *chip) 176 { 177 unsigned long stop; 178 int burstcnt; 179 180 /* wait for burstcount */ 181 /* which timeout value, spec has 2 answers (c & d) */ 182 stop = jiffies + chip->vendor.timeout_d; 183 do { 184 burstcnt = ioread8(chip->vendor.iobase + 185 TPM_STS(chip->vendor.locality) + 1); 186 burstcnt += ioread8(chip->vendor.iobase + 187 TPM_STS(chip->vendor.locality) + 188 2) << 8; 189 if (burstcnt) 190 return burstcnt; 191 msleep(TPM_TIMEOUT); 192 } while (time_before(jiffies, stop)); 193 return -EBUSY; 194 } 195 196 static int wait_for_stat(struct tpm_chip *chip, u8 mask, unsigned long timeout, 197 wait_queue_head_t *queue) 198 { 199 unsigned long stop; 200 long rc; 201 u8 status; 202 203 /* check current status */ 204 status = tpm_tis_status(chip); 205 if ((status & mask) == mask) 206 return 0; 207 208 stop = jiffies + timeout; 209 210 if (chip->vendor.irq) { 211 again: 212 timeout = stop - jiffies; 213 if ((long)timeout <= 0) 214 return -ETIME; 215 rc = wait_event_interruptible_timeout(*queue, 216 ((tpm_tis_status 217 (chip) & mask) == 218 mask), timeout); 219 if (rc > 0) 220 return 0; 221 if (rc == -ERESTARTSYS && freezing(current)) { 222 clear_thread_flag(TIF_SIGPENDING); 223 goto again; 224 } 225 } else { 226 do { 227 msleep(TPM_TIMEOUT); 228 status = tpm_tis_status(chip); 229 if ((status & mask) == mask) 230 return 0; 231 } while (time_before(jiffies, stop)); 232 } 233 return -ETIME; 234 } 235 236 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) 237 { 238 int size = 0, burstcnt; 239 while (size < count && 240 wait_for_stat(chip, 241 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 242 chip->vendor.timeout_c, 243 &chip->vendor.read_queue) 244 == 0) { 245 burstcnt = get_burstcount(chip); 246 for (; burstcnt > 0 && size < count; burstcnt--) 247 buf[size++] = ioread8(chip->vendor.iobase + 248 TPM_DATA_FIFO(chip->vendor. 249 locality)); 250 } 251 return size; 252 } 253 254 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count) 255 { 256 int size = 0; 257 int expected, status; 258 259 if (count < TPM_HEADER_SIZE) { 260 size = -EIO; 261 goto out; 262 } 263 264 /* read first 10 bytes, including tag, paramsize, and result */ 265 if ((size = 266 recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) { 267 dev_err(chip->dev, "Unable to read header\n"); 268 goto out; 269 } 270 271 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 272 if (expected > count) { 273 size = -EIO; 274 goto out; 275 } 276 277 if ((size += 278 recv_data(chip, &buf[TPM_HEADER_SIZE], 279 expected - TPM_HEADER_SIZE)) < expected) { 280 dev_err(chip->dev, "Unable to read remainder of result\n"); 281 size = -ETIME; 282 goto out; 283 } 284 285 wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 286 &chip->vendor.int_queue); 287 status = tpm_tis_status(chip); 288 if (status & TPM_STS_DATA_AVAIL) { /* retry? */ 289 dev_err(chip->dev, "Error left over data\n"); 290 size = -EIO; 291 goto out; 292 } 293 294 out: 295 tpm_tis_ready(chip); 296 release_locality(chip, chip->vendor.locality, 0); 297 return size; 298 } 299 300 static int itpm; 301 module_param(itpm, bool, 0444); 302 MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)"); 303 304 /* 305 * If interrupts are used (signaled by an irq set in the vendor structure) 306 * tpm.c can skip polling for the data to be available as the interrupt is 307 * waited for here 308 */ 309 static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len) 310 { 311 int rc, status, burstcnt; 312 size_t count = 0; 313 314 if (request_locality(chip, 0) < 0) 315 return -EBUSY; 316 317 status = tpm_tis_status(chip); 318 if ((status & TPM_STS_COMMAND_READY) == 0) { 319 tpm_tis_ready(chip); 320 if (wait_for_stat 321 (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b, 322 &chip->vendor.int_queue) < 0) { 323 rc = -ETIME; 324 goto out_err; 325 } 326 } 327 328 while (count < len - 1) { 329 burstcnt = get_burstcount(chip); 330 for (; burstcnt > 0 && count < len - 1; burstcnt--) { 331 iowrite8(buf[count], chip->vendor.iobase + 332 TPM_DATA_FIFO(chip->vendor.locality)); 333 count++; 334 } 335 336 wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 337 &chip->vendor.int_queue); 338 status = tpm_tis_status(chip); 339 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) { 340 rc = -EIO; 341 goto out_err; 342 } 343 } 344 345 /* write last byte */ 346 iowrite8(buf[count], 347 chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality)); 348 wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 349 &chip->vendor.int_queue); 350 status = tpm_tis_status(chip); 351 if ((status & TPM_STS_DATA_EXPECT) != 0) { 352 rc = -EIO; 353 goto out_err; 354 } 355 356 return 0; 357 358 out_err: 359 tpm_tis_ready(chip); 360 release_locality(chip, chip->vendor.locality, 0); 361 return rc; 362 } 363 364 /* 365 * If interrupts are used (signaled by an irq set in the vendor structure) 366 * tpm.c can skip polling for the data to be available as the interrupt is 367 * waited for here 368 */ 369 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len) 370 { 371 int rc; 372 u32 ordinal; 373 374 rc = tpm_tis_send_data(chip, buf, len); 375 if (rc < 0) 376 return rc; 377 378 /* go and do it */ 379 iowrite8(TPM_STS_GO, 380 chip->vendor.iobase + TPM_STS(chip->vendor.locality)); 381 382 if (chip->vendor.irq) { 383 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 384 if (wait_for_stat 385 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, 386 tpm_calc_ordinal_duration(chip, ordinal), 387 &chip->vendor.read_queue) < 0) { 388 rc = -ETIME; 389 goto out_err; 390 } 391 } 392 return len; 393 out_err: 394 tpm_tis_ready(chip); 395 release_locality(chip, chip->vendor.locality, 0); 396 return rc; 397 } 398 399 /* 400 * Early probing for iTPM with STS_DATA_EXPECT flaw. 401 * Try sending command without itpm flag set and if that 402 * fails, repeat with itpm flag set. 403 */ 404 static int probe_itpm(struct tpm_chip *chip) 405 { 406 int rc = 0; 407 u8 cmd_getticks[] = { 408 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a, 409 0x00, 0x00, 0x00, 0xf1 410 }; 411 size_t len = sizeof(cmd_getticks); 412 int rem_itpm = itpm; 413 414 itpm = 0; 415 416 rc = tpm_tis_send_data(chip, cmd_getticks, len); 417 if (rc == 0) 418 goto out; 419 420 tpm_tis_ready(chip); 421 release_locality(chip, chip->vendor.locality, 0); 422 423 itpm = 1; 424 425 rc = tpm_tis_send_data(chip, cmd_getticks, len); 426 if (rc == 0) { 427 dev_info(chip->dev, "Detected an iTPM.\n"); 428 rc = 1; 429 } else 430 rc = -EFAULT; 431 432 out: 433 itpm = rem_itpm; 434 tpm_tis_ready(chip); 435 release_locality(chip, chip->vendor.locality, 0); 436 437 return rc; 438 } 439 440 static const struct file_operations tis_ops = { 441 .owner = THIS_MODULE, 442 .llseek = no_llseek, 443 .open = tpm_open, 444 .read = tpm_read, 445 .write = tpm_write, 446 .release = tpm_release, 447 }; 448 449 static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL); 450 static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL); 451 static DEVICE_ATTR(enabled, S_IRUGO, tpm_show_enabled, NULL); 452 static DEVICE_ATTR(active, S_IRUGO, tpm_show_active, NULL); 453 static DEVICE_ATTR(owned, S_IRUGO, tpm_show_owned, NULL); 454 static DEVICE_ATTR(temp_deactivated, S_IRUGO, tpm_show_temp_deactivated, 455 NULL); 456 static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL); 457 static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel); 458 static DEVICE_ATTR(durations, S_IRUGO, tpm_show_durations, NULL); 459 static DEVICE_ATTR(timeouts, S_IRUGO, tpm_show_timeouts, NULL); 460 461 static struct attribute *tis_attrs[] = { 462 &dev_attr_pubek.attr, 463 &dev_attr_pcrs.attr, 464 &dev_attr_enabled.attr, 465 &dev_attr_active.attr, 466 &dev_attr_owned.attr, 467 &dev_attr_temp_deactivated.attr, 468 &dev_attr_caps.attr, 469 &dev_attr_cancel.attr, 470 &dev_attr_durations.attr, 471 &dev_attr_timeouts.attr, NULL, 472 }; 473 474 static struct attribute_group tis_attr_grp = { 475 .attrs = tis_attrs 476 }; 477 478 static struct tpm_vendor_specific tpm_tis = { 479 .status = tpm_tis_status, 480 .recv = tpm_tis_recv, 481 .send = tpm_tis_send, 482 .cancel = tpm_tis_ready, 483 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 484 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 485 .req_canceled = TPM_STS_COMMAND_READY, 486 .attr_group = &tis_attr_grp, 487 .miscdev = { 488 .fops = &tis_ops,}, 489 }; 490 491 static irqreturn_t tis_int_probe(int irq, void *dev_id) 492 { 493 struct tpm_chip *chip = dev_id; 494 u32 interrupt; 495 496 interrupt = ioread32(chip->vendor.iobase + 497 TPM_INT_STATUS(chip->vendor.locality)); 498 499 if (interrupt == 0) 500 return IRQ_NONE; 501 502 chip->vendor.probed_irq = irq; 503 504 /* Clear interrupts handled with TPM_EOI */ 505 iowrite32(interrupt, 506 chip->vendor.iobase + 507 TPM_INT_STATUS(chip->vendor.locality)); 508 return IRQ_HANDLED; 509 } 510 511 static irqreturn_t tis_int_handler(int dummy, void *dev_id) 512 { 513 struct tpm_chip *chip = dev_id; 514 u32 interrupt; 515 int i; 516 517 interrupt = ioread32(chip->vendor.iobase + 518 TPM_INT_STATUS(chip->vendor.locality)); 519 520 if (interrupt == 0) 521 return IRQ_NONE; 522 523 if (interrupt & TPM_INTF_DATA_AVAIL_INT) 524 wake_up_interruptible(&chip->vendor.read_queue); 525 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT) 526 for (i = 0; i < 5; i++) 527 if (check_locality(chip, i) >= 0) 528 break; 529 if (interrupt & 530 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT | 531 TPM_INTF_CMD_READY_INT)) 532 wake_up_interruptible(&chip->vendor.int_queue); 533 534 /* Clear interrupts handled with TPM_EOI */ 535 iowrite32(interrupt, 536 chip->vendor.iobase + 537 TPM_INT_STATUS(chip->vendor.locality)); 538 ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality)); 539 return IRQ_HANDLED; 540 } 541 542 static int interrupts = 1; 543 module_param(interrupts, bool, 0444); 544 MODULE_PARM_DESC(interrupts, "Enable interrupts"); 545 546 static int tpm_tis_init(struct device *dev, resource_size_t start, 547 resource_size_t len, unsigned int irq) 548 { 549 u32 vendor, intfcaps, intmask; 550 int rc, i, irq_s, irq_e; 551 struct tpm_chip *chip; 552 553 if (!(chip = tpm_register_hardware(dev, &tpm_tis))) 554 return -ENODEV; 555 556 chip->vendor.iobase = ioremap(start, len); 557 if (!chip->vendor.iobase) { 558 rc = -EIO; 559 goto out_err; 560 } 561 562 /* Default timeouts */ 563 chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT); 564 chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT); 565 chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT); 566 chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT); 567 568 if (request_locality(chip, 0) != 0) { 569 rc = -ENODEV; 570 goto out_err; 571 } 572 573 vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0)); 574 575 dev_info(dev, 576 "1.2 TPM (device-id 0x%X, rev-id %d)\n", 577 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0))); 578 579 if (!itpm) { 580 itpm = probe_itpm(chip); 581 if (itpm < 0) { 582 rc = -ENODEV; 583 goto out_err; 584 } 585 } 586 587 if (itpm) 588 dev_info(dev, "Intel iTPM workaround enabled\n"); 589 590 591 /* Figure out the capabilities */ 592 intfcaps = 593 ioread32(chip->vendor.iobase + 594 TPM_INTF_CAPS(chip->vendor.locality)); 595 dev_dbg(dev, "TPM interface capabilities (0x%x):\n", 596 intfcaps); 597 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC) 598 dev_dbg(dev, "\tBurst Count Static\n"); 599 if (intfcaps & TPM_INTF_CMD_READY_INT) 600 dev_dbg(dev, "\tCommand Ready Int Support\n"); 601 if (intfcaps & TPM_INTF_INT_EDGE_FALLING) 602 dev_dbg(dev, "\tInterrupt Edge Falling\n"); 603 if (intfcaps & TPM_INTF_INT_EDGE_RISING) 604 dev_dbg(dev, "\tInterrupt Edge Rising\n"); 605 if (intfcaps & TPM_INTF_INT_LEVEL_LOW) 606 dev_dbg(dev, "\tInterrupt Level Low\n"); 607 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH) 608 dev_dbg(dev, "\tInterrupt Level High\n"); 609 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) 610 dev_dbg(dev, "\tLocality Change Int Support\n"); 611 if (intfcaps & TPM_INTF_STS_VALID_INT) 612 dev_dbg(dev, "\tSts Valid Int Support\n"); 613 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) 614 dev_dbg(dev, "\tData Avail Int Support\n"); 615 616 /* get the timeouts before testing for irqs */ 617 tpm_get_timeouts(chip); 618 619 /* INTERRUPT Setup */ 620 init_waitqueue_head(&chip->vendor.read_queue); 621 init_waitqueue_head(&chip->vendor.int_queue); 622 623 intmask = 624 ioread32(chip->vendor.iobase + 625 TPM_INT_ENABLE(chip->vendor.locality)); 626 627 intmask |= TPM_INTF_CMD_READY_INT 628 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT 629 | TPM_INTF_STS_VALID_INT; 630 631 iowrite32(intmask, 632 chip->vendor.iobase + 633 TPM_INT_ENABLE(chip->vendor.locality)); 634 if (interrupts) 635 chip->vendor.irq = irq; 636 if (interrupts && !chip->vendor.irq) { 637 irq_s = 638 ioread8(chip->vendor.iobase + 639 TPM_INT_VECTOR(chip->vendor.locality)); 640 if (irq_s) { 641 irq_e = irq_s; 642 } else { 643 irq_s = 3; 644 irq_e = 15; 645 } 646 647 for (i = irq_s; i <= irq_e && chip->vendor.irq == 0; i++) { 648 iowrite8(i, chip->vendor.iobase + 649 TPM_INT_VECTOR(chip->vendor.locality)); 650 if (request_irq 651 (i, tis_int_probe, IRQF_SHARED, 652 chip->vendor.miscdev.name, chip) != 0) { 653 dev_info(chip->dev, 654 "Unable to request irq: %d for probe\n", 655 i); 656 continue; 657 } 658 659 /* Clear all existing */ 660 iowrite32(ioread32 661 (chip->vendor.iobase + 662 TPM_INT_STATUS(chip->vendor.locality)), 663 chip->vendor.iobase + 664 TPM_INT_STATUS(chip->vendor.locality)); 665 666 /* Turn on */ 667 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE, 668 chip->vendor.iobase + 669 TPM_INT_ENABLE(chip->vendor.locality)); 670 671 chip->vendor.probed_irq = 0; 672 673 /* Generate Interrupts */ 674 tpm_gen_interrupt(chip); 675 676 chip->vendor.irq = chip->vendor.probed_irq; 677 678 /* free_irq will call into tis_int_probe; 679 clear all irqs we haven't seen while doing 680 tpm_gen_interrupt */ 681 iowrite32(ioread32 682 (chip->vendor.iobase + 683 TPM_INT_STATUS(chip->vendor.locality)), 684 chip->vendor.iobase + 685 TPM_INT_STATUS(chip->vendor.locality)); 686 687 /* Turn off */ 688 iowrite32(intmask, 689 chip->vendor.iobase + 690 TPM_INT_ENABLE(chip->vendor.locality)); 691 free_irq(i, chip); 692 } 693 } 694 if (chip->vendor.irq) { 695 iowrite8(chip->vendor.irq, 696 chip->vendor.iobase + 697 TPM_INT_VECTOR(chip->vendor.locality)); 698 if (request_irq 699 (chip->vendor.irq, tis_int_handler, IRQF_SHARED, 700 chip->vendor.miscdev.name, chip) != 0) { 701 dev_info(chip->dev, 702 "Unable to request irq: %d for use\n", 703 chip->vendor.irq); 704 chip->vendor.irq = 0; 705 } else { 706 /* Clear all existing */ 707 iowrite32(ioread32 708 (chip->vendor.iobase + 709 TPM_INT_STATUS(chip->vendor.locality)), 710 chip->vendor.iobase + 711 TPM_INT_STATUS(chip->vendor.locality)); 712 713 /* Turn on */ 714 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE, 715 chip->vendor.iobase + 716 TPM_INT_ENABLE(chip->vendor.locality)); 717 } 718 } 719 720 INIT_LIST_HEAD(&chip->vendor.list); 721 spin_lock(&tis_lock); 722 list_add(&chip->vendor.list, &tis_chips); 723 spin_unlock(&tis_lock); 724 725 tpm_continue_selftest(chip); 726 727 return 0; 728 out_err: 729 if (chip->vendor.iobase) 730 iounmap(chip->vendor.iobase); 731 tpm_remove_hardware(chip->dev); 732 return rc; 733 } 734 735 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip) 736 { 737 u32 intmask; 738 739 /* reenable interrupts that device may have lost or 740 BIOS/firmware may have disabled */ 741 iowrite8(chip->vendor.irq, chip->vendor.iobase + 742 TPM_INT_VECTOR(chip->vendor.locality)); 743 744 intmask = 745 ioread32(chip->vendor.iobase + 746 TPM_INT_ENABLE(chip->vendor.locality)); 747 748 intmask |= TPM_INTF_CMD_READY_INT 749 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT 750 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE; 751 752 iowrite32(intmask, 753 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality)); 754 } 755 756 757 #ifdef CONFIG_PNP 758 static int __devinit tpm_tis_pnp_init(struct pnp_dev *pnp_dev, 759 const struct pnp_device_id *pnp_id) 760 { 761 resource_size_t start, len; 762 unsigned int irq = 0; 763 764 start = pnp_mem_start(pnp_dev, 0); 765 len = pnp_mem_len(pnp_dev, 0); 766 767 if (pnp_irq_valid(pnp_dev, 0)) 768 irq = pnp_irq(pnp_dev, 0); 769 else 770 interrupts = 0; 771 772 if (is_itpm(pnp_dev)) 773 itpm = 1; 774 775 return tpm_tis_init(&pnp_dev->dev, start, len, irq); 776 } 777 778 static int tpm_tis_pnp_suspend(struct pnp_dev *dev, pm_message_t msg) 779 { 780 return tpm_pm_suspend(&dev->dev, msg); 781 } 782 783 static int tpm_tis_pnp_resume(struct pnp_dev *dev) 784 { 785 struct tpm_chip *chip = pnp_get_drvdata(dev); 786 int ret; 787 788 if (chip->vendor.irq) 789 tpm_tis_reenable_interrupts(chip); 790 791 ret = tpm_pm_resume(&dev->dev); 792 if (!ret) 793 tpm_continue_selftest(chip); 794 795 return ret; 796 } 797 798 static struct pnp_device_id tpm_pnp_tbl[] __devinitdata = { 799 {"PNP0C31", 0}, /* TPM */ 800 {"ATM1200", 0}, /* Atmel */ 801 {"IFX0102", 0}, /* Infineon */ 802 {"BCM0101", 0}, /* Broadcom */ 803 {"BCM0102", 0}, /* Broadcom */ 804 {"NSC1200", 0}, /* National */ 805 {"ICO0102", 0}, /* Intel */ 806 /* Add new here */ 807 {"", 0}, /* User Specified */ 808 {"", 0} /* Terminator */ 809 }; 810 MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl); 811 812 static __devexit void tpm_tis_pnp_remove(struct pnp_dev *dev) 813 { 814 struct tpm_chip *chip = pnp_get_drvdata(dev); 815 816 tpm_dev_vendor_release(chip); 817 818 kfree(chip); 819 } 820 821 822 static struct pnp_driver tis_pnp_driver = { 823 .name = "tpm_tis", 824 .id_table = tpm_pnp_tbl, 825 .probe = tpm_tis_pnp_init, 826 .suspend = tpm_tis_pnp_suspend, 827 .resume = tpm_tis_pnp_resume, 828 .remove = tpm_tis_pnp_remove, 829 }; 830 831 #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2 832 module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id, 833 sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444); 834 MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe"); 835 #endif 836 static int tpm_tis_suspend(struct platform_device *dev, pm_message_t msg) 837 { 838 return tpm_pm_suspend(&dev->dev, msg); 839 } 840 841 static int tpm_tis_resume(struct platform_device *dev) 842 { 843 struct tpm_chip *chip = dev_get_drvdata(&dev->dev); 844 845 if (chip->vendor.irq) 846 tpm_tis_reenable_interrupts(chip); 847 848 return tpm_pm_resume(&dev->dev); 849 } 850 static struct platform_driver tis_drv = { 851 .driver = { 852 .name = "tpm_tis", 853 .owner = THIS_MODULE, 854 }, 855 .suspend = tpm_tis_suspend, 856 .resume = tpm_tis_resume, 857 }; 858 859 static struct platform_device *pdev; 860 861 static int force; 862 module_param(force, bool, 0444); 863 MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry"); 864 static int __init init_tis(void) 865 { 866 int rc; 867 #ifdef CONFIG_PNP 868 if (!force) 869 return pnp_register_driver(&tis_pnp_driver); 870 #endif 871 872 rc = platform_driver_register(&tis_drv); 873 if (rc < 0) 874 return rc; 875 if (IS_ERR(pdev=platform_device_register_simple("tpm_tis", -1, NULL, 0))) 876 return PTR_ERR(pdev); 877 if((rc=tpm_tis_init(&pdev->dev, TIS_MEM_BASE, TIS_MEM_LEN, 0)) != 0) { 878 platform_device_unregister(pdev); 879 platform_driver_unregister(&tis_drv); 880 } 881 return rc; 882 } 883 884 static void __exit cleanup_tis(void) 885 { 886 struct tpm_vendor_specific *i, *j; 887 struct tpm_chip *chip; 888 spin_lock(&tis_lock); 889 list_for_each_entry_safe(i, j, &tis_chips, list) { 890 chip = to_tpm_chip(i); 891 tpm_remove_hardware(chip->dev); 892 iowrite32(~TPM_GLOBAL_INT_ENABLE & 893 ioread32(chip->vendor.iobase + 894 TPM_INT_ENABLE(chip->vendor. 895 locality)), 896 chip->vendor.iobase + 897 TPM_INT_ENABLE(chip->vendor.locality)); 898 release_locality(chip, chip->vendor.locality, 1); 899 if (chip->vendor.irq) 900 free_irq(chip->vendor.irq, chip); 901 iounmap(i->iobase); 902 list_del(&i->list); 903 } 904 spin_unlock(&tis_lock); 905 #ifdef CONFIG_PNP 906 if (!force) { 907 pnp_unregister_driver(&tis_pnp_driver); 908 return; 909 } 910 #endif 911 platform_device_unregister(pdev); 912 platform_driver_unregister(&tis_drv); 913 } 914 915 module_init(init_tis); 916 module_exit(cleanup_tis); 917 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); 918 MODULE_DESCRIPTION("TPM Driver"); 919 MODULE_VERSION("2.0"); 920 MODULE_LICENSE("GPL"); 921