1 /****************************************************************************** 2 * Nuvoton TPM I2C Device Driver Interface for WPCT301/NPCT501, 3 * based on the TCG TPM Interface Spec version 1.2. 4 * Specifications at www.trustedcomputinggroup.org 5 * 6 * Copyright (C) 2011, Nuvoton Technology Corporation. 7 * Dan Morav <dan.morav@nuvoton.com> 8 * Copyright (C) 2013, Obsidian Research Corp. 9 * Jason Gunthorpe <jgunthorpe@obsidianresearch.com> 10 * 11 * This program is free software: you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation, either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program. If not, see http://www.gnu.org/licenses/>. 23 * 24 * Nuvoton contact information: APC.Support@nuvoton.com 25 *****************************************************************************/ 26 27 #include <linux/init.h> 28 #include <linux/module.h> 29 #include <linux/moduleparam.h> 30 #include <linux/slab.h> 31 #include <linux/interrupt.h> 32 #include <linux/wait.h> 33 #include <linux/i2c.h> 34 #include "tpm.h" 35 36 /* I2C interface offsets */ 37 #define TPM_STS 0x00 38 #define TPM_BURST_COUNT 0x01 39 #define TPM_DATA_FIFO_W 0x20 40 #define TPM_DATA_FIFO_R 0x40 41 #define TPM_VID_DID_RID 0x60 42 /* TPM command header size */ 43 #define TPM_HEADER_SIZE 10 44 #define TPM_RETRY 5 45 /* 46 * I2C bus device maximum buffer size w/o counting I2C address or command 47 * i.e. max size required for I2C write is 34 = addr, command, 32 bytes data 48 */ 49 #define TPM_I2C_MAX_BUF_SIZE 32 50 #define TPM_I2C_RETRY_COUNT 32 51 #define TPM_I2C_BUS_DELAY 1 /* msec */ 52 #define TPM_I2C_RETRY_DELAY_SHORT 2 /* msec */ 53 #define TPM_I2C_RETRY_DELAY_LONG 10 /* msec */ 54 55 #define I2C_DRIVER_NAME "tpm_i2c_nuvoton" 56 57 struct priv_data { 58 unsigned int intrs; 59 }; 60 61 static s32 i2c_nuvoton_read_buf(struct i2c_client *client, u8 offset, u8 size, 62 u8 *data) 63 { 64 s32 status; 65 66 status = i2c_smbus_read_i2c_block_data(client, offset, size, data); 67 dev_dbg(&client->dev, 68 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__, 69 offset, size, (int)size, data, status); 70 return status; 71 } 72 73 static s32 i2c_nuvoton_write_buf(struct i2c_client *client, u8 offset, u8 size, 74 u8 *data) 75 { 76 s32 status; 77 78 status = i2c_smbus_write_i2c_block_data(client, offset, size, data); 79 dev_dbg(&client->dev, 80 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__, 81 offset, size, (int)size, data, status); 82 return status; 83 } 84 85 #define TPM_STS_VALID 0x80 86 #define TPM_STS_COMMAND_READY 0x40 87 #define TPM_STS_GO 0x20 88 #define TPM_STS_DATA_AVAIL 0x10 89 #define TPM_STS_EXPECT 0x08 90 #define TPM_STS_RESPONSE_RETRY 0x02 91 #define TPM_STS_ERR_VAL 0x07 /* bit2...bit0 reads always 0 */ 92 93 #define TPM_I2C_SHORT_TIMEOUT 750 /* ms */ 94 #define TPM_I2C_LONG_TIMEOUT 2000 /* 2 sec */ 95 96 /* read TPM_STS register */ 97 static u8 i2c_nuvoton_read_status(struct tpm_chip *chip) 98 { 99 struct i2c_client *client = to_i2c_client(chip->pdev); 100 s32 status; 101 u8 data; 102 103 status = i2c_nuvoton_read_buf(client, TPM_STS, 1, &data); 104 if (status <= 0) { 105 dev_err(chip->pdev, "%s() error return %d\n", __func__, 106 status); 107 data = TPM_STS_ERR_VAL; 108 } 109 110 return data; 111 } 112 113 /* write byte to TPM_STS register */ 114 static s32 i2c_nuvoton_write_status(struct i2c_client *client, u8 data) 115 { 116 s32 status; 117 int i; 118 119 /* this causes the current command to be aborted */ 120 for (i = 0, status = -1; i < TPM_I2C_RETRY_COUNT && status < 0; i++) { 121 status = i2c_nuvoton_write_buf(client, TPM_STS, 1, &data); 122 msleep(TPM_I2C_BUS_DELAY); 123 } 124 return status; 125 } 126 127 /* write commandReady to TPM_STS register */ 128 static void i2c_nuvoton_ready(struct tpm_chip *chip) 129 { 130 struct i2c_client *client = to_i2c_client(chip->pdev); 131 s32 status; 132 133 /* this causes the current command to be aborted */ 134 status = i2c_nuvoton_write_status(client, TPM_STS_COMMAND_READY); 135 if (status < 0) 136 dev_err(chip->pdev, 137 "%s() fail to write TPM_STS.commandReady\n", __func__); 138 } 139 140 /* read burstCount field from TPM_STS register 141 * return -1 on fail to read */ 142 static int i2c_nuvoton_get_burstcount(struct i2c_client *client, 143 struct tpm_chip *chip) 144 { 145 unsigned long stop = jiffies + chip->vendor.timeout_d; 146 s32 status; 147 int burst_count = -1; 148 u8 data; 149 150 /* wait for burstcount to be non-zero */ 151 do { 152 /* in I2C burstCount is 1 byte */ 153 status = i2c_nuvoton_read_buf(client, TPM_BURST_COUNT, 1, 154 &data); 155 if (status > 0 && data > 0) { 156 burst_count = min_t(u8, TPM_I2C_MAX_BUF_SIZE, data); 157 break; 158 } 159 msleep(TPM_I2C_BUS_DELAY); 160 } while (time_before(jiffies, stop)); 161 162 return burst_count; 163 } 164 165 /* 166 * WPCT301/NPCT501 SINT# supports only dataAvail 167 * any call to this function which is not waiting for dataAvail will 168 * set queue to NULL to avoid waiting for interrupt 169 */ 170 static bool i2c_nuvoton_check_status(struct tpm_chip *chip, u8 mask, u8 value) 171 { 172 u8 status = i2c_nuvoton_read_status(chip); 173 return (status != TPM_STS_ERR_VAL) && ((status & mask) == value); 174 } 175 176 static int i2c_nuvoton_wait_for_stat(struct tpm_chip *chip, u8 mask, u8 value, 177 u32 timeout, wait_queue_head_t *queue) 178 { 179 if (chip->vendor.irq && queue) { 180 s32 rc; 181 struct priv_data *priv = chip->vendor.priv; 182 unsigned int cur_intrs = priv->intrs; 183 184 enable_irq(chip->vendor.irq); 185 rc = wait_event_interruptible_timeout(*queue, 186 cur_intrs != priv->intrs, 187 timeout); 188 if (rc > 0) 189 return 0; 190 /* At this point we know that the SINT pin is asserted, so we 191 * do not need to do i2c_nuvoton_check_status */ 192 } else { 193 unsigned long ten_msec, stop; 194 bool status_valid; 195 196 /* check current status */ 197 status_valid = i2c_nuvoton_check_status(chip, mask, value); 198 if (status_valid) 199 return 0; 200 201 /* use polling to wait for the event */ 202 ten_msec = jiffies + msecs_to_jiffies(TPM_I2C_RETRY_DELAY_LONG); 203 stop = jiffies + timeout; 204 do { 205 if (time_before(jiffies, ten_msec)) 206 msleep(TPM_I2C_RETRY_DELAY_SHORT); 207 else 208 msleep(TPM_I2C_RETRY_DELAY_LONG); 209 status_valid = i2c_nuvoton_check_status(chip, mask, 210 value); 211 if (status_valid) 212 return 0; 213 } while (time_before(jiffies, stop)); 214 } 215 dev_err(chip->pdev, "%s(%02x, %02x) -> timeout\n", __func__, mask, 216 value); 217 return -ETIMEDOUT; 218 } 219 220 /* wait for dataAvail field to be set in the TPM_STS register */ 221 static int i2c_nuvoton_wait_for_data_avail(struct tpm_chip *chip, u32 timeout, 222 wait_queue_head_t *queue) 223 { 224 return i2c_nuvoton_wait_for_stat(chip, 225 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 226 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 227 timeout, queue); 228 } 229 230 /* Read @count bytes into @buf from TPM_RD_FIFO register */ 231 static int i2c_nuvoton_recv_data(struct i2c_client *client, 232 struct tpm_chip *chip, u8 *buf, size_t count) 233 { 234 s32 rc; 235 int burst_count, bytes2read, size = 0; 236 237 while (size < count && 238 i2c_nuvoton_wait_for_data_avail(chip, 239 chip->vendor.timeout_c, 240 &chip->vendor.read_queue) == 0) { 241 burst_count = i2c_nuvoton_get_burstcount(client, chip); 242 if (burst_count < 0) { 243 dev_err(chip->pdev, 244 "%s() fail to read burstCount=%d\n", __func__, 245 burst_count); 246 return -EIO; 247 } 248 bytes2read = min_t(size_t, burst_count, count - size); 249 rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_R, 250 bytes2read, &buf[size]); 251 if (rc < 0) { 252 dev_err(chip->pdev, 253 "%s() fail on i2c_nuvoton_read_buf()=%d\n", 254 __func__, rc); 255 return -EIO; 256 } 257 dev_dbg(chip->pdev, "%s(%d):", __func__, bytes2read); 258 size += bytes2read; 259 } 260 261 return size; 262 } 263 264 /* Read TPM command results */ 265 static int i2c_nuvoton_recv(struct tpm_chip *chip, u8 *buf, size_t count) 266 { 267 struct device *dev = chip->pdev; 268 struct i2c_client *client = to_i2c_client(dev); 269 s32 rc; 270 int expected, status, burst_count, retries, size = 0; 271 272 if (count < TPM_HEADER_SIZE) { 273 i2c_nuvoton_ready(chip); /* return to idle */ 274 dev_err(dev, "%s() count < header size\n", __func__); 275 return -EIO; 276 } 277 for (retries = 0; retries < TPM_RETRY; retries++) { 278 if (retries > 0) { 279 /* if this is not the first trial, set responseRetry */ 280 i2c_nuvoton_write_status(client, 281 TPM_STS_RESPONSE_RETRY); 282 } 283 /* 284 * read first available (> 10 bytes), including: 285 * tag, paramsize, and result 286 */ 287 status = i2c_nuvoton_wait_for_data_avail( 288 chip, chip->vendor.timeout_c, &chip->vendor.read_queue); 289 if (status != 0) { 290 dev_err(dev, "%s() timeout on dataAvail\n", __func__); 291 size = -ETIMEDOUT; 292 continue; 293 } 294 burst_count = i2c_nuvoton_get_burstcount(client, chip); 295 if (burst_count < 0) { 296 dev_err(dev, "%s() fail to get burstCount\n", __func__); 297 size = -EIO; 298 continue; 299 } 300 size = i2c_nuvoton_recv_data(client, chip, buf, 301 burst_count); 302 if (size < TPM_HEADER_SIZE) { 303 dev_err(dev, "%s() fail to read header\n", __func__); 304 size = -EIO; 305 continue; 306 } 307 /* 308 * convert number of expected bytes field from big endian 32 bit 309 * to machine native 310 */ 311 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 312 if (expected > count) { 313 dev_err(dev, "%s() expected > count\n", __func__); 314 size = -EIO; 315 continue; 316 } 317 rc = i2c_nuvoton_recv_data(client, chip, &buf[size], 318 expected - size); 319 size += rc; 320 if (rc < 0 || size < expected) { 321 dev_err(dev, "%s() fail to read remainder of result\n", 322 __func__); 323 size = -EIO; 324 continue; 325 } 326 if (i2c_nuvoton_wait_for_stat( 327 chip, TPM_STS_VALID | TPM_STS_DATA_AVAIL, 328 TPM_STS_VALID, chip->vendor.timeout_c, 329 NULL)) { 330 dev_err(dev, "%s() error left over data\n", __func__); 331 size = -ETIMEDOUT; 332 continue; 333 } 334 break; 335 } 336 i2c_nuvoton_ready(chip); 337 dev_dbg(chip->pdev, "%s() -> %d\n", __func__, size); 338 return size; 339 } 340 341 /* 342 * Send TPM command. 343 * 344 * If interrupts are used (signaled by an irq set in the vendor structure) 345 * tpm.c can skip polling for the data to be available as the interrupt is 346 * waited for here 347 */ 348 static int i2c_nuvoton_send(struct tpm_chip *chip, u8 *buf, size_t len) 349 { 350 struct device *dev = chip->pdev; 351 struct i2c_client *client = to_i2c_client(dev); 352 u32 ordinal; 353 size_t count = 0; 354 int burst_count, bytes2write, retries, rc = -EIO; 355 356 for (retries = 0; retries < TPM_RETRY; retries++) { 357 i2c_nuvoton_ready(chip); 358 if (i2c_nuvoton_wait_for_stat(chip, TPM_STS_COMMAND_READY, 359 TPM_STS_COMMAND_READY, 360 chip->vendor.timeout_b, NULL)) { 361 dev_err(dev, "%s() timeout on commandReady\n", 362 __func__); 363 rc = -EIO; 364 continue; 365 } 366 rc = 0; 367 while (count < len - 1) { 368 burst_count = i2c_nuvoton_get_burstcount(client, 369 chip); 370 if (burst_count < 0) { 371 dev_err(dev, "%s() fail get burstCount\n", 372 __func__); 373 rc = -EIO; 374 break; 375 } 376 bytes2write = min_t(size_t, burst_count, 377 len - 1 - count); 378 rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 379 bytes2write, &buf[count]); 380 if (rc < 0) { 381 dev_err(dev, "%s() fail i2cWriteBuf\n", 382 __func__); 383 break; 384 } 385 dev_dbg(dev, "%s(%d):", __func__, bytes2write); 386 count += bytes2write; 387 rc = i2c_nuvoton_wait_for_stat(chip, 388 TPM_STS_VALID | 389 TPM_STS_EXPECT, 390 TPM_STS_VALID | 391 TPM_STS_EXPECT, 392 chip->vendor.timeout_c, 393 NULL); 394 if (rc < 0) { 395 dev_err(dev, "%s() timeout on Expect\n", 396 __func__); 397 rc = -ETIMEDOUT; 398 break; 399 } 400 } 401 if (rc < 0) 402 continue; 403 404 /* write last byte */ 405 rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 1, 406 &buf[count]); 407 if (rc < 0) { 408 dev_err(dev, "%s() fail to write last byte\n", 409 __func__); 410 rc = -EIO; 411 continue; 412 } 413 dev_dbg(dev, "%s(last): %02x", __func__, buf[count]); 414 rc = i2c_nuvoton_wait_for_stat(chip, 415 TPM_STS_VALID | TPM_STS_EXPECT, 416 TPM_STS_VALID, 417 chip->vendor.timeout_c, NULL); 418 if (rc) { 419 dev_err(dev, "%s() timeout on Expect to clear\n", 420 __func__); 421 rc = -ETIMEDOUT; 422 continue; 423 } 424 break; 425 } 426 if (rc < 0) { 427 /* retries == TPM_RETRY */ 428 i2c_nuvoton_ready(chip); 429 return rc; 430 } 431 /* execute the TPM command */ 432 rc = i2c_nuvoton_write_status(client, TPM_STS_GO); 433 if (rc < 0) { 434 dev_err(dev, "%s() fail to write Go\n", __func__); 435 i2c_nuvoton_ready(chip); 436 return rc; 437 } 438 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 439 rc = i2c_nuvoton_wait_for_data_avail(chip, 440 tpm_calc_ordinal_duration(chip, 441 ordinal), 442 &chip->vendor.read_queue); 443 if (rc) { 444 dev_err(dev, "%s() timeout command duration\n", __func__); 445 i2c_nuvoton_ready(chip); 446 return rc; 447 } 448 449 dev_dbg(dev, "%s() -> %zd\n", __func__, len); 450 return len; 451 } 452 453 static bool i2c_nuvoton_req_canceled(struct tpm_chip *chip, u8 status) 454 { 455 return (status == TPM_STS_COMMAND_READY); 456 } 457 458 static const struct tpm_class_ops tpm_i2c = { 459 .status = i2c_nuvoton_read_status, 460 .recv = i2c_nuvoton_recv, 461 .send = i2c_nuvoton_send, 462 .cancel = i2c_nuvoton_ready, 463 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 464 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 465 .req_canceled = i2c_nuvoton_req_canceled, 466 }; 467 468 /* The only purpose for the handler is to signal to any waiting threads that 469 * the interrupt is currently being asserted. The driver does not do any 470 * processing triggered by interrupts, and the chip provides no way to mask at 471 * the source (plus that would be slow over I2C). Run the IRQ as a one-shot, 472 * this means it cannot be shared. */ 473 static irqreturn_t i2c_nuvoton_int_handler(int dummy, void *dev_id) 474 { 475 struct tpm_chip *chip = dev_id; 476 struct priv_data *priv = chip->vendor.priv; 477 478 priv->intrs++; 479 wake_up(&chip->vendor.read_queue); 480 disable_irq_nosync(chip->vendor.irq); 481 return IRQ_HANDLED; 482 } 483 484 static int get_vid(struct i2c_client *client, u32 *res) 485 { 486 static const u8 vid_did_rid_value[] = { 0x50, 0x10, 0xfe }; 487 u32 temp; 488 s32 rc; 489 490 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 491 return -ENODEV; 492 rc = i2c_nuvoton_read_buf(client, TPM_VID_DID_RID, 4, (u8 *)&temp); 493 if (rc < 0) 494 return rc; 495 496 /* check WPCT301 values - ignore RID */ 497 if (memcmp(&temp, vid_did_rid_value, sizeof(vid_did_rid_value))) { 498 /* 499 * f/w rev 2.81 has an issue where the VID_DID_RID is not 500 * reporting the right value. so give it another chance at 501 * offset 0x20 (FIFO_W). 502 */ 503 rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_W, 4, 504 (u8 *) (&temp)); 505 if (rc < 0) 506 return rc; 507 508 /* check WPCT301 values - ignore RID */ 509 if (memcmp(&temp, vid_did_rid_value, 510 sizeof(vid_did_rid_value))) 511 return -ENODEV; 512 } 513 514 *res = temp; 515 return 0; 516 } 517 518 static int i2c_nuvoton_probe(struct i2c_client *client, 519 const struct i2c_device_id *id) 520 { 521 int rc; 522 struct tpm_chip *chip; 523 struct device *dev = &client->dev; 524 u32 vid = 0; 525 526 rc = get_vid(client, &vid); 527 if (rc) 528 return rc; 529 530 dev_info(dev, "VID: %04X DID: %02X RID: %02X\n", (u16) vid, 531 (u8) (vid >> 16), (u8) (vid >> 24)); 532 533 chip = tpmm_chip_alloc(dev, &tpm_i2c); 534 if (IS_ERR(chip)) 535 return PTR_ERR(chip); 536 537 chip->vendor.priv = devm_kzalloc(dev, sizeof(struct priv_data), 538 GFP_KERNEL); 539 if (!chip->vendor.priv) 540 return -ENOMEM; 541 542 init_waitqueue_head(&chip->vendor.read_queue); 543 init_waitqueue_head(&chip->vendor.int_queue); 544 545 /* Default timeouts */ 546 chip->vendor.timeout_a = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT); 547 chip->vendor.timeout_b = msecs_to_jiffies(TPM_I2C_LONG_TIMEOUT); 548 chip->vendor.timeout_c = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT); 549 chip->vendor.timeout_d = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT); 550 551 /* 552 * I2C intfcaps (interrupt capabilitieis) in the chip are hard coded to: 553 * TPM_INTF_INT_LEVEL_LOW | TPM_INTF_DATA_AVAIL_INT 554 * The IRQ should be set in the i2c_board_info (which is done 555 * automatically in of_i2c_register_devices, for device tree users */ 556 chip->vendor.irq = client->irq; 557 558 if (chip->vendor.irq) { 559 dev_dbg(dev, "%s() chip-vendor.irq\n", __func__); 560 rc = devm_request_irq(dev, chip->vendor.irq, 561 i2c_nuvoton_int_handler, 562 IRQF_TRIGGER_LOW, 563 chip->devname, 564 chip); 565 if (rc) { 566 dev_err(dev, "%s() Unable to request irq: %d for use\n", 567 __func__, chip->vendor.irq); 568 chip->vendor.irq = 0; 569 } else { 570 /* Clear any pending interrupt */ 571 i2c_nuvoton_ready(chip); 572 /* - wait for TPM_STS==0xA0 (stsValid, commandReady) */ 573 rc = i2c_nuvoton_wait_for_stat(chip, 574 TPM_STS_COMMAND_READY, 575 TPM_STS_COMMAND_READY, 576 chip->vendor.timeout_b, 577 NULL); 578 if (rc == 0) { 579 /* 580 * TIS is in ready state 581 * write dummy byte to enter reception state 582 * TPM_DATA_FIFO_W <- rc (0) 583 */ 584 rc = i2c_nuvoton_write_buf(client, 585 TPM_DATA_FIFO_W, 586 1, (u8 *) (&rc)); 587 if (rc < 0) 588 return rc; 589 /* TPM_STS <- 0x40 (commandReady) */ 590 i2c_nuvoton_ready(chip); 591 } else { 592 /* 593 * timeout_b reached - command was 594 * aborted. TIS should now be in idle state - 595 * only TPM_STS_VALID should be set 596 */ 597 if (i2c_nuvoton_read_status(chip) != 598 TPM_STS_VALID) 599 return -EIO; 600 } 601 } 602 } 603 604 if (tpm_get_timeouts(chip)) 605 return -ENODEV; 606 607 if (tpm_do_selftest(chip)) 608 return -ENODEV; 609 610 return tpm_chip_register(chip); 611 } 612 613 static int i2c_nuvoton_remove(struct i2c_client *client) 614 { 615 struct device *dev = &(client->dev); 616 struct tpm_chip *chip = dev_get_drvdata(dev); 617 tpm_chip_unregister(chip); 618 return 0; 619 } 620 621 static const struct i2c_device_id i2c_nuvoton_id[] = { 622 {I2C_DRIVER_NAME, 0}, 623 {} 624 }; 625 MODULE_DEVICE_TABLE(i2c, i2c_nuvoton_id); 626 627 #ifdef CONFIG_OF 628 static const struct of_device_id i2c_nuvoton_of_match[] = { 629 {.compatible = "nuvoton,npct501"}, 630 {.compatible = "winbond,wpct301"}, 631 {}, 632 }; 633 MODULE_DEVICE_TABLE(of, i2c_nuvoton_of_match); 634 #endif 635 636 static SIMPLE_DEV_PM_OPS(i2c_nuvoton_pm_ops, tpm_pm_suspend, tpm_pm_resume); 637 638 static struct i2c_driver i2c_nuvoton_driver = { 639 .id_table = i2c_nuvoton_id, 640 .probe = i2c_nuvoton_probe, 641 .remove = i2c_nuvoton_remove, 642 .driver = { 643 .name = I2C_DRIVER_NAME, 644 .owner = THIS_MODULE, 645 .pm = &i2c_nuvoton_pm_ops, 646 .of_match_table = of_match_ptr(i2c_nuvoton_of_match), 647 }, 648 }; 649 650 module_i2c_driver(i2c_nuvoton_driver); 651 652 MODULE_AUTHOR("Dan Morav (dan.morav@nuvoton.com)"); 653 MODULE_DESCRIPTION("Nuvoton TPM I2C Driver"); 654 MODULE_LICENSE("GPL"); 655