1 /****************************************************************************** 2 * Nuvoton TPM I2C Device Driver Interface for WPCT301/NPCT501/NPCT6XX, 3 * based on the TCG TPM Interface Spec version 1.2. 4 * Specifications at www.trustedcomputinggroup.org 5 * 6 * Copyright (C) 2011, Nuvoton Technology Corporation. 7 * Dan Morav <dan.morav@nuvoton.com> 8 * Copyright (C) 2013, Obsidian Research Corp. 9 * Jason Gunthorpe <jgunthorpe@obsidianresearch.com> 10 * 11 * This program is free software: you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation, either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program. If not, see http://www.gnu.org/licenses/>. 23 * 24 * Nuvoton contact information: APC.Support@nuvoton.com 25 *****************************************************************************/ 26 27 #include <linux/init.h> 28 #include <linux/module.h> 29 #include <linux/moduleparam.h> 30 #include <linux/slab.h> 31 #include <linux/interrupt.h> 32 #include <linux/wait.h> 33 #include <linux/i2c.h> 34 #include <linux/of_device.h> 35 #include "tpm.h" 36 37 /* I2C interface offsets */ 38 #define TPM_STS 0x00 39 #define TPM_BURST_COUNT 0x01 40 #define TPM_DATA_FIFO_W 0x20 41 #define TPM_DATA_FIFO_R 0x40 42 #define TPM_VID_DID_RID 0x60 43 /* TPM command header size */ 44 #define TPM_HEADER_SIZE 10 45 #define TPM_RETRY 5 46 /* 47 * I2C bus device maximum buffer size w/o counting I2C address or command 48 * i.e. max size required for I2C write is 34 = addr, command, 32 bytes data 49 */ 50 #define TPM_I2C_MAX_BUF_SIZE 32 51 #define TPM_I2C_RETRY_COUNT 32 52 #define TPM_I2C_BUS_DELAY 1000 /* usec */ 53 #define TPM_I2C_RETRY_DELAY_SHORT (2 * 1000) /* usec */ 54 #define TPM_I2C_RETRY_DELAY_LONG (10 * 1000) /* usec */ 55 #define TPM_I2C_DELAY_RANGE 300 /* usec */ 56 57 #define OF_IS_TPM2 ((void *)1) 58 #define I2C_IS_TPM2 1 59 60 struct priv_data { 61 int irq; 62 unsigned int intrs; 63 wait_queue_head_t read_queue; 64 }; 65 66 static s32 i2c_nuvoton_read_buf(struct i2c_client *client, u8 offset, u8 size, 67 u8 *data) 68 { 69 s32 status; 70 71 status = i2c_smbus_read_i2c_block_data(client, offset, size, data); 72 dev_dbg(&client->dev, 73 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__, 74 offset, size, (int)size, data, status); 75 return status; 76 } 77 78 static s32 i2c_nuvoton_write_buf(struct i2c_client *client, u8 offset, u8 size, 79 u8 *data) 80 { 81 s32 status; 82 83 status = i2c_smbus_write_i2c_block_data(client, offset, size, data); 84 dev_dbg(&client->dev, 85 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__, 86 offset, size, (int)size, data, status); 87 return status; 88 } 89 90 #define TPM_STS_VALID 0x80 91 #define TPM_STS_COMMAND_READY 0x40 92 #define TPM_STS_GO 0x20 93 #define TPM_STS_DATA_AVAIL 0x10 94 #define TPM_STS_EXPECT 0x08 95 #define TPM_STS_RESPONSE_RETRY 0x02 96 #define TPM_STS_ERR_VAL 0x07 /* bit2...bit0 reads always 0 */ 97 98 #define TPM_I2C_SHORT_TIMEOUT 750 /* ms */ 99 #define TPM_I2C_LONG_TIMEOUT 2000 /* 2 sec */ 100 101 /* read TPM_STS register */ 102 static u8 i2c_nuvoton_read_status(struct tpm_chip *chip) 103 { 104 struct i2c_client *client = to_i2c_client(chip->dev.parent); 105 s32 status; 106 u8 data; 107 108 status = i2c_nuvoton_read_buf(client, TPM_STS, 1, &data); 109 if (status <= 0) { 110 dev_err(&chip->dev, "%s() error return %d\n", __func__, 111 status); 112 data = TPM_STS_ERR_VAL; 113 } 114 115 return data; 116 } 117 118 /* write byte to TPM_STS register */ 119 static s32 i2c_nuvoton_write_status(struct i2c_client *client, u8 data) 120 { 121 s32 status; 122 int i; 123 124 /* this causes the current command to be aborted */ 125 for (i = 0, status = -1; i < TPM_I2C_RETRY_COUNT && status < 0; i++) { 126 status = i2c_nuvoton_write_buf(client, TPM_STS, 1, &data); 127 if (status < 0) 128 usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY 129 + TPM_I2C_DELAY_RANGE); 130 } 131 return status; 132 } 133 134 /* write commandReady to TPM_STS register */ 135 static void i2c_nuvoton_ready(struct tpm_chip *chip) 136 { 137 struct i2c_client *client = to_i2c_client(chip->dev.parent); 138 s32 status; 139 140 /* this causes the current command to be aborted */ 141 status = i2c_nuvoton_write_status(client, TPM_STS_COMMAND_READY); 142 if (status < 0) 143 dev_err(&chip->dev, 144 "%s() fail to write TPM_STS.commandReady\n", __func__); 145 } 146 147 /* read burstCount field from TPM_STS register 148 * return -1 on fail to read */ 149 static int i2c_nuvoton_get_burstcount(struct i2c_client *client, 150 struct tpm_chip *chip) 151 { 152 unsigned long stop = jiffies + chip->timeout_d; 153 s32 status; 154 int burst_count = -1; 155 u8 data; 156 157 /* wait for burstcount to be non-zero */ 158 do { 159 /* in I2C burstCount is 1 byte */ 160 status = i2c_nuvoton_read_buf(client, TPM_BURST_COUNT, 1, 161 &data); 162 if (status > 0 && data > 0) { 163 burst_count = min_t(u8, TPM_I2C_MAX_BUF_SIZE, data); 164 break; 165 } 166 usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY 167 + TPM_I2C_DELAY_RANGE); 168 } while (time_before(jiffies, stop)); 169 170 return burst_count; 171 } 172 173 /* 174 * WPCT301/NPCT501/NPCT6XX SINT# supports only dataAvail 175 * any call to this function which is not waiting for dataAvail will 176 * set queue to NULL to avoid waiting for interrupt 177 */ 178 static bool i2c_nuvoton_check_status(struct tpm_chip *chip, u8 mask, u8 value) 179 { 180 u8 status = i2c_nuvoton_read_status(chip); 181 return (status != TPM_STS_ERR_VAL) && ((status & mask) == value); 182 } 183 184 static int i2c_nuvoton_wait_for_stat(struct tpm_chip *chip, u8 mask, u8 value, 185 u32 timeout, wait_queue_head_t *queue) 186 { 187 if ((chip->flags & TPM_CHIP_FLAG_IRQ) && queue) { 188 s32 rc; 189 struct priv_data *priv = dev_get_drvdata(&chip->dev); 190 unsigned int cur_intrs = priv->intrs; 191 192 enable_irq(priv->irq); 193 rc = wait_event_interruptible_timeout(*queue, 194 cur_intrs != priv->intrs, 195 timeout); 196 if (rc > 0) 197 return 0; 198 /* At this point we know that the SINT pin is asserted, so we 199 * do not need to do i2c_nuvoton_check_status */ 200 } else { 201 unsigned long ten_msec, stop; 202 bool status_valid; 203 204 /* check current status */ 205 status_valid = i2c_nuvoton_check_status(chip, mask, value); 206 if (status_valid) 207 return 0; 208 209 /* use polling to wait for the event */ 210 ten_msec = jiffies + usecs_to_jiffies(TPM_I2C_RETRY_DELAY_LONG); 211 stop = jiffies + timeout; 212 do { 213 if (time_before(jiffies, ten_msec)) 214 usleep_range(TPM_I2C_RETRY_DELAY_SHORT, 215 TPM_I2C_RETRY_DELAY_SHORT 216 + TPM_I2C_DELAY_RANGE); 217 else 218 usleep_range(TPM_I2C_RETRY_DELAY_LONG, 219 TPM_I2C_RETRY_DELAY_LONG 220 + TPM_I2C_DELAY_RANGE); 221 status_valid = i2c_nuvoton_check_status(chip, mask, 222 value); 223 if (status_valid) 224 return 0; 225 } while (time_before(jiffies, stop)); 226 } 227 dev_err(&chip->dev, "%s(%02x, %02x) -> timeout\n", __func__, mask, 228 value); 229 return -ETIMEDOUT; 230 } 231 232 /* wait for dataAvail field to be set in the TPM_STS register */ 233 static int i2c_nuvoton_wait_for_data_avail(struct tpm_chip *chip, u32 timeout, 234 wait_queue_head_t *queue) 235 { 236 return i2c_nuvoton_wait_for_stat(chip, 237 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 238 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 239 timeout, queue); 240 } 241 242 /* Read @count bytes into @buf from TPM_RD_FIFO register */ 243 static int i2c_nuvoton_recv_data(struct i2c_client *client, 244 struct tpm_chip *chip, u8 *buf, size_t count) 245 { 246 struct priv_data *priv = dev_get_drvdata(&chip->dev); 247 s32 rc; 248 int burst_count, bytes2read, size = 0; 249 250 while (size < count && 251 i2c_nuvoton_wait_for_data_avail(chip, 252 chip->timeout_c, 253 &priv->read_queue) == 0) { 254 burst_count = i2c_nuvoton_get_burstcount(client, chip); 255 if (burst_count < 0) { 256 dev_err(&chip->dev, 257 "%s() fail to read burstCount=%d\n", __func__, 258 burst_count); 259 return -EIO; 260 } 261 bytes2read = min_t(size_t, burst_count, count - size); 262 rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_R, 263 bytes2read, &buf[size]); 264 if (rc < 0) { 265 dev_err(&chip->dev, 266 "%s() fail on i2c_nuvoton_read_buf()=%d\n", 267 __func__, rc); 268 return -EIO; 269 } 270 dev_dbg(&chip->dev, "%s(%d):", __func__, bytes2read); 271 size += bytes2read; 272 } 273 274 return size; 275 } 276 277 /* Read TPM command results */ 278 static int i2c_nuvoton_recv(struct tpm_chip *chip, u8 *buf, size_t count) 279 { 280 struct priv_data *priv = dev_get_drvdata(&chip->dev); 281 struct device *dev = chip->dev.parent; 282 struct i2c_client *client = to_i2c_client(dev); 283 s32 rc; 284 int status; 285 int burst_count; 286 int retries; 287 int size = 0; 288 u32 expected; 289 290 if (count < TPM_HEADER_SIZE) { 291 i2c_nuvoton_ready(chip); /* return to idle */ 292 dev_err(dev, "%s() count < header size\n", __func__); 293 return -EIO; 294 } 295 for (retries = 0; retries < TPM_RETRY; retries++) { 296 if (retries > 0) { 297 /* if this is not the first trial, set responseRetry */ 298 i2c_nuvoton_write_status(client, 299 TPM_STS_RESPONSE_RETRY); 300 } 301 /* 302 * read first available (> 10 bytes), including: 303 * tag, paramsize, and result 304 */ 305 status = i2c_nuvoton_wait_for_data_avail( 306 chip, chip->timeout_c, &priv->read_queue); 307 if (status != 0) { 308 dev_err(dev, "%s() timeout on dataAvail\n", __func__); 309 size = -ETIMEDOUT; 310 continue; 311 } 312 burst_count = i2c_nuvoton_get_burstcount(client, chip); 313 if (burst_count < 0) { 314 dev_err(dev, "%s() fail to get burstCount\n", __func__); 315 size = -EIO; 316 continue; 317 } 318 size = i2c_nuvoton_recv_data(client, chip, buf, 319 burst_count); 320 if (size < TPM_HEADER_SIZE) { 321 dev_err(dev, "%s() fail to read header\n", __func__); 322 size = -EIO; 323 continue; 324 } 325 /* 326 * convert number of expected bytes field from big endian 32 bit 327 * to machine native 328 */ 329 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 330 if (expected > count || expected < size) { 331 dev_err(dev, "%s() expected > count\n", __func__); 332 size = -EIO; 333 continue; 334 } 335 rc = i2c_nuvoton_recv_data(client, chip, &buf[size], 336 expected - size); 337 size += rc; 338 if (rc < 0 || size < expected) { 339 dev_err(dev, "%s() fail to read remainder of result\n", 340 __func__); 341 size = -EIO; 342 continue; 343 } 344 if (i2c_nuvoton_wait_for_stat( 345 chip, TPM_STS_VALID | TPM_STS_DATA_AVAIL, 346 TPM_STS_VALID, chip->timeout_c, 347 NULL)) { 348 dev_err(dev, "%s() error left over data\n", __func__); 349 size = -ETIMEDOUT; 350 continue; 351 } 352 break; 353 } 354 i2c_nuvoton_ready(chip); 355 dev_dbg(&chip->dev, "%s() -> %d\n", __func__, size); 356 return size; 357 } 358 359 /* 360 * Send TPM command. 361 * 362 * If interrupts are used (signaled by an irq set in the vendor structure) 363 * tpm.c can skip polling for the data to be available as the interrupt is 364 * waited for here 365 */ 366 static int i2c_nuvoton_send(struct tpm_chip *chip, u8 *buf, size_t len) 367 { 368 struct priv_data *priv = dev_get_drvdata(&chip->dev); 369 struct device *dev = chip->dev.parent; 370 struct i2c_client *client = to_i2c_client(dev); 371 u32 ordinal; 372 unsigned long duration; 373 size_t count = 0; 374 int burst_count, bytes2write, retries, rc = -EIO; 375 376 for (retries = 0; retries < TPM_RETRY; retries++) { 377 i2c_nuvoton_ready(chip); 378 if (i2c_nuvoton_wait_for_stat(chip, TPM_STS_COMMAND_READY, 379 TPM_STS_COMMAND_READY, 380 chip->timeout_b, NULL)) { 381 dev_err(dev, "%s() timeout on commandReady\n", 382 __func__); 383 rc = -EIO; 384 continue; 385 } 386 rc = 0; 387 while (count < len - 1) { 388 burst_count = i2c_nuvoton_get_burstcount(client, 389 chip); 390 if (burst_count < 0) { 391 dev_err(dev, "%s() fail get burstCount\n", 392 __func__); 393 rc = -EIO; 394 break; 395 } 396 bytes2write = min_t(size_t, burst_count, 397 len - 1 - count); 398 rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 399 bytes2write, &buf[count]); 400 if (rc < 0) { 401 dev_err(dev, "%s() fail i2cWriteBuf\n", 402 __func__); 403 break; 404 } 405 dev_dbg(dev, "%s(%d):", __func__, bytes2write); 406 count += bytes2write; 407 rc = i2c_nuvoton_wait_for_stat(chip, 408 TPM_STS_VALID | 409 TPM_STS_EXPECT, 410 TPM_STS_VALID | 411 TPM_STS_EXPECT, 412 chip->timeout_c, 413 NULL); 414 if (rc < 0) { 415 dev_err(dev, "%s() timeout on Expect\n", 416 __func__); 417 rc = -ETIMEDOUT; 418 break; 419 } 420 } 421 if (rc < 0) 422 continue; 423 424 /* write last byte */ 425 rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 1, 426 &buf[count]); 427 if (rc < 0) { 428 dev_err(dev, "%s() fail to write last byte\n", 429 __func__); 430 rc = -EIO; 431 continue; 432 } 433 dev_dbg(dev, "%s(last): %02x", __func__, buf[count]); 434 rc = i2c_nuvoton_wait_for_stat(chip, 435 TPM_STS_VALID | TPM_STS_EXPECT, 436 TPM_STS_VALID, 437 chip->timeout_c, NULL); 438 if (rc) { 439 dev_err(dev, "%s() timeout on Expect to clear\n", 440 __func__); 441 rc = -ETIMEDOUT; 442 continue; 443 } 444 break; 445 } 446 if (rc < 0) { 447 /* retries == TPM_RETRY */ 448 i2c_nuvoton_ready(chip); 449 return rc; 450 } 451 /* execute the TPM command */ 452 rc = i2c_nuvoton_write_status(client, TPM_STS_GO); 453 if (rc < 0) { 454 dev_err(dev, "%s() fail to write Go\n", __func__); 455 i2c_nuvoton_ready(chip); 456 return rc; 457 } 458 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 459 duration = tpm_calc_ordinal_duration(chip, ordinal); 460 461 rc = i2c_nuvoton_wait_for_data_avail(chip, duration, &priv->read_queue); 462 if (rc) { 463 dev_err(dev, "%s() timeout command duration %ld\n", 464 __func__, duration); 465 i2c_nuvoton_ready(chip); 466 return rc; 467 } 468 469 dev_dbg(dev, "%s() -> %zd\n", __func__, len); 470 return len; 471 } 472 473 static bool i2c_nuvoton_req_canceled(struct tpm_chip *chip, u8 status) 474 { 475 return (status == TPM_STS_COMMAND_READY); 476 } 477 478 static const struct tpm_class_ops tpm_i2c = { 479 .flags = TPM_OPS_AUTO_STARTUP, 480 .status = i2c_nuvoton_read_status, 481 .recv = i2c_nuvoton_recv, 482 .send = i2c_nuvoton_send, 483 .cancel = i2c_nuvoton_ready, 484 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 485 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 486 .req_canceled = i2c_nuvoton_req_canceled, 487 }; 488 489 /* The only purpose for the handler is to signal to any waiting threads that 490 * the interrupt is currently being asserted. The driver does not do any 491 * processing triggered by interrupts, and the chip provides no way to mask at 492 * the source (plus that would be slow over I2C). Run the IRQ as a one-shot, 493 * this means it cannot be shared. */ 494 static irqreturn_t i2c_nuvoton_int_handler(int dummy, void *dev_id) 495 { 496 struct tpm_chip *chip = dev_id; 497 struct priv_data *priv = dev_get_drvdata(&chip->dev); 498 499 priv->intrs++; 500 wake_up(&priv->read_queue); 501 disable_irq_nosync(priv->irq); 502 return IRQ_HANDLED; 503 } 504 505 static int get_vid(struct i2c_client *client, u32 *res) 506 { 507 static const u8 vid_did_rid_value[] = { 0x50, 0x10, 0xfe }; 508 u32 temp; 509 s32 rc; 510 511 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 512 return -ENODEV; 513 rc = i2c_nuvoton_read_buf(client, TPM_VID_DID_RID, 4, (u8 *)&temp); 514 if (rc < 0) 515 return rc; 516 517 /* check WPCT301 values - ignore RID */ 518 if (memcmp(&temp, vid_did_rid_value, sizeof(vid_did_rid_value))) { 519 /* 520 * f/w rev 2.81 has an issue where the VID_DID_RID is not 521 * reporting the right value. so give it another chance at 522 * offset 0x20 (FIFO_W). 523 */ 524 rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_W, 4, 525 (u8 *) (&temp)); 526 if (rc < 0) 527 return rc; 528 529 /* check WPCT301 values - ignore RID */ 530 if (memcmp(&temp, vid_did_rid_value, 531 sizeof(vid_did_rid_value))) 532 return -ENODEV; 533 } 534 535 *res = temp; 536 return 0; 537 } 538 539 static int i2c_nuvoton_probe(struct i2c_client *client, 540 const struct i2c_device_id *id) 541 { 542 int rc; 543 struct tpm_chip *chip; 544 struct device *dev = &client->dev; 545 struct priv_data *priv; 546 u32 vid = 0; 547 548 rc = get_vid(client, &vid); 549 if (rc) 550 return rc; 551 552 dev_info(dev, "VID: %04X DID: %02X RID: %02X\n", (u16) vid, 553 (u8) (vid >> 16), (u8) (vid >> 24)); 554 555 chip = tpmm_chip_alloc(dev, &tpm_i2c); 556 if (IS_ERR(chip)) 557 return PTR_ERR(chip); 558 559 priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL); 560 if (!priv) 561 return -ENOMEM; 562 563 if (dev->of_node) { 564 const struct of_device_id *of_id; 565 566 of_id = of_match_device(dev->driver->of_match_table, dev); 567 if (of_id && of_id->data == OF_IS_TPM2) 568 chip->flags |= TPM_CHIP_FLAG_TPM2; 569 } else 570 if (id->driver_data == I2C_IS_TPM2) 571 chip->flags |= TPM_CHIP_FLAG_TPM2; 572 573 init_waitqueue_head(&priv->read_queue); 574 575 /* Default timeouts */ 576 chip->timeout_a = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT); 577 chip->timeout_b = msecs_to_jiffies(TPM_I2C_LONG_TIMEOUT); 578 chip->timeout_c = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT); 579 chip->timeout_d = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT); 580 581 dev_set_drvdata(&chip->dev, priv); 582 583 /* 584 * I2C intfcaps (interrupt capabilitieis) in the chip are hard coded to: 585 * TPM_INTF_INT_LEVEL_LOW | TPM_INTF_DATA_AVAIL_INT 586 * The IRQ should be set in the i2c_board_info (which is done 587 * automatically in of_i2c_register_devices, for device tree users */ 588 priv->irq = client->irq; 589 if (client->irq) { 590 dev_dbg(dev, "%s() priv->irq\n", __func__); 591 rc = devm_request_irq(dev, client->irq, 592 i2c_nuvoton_int_handler, 593 IRQF_TRIGGER_LOW, 594 dev_name(&chip->dev), 595 chip); 596 if (rc) { 597 dev_err(dev, "%s() Unable to request irq: %d for use\n", 598 __func__, priv->irq); 599 priv->irq = 0; 600 } else { 601 chip->flags |= TPM_CHIP_FLAG_IRQ; 602 /* Clear any pending interrupt */ 603 i2c_nuvoton_ready(chip); 604 /* - wait for TPM_STS==0xA0 (stsValid, commandReady) */ 605 rc = i2c_nuvoton_wait_for_stat(chip, 606 TPM_STS_COMMAND_READY, 607 TPM_STS_COMMAND_READY, 608 chip->timeout_b, 609 NULL); 610 if (rc == 0) { 611 /* 612 * TIS is in ready state 613 * write dummy byte to enter reception state 614 * TPM_DATA_FIFO_W <- rc (0) 615 */ 616 rc = i2c_nuvoton_write_buf(client, 617 TPM_DATA_FIFO_W, 618 1, (u8 *) (&rc)); 619 if (rc < 0) 620 return rc; 621 /* TPM_STS <- 0x40 (commandReady) */ 622 i2c_nuvoton_ready(chip); 623 } else { 624 /* 625 * timeout_b reached - command was 626 * aborted. TIS should now be in idle state - 627 * only TPM_STS_VALID should be set 628 */ 629 if (i2c_nuvoton_read_status(chip) != 630 TPM_STS_VALID) 631 return -EIO; 632 } 633 } 634 } 635 636 return tpm_chip_register(chip); 637 } 638 639 static int i2c_nuvoton_remove(struct i2c_client *client) 640 { 641 struct tpm_chip *chip = i2c_get_clientdata(client); 642 643 tpm_chip_unregister(chip); 644 return 0; 645 } 646 647 static const struct i2c_device_id i2c_nuvoton_id[] = { 648 {"tpm_i2c_nuvoton"}, 649 {"tpm2_i2c_nuvoton", .driver_data = I2C_IS_TPM2}, 650 {} 651 }; 652 MODULE_DEVICE_TABLE(i2c, i2c_nuvoton_id); 653 654 #ifdef CONFIG_OF 655 static const struct of_device_id i2c_nuvoton_of_match[] = { 656 {.compatible = "nuvoton,npct501"}, 657 {.compatible = "winbond,wpct301"}, 658 {.compatible = "nuvoton,npct601", .data = OF_IS_TPM2}, 659 {}, 660 }; 661 MODULE_DEVICE_TABLE(of, i2c_nuvoton_of_match); 662 #endif 663 664 static SIMPLE_DEV_PM_OPS(i2c_nuvoton_pm_ops, tpm_pm_suspend, tpm_pm_resume); 665 666 static struct i2c_driver i2c_nuvoton_driver = { 667 .id_table = i2c_nuvoton_id, 668 .probe = i2c_nuvoton_probe, 669 .remove = i2c_nuvoton_remove, 670 .driver = { 671 .name = "tpm_i2c_nuvoton", 672 .pm = &i2c_nuvoton_pm_ops, 673 .of_match_table = of_match_ptr(i2c_nuvoton_of_match), 674 }, 675 }; 676 677 module_i2c_driver(i2c_nuvoton_driver); 678 679 MODULE_AUTHOR("Dan Morav (dan.morav@nuvoton.com)"); 680 MODULE_DESCRIPTION("Nuvoton TPM I2C Driver"); 681 MODULE_LICENSE("GPL"); 682