1 /* 2 * Copyright (C) 2014 Intel Corporation 3 * 4 * Authors: 5 * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> 6 * 7 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 8 * 9 * This device driver implements the TPM interface as defined in 10 * the TCG CRB 2.0 TPM specification. 11 * 12 * This program is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License 14 * as published by the Free Software Foundation; version 2 15 * of the License. 16 */ 17 18 #include <linux/acpi.h> 19 #include <linux/highmem.h> 20 #include <linux/rculist.h> 21 #include <linux/module.h> 22 #include <linux/platform_device.h> 23 #include "tpm.h" 24 25 #define ACPI_SIG_TPM2 "TPM2" 26 27 static const u8 CRB_ACPI_START_UUID[] = { 28 /* 0000 */ 0xAB, 0x6C, 0xBF, 0x6B, 0x63, 0x54, 0x14, 0x47, 29 /* 0008 */ 0xB7, 0xCD, 0xF0, 0x20, 0x3C, 0x03, 0x68, 0xD4 30 }; 31 32 enum crb_defaults { 33 CRB_ACPI_START_REVISION_ID = 1, 34 CRB_ACPI_START_INDEX = 1, 35 }; 36 37 struct acpi_tpm2 { 38 struct acpi_table_header hdr; 39 u16 platform_class; 40 u16 reserved; 41 u64 control_area_pa; 42 u32 start_method; 43 } __packed; 44 45 enum crb_ca_request { 46 CRB_CA_REQ_GO_IDLE = BIT(0), 47 CRB_CA_REQ_CMD_READY = BIT(1), 48 }; 49 50 enum crb_ca_status { 51 CRB_CA_STS_ERROR = BIT(0), 52 CRB_CA_STS_TPM_IDLE = BIT(1), 53 }; 54 55 enum crb_start { 56 CRB_START_INVOKE = BIT(0), 57 }; 58 59 enum crb_cancel { 60 CRB_CANCEL_INVOKE = BIT(0), 61 }; 62 63 struct crb_control_area { 64 u32 req; 65 u32 sts; 66 u32 cancel; 67 u32 start; 68 u32 int_enable; 69 u32 int_sts; 70 u32 cmd_size; 71 u32 cmd_pa_low; 72 u32 cmd_pa_high; 73 u32 rsp_size; 74 u64 rsp_pa; 75 } __packed; 76 77 enum crb_status { 78 CRB_STS_COMPLETE = BIT(0), 79 }; 80 81 enum crb_flags { 82 CRB_FL_ACPI_START = BIT(0), 83 CRB_FL_CRB_START = BIT(1), 84 }; 85 86 struct crb_priv { 87 unsigned int flags; 88 struct crb_control_area __iomem *cca; 89 u8 __iomem *cmd; 90 u8 __iomem *rsp; 91 }; 92 93 static SIMPLE_DEV_PM_OPS(crb_pm, tpm_pm_suspend, tpm_pm_resume); 94 95 static u8 crb_status(struct tpm_chip *chip) 96 { 97 struct crb_priv *priv = chip->vendor.priv; 98 u8 sts = 0; 99 100 if ((le32_to_cpu(ioread32(&priv->cca->start)) & CRB_START_INVOKE) != 101 CRB_START_INVOKE) 102 sts |= CRB_STS_COMPLETE; 103 104 return sts; 105 } 106 107 static int crb_recv(struct tpm_chip *chip, u8 *buf, size_t count) 108 { 109 struct crb_priv *priv = chip->vendor.priv; 110 unsigned int expected; 111 112 /* sanity check */ 113 if (count < 6) 114 return -EIO; 115 116 if (le32_to_cpu(ioread32(&priv->cca->sts)) & CRB_CA_STS_ERROR) 117 return -EIO; 118 119 memcpy_fromio(buf, priv->rsp, 6); 120 expected = be32_to_cpup((__be32 *) &buf[2]); 121 122 if (expected > count) 123 return -EIO; 124 125 memcpy_fromio(&buf[6], &priv->rsp[6], expected - 6); 126 127 return expected; 128 } 129 130 static int crb_do_acpi_start(struct tpm_chip *chip) 131 { 132 union acpi_object *obj; 133 int rc; 134 135 obj = acpi_evaluate_dsm(chip->acpi_dev_handle, 136 CRB_ACPI_START_UUID, 137 CRB_ACPI_START_REVISION_ID, 138 CRB_ACPI_START_INDEX, 139 NULL); 140 if (!obj) 141 return -ENXIO; 142 rc = obj->integer.value == 0 ? 0 : -ENXIO; 143 ACPI_FREE(obj); 144 return rc; 145 } 146 147 static int crb_send(struct tpm_chip *chip, u8 *buf, size_t len) 148 { 149 struct crb_priv *priv = chip->vendor.priv; 150 int rc = 0; 151 152 if (len > le32_to_cpu(ioread32(&priv->cca->cmd_size))) { 153 dev_err(&chip->dev, 154 "invalid command count value %x %zx\n", 155 (unsigned int) len, 156 (size_t) le32_to_cpu(ioread32(&priv->cca->cmd_size))); 157 return -E2BIG; 158 } 159 160 memcpy_toio(priv->cmd, buf, len); 161 162 /* Make sure that cmd is populated before issuing start. */ 163 wmb(); 164 165 if (priv->flags & CRB_FL_CRB_START) 166 iowrite32(cpu_to_le32(CRB_START_INVOKE), &priv->cca->start); 167 168 if (priv->flags & CRB_FL_ACPI_START) 169 rc = crb_do_acpi_start(chip); 170 171 return rc; 172 } 173 174 static void crb_cancel(struct tpm_chip *chip) 175 { 176 struct crb_priv *priv = chip->vendor.priv; 177 178 iowrite32(cpu_to_le32(CRB_CANCEL_INVOKE), &priv->cca->cancel); 179 180 /* Make sure that cmd is populated before issuing cancel. */ 181 wmb(); 182 183 if ((priv->flags & CRB_FL_ACPI_START) && crb_do_acpi_start(chip)) 184 dev_err(&chip->dev, "ACPI Start failed\n"); 185 186 iowrite32(0, &priv->cca->cancel); 187 } 188 189 static bool crb_req_canceled(struct tpm_chip *chip, u8 status) 190 { 191 struct crb_priv *priv = chip->vendor.priv; 192 u32 cancel = le32_to_cpu(ioread32(&priv->cca->cancel)); 193 194 return (cancel & CRB_CANCEL_INVOKE) == CRB_CANCEL_INVOKE; 195 } 196 197 static const struct tpm_class_ops tpm_crb = { 198 .status = crb_status, 199 .recv = crb_recv, 200 .send = crb_send, 201 .cancel = crb_cancel, 202 .req_canceled = crb_req_canceled, 203 .req_complete_mask = CRB_STS_COMPLETE, 204 .req_complete_val = CRB_STS_COMPLETE, 205 }; 206 207 static int crb_acpi_add(struct acpi_device *device) 208 { 209 struct tpm_chip *chip; 210 struct acpi_tpm2 *buf; 211 struct crb_priv *priv; 212 struct device *dev = &device->dev; 213 acpi_status status; 214 u32 sm; 215 u64 pa; 216 int rc; 217 218 status = acpi_get_table(ACPI_SIG_TPM2, 1, 219 (struct acpi_table_header **) &buf); 220 if (ACPI_FAILURE(status)) { 221 dev_err(dev, "failed to get TPM2 ACPI table\n"); 222 return -ENODEV; 223 } 224 225 /* Should the FIFO driver handle this? */ 226 if (buf->start_method == TPM2_START_FIFO) 227 return -ENODEV; 228 229 chip = tpmm_chip_alloc(dev, &tpm_crb); 230 if (IS_ERR(chip)) 231 return PTR_ERR(chip); 232 233 chip->flags = TPM_CHIP_FLAG_TPM2; 234 235 if (buf->hdr.length < sizeof(struct acpi_tpm2)) { 236 dev_err(dev, "TPM2 ACPI table has wrong size"); 237 return -EINVAL; 238 } 239 240 priv = (struct crb_priv *) devm_kzalloc(dev, sizeof(struct crb_priv), 241 GFP_KERNEL); 242 if (!priv) { 243 dev_err(dev, "failed to devm_kzalloc for private data\n"); 244 return -ENOMEM; 245 } 246 247 sm = le32_to_cpu(buf->start_method); 248 249 /* The reason for the extra quirk is that the PTT in 4th Gen Core CPUs 250 * report only ACPI start but in practice seems to require both 251 * ACPI start and CRB start. 252 */ 253 if (sm == TPM2_START_CRB || sm == TPM2_START_FIFO || 254 !strcmp(acpi_device_hid(device), "MSFT0101")) 255 priv->flags |= CRB_FL_CRB_START; 256 257 if (sm == TPM2_START_ACPI || sm == TPM2_START_CRB_WITH_ACPI) 258 priv->flags |= CRB_FL_ACPI_START; 259 260 priv->cca = (struct crb_control_area __iomem *) 261 devm_ioremap_nocache(dev, buf->control_area_pa, 0x1000); 262 if (!priv->cca) { 263 dev_err(dev, "ioremap of the control area failed\n"); 264 return -ENOMEM; 265 } 266 267 pa = ((u64) le32_to_cpu(ioread32(&priv->cca->cmd_pa_high)) << 32) | 268 (u64) le32_to_cpu(ioread32(&priv->cca->cmd_pa_low)); 269 priv->cmd = devm_ioremap_nocache(dev, pa, 270 ioread32(&priv->cca->cmd_size)); 271 if (!priv->cmd) { 272 dev_err(dev, "ioremap of the command buffer failed\n"); 273 return -ENOMEM; 274 } 275 276 memcpy_fromio(&pa, &priv->cca->rsp_pa, 8); 277 pa = le64_to_cpu(pa); 278 priv->rsp = devm_ioremap_nocache(dev, pa, 279 ioread32(&priv->cca->rsp_size)); 280 if (!priv->rsp) { 281 dev_err(dev, "ioremap of the response buffer failed\n"); 282 return -ENOMEM; 283 } 284 285 chip->vendor.priv = priv; 286 287 /* Default timeouts and durations */ 288 chip->vendor.timeout_a = msecs_to_jiffies(TPM2_TIMEOUT_A); 289 chip->vendor.timeout_b = msecs_to_jiffies(TPM2_TIMEOUT_B); 290 chip->vendor.timeout_c = msecs_to_jiffies(TPM2_TIMEOUT_C); 291 chip->vendor.timeout_d = msecs_to_jiffies(TPM2_TIMEOUT_D); 292 chip->vendor.duration[TPM_SHORT] = 293 msecs_to_jiffies(TPM2_DURATION_SHORT); 294 chip->vendor.duration[TPM_MEDIUM] = 295 msecs_to_jiffies(TPM2_DURATION_MEDIUM); 296 chip->vendor.duration[TPM_LONG] = 297 msecs_to_jiffies(TPM2_DURATION_LONG); 298 299 chip->acpi_dev_handle = device->handle; 300 301 rc = tpm2_do_selftest(chip); 302 if (rc) 303 return rc; 304 305 return tpm_chip_register(chip); 306 } 307 308 static int crb_acpi_remove(struct acpi_device *device) 309 { 310 struct device *dev = &device->dev; 311 struct tpm_chip *chip = dev_get_drvdata(dev); 312 313 tpm_chip_unregister(chip); 314 315 if (chip->flags & TPM_CHIP_FLAG_TPM2) 316 tpm2_shutdown(chip, TPM2_SU_CLEAR); 317 318 return 0; 319 } 320 321 static struct acpi_device_id crb_device_ids[] = { 322 {"MSFT0101", 0}, 323 {"", 0}, 324 }; 325 MODULE_DEVICE_TABLE(acpi, crb_device_ids); 326 327 static struct acpi_driver crb_acpi_driver = { 328 .name = "tpm_crb", 329 .ids = crb_device_ids, 330 .ops = { 331 .add = crb_acpi_add, 332 .remove = crb_acpi_remove, 333 }, 334 .drv = { 335 .pm = &crb_pm, 336 }, 337 }; 338 339 module_acpi_driver(crb_acpi_driver); 340 MODULE_AUTHOR("Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>"); 341 MODULE_DESCRIPTION("TPM2 Driver"); 342 MODULE_VERSION("0.1"); 343 MODULE_LICENSE("GPL"); 344