1 /* 2 * Copyright (C) 2014 Intel Corporation 3 * 4 * Authors: 5 * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> 6 * 7 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 8 * 9 * This device driver implements the TPM interface as defined in 10 * the TCG CRB 2.0 TPM specification. 11 * 12 * This program is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License 14 * as published by the Free Software Foundation; version 2 15 * of the License. 16 */ 17 18 #include <linux/acpi.h> 19 #include <linux/highmem.h> 20 #include <linux/rculist.h> 21 #include <linux/module.h> 22 #include <linux/pm_runtime.h> 23 #ifdef CONFIG_ARM64 24 #include <linux/arm-smccc.h> 25 #endif 26 #include "tpm.h" 27 28 #define ACPI_SIG_TPM2 "TPM2" 29 30 static const guid_t crb_acpi_start_guid = 31 GUID_INIT(0x6BBF6CAB, 0x5463, 0x4714, 32 0xB7, 0xCD, 0xF0, 0x20, 0x3C, 0x03, 0x68, 0xD4); 33 34 enum crb_defaults { 35 CRB_ACPI_START_REVISION_ID = 1, 36 CRB_ACPI_START_INDEX = 1, 37 }; 38 39 enum crb_loc_ctrl { 40 CRB_LOC_CTRL_REQUEST_ACCESS = BIT(0), 41 CRB_LOC_CTRL_RELINQUISH = BIT(1), 42 }; 43 44 enum crb_loc_state { 45 CRB_LOC_STATE_LOC_ASSIGNED = BIT(1), 46 CRB_LOC_STATE_TPM_REG_VALID_STS = BIT(7), 47 }; 48 49 enum crb_ctrl_req { 50 CRB_CTRL_REQ_CMD_READY = BIT(0), 51 CRB_CTRL_REQ_GO_IDLE = BIT(1), 52 }; 53 54 enum crb_ctrl_sts { 55 CRB_CTRL_STS_ERROR = BIT(0), 56 CRB_CTRL_STS_TPM_IDLE = BIT(1), 57 }; 58 59 enum crb_start { 60 CRB_START_INVOKE = BIT(0), 61 }; 62 63 enum crb_cancel { 64 CRB_CANCEL_INVOKE = BIT(0), 65 }; 66 67 struct crb_regs_head { 68 u32 loc_state; 69 u32 reserved1; 70 u32 loc_ctrl; 71 u32 loc_sts; 72 u8 reserved2[32]; 73 u64 intf_id; 74 u64 ctrl_ext; 75 } __packed; 76 77 struct crb_regs_tail { 78 u32 ctrl_req; 79 u32 ctrl_sts; 80 u32 ctrl_cancel; 81 u32 ctrl_start; 82 u32 ctrl_int_enable; 83 u32 ctrl_int_sts; 84 u32 ctrl_cmd_size; 85 u32 ctrl_cmd_pa_low; 86 u32 ctrl_cmd_pa_high; 87 u32 ctrl_rsp_size; 88 u64 ctrl_rsp_pa; 89 } __packed; 90 91 enum crb_status { 92 CRB_DRV_STS_COMPLETE = BIT(0), 93 }; 94 95 struct crb_priv { 96 u32 sm; 97 const char *hid; 98 void __iomem *iobase; 99 struct crb_regs_head __iomem *regs_h; 100 struct crb_regs_tail __iomem *regs_t; 101 u8 __iomem *cmd; 102 u8 __iomem *rsp; 103 u32 cmd_size; 104 u32 smc_func_id; 105 }; 106 107 struct tpm2_crb_smc { 108 u32 interrupt; 109 u8 interrupt_flags; 110 u8 op_flags; 111 u16 reserved2; 112 u32 smc_func_id; 113 }; 114 115 /** 116 * crb_go_idle - request tpm crb device to go the idle state 117 * 118 * @dev: crb device 119 * @priv: crb private data 120 * 121 * Write CRB_CTRL_REQ_GO_IDLE to TPM_CRB_CTRL_REQ 122 * The device should respond within TIMEOUT_C by clearing the bit. 123 * Anyhow, we do not wait here as a consequent CMD_READY request 124 * will be handled correctly even if idle was not completed. 125 * 126 * The function does nothing for devices with ACPI-start method 127 * or SMC-start method. 128 * 129 * Return: 0 always 130 */ 131 static int __maybe_unused crb_go_idle(struct device *dev, struct crb_priv *priv) 132 { 133 if ((priv->sm == ACPI_TPM2_START_METHOD) || 134 (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD) || 135 (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC)) 136 return 0; 137 138 iowrite32(CRB_CTRL_REQ_GO_IDLE, &priv->regs_t->ctrl_req); 139 /* we don't really care when this settles */ 140 141 return 0; 142 } 143 144 static bool crb_wait_for_reg_32(u32 __iomem *reg, u32 mask, u32 value, 145 unsigned long timeout) 146 { 147 ktime_t start; 148 ktime_t stop; 149 150 start = ktime_get(); 151 stop = ktime_add(start, ms_to_ktime(timeout)); 152 153 do { 154 if ((ioread32(reg) & mask) == value) 155 return true; 156 157 usleep_range(50, 100); 158 } while (ktime_before(ktime_get(), stop)); 159 160 return false; 161 } 162 163 /** 164 * crb_cmd_ready - request tpm crb device to enter ready state 165 * 166 * @dev: crb device 167 * @priv: crb private data 168 * 169 * Write CRB_CTRL_REQ_CMD_READY to TPM_CRB_CTRL_REQ 170 * and poll till the device acknowledge it by clearing the bit. 171 * The device should respond within TIMEOUT_C. 172 * 173 * The function does nothing for devices with ACPI-start method 174 * or SMC-start method. 175 * 176 * Return: 0 on success -ETIME on timeout; 177 */ 178 static int __maybe_unused crb_cmd_ready(struct device *dev, 179 struct crb_priv *priv) 180 { 181 if ((priv->sm == ACPI_TPM2_START_METHOD) || 182 (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD) || 183 (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC)) 184 return 0; 185 186 iowrite32(CRB_CTRL_REQ_CMD_READY, &priv->regs_t->ctrl_req); 187 if (!crb_wait_for_reg_32(&priv->regs_t->ctrl_req, 188 CRB_CTRL_REQ_CMD_READY /* mask */, 189 0, /* value */ 190 TPM2_TIMEOUT_C)) { 191 dev_warn(dev, "cmdReady timed out\n"); 192 return -ETIME; 193 } 194 195 return 0; 196 } 197 198 static int crb_request_locality(struct tpm_chip *chip, int loc) 199 { 200 struct crb_priv *priv = dev_get_drvdata(&chip->dev); 201 u32 value = CRB_LOC_STATE_LOC_ASSIGNED | 202 CRB_LOC_STATE_TPM_REG_VALID_STS; 203 204 if (!priv->regs_h) 205 return 0; 206 207 iowrite32(CRB_LOC_CTRL_REQUEST_ACCESS, &priv->regs_h->loc_ctrl); 208 if (!crb_wait_for_reg_32(&priv->regs_h->loc_state, value, value, 209 TPM2_TIMEOUT_C)) { 210 dev_warn(&chip->dev, "TPM_LOC_STATE_x.requestAccess timed out\n"); 211 return -ETIME; 212 } 213 214 return 0; 215 } 216 217 static void crb_relinquish_locality(struct tpm_chip *chip, int loc) 218 { 219 struct crb_priv *priv = dev_get_drvdata(&chip->dev); 220 221 if (!priv->regs_h) 222 return; 223 224 iowrite32(CRB_LOC_CTRL_RELINQUISH, &priv->regs_h->loc_ctrl); 225 } 226 227 static u8 crb_status(struct tpm_chip *chip) 228 { 229 struct crb_priv *priv = dev_get_drvdata(&chip->dev); 230 u8 sts = 0; 231 232 if ((ioread32(&priv->regs_t->ctrl_start) & CRB_START_INVOKE) != 233 CRB_START_INVOKE) 234 sts |= CRB_DRV_STS_COMPLETE; 235 236 return sts; 237 } 238 239 static int crb_recv(struct tpm_chip *chip, u8 *buf, size_t count) 240 { 241 struct crb_priv *priv = dev_get_drvdata(&chip->dev); 242 unsigned int expected; 243 244 /* sanity check */ 245 if (count < 6) 246 return -EIO; 247 248 if (ioread32(&priv->regs_t->ctrl_sts) & CRB_CTRL_STS_ERROR) 249 return -EIO; 250 251 memcpy_fromio(buf, priv->rsp, 6); 252 expected = be32_to_cpup((__be32 *) &buf[2]); 253 if (expected > count || expected < 6) 254 return -EIO; 255 256 memcpy_fromio(&buf[6], &priv->rsp[6], expected - 6); 257 258 return expected; 259 } 260 261 static int crb_do_acpi_start(struct tpm_chip *chip) 262 { 263 union acpi_object *obj; 264 int rc; 265 266 obj = acpi_evaluate_dsm(chip->acpi_dev_handle, 267 &crb_acpi_start_guid, 268 CRB_ACPI_START_REVISION_ID, 269 CRB_ACPI_START_INDEX, 270 NULL); 271 if (!obj) 272 return -ENXIO; 273 rc = obj->integer.value == 0 ? 0 : -ENXIO; 274 ACPI_FREE(obj); 275 return rc; 276 } 277 278 #ifdef CONFIG_ARM64 279 /* 280 * This is a TPM Command Response Buffer start method that invokes a 281 * Secure Monitor Call to requrest the firmware to execute or cancel 282 * a TPM 2.0 command. 283 */ 284 static int tpm_crb_smc_start(struct device *dev, unsigned long func_id) 285 { 286 struct arm_smccc_res res; 287 288 arm_smccc_smc(func_id, 0, 0, 0, 0, 0, 0, 0, &res); 289 if (res.a0 != 0) { 290 dev_err(dev, 291 FW_BUG "tpm_crb_smc_start() returns res.a0 = 0x%lx\n", 292 res.a0); 293 return -EIO; 294 } 295 296 return 0; 297 } 298 #else 299 static int tpm_crb_smc_start(struct device *dev, unsigned long func_id) 300 { 301 dev_err(dev, FW_BUG "tpm_crb: incorrect start method\n"); 302 return -EINVAL; 303 } 304 #endif 305 306 static int crb_send(struct tpm_chip *chip, u8 *buf, size_t len) 307 { 308 struct crb_priv *priv = dev_get_drvdata(&chip->dev); 309 int rc = 0; 310 311 /* Zero the cancel register so that the next command will not get 312 * canceled. 313 */ 314 iowrite32(0, &priv->regs_t->ctrl_cancel); 315 316 if (len > priv->cmd_size) { 317 dev_err(&chip->dev, "invalid command count value %zd %d\n", 318 len, priv->cmd_size); 319 return -E2BIG; 320 } 321 322 memcpy_toio(priv->cmd, buf, len); 323 324 /* Make sure that cmd is populated before issuing start. */ 325 wmb(); 326 327 /* The reason for the extra quirk is that the PTT in 4th Gen Core CPUs 328 * report only ACPI start but in practice seems to require both 329 * CRB start, hence invoking CRB start method if hid == MSFT0101. 330 */ 331 if ((priv->sm == ACPI_TPM2_COMMAND_BUFFER) || 332 (priv->sm == ACPI_TPM2_MEMORY_MAPPED) || 333 (!strcmp(priv->hid, "MSFT0101"))) 334 iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start); 335 336 if ((priv->sm == ACPI_TPM2_START_METHOD) || 337 (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD)) 338 rc = crb_do_acpi_start(chip); 339 340 if (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC) { 341 iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start); 342 rc = tpm_crb_smc_start(&chip->dev, priv->smc_func_id); 343 } 344 345 return rc; 346 } 347 348 static void crb_cancel(struct tpm_chip *chip) 349 { 350 struct crb_priv *priv = dev_get_drvdata(&chip->dev); 351 352 iowrite32(CRB_CANCEL_INVOKE, &priv->regs_t->ctrl_cancel); 353 354 if (((priv->sm == ACPI_TPM2_START_METHOD) || 355 (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD)) && 356 crb_do_acpi_start(chip)) 357 dev_err(&chip->dev, "ACPI Start failed\n"); 358 } 359 360 static bool crb_req_canceled(struct tpm_chip *chip, u8 status) 361 { 362 struct crb_priv *priv = dev_get_drvdata(&chip->dev); 363 u32 cancel = ioread32(&priv->regs_t->ctrl_cancel); 364 365 return (cancel & CRB_CANCEL_INVOKE) == CRB_CANCEL_INVOKE; 366 } 367 368 static const struct tpm_class_ops tpm_crb = { 369 .flags = TPM_OPS_AUTO_STARTUP, 370 .status = crb_status, 371 .recv = crb_recv, 372 .send = crb_send, 373 .cancel = crb_cancel, 374 .req_canceled = crb_req_canceled, 375 .request_locality = crb_request_locality, 376 .relinquish_locality = crb_relinquish_locality, 377 .req_complete_mask = CRB_DRV_STS_COMPLETE, 378 .req_complete_val = CRB_DRV_STS_COMPLETE, 379 }; 380 381 static int crb_check_resource(struct acpi_resource *ares, void *data) 382 { 383 struct resource *io_res = data; 384 struct resource_win win; 385 struct resource *res = &(win.res); 386 387 if (acpi_dev_resource_memory(ares, res) || 388 acpi_dev_resource_address_space(ares, &win)) { 389 *io_res = *res; 390 io_res->name = NULL; 391 } 392 393 return 1; 394 } 395 396 static void __iomem *crb_map_res(struct device *dev, struct crb_priv *priv, 397 struct resource *io_res, u64 start, u32 size) 398 { 399 struct resource new_res = { 400 .start = start, 401 .end = start + size - 1, 402 .flags = IORESOURCE_MEM, 403 }; 404 405 /* Detect a 64 bit address on a 32 bit system */ 406 if (start != new_res.start) 407 return (void __iomem *) ERR_PTR(-EINVAL); 408 409 if (!resource_contains(io_res, &new_res)) 410 return devm_ioremap_resource(dev, &new_res); 411 412 return priv->iobase + (new_res.start - io_res->start); 413 } 414 415 /* 416 * Work around broken BIOSs that return inconsistent values from the ACPI 417 * region vs the registers. Trust the ACPI region. Such broken systems 418 * probably cannot send large TPM commands since the buffer will be truncated. 419 */ 420 static u64 crb_fixup_cmd_size(struct device *dev, struct resource *io_res, 421 u64 start, u64 size) 422 { 423 if (io_res->start > start || io_res->end < start) 424 return size; 425 426 if (start + size - 1 <= io_res->end) 427 return size; 428 429 dev_err(dev, 430 FW_BUG "ACPI region does not cover the entire command/response buffer. %pr vs %llx %llx\n", 431 io_res, start, size); 432 433 return io_res->end - start + 1; 434 } 435 436 static int crb_map_io(struct acpi_device *device, struct crb_priv *priv, 437 struct acpi_table_tpm2 *buf) 438 { 439 struct list_head resources; 440 struct resource io_res; 441 struct device *dev = &device->dev; 442 u32 pa_high, pa_low; 443 u64 cmd_pa; 444 u32 cmd_size; 445 u64 rsp_pa; 446 u32 rsp_size; 447 int ret; 448 449 INIT_LIST_HEAD(&resources); 450 ret = acpi_dev_get_resources(device, &resources, crb_check_resource, 451 &io_res); 452 if (ret < 0) 453 return ret; 454 acpi_dev_free_resource_list(&resources); 455 456 if (resource_type(&io_res) != IORESOURCE_MEM) { 457 dev_err(dev, FW_BUG "TPM2 ACPI table does not define a memory resource\n"); 458 return -EINVAL; 459 } 460 461 priv->iobase = devm_ioremap_resource(dev, &io_res); 462 if (IS_ERR(priv->iobase)) 463 return PTR_ERR(priv->iobase); 464 465 /* The ACPI IO region starts at the head area and continues to include 466 * the control area, as one nice sane region except for some older 467 * stuff that puts the control area outside the ACPI IO region. 468 */ 469 if ((priv->sm == ACPI_TPM2_COMMAND_BUFFER) || 470 (priv->sm == ACPI_TPM2_MEMORY_MAPPED)) { 471 if (buf->control_address == io_res.start + 472 sizeof(*priv->regs_h)) 473 priv->regs_h = priv->iobase; 474 else 475 dev_warn(dev, FW_BUG "Bad ACPI memory layout"); 476 } 477 478 priv->regs_t = crb_map_res(dev, priv, &io_res, buf->control_address, 479 sizeof(struct crb_regs_tail)); 480 if (IS_ERR(priv->regs_t)) 481 return PTR_ERR(priv->regs_t); 482 483 /* 484 * PTT HW bug w/a: wake up the device to access 485 * possibly not retained registers. 486 */ 487 ret = crb_cmd_ready(dev, priv); 488 if (ret) 489 return ret; 490 491 pa_high = ioread32(&priv->regs_t->ctrl_cmd_pa_high); 492 pa_low = ioread32(&priv->regs_t->ctrl_cmd_pa_low); 493 cmd_pa = ((u64)pa_high << 32) | pa_low; 494 cmd_size = crb_fixup_cmd_size(dev, &io_res, cmd_pa, 495 ioread32(&priv->regs_t->ctrl_cmd_size)); 496 497 dev_dbg(dev, "cmd_hi = %X cmd_low = %X cmd_size %X\n", 498 pa_high, pa_low, cmd_size); 499 500 priv->cmd = crb_map_res(dev, priv, &io_res, cmd_pa, cmd_size); 501 if (IS_ERR(priv->cmd)) { 502 ret = PTR_ERR(priv->cmd); 503 goto out; 504 } 505 506 memcpy_fromio(&rsp_pa, &priv->regs_t->ctrl_rsp_pa, 8); 507 rsp_pa = le64_to_cpu(rsp_pa); 508 rsp_size = crb_fixup_cmd_size(dev, &io_res, rsp_pa, 509 ioread32(&priv->regs_t->ctrl_rsp_size)); 510 511 if (cmd_pa != rsp_pa) { 512 priv->rsp = crb_map_res(dev, priv, &io_res, rsp_pa, rsp_size); 513 ret = PTR_ERR_OR_ZERO(priv->rsp); 514 goto out; 515 } 516 517 /* According to the PTP specification, overlapping command and response 518 * buffer sizes must be identical. 519 */ 520 if (cmd_size != rsp_size) { 521 dev_err(dev, FW_BUG "overlapping command and response buffer sizes are not identical"); 522 ret = -EINVAL; 523 goto out; 524 } 525 526 priv->rsp = priv->cmd; 527 528 out: 529 if (!ret) 530 priv->cmd_size = cmd_size; 531 532 crb_go_idle(dev, priv); 533 534 return ret; 535 } 536 537 static int crb_acpi_add(struct acpi_device *device) 538 { 539 struct acpi_table_tpm2 *buf; 540 struct crb_priv *priv; 541 struct tpm_chip *chip; 542 struct device *dev = &device->dev; 543 struct tpm2_crb_smc *crb_smc; 544 acpi_status status; 545 u32 sm; 546 int rc; 547 548 status = acpi_get_table(ACPI_SIG_TPM2, 1, 549 (struct acpi_table_header **) &buf); 550 if (ACPI_FAILURE(status) || buf->header.length < sizeof(*buf)) { 551 dev_err(dev, FW_BUG "failed to get TPM2 ACPI table\n"); 552 return -EINVAL; 553 } 554 555 /* Should the FIFO driver handle this? */ 556 sm = buf->start_method; 557 if (sm == ACPI_TPM2_MEMORY_MAPPED) 558 return -ENODEV; 559 560 priv = devm_kzalloc(dev, sizeof(struct crb_priv), GFP_KERNEL); 561 if (!priv) 562 return -ENOMEM; 563 564 if (sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC) { 565 if (buf->header.length < (sizeof(*buf) + sizeof(*crb_smc))) { 566 dev_err(dev, 567 FW_BUG "TPM2 ACPI table has wrong size %u for start method type %d\n", 568 buf->header.length, 569 ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC); 570 return -EINVAL; 571 } 572 crb_smc = ACPI_ADD_PTR(struct tpm2_crb_smc, buf, sizeof(*buf)); 573 priv->smc_func_id = crb_smc->smc_func_id; 574 } 575 576 priv->sm = sm; 577 priv->hid = acpi_device_hid(device); 578 579 rc = crb_map_io(device, priv, buf); 580 if (rc) 581 return rc; 582 583 chip = tpmm_chip_alloc(dev, &tpm_crb); 584 if (IS_ERR(chip)) 585 return PTR_ERR(chip); 586 587 dev_set_drvdata(&chip->dev, priv); 588 chip->acpi_dev_handle = device->handle; 589 chip->flags = TPM_CHIP_FLAG_TPM2; 590 591 rc = crb_cmd_ready(dev, priv); 592 if (rc) 593 return rc; 594 595 pm_runtime_get_noresume(dev); 596 pm_runtime_set_active(dev); 597 pm_runtime_enable(dev); 598 599 rc = tpm_chip_register(chip); 600 if (rc) { 601 crb_go_idle(dev, priv); 602 pm_runtime_put_noidle(dev); 603 pm_runtime_disable(dev); 604 return rc; 605 } 606 607 pm_runtime_put(dev); 608 609 return 0; 610 } 611 612 static int crb_acpi_remove(struct acpi_device *device) 613 { 614 struct device *dev = &device->dev; 615 struct tpm_chip *chip = dev_get_drvdata(dev); 616 617 tpm_chip_unregister(chip); 618 619 pm_runtime_disable(dev); 620 621 return 0; 622 } 623 624 static int __maybe_unused crb_pm_runtime_suspend(struct device *dev) 625 { 626 struct tpm_chip *chip = dev_get_drvdata(dev); 627 struct crb_priv *priv = dev_get_drvdata(&chip->dev); 628 629 return crb_go_idle(dev, priv); 630 } 631 632 static int __maybe_unused crb_pm_runtime_resume(struct device *dev) 633 { 634 struct tpm_chip *chip = dev_get_drvdata(dev); 635 struct crb_priv *priv = dev_get_drvdata(&chip->dev); 636 637 return crb_cmd_ready(dev, priv); 638 } 639 640 static int __maybe_unused crb_pm_suspend(struct device *dev) 641 { 642 int ret; 643 644 ret = tpm_pm_suspend(dev); 645 if (ret) 646 return ret; 647 648 return crb_pm_runtime_suspend(dev); 649 } 650 651 static int __maybe_unused crb_pm_resume(struct device *dev) 652 { 653 int ret; 654 655 ret = crb_pm_runtime_resume(dev); 656 if (ret) 657 return ret; 658 659 return tpm_pm_resume(dev); 660 } 661 662 static const struct dev_pm_ops crb_pm = { 663 SET_SYSTEM_SLEEP_PM_OPS(crb_pm_suspend, crb_pm_resume) 664 SET_RUNTIME_PM_OPS(crb_pm_runtime_suspend, crb_pm_runtime_resume, NULL) 665 }; 666 667 static const struct acpi_device_id crb_device_ids[] = { 668 {"MSFT0101", 0}, 669 {"", 0}, 670 }; 671 MODULE_DEVICE_TABLE(acpi, crb_device_ids); 672 673 static struct acpi_driver crb_acpi_driver = { 674 .name = "tpm_crb", 675 .ids = crb_device_ids, 676 .ops = { 677 .add = crb_acpi_add, 678 .remove = crb_acpi_remove, 679 }, 680 .drv = { 681 .pm = &crb_pm, 682 }, 683 }; 684 685 module_acpi_driver(crb_acpi_driver); 686 MODULE_AUTHOR("Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>"); 687 MODULE_DESCRIPTION("TPM2 Driver"); 688 MODULE_VERSION("0.1"); 689 MODULE_LICENSE("GPL"); 690