1 /* linux/drivers/char/pc8736x_gpio.c 2 3 National Semiconductor PC8736x GPIO driver. Allows a user space 4 process to play with the GPIO pins. 5 6 Copyright (c) 2005,2006 Jim Cromie <jim.cromie@gmail.com> 7 8 adapted from linux/drivers/char/scx200_gpio.c 9 Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>, 10 */ 11 12 #include <linux/fs.h> 13 #include <linux/module.h> 14 #include <linux/errno.h> 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/cdev.h> 18 #include <linux/io.h> 19 #include <linux/ioport.h> 20 #include <linux/mutex.h> 21 #include <linux/nsc_gpio.h> 22 #include <linux/platform_device.h> 23 #include <linux/smp_lock.h> 24 #include <asm/uaccess.h> 25 26 #define DEVNAME "pc8736x_gpio" 27 28 MODULE_AUTHOR("Jim Cromie <jim.cromie@gmail.com>"); 29 MODULE_DESCRIPTION("NatSemi/Winbond PC-8736x GPIO Pin Driver"); 30 MODULE_LICENSE("GPL"); 31 32 static int major; /* default to dynamic major */ 33 module_param(major, int, 0); 34 MODULE_PARM_DESC(major, "Major device number"); 35 36 static DEFINE_MUTEX(pc8736x_gpio_config_lock); 37 static unsigned pc8736x_gpio_base; 38 static u8 pc8736x_gpio_shadow[4]; 39 40 #define SIO_BASE1 0x2E /* 1st command-reg to check */ 41 #define SIO_BASE2 0x4E /* alt command-reg to check */ 42 43 #define SIO_SID 0x20 /* SuperI/O ID Register */ 44 #define SIO_SID_VALUE 0xe9 /* Expected value in SuperI/O ID Register */ 45 46 #define SIO_CF1 0x21 /* chip config, bit0 is chip enable */ 47 48 #define PC8736X_GPIO_RANGE 16 /* ioaddr range */ 49 #define PC8736X_GPIO_CT 32 /* minors matching 4 8 bit ports */ 50 51 #define SIO_UNIT_SEL 0x7 /* unit select reg */ 52 #define SIO_UNIT_ACT 0x30 /* unit enable */ 53 #define SIO_GPIO_UNIT 0x7 /* unit number of GPIO */ 54 #define SIO_VLM_UNIT 0x0D 55 #define SIO_TMS_UNIT 0x0E 56 57 /* config-space addrs to read/write each unit's runtime addr */ 58 #define SIO_BASE_HADDR 0x60 59 #define SIO_BASE_LADDR 0x61 60 61 /* GPIO config-space pin-control addresses */ 62 #define SIO_GPIO_PIN_SELECT 0xF0 63 #define SIO_GPIO_PIN_CONFIG 0xF1 64 #define SIO_GPIO_PIN_EVENT 0xF2 65 66 static unsigned char superio_cmd = 0; 67 static unsigned char selected_device = 0xFF; /* bogus start val */ 68 69 /* GPIO port runtime access, functionality */ 70 static int port_offset[] = { 0, 4, 8, 10 }; /* non-uniform offsets ! */ 71 /* static int event_capable[] = { 1, 1, 0, 0 }; ports 2,3 are hobbled */ 72 73 #define PORT_OUT 0 74 #define PORT_IN 1 75 #define PORT_EVT_EN 2 76 #define PORT_EVT_STST 3 77 78 static struct platform_device *pdev; /* use in dev_*() */ 79 80 static inline void superio_outb(int addr, int val) 81 { 82 outb_p(addr, superio_cmd); 83 outb_p(val, superio_cmd + 1); 84 } 85 86 static inline int superio_inb(int addr) 87 { 88 outb_p(addr, superio_cmd); 89 return inb_p(superio_cmd + 1); 90 } 91 92 static int pc8736x_superio_present(void) 93 { 94 /* try the 2 possible values, read a hardware reg to verify */ 95 superio_cmd = SIO_BASE1; 96 if (superio_inb(SIO_SID) == SIO_SID_VALUE) 97 return superio_cmd; 98 99 superio_cmd = SIO_BASE2; 100 if (superio_inb(SIO_SID) == SIO_SID_VALUE) 101 return superio_cmd; 102 103 return 0; 104 } 105 106 static void device_select(unsigned devldn) 107 { 108 superio_outb(SIO_UNIT_SEL, devldn); 109 selected_device = devldn; 110 } 111 112 static void select_pin(unsigned iminor) 113 { 114 /* select GPIO port/pin from device minor number */ 115 device_select(SIO_GPIO_UNIT); 116 superio_outb(SIO_GPIO_PIN_SELECT, 117 ((iminor << 1) & 0xF0) | (iminor & 0x7)); 118 } 119 120 static inline u32 pc8736x_gpio_configure_fn(unsigned index, u32 mask, u32 bits, 121 u32 func_slct) 122 { 123 u32 config, new_config; 124 125 mutex_lock(&pc8736x_gpio_config_lock); 126 127 device_select(SIO_GPIO_UNIT); 128 select_pin(index); 129 130 /* read current config value */ 131 config = superio_inb(func_slct); 132 133 /* set new config */ 134 new_config = (config & mask) | bits; 135 superio_outb(func_slct, new_config); 136 137 mutex_unlock(&pc8736x_gpio_config_lock); 138 139 return config; 140 } 141 142 static u32 pc8736x_gpio_configure(unsigned index, u32 mask, u32 bits) 143 { 144 return pc8736x_gpio_configure_fn(index, mask, bits, 145 SIO_GPIO_PIN_CONFIG); 146 } 147 148 static int pc8736x_gpio_get(unsigned minor) 149 { 150 int port, bit, val; 151 152 port = minor >> 3; 153 bit = minor & 7; 154 val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN); 155 val >>= bit; 156 val &= 1; 157 158 dev_dbg(&pdev->dev, "_gpio_get(%d from %x bit %d) == val %d\n", 159 minor, pc8736x_gpio_base + port_offset[port] + PORT_IN, bit, 160 val); 161 162 return val; 163 } 164 165 static void pc8736x_gpio_set(unsigned minor, int val) 166 { 167 int port, bit, curval; 168 169 minor &= 0x1f; 170 port = minor >> 3; 171 bit = minor & 7; 172 curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT); 173 174 dev_dbg(&pdev->dev, "addr:%x cur:%x bit-pos:%d cur-bit:%x + new:%d -> bit-new:%d\n", 175 pc8736x_gpio_base + port_offset[port] + PORT_OUT, 176 curval, bit, (curval & ~(1 << bit)), val, (val << bit)); 177 178 val = (curval & ~(1 << bit)) | (val << bit); 179 180 dev_dbg(&pdev->dev, "gpio_set(minor:%d port:%d bit:%d)" 181 " %2x -> %2x\n", minor, port, bit, curval, val); 182 183 outb_p(val, pc8736x_gpio_base + port_offset[port] + PORT_OUT); 184 185 curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT); 186 val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN); 187 188 dev_dbg(&pdev->dev, "wrote %x, read: %x\n", curval, val); 189 pc8736x_gpio_shadow[port] = val; 190 } 191 192 static int pc8736x_gpio_current(unsigned minor) 193 { 194 int port, bit; 195 minor &= 0x1f; 196 port = minor >> 3; 197 bit = minor & 7; 198 return ((pc8736x_gpio_shadow[port] >> bit) & 0x01); 199 } 200 201 static void pc8736x_gpio_change(unsigned index) 202 { 203 pc8736x_gpio_set(index, !pc8736x_gpio_current(index)); 204 } 205 206 static struct nsc_gpio_ops pc8736x_gpio_ops = { 207 .owner = THIS_MODULE, 208 .gpio_config = pc8736x_gpio_configure, 209 .gpio_dump = nsc_gpio_dump, 210 .gpio_get = pc8736x_gpio_get, 211 .gpio_set = pc8736x_gpio_set, 212 .gpio_change = pc8736x_gpio_change, 213 .gpio_current = pc8736x_gpio_current 214 }; 215 216 static int pc8736x_gpio_open(struct inode *inode, struct file *file) 217 { 218 unsigned m = iminor(inode); 219 file->private_data = &pc8736x_gpio_ops; 220 221 cycle_kernel_lock(); 222 dev_dbg(&pdev->dev, "open %d\n", m); 223 224 if (m >= PC8736X_GPIO_CT) 225 return -EINVAL; 226 return nonseekable_open(inode, file); 227 } 228 229 static const struct file_operations pc8736x_gpio_fileops = { 230 .owner = THIS_MODULE, 231 .open = pc8736x_gpio_open, 232 .write = nsc_gpio_write, 233 .read = nsc_gpio_read, 234 }; 235 236 static void __init pc8736x_init_shadow(void) 237 { 238 int port; 239 240 /* read the current values driven on the GPIO signals */ 241 for (port = 0; port < 4; ++port) 242 pc8736x_gpio_shadow[port] 243 = inb_p(pc8736x_gpio_base + port_offset[port] 244 + PORT_OUT); 245 246 } 247 248 static struct cdev pc8736x_gpio_cdev; 249 250 static int __init pc8736x_gpio_init(void) 251 { 252 int rc; 253 dev_t devid; 254 255 pdev = platform_device_alloc(DEVNAME, 0); 256 if (!pdev) 257 return -ENOMEM; 258 259 rc = platform_device_add(pdev); 260 if (rc) { 261 rc = -ENODEV; 262 goto undo_platform_dev_alloc; 263 } 264 dev_info(&pdev->dev, "NatSemi pc8736x GPIO Driver Initializing\n"); 265 266 if (!pc8736x_superio_present()) { 267 rc = -ENODEV; 268 dev_err(&pdev->dev, "no device found\n"); 269 goto undo_platform_dev_add; 270 } 271 pc8736x_gpio_ops.dev = &pdev->dev; 272 273 /* Verify that chip and it's GPIO unit are both enabled. 274 My BIOS does this, so I take minimum action here 275 */ 276 rc = superio_inb(SIO_CF1); 277 if (!(rc & 0x01)) { 278 rc = -ENODEV; 279 dev_err(&pdev->dev, "device not enabled\n"); 280 goto undo_platform_dev_add; 281 } 282 device_select(SIO_GPIO_UNIT); 283 if (!superio_inb(SIO_UNIT_ACT)) { 284 rc = -ENODEV; 285 dev_err(&pdev->dev, "GPIO unit not enabled\n"); 286 goto undo_platform_dev_add; 287 } 288 289 /* read the GPIO unit base addr that chip responds to */ 290 pc8736x_gpio_base = (superio_inb(SIO_BASE_HADDR) << 8 291 | superio_inb(SIO_BASE_LADDR)); 292 293 if (!request_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE, DEVNAME)) { 294 rc = -ENODEV; 295 dev_err(&pdev->dev, "GPIO ioport %x busy\n", 296 pc8736x_gpio_base); 297 goto undo_platform_dev_add; 298 } 299 dev_info(&pdev->dev, "GPIO ioport %x reserved\n", pc8736x_gpio_base); 300 301 if (major) { 302 devid = MKDEV(major, 0); 303 rc = register_chrdev_region(devid, PC8736X_GPIO_CT, DEVNAME); 304 } else { 305 rc = alloc_chrdev_region(&devid, 0, PC8736X_GPIO_CT, DEVNAME); 306 major = MAJOR(devid); 307 } 308 309 if (rc < 0) { 310 dev_err(&pdev->dev, "register-chrdev failed: %d\n", rc); 311 goto undo_request_region; 312 } 313 if (!major) { 314 major = rc; 315 dev_dbg(&pdev->dev, "got dynamic major %d\n", major); 316 } 317 318 pc8736x_init_shadow(); 319 320 /* ignore minor errs, and succeed */ 321 cdev_init(&pc8736x_gpio_cdev, &pc8736x_gpio_fileops); 322 cdev_add(&pc8736x_gpio_cdev, devid, PC8736X_GPIO_CT); 323 324 return 0; 325 326 undo_request_region: 327 release_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE); 328 undo_platform_dev_add: 329 platform_device_del(pdev); 330 undo_platform_dev_alloc: 331 platform_device_put(pdev); 332 333 return rc; 334 } 335 336 static void __exit pc8736x_gpio_cleanup(void) 337 { 338 dev_dbg(&pdev->dev, "cleanup\n"); 339 340 cdev_del(&pc8736x_gpio_cdev); 341 unregister_chrdev_region(MKDEV(major,0), PC8736X_GPIO_CT); 342 release_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE); 343 344 platform_device_del(pdev); 345 platform_device_put(pdev); 346 } 347 348 module_init(pc8736x_gpio_init); 349 module_exit(pc8736x_gpio_cleanup); 350