1 /* 2 * RNG driver for VIA RNGs 3 * 4 * Copyright 2005 (c) MontaVista Software, Inc. 5 * 6 * with the majority of the code coming from: 7 * 8 * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG) 9 * (c) Copyright 2003 Red Hat Inc <jgarzik@redhat.com> 10 * 11 * derived from 12 * 13 * Hardware driver for the AMD 768 Random Number Generator (RNG) 14 * (c) Copyright 2001 Red Hat Inc <alan@redhat.com> 15 * 16 * derived from 17 * 18 * Hardware driver for Intel i810 Random Number Generator (RNG) 19 * Copyright 2000,2001 Jeff Garzik <jgarzik@pobox.com> 20 * Copyright 2000,2001 Philipp Rumpf <prumpf@mandrakesoft.com> 21 * 22 * This file is licensed under the terms of the GNU General Public 23 * License version 2. This program is licensed "as is" without any 24 * warranty of any kind, whether express or implied. 25 */ 26 27 #include <linux/module.h> 28 #include <linux/kernel.h> 29 #include <linux/hw_random.h> 30 #include <linux/delay.h> 31 #include <asm/io.h> 32 #include <asm/msr.h> 33 #include <asm/cpufeature.h> 34 35 36 #define PFX KBUILD_MODNAME ": " 37 38 39 enum { 40 VIA_STRFILT_CNT_SHIFT = 16, 41 VIA_STRFILT_FAIL = (1 << 15), 42 VIA_STRFILT_ENABLE = (1 << 14), 43 VIA_RAWBITS_ENABLE = (1 << 13), 44 VIA_RNG_ENABLE = (1 << 6), 45 VIA_NOISESRC1 = (1 << 8), 46 VIA_NOISESRC2 = (1 << 9), 47 VIA_XSTORE_CNT_MASK = 0x0F, 48 49 VIA_RNG_CHUNK_8 = 0x00, /* 64 rand bits, 64 stored bits */ 50 VIA_RNG_CHUNK_4 = 0x01, /* 32 rand bits, 32 stored bits */ 51 VIA_RNG_CHUNK_4_MASK = 0xFFFFFFFF, 52 VIA_RNG_CHUNK_2 = 0x02, /* 16 rand bits, 32 stored bits */ 53 VIA_RNG_CHUNK_2_MASK = 0xFFFF, 54 VIA_RNG_CHUNK_1 = 0x03, /* 8 rand bits, 32 stored bits */ 55 VIA_RNG_CHUNK_1_MASK = 0xFF, 56 }; 57 58 /* 59 * Investigate using the 'rep' prefix to obtain 32 bits of random data 60 * in one insn. The upside is potentially better performance. The 61 * downside is that the instruction becomes no longer atomic. Due to 62 * this, just like familiar issues with /dev/random itself, the worst 63 * case of a 'rep xstore' could potentially pause a cpu for an 64 * unreasonably long time. In practice, this condition would likely 65 * only occur when the hardware is failing. (or so we hope :)) 66 * 67 * Another possible performance boost may come from simply buffering 68 * until we have 4 bytes, thus returning a u32 at a time, 69 * instead of the current u8-at-a-time. 70 */ 71 72 static inline u32 xstore(u32 *addr, u32 edx_in) 73 { 74 u32 eax_out; 75 76 asm(".byte 0x0F,0xA7,0xC0 /* xstore %%edi (addr=%0) */" 77 :"=m"(*addr), "=a"(eax_out) 78 :"D"(addr), "d"(edx_in)); 79 80 return eax_out; 81 } 82 83 static int via_rng_data_present(struct hwrng *rng, int wait) 84 { 85 u32 bytes_out; 86 u32 *via_rng_datum = (u32 *)(&rng->priv); 87 int i; 88 89 /* We choose the recommended 1-byte-per-instruction RNG rate, 90 * for greater randomness at the expense of speed. Larger 91 * values 2, 4, or 8 bytes-per-instruction yield greater 92 * speed at lesser randomness. 93 * 94 * If you change this to another VIA_CHUNK_n, you must also 95 * change the ->n_bytes values in rng_vendor_ops[] tables. 96 * VIA_CHUNK_8 requires further code changes. 97 * 98 * A copy of MSR_VIA_RNG is placed in eax_out when xstore 99 * completes. 100 */ 101 102 for (i = 0; i < 20; i++) { 103 *via_rng_datum = 0; /* paranoia, not really necessary */ 104 bytes_out = xstore(via_rng_datum, VIA_RNG_CHUNK_1); 105 bytes_out &= VIA_XSTORE_CNT_MASK; 106 if (bytes_out || !wait) 107 break; 108 udelay(10); 109 } 110 return bytes_out ? 1 : 0; 111 } 112 113 static int via_rng_data_read(struct hwrng *rng, u32 *data) 114 { 115 u32 via_rng_datum = (u32)rng->priv; 116 117 *data = via_rng_datum; 118 119 return 1; 120 } 121 122 static int via_rng_init(struct hwrng *rng) 123 { 124 struct cpuinfo_x86 *c = &cpu_data(0); 125 u32 lo, hi, old_lo; 126 127 /* Control the RNG via MSR. Tread lightly and pay very close 128 * close attention to values written, as the reserved fields 129 * are documented to be "undefined and unpredictable"; but it 130 * does not say to write them as zero, so I make a guess that 131 * we restore the values we find in the register. 132 */ 133 rdmsr(MSR_VIA_RNG, lo, hi); 134 135 old_lo = lo; 136 lo &= ~(0x7f << VIA_STRFILT_CNT_SHIFT); 137 lo &= ~VIA_XSTORE_CNT_MASK; 138 lo &= ~(VIA_STRFILT_ENABLE | VIA_STRFILT_FAIL | VIA_RAWBITS_ENABLE); 139 lo |= VIA_RNG_ENABLE; 140 lo |= VIA_NOISESRC1; 141 142 /* Enable secondary noise source on CPUs where it is present. */ 143 144 /* Nehemiah stepping 8 and higher */ 145 if ((c->x86_model == 9) && (c->x86_mask > 7)) 146 lo |= VIA_NOISESRC2; 147 148 /* Esther */ 149 if (c->x86_model >= 10) 150 lo |= VIA_NOISESRC2; 151 152 if (lo != old_lo) 153 wrmsr(MSR_VIA_RNG, lo, hi); 154 155 /* perhaps-unnecessary sanity check; remove after testing if 156 unneeded */ 157 rdmsr(MSR_VIA_RNG, lo, hi); 158 if ((lo & VIA_RNG_ENABLE) == 0) { 159 printk(KERN_ERR PFX "cannot enable VIA C3 RNG, aborting\n"); 160 return -ENODEV; 161 } 162 163 return 0; 164 } 165 166 167 static struct hwrng via_rng = { 168 .name = "via", 169 .init = via_rng_init, 170 .data_present = via_rng_data_present, 171 .data_read = via_rng_data_read, 172 }; 173 174 175 static int __init mod_init(void) 176 { 177 int err; 178 179 if (!cpu_has_xstore) 180 return -ENODEV; 181 printk(KERN_INFO "VIA RNG detected\n"); 182 err = hwrng_register(&via_rng); 183 if (err) { 184 printk(KERN_ERR PFX "RNG registering failed (%d)\n", 185 err); 186 goto out; 187 } 188 out: 189 return err; 190 } 191 192 static void __exit mod_exit(void) 193 { 194 hwrng_unregister(&via_rng); 195 } 196 197 module_init(mod_init); 198 module_exit(mod_exit); 199 200 MODULE_DESCRIPTION("H/W RNG driver for VIA chipsets"); 201 MODULE_LICENSE("GPL"); 202