1 /* 2 * omap-rng.c - RNG driver for TI OMAP CPU family 3 * 4 * Author: Deepak Saxena <dsaxena@plexity.net> 5 * 6 * Copyright 2005 (c) MontaVista Software, Inc. 7 * 8 * Mostly based on original driver: 9 * 10 * Copyright (C) 2005 Nokia Corporation 11 * Author: Juha Yrjölä <juha.yrjola@nokia.com> 12 * 13 * This file is licensed under the terms of the GNU General Public 14 * License version 2. This program is licensed "as is" without any 15 * warranty of any kind, whether express or implied. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/init.h> 20 #include <linux/random.h> 21 #include <linux/err.h> 22 #include <linux/platform_device.h> 23 #include <linux/hw_random.h> 24 #include <linux/delay.h> 25 #include <linux/slab.h> 26 #include <linux/pm_runtime.h> 27 #include <linux/of.h> 28 #include <linux/of_device.h> 29 #include <linux/of_address.h> 30 #include <linux/interrupt.h> 31 32 #include <asm/io.h> 33 34 #define RNG_REG_STATUS_RDY (1 << 0) 35 36 #define RNG_REG_INTACK_RDY_MASK (1 << 0) 37 #define RNG_REG_INTACK_SHUTDOWN_OFLO_MASK (1 << 1) 38 #define RNG_SHUTDOWN_OFLO_MASK (1 << 1) 39 40 #define RNG_CONTROL_STARTUP_CYCLES_SHIFT 16 41 #define RNG_CONTROL_STARTUP_CYCLES_MASK (0xffff << 16) 42 #define RNG_CONTROL_ENABLE_TRNG_SHIFT 10 43 #define RNG_CONTROL_ENABLE_TRNG_MASK (1 << 10) 44 45 #define RNG_CONFIG_MAX_REFIL_CYCLES_SHIFT 16 46 #define RNG_CONFIG_MAX_REFIL_CYCLES_MASK (0xffff << 16) 47 #define RNG_CONFIG_MIN_REFIL_CYCLES_SHIFT 0 48 #define RNG_CONFIG_MIN_REFIL_CYCLES_MASK (0xff << 0) 49 50 #define RNG_CONTROL_STARTUP_CYCLES 0xff 51 #define RNG_CONFIG_MIN_REFIL_CYCLES 0x21 52 #define RNG_CONFIG_MAX_REFIL_CYCLES 0x22 53 54 #define RNG_ALARMCNT_ALARM_TH_SHIFT 0x0 55 #define RNG_ALARMCNT_ALARM_TH_MASK (0xff << 0) 56 #define RNG_ALARMCNT_SHUTDOWN_TH_SHIFT 16 57 #define RNG_ALARMCNT_SHUTDOWN_TH_MASK (0x1f << 16) 58 #define RNG_ALARM_THRESHOLD 0xff 59 #define RNG_SHUTDOWN_THRESHOLD 0x4 60 61 #define RNG_REG_FROENABLE_MASK 0xffffff 62 #define RNG_REG_FRODETUNE_MASK 0xffffff 63 64 #define OMAP2_RNG_OUTPUT_SIZE 0x4 65 #define OMAP4_RNG_OUTPUT_SIZE 0x8 66 67 enum { 68 RNG_OUTPUT_0_REG = 0, 69 RNG_OUTPUT_1_REG, 70 RNG_OUTPUT_2_REG, 71 RNG_OUTPUT_3_REG, 72 RNG_STATUS_REG, 73 RNG_INTMASK_REG, 74 RNG_INTACK_REG, 75 RNG_CONTROL_REG, 76 RNG_CONFIG_REG, 77 RNG_ALARMCNT_REG, 78 RNG_FROENABLE_REG, 79 RNG_FRODETUNE_REG, 80 RNG_ALARMMASK_REG, 81 RNG_ALARMSTOP_REG, 82 RNG_REV_REG, 83 RNG_SYSCONFIG_REG, 84 }; 85 86 static const u16 reg_map_omap2[] = { 87 [RNG_OUTPUT_0_REG] = 0x0, 88 [RNG_STATUS_REG] = 0x4, 89 [RNG_CONFIG_REG] = 0x28, 90 [RNG_REV_REG] = 0x3c, 91 [RNG_SYSCONFIG_REG] = 0x40, 92 }; 93 94 static const u16 reg_map_omap4[] = { 95 [RNG_OUTPUT_0_REG] = 0x0, 96 [RNG_OUTPUT_1_REG] = 0x4, 97 [RNG_STATUS_REG] = 0x8, 98 [RNG_INTMASK_REG] = 0xc, 99 [RNG_INTACK_REG] = 0x10, 100 [RNG_CONTROL_REG] = 0x14, 101 [RNG_CONFIG_REG] = 0x18, 102 [RNG_ALARMCNT_REG] = 0x1c, 103 [RNG_FROENABLE_REG] = 0x20, 104 [RNG_FRODETUNE_REG] = 0x24, 105 [RNG_ALARMMASK_REG] = 0x28, 106 [RNG_ALARMSTOP_REG] = 0x2c, 107 [RNG_REV_REG] = 0x1FE0, 108 [RNG_SYSCONFIG_REG] = 0x1FE4, 109 }; 110 111 struct omap_rng_dev; 112 /** 113 * struct omap_rng_pdata - RNG IP block-specific data 114 * @regs: Pointer to the register offsets structure. 115 * @data_size: No. of bytes in RNG output. 116 * @data_present: Callback to determine if data is available. 117 * @init: Callback for IP specific initialization sequence. 118 * @cleanup: Callback for IP specific cleanup sequence. 119 */ 120 struct omap_rng_pdata { 121 u16 *regs; 122 u32 data_size; 123 u32 (*data_present)(struct omap_rng_dev *priv); 124 int (*init)(struct omap_rng_dev *priv); 125 void (*cleanup)(struct omap_rng_dev *priv); 126 }; 127 128 struct omap_rng_dev { 129 void __iomem *base; 130 struct device *dev; 131 const struct omap_rng_pdata *pdata; 132 struct hwrng rng; 133 }; 134 135 static inline u32 omap_rng_read(struct omap_rng_dev *priv, u16 reg) 136 { 137 return __raw_readl(priv->base + priv->pdata->regs[reg]); 138 } 139 140 static inline void omap_rng_write(struct omap_rng_dev *priv, u16 reg, 141 u32 val) 142 { 143 __raw_writel(val, priv->base + priv->pdata->regs[reg]); 144 } 145 146 147 static int omap_rng_do_read(struct hwrng *rng, void *data, size_t max, 148 bool wait) 149 { 150 struct omap_rng_dev *priv; 151 int i, present; 152 153 priv = (struct omap_rng_dev *)rng->priv; 154 155 if (max < priv->pdata->data_size) 156 return 0; 157 158 for (i = 0; i < 20; i++) { 159 present = priv->pdata->data_present(priv); 160 if (present || !wait) 161 break; 162 163 udelay(10); 164 } 165 if (!present) 166 return 0; 167 168 memcpy_fromio(data, priv->base + priv->pdata->regs[RNG_OUTPUT_0_REG], 169 priv->pdata->data_size); 170 171 if (priv->pdata->regs[RNG_INTACK_REG]) 172 omap_rng_write(priv, RNG_INTACK_REG, RNG_REG_INTACK_RDY_MASK); 173 174 return priv->pdata->data_size; 175 } 176 177 static int omap_rng_init(struct hwrng *rng) 178 { 179 struct omap_rng_dev *priv; 180 181 priv = (struct omap_rng_dev *)rng->priv; 182 return priv->pdata->init(priv); 183 } 184 185 static void omap_rng_cleanup(struct hwrng *rng) 186 { 187 struct omap_rng_dev *priv; 188 189 priv = (struct omap_rng_dev *)rng->priv; 190 priv->pdata->cleanup(priv); 191 } 192 193 194 static inline u32 omap2_rng_data_present(struct omap_rng_dev *priv) 195 { 196 return omap_rng_read(priv, RNG_STATUS_REG) ? 0 : 1; 197 } 198 199 static int omap2_rng_init(struct omap_rng_dev *priv) 200 { 201 omap_rng_write(priv, RNG_SYSCONFIG_REG, 0x1); 202 return 0; 203 } 204 205 static void omap2_rng_cleanup(struct omap_rng_dev *priv) 206 { 207 omap_rng_write(priv, RNG_SYSCONFIG_REG, 0x0); 208 } 209 210 static struct omap_rng_pdata omap2_rng_pdata = { 211 .regs = (u16 *)reg_map_omap2, 212 .data_size = OMAP2_RNG_OUTPUT_SIZE, 213 .data_present = omap2_rng_data_present, 214 .init = omap2_rng_init, 215 .cleanup = omap2_rng_cleanup, 216 }; 217 218 #if defined(CONFIG_OF) 219 static inline u32 omap4_rng_data_present(struct omap_rng_dev *priv) 220 { 221 return omap_rng_read(priv, RNG_STATUS_REG) & RNG_REG_STATUS_RDY; 222 } 223 224 static int omap4_rng_init(struct omap_rng_dev *priv) 225 { 226 u32 val; 227 228 /* Return if RNG is already running. */ 229 if (omap_rng_read(priv, RNG_CONTROL_REG) & RNG_CONTROL_ENABLE_TRNG_MASK) 230 return 0; 231 232 val = RNG_CONFIG_MIN_REFIL_CYCLES << RNG_CONFIG_MIN_REFIL_CYCLES_SHIFT; 233 val |= RNG_CONFIG_MAX_REFIL_CYCLES << RNG_CONFIG_MAX_REFIL_CYCLES_SHIFT; 234 omap_rng_write(priv, RNG_CONFIG_REG, val); 235 236 omap_rng_write(priv, RNG_FRODETUNE_REG, 0x0); 237 omap_rng_write(priv, RNG_FROENABLE_REG, RNG_REG_FROENABLE_MASK); 238 val = RNG_ALARM_THRESHOLD << RNG_ALARMCNT_ALARM_TH_SHIFT; 239 val |= RNG_SHUTDOWN_THRESHOLD << RNG_ALARMCNT_SHUTDOWN_TH_SHIFT; 240 omap_rng_write(priv, RNG_ALARMCNT_REG, val); 241 242 val = RNG_CONTROL_STARTUP_CYCLES << RNG_CONTROL_STARTUP_CYCLES_SHIFT; 243 val |= RNG_CONTROL_ENABLE_TRNG_MASK; 244 omap_rng_write(priv, RNG_CONTROL_REG, val); 245 246 return 0; 247 } 248 249 static void omap4_rng_cleanup(struct omap_rng_dev *priv) 250 { 251 int val; 252 253 val = omap_rng_read(priv, RNG_CONTROL_REG); 254 val &= ~RNG_CONTROL_ENABLE_TRNG_MASK; 255 omap_rng_write(priv, RNG_CONTROL_REG, val); 256 } 257 258 static irqreturn_t omap4_rng_irq(int irq, void *dev_id) 259 { 260 struct omap_rng_dev *priv = dev_id; 261 u32 fro_detune, fro_enable; 262 263 /* 264 * Interrupt raised by a fro shutdown threshold, do the following: 265 * 1. Clear the alarm events. 266 * 2. De tune the FROs which are shutdown. 267 * 3. Re enable the shutdown FROs. 268 */ 269 omap_rng_write(priv, RNG_ALARMMASK_REG, 0x0); 270 omap_rng_write(priv, RNG_ALARMSTOP_REG, 0x0); 271 272 fro_enable = omap_rng_read(priv, RNG_FROENABLE_REG); 273 fro_detune = ~fro_enable & RNG_REG_FRODETUNE_MASK; 274 fro_detune = fro_detune | omap_rng_read(priv, RNG_FRODETUNE_REG); 275 fro_enable = RNG_REG_FROENABLE_MASK; 276 277 omap_rng_write(priv, RNG_FRODETUNE_REG, fro_detune); 278 omap_rng_write(priv, RNG_FROENABLE_REG, fro_enable); 279 280 omap_rng_write(priv, RNG_INTACK_REG, RNG_REG_INTACK_SHUTDOWN_OFLO_MASK); 281 282 return IRQ_HANDLED; 283 } 284 285 static struct omap_rng_pdata omap4_rng_pdata = { 286 .regs = (u16 *)reg_map_omap4, 287 .data_size = OMAP4_RNG_OUTPUT_SIZE, 288 .data_present = omap4_rng_data_present, 289 .init = omap4_rng_init, 290 .cleanup = omap4_rng_cleanup, 291 }; 292 293 static const struct of_device_id omap_rng_of_match[] = { 294 { 295 .compatible = "ti,omap2-rng", 296 .data = &omap2_rng_pdata, 297 }, 298 { 299 .compatible = "ti,omap4-rng", 300 .data = &omap4_rng_pdata, 301 }, 302 {}, 303 }; 304 MODULE_DEVICE_TABLE(of, omap_rng_of_match); 305 306 static int of_get_omap_rng_device_details(struct omap_rng_dev *priv, 307 struct platform_device *pdev) 308 { 309 const struct of_device_id *match; 310 struct device *dev = &pdev->dev; 311 int irq, err; 312 313 match = of_match_device(of_match_ptr(omap_rng_of_match), dev); 314 if (!match) { 315 dev_err(dev, "no compatible OF match\n"); 316 return -EINVAL; 317 } 318 priv->pdata = match->data; 319 320 if (of_device_is_compatible(dev->of_node, "ti,omap4-rng")) { 321 irq = platform_get_irq(pdev, 0); 322 if (irq < 0) { 323 dev_err(dev, "%s: error getting IRQ resource - %d\n", 324 __func__, irq); 325 return irq; 326 } 327 328 err = devm_request_irq(dev, irq, omap4_rng_irq, 329 IRQF_TRIGGER_NONE, dev_name(dev), priv); 330 if (err) { 331 dev_err(dev, "unable to request irq %d, err = %d\n", 332 irq, err); 333 return err; 334 } 335 omap_rng_write(priv, RNG_INTMASK_REG, RNG_SHUTDOWN_OFLO_MASK); 336 } 337 return 0; 338 } 339 #else 340 static int of_get_omap_rng_device_details(struct omap_rng_dev *omap_rng, 341 struct platform_device *pdev) 342 { 343 return -EINVAL; 344 } 345 #endif 346 347 static int get_omap_rng_device_details(struct omap_rng_dev *omap_rng) 348 { 349 /* Only OMAP2/3 can be non-DT */ 350 omap_rng->pdata = &omap2_rng_pdata; 351 return 0; 352 } 353 354 static int omap_rng_probe(struct platform_device *pdev) 355 { 356 struct omap_rng_dev *priv; 357 struct resource *res; 358 struct device *dev = &pdev->dev; 359 int ret; 360 361 priv = devm_kzalloc(dev, sizeof(struct omap_rng_dev), GFP_KERNEL); 362 if (!priv) 363 return -ENOMEM; 364 365 priv->rng.read = omap_rng_do_read; 366 priv->rng.init = omap_rng_init; 367 priv->rng.cleanup = omap_rng_cleanup; 368 369 priv->rng.priv = (unsigned long)priv; 370 platform_set_drvdata(pdev, priv); 371 priv->dev = dev; 372 373 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 374 priv->base = devm_ioremap_resource(dev, res); 375 if (IS_ERR(priv->base)) { 376 ret = PTR_ERR(priv->base); 377 goto err_ioremap; 378 } 379 380 priv->rng.name = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL); 381 if (!priv->rng.name) { 382 ret = -ENOMEM; 383 goto err_ioremap; 384 } 385 386 pm_runtime_enable(&pdev->dev); 387 ret = pm_runtime_get_sync(&pdev->dev); 388 if (ret < 0) { 389 dev_err(&pdev->dev, "Failed to runtime_get device: %d\n", ret); 390 pm_runtime_put_noidle(&pdev->dev); 391 goto err_ioremap; 392 } 393 394 ret = (dev->of_node) ? of_get_omap_rng_device_details(priv, pdev) : 395 get_omap_rng_device_details(priv); 396 if (ret) 397 goto err_ioremap; 398 399 ret = hwrng_register(&priv->rng); 400 if (ret) 401 goto err_register; 402 403 dev_info(&pdev->dev, "OMAP Random Number Generator ver. %02x\n", 404 omap_rng_read(priv, RNG_REV_REG)); 405 406 return 0; 407 408 err_register: 409 priv->base = NULL; 410 pm_runtime_disable(&pdev->dev); 411 err_ioremap: 412 dev_err(dev, "initialization failed.\n"); 413 return ret; 414 } 415 416 static int omap_rng_remove(struct platform_device *pdev) 417 { 418 struct omap_rng_dev *priv = platform_get_drvdata(pdev); 419 420 hwrng_unregister(&priv->rng); 421 422 priv->pdata->cleanup(priv); 423 424 pm_runtime_put_sync(&pdev->dev); 425 pm_runtime_disable(&pdev->dev); 426 427 return 0; 428 } 429 430 static int __maybe_unused omap_rng_suspend(struct device *dev) 431 { 432 struct omap_rng_dev *priv = dev_get_drvdata(dev); 433 434 priv->pdata->cleanup(priv); 435 pm_runtime_put_sync(dev); 436 437 return 0; 438 } 439 440 static int __maybe_unused omap_rng_resume(struct device *dev) 441 { 442 struct omap_rng_dev *priv = dev_get_drvdata(dev); 443 int ret; 444 445 ret = pm_runtime_get_sync(dev); 446 if (ret < 0) { 447 dev_err(dev, "Failed to runtime_get device: %d\n", ret); 448 pm_runtime_put_noidle(dev); 449 return ret; 450 } 451 452 priv->pdata->init(priv); 453 454 return 0; 455 } 456 457 static SIMPLE_DEV_PM_OPS(omap_rng_pm, omap_rng_suspend, omap_rng_resume); 458 459 static struct platform_driver omap_rng_driver = { 460 .driver = { 461 .name = "omap_rng", 462 .pm = &omap_rng_pm, 463 .of_match_table = of_match_ptr(omap_rng_of_match), 464 }, 465 .probe = omap_rng_probe, 466 .remove = omap_rng_remove, 467 }; 468 469 module_platform_driver(omap_rng_driver); 470 MODULE_ALIAS("platform:omap_rng"); 471 MODULE_AUTHOR("Deepak Saxena (and others)"); 472 MODULE_LICENSE("GPL"); 473