1 /*
2  * drivers/char/hw_random/omap-rng.c
3  *
4  * RNG driver for TI OMAP CPU family
5  *
6  * Author: Deepak Saxena <dsaxena@plexity.net>
7  *
8  * Copyright 2005 (c) MontaVista Software, Inc.
9  *
10  * Mostly based on original driver:
11  *
12  * Copyright (C) 2005 Nokia Corporation
13  * Author: Juha Yrj��<juha.yrjola@nokia.com>
14  *
15  * This file is licensed under  the terms of the GNU General Public
16  * License version 2. This program is licensed "as is" without any
17  * warranty of any kind, whether express or implied.
18  *
19  * TODO:
20  *
21  * - Make status updated be interrupt driven so we don't poll
22  *
23  */
24 
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/random.h>
28 #include <linux/clk.h>
29 #include <linux/err.h>
30 #include <linux/platform_device.h>
31 #include <linux/hw_random.h>
32 
33 #include <asm/io.h>
34 
35 #define RNG_OUT_REG		0x00		/* Output register */
36 #define RNG_STAT_REG		0x04		/* Status register
37 							[0] = STAT_BUSY */
38 #define RNG_ALARM_REG		0x24		/* Alarm register
39 							[7:0] = ALARM_COUNTER */
40 #define RNG_CONFIG_REG		0x28		/* Configuration register
41 							[11:6] = RESET_COUNT
42 							[5:3]  = RING2_DELAY
43 							[2:0]  = RING1_DELAY */
44 #define RNG_REV_REG		0x3c		/* Revision register
45 							[7:0] = REV_NB */
46 #define RNG_MASK_REG		0x40		/* Mask and reset register
47 							[2] = IT_EN
48 							[1] = SOFTRESET
49 							[0] = AUTOIDLE */
50 #define RNG_SYSSTATUS		0x44		/* System status
51 							[0] = RESETDONE */
52 
53 static void __iomem *rng_base;
54 static struct clk *rng_ick;
55 static struct platform_device *rng_dev;
56 
57 static u32 omap_rng_read_reg(int reg)
58 {
59 	return __raw_readl(rng_base + reg);
60 }
61 
62 static void omap_rng_write_reg(int reg, u32 val)
63 {
64 	__raw_writel(val, rng_base + reg);
65 }
66 
67 /* REVISIT: Does the status bit really work on 16xx? */
68 static int omap_rng_data_present(struct hwrng *rng)
69 {
70 	return omap_rng_read_reg(RNG_STAT_REG) ? 0 : 1;
71 }
72 
73 static int omap_rng_data_read(struct hwrng *rng, u32 *data)
74 {
75 	*data = omap_rng_read_reg(RNG_OUT_REG);
76 
77 	return 4;
78 }
79 
80 static struct hwrng omap_rng_ops = {
81 	.name		= "omap",
82 	.data_present	= omap_rng_data_present,
83 	.data_read	= omap_rng_data_read,
84 };
85 
86 static int __init omap_rng_probe(struct platform_device *pdev)
87 {
88 	struct resource *res, *mem;
89 	int ret;
90 
91 	/*
92 	 * A bit ugly, and it will never actually happen but there can
93 	 * be only one RNG and this catches any bork
94 	 */
95 	BUG_ON(rng_dev);
96 
97 	if (cpu_is_omap24xx()) {
98 		rng_ick = clk_get(NULL, "rng_ick");
99 		if (IS_ERR(rng_ick)) {
100 			dev_err(&pdev->dev, "Could not get rng_ick\n");
101 			ret = PTR_ERR(rng_ick);
102 			return ret;
103 		} else
104 			clk_enable(rng_ick);
105 	}
106 
107 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
108 
109 	if (!res)
110 		return -ENOENT;
111 
112 	mem = request_mem_region(res->start, res->end - res->start + 1,
113 				 pdev->name);
114 	if (mem == NULL)
115 		return -EBUSY;
116 
117 	dev_set_drvdata(&pdev->dev, mem);
118 	rng_base = (u32 __iomem *)io_p2v(res->start);
119 
120 	ret = hwrng_register(&omap_rng_ops);
121 	if (ret) {
122 		release_resource(mem);
123 		rng_base = NULL;
124 		return ret;
125 	}
126 
127 	dev_info(&pdev->dev, "OMAP Random Number Generator ver. %02x\n",
128 		omap_rng_read_reg(RNG_REV_REG));
129 	omap_rng_write_reg(RNG_MASK_REG, 0x1);
130 
131 	rng_dev = pdev;
132 
133 	return 0;
134 }
135 
136 static int __exit omap_rng_remove(struct platform_device *pdev)
137 {
138 	struct resource *mem = dev_get_drvdata(&pdev->dev);
139 
140 	hwrng_unregister(&omap_rng_ops);
141 
142 	omap_rng_write_reg(RNG_MASK_REG, 0x0);
143 
144 	if (cpu_is_omap24xx()) {
145 		clk_disable(rng_ick);
146 		clk_put(rng_ick);
147 	}
148 
149 	release_resource(mem);
150 	rng_base = NULL;
151 
152 	return 0;
153 }
154 
155 #ifdef CONFIG_PM
156 
157 static int omap_rng_suspend(struct platform_device *pdev, pm_message_t message)
158 {
159 	omap_rng_write_reg(RNG_MASK_REG, 0x0);
160 	return 0;
161 }
162 
163 static int omap_rng_resume(struct platform_device *pdev)
164 {
165 	omap_rng_write_reg(RNG_MASK_REG, 0x1);
166 	return 0;
167 }
168 
169 #else
170 
171 #define	omap_rng_suspend	NULL
172 #define	omap_rng_resume		NULL
173 
174 #endif
175 
176 
177 static struct platform_driver omap_rng_driver = {
178 	.driver = {
179 		.name		= "omap_rng",
180 		.owner		= THIS_MODULE,
181 	},
182 	.probe		= omap_rng_probe,
183 	.remove		= __exit_p(omap_rng_remove),
184 	.suspend	= omap_rng_suspend,
185 	.resume		= omap_rng_resume
186 };
187 
188 static int __init omap_rng_init(void)
189 {
190 	if (!cpu_is_omap16xx() && !cpu_is_omap24xx())
191 		return -ENODEV;
192 
193 	return platform_driver_register(&omap_rng_driver);
194 }
195 
196 static void __exit omap_rng_exit(void)
197 {
198 	platform_driver_unregister(&omap_rng_driver);
199 }
200 
201 module_init(omap_rng_init);
202 module_exit(omap_rng_exit);
203 
204 MODULE_AUTHOR("Deepak Saxena (and others)");
205 MODULE_LICENSE("GPL");
206