1 /*
2  * drivers/char/hw_random/omap-rng.c
3  *
4  * RNG driver for TI OMAP CPU family
5  *
6  * Author: Deepak Saxena <dsaxena@plexity.net>
7  *
8  * Copyright 2005 (c) MontaVista Software, Inc.
9  *
10  * Mostly based on original driver:
11  *
12  * Copyright (C) 2005 Nokia Corporation
13  * Author: Juha Yrjölä <juha.yrjola@nokia.com>
14  *
15  * This file is licensed under  the terms of the GNU General Public
16  * License version 2. This program is licensed "as is" without any
17  * warranty of any kind, whether express or implied.
18  *
19  * TODO:
20  *
21  * - Make status updated be interrupt driven so we don't poll
22  *
23  */
24 
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/random.h>
28 #include <linux/clk.h>
29 #include <linux/err.h>
30 #include <linux/platform_device.h>
31 #include <linux/hw_random.h>
32 #include <linux/delay.h>
33 
34 #include <asm/io.h>
35 
36 #define RNG_OUT_REG		0x00		/* Output register */
37 #define RNG_STAT_REG		0x04		/* Status register
38 							[0] = STAT_BUSY */
39 #define RNG_ALARM_REG		0x24		/* Alarm register
40 							[7:0] = ALARM_COUNTER */
41 #define RNG_CONFIG_REG		0x28		/* Configuration register
42 							[11:6] = RESET_COUNT
43 							[5:3]  = RING2_DELAY
44 							[2:0]  = RING1_DELAY */
45 #define RNG_REV_REG		0x3c		/* Revision register
46 							[7:0] = REV_NB */
47 #define RNG_MASK_REG		0x40		/* Mask and reset register
48 							[2] = IT_EN
49 							[1] = SOFTRESET
50 							[0] = AUTOIDLE */
51 #define RNG_SYSSTATUS		0x44		/* System status
52 							[0] = RESETDONE */
53 
54 static void __iomem *rng_base;
55 static struct clk *rng_ick;
56 static struct platform_device *rng_dev;
57 
58 static u32 omap_rng_read_reg(int reg)
59 {
60 	return __raw_readl(rng_base + reg);
61 }
62 
63 static void omap_rng_write_reg(int reg, u32 val)
64 {
65 	__raw_writel(val, rng_base + reg);
66 }
67 
68 /* REVISIT: Does the status bit really work on 16xx? */
69 static int omap_rng_data_present(struct hwrng *rng, int wait)
70 {
71 	int data, i;
72 
73 	for (i = 0; i < 20; i++) {
74 		data = omap_rng_read_reg(RNG_STAT_REG) ? 0 : 1;
75 		if (data || !wait)
76 			break;
77 		udelay(10);
78 	}
79 	return data;
80 }
81 
82 static int omap_rng_data_read(struct hwrng *rng, u32 *data)
83 {
84 	*data = omap_rng_read_reg(RNG_OUT_REG);
85 
86 	return 4;
87 }
88 
89 static struct hwrng omap_rng_ops = {
90 	.name		= "omap",
91 	.data_present	= omap_rng_data_present,
92 	.data_read	= omap_rng_data_read,
93 };
94 
95 static int __init omap_rng_probe(struct platform_device *pdev)
96 {
97 	struct resource *res, *mem;
98 	int ret;
99 
100 	/*
101 	 * A bit ugly, and it will never actually happen but there can
102 	 * be only one RNG and this catches any bork
103 	 */
104 	BUG_ON(rng_dev);
105 
106 	if (cpu_is_omap24xx()) {
107 		rng_ick = clk_get(NULL, "rng_ick");
108 		if (IS_ERR(rng_ick)) {
109 			dev_err(&pdev->dev, "Could not get rng_ick\n");
110 			ret = PTR_ERR(rng_ick);
111 			return ret;
112 		} else
113 			clk_enable(rng_ick);
114 	}
115 
116 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
117 
118 	if (!res)
119 		return -ENOENT;
120 
121 	mem = request_mem_region(res->start, res->end - res->start + 1,
122 				 pdev->name);
123 	if (mem == NULL)
124 		return -EBUSY;
125 
126 	dev_set_drvdata(&pdev->dev, mem);
127 	rng_base = (u32 __iomem *)io_p2v(res->start);
128 
129 	ret = hwrng_register(&omap_rng_ops);
130 	if (ret) {
131 		release_resource(mem);
132 		rng_base = NULL;
133 		return ret;
134 	}
135 
136 	dev_info(&pdev->dev, "OMAP Random Number Generator ver. %02x\n",
137 		omap_rng_read_reg(RNG_REV_REG));
138 	omap_rng_write_reg(RNG_MASK_REG, 0x1);
139 
140 	rng_dev = pdev;
141 
142 	return 0;
143 }
144 
145 static int __exit omap_rng_remove(struct platform_device *pdev)
146 {
147 	struct resource *mem = dev_get_drvdata(&pdev->dev);
148 
149 	hwrng_unregister(&omap_rng_ops);
150 
151 	omap_rng_write_reg(RNG_MASK_REG, 0x0);
152 
153 	if (cpu_is_omap24xx()) {
154 		clk_disable(rng_ick);
155 		clk_put(rng_ick);
156 	}
157 
158 	release_resource(mem);
159 	rng_base = NULL;
160 
161 	return 0;
162 }
163 
164 #ifdef CONFIG_PM
165 
166 static int omap_rng_suspend(struct platform_device *pdev, pm_message_t message)
167 {
168 	omap_rng_write_reg(RNG_MASK_REG, 0x0);
169 	return 0;
170 }
171 
172 static int omap_rng_resume(struct platform_device *pdev)
173 {
174 	omap_rng_write_reg(RNG_MASK_REG, 0x1);
175 	return 0;
176 }
177 
178 #else
179 
180 #define	omap_rng_suspend	NULL
181 #define	omap_rng_resume		NULL
182 
183 #endif
184 
185 
186 static struct platform_driver omap_rng_driver = {
187 	.driver = {
188 		.name		= "omap_rng",
189 		.owner		= THIS_MODULE,
190 	},
191 	.probe		= omap_rng_probe,
192 	.remove		= __exit_p(omap_rng_remove),
193 	.suspend	= omap_rng_suspend,
194 	.resume		= omap_rng_resume
195 };
196 
197 static int __init omap_rng_init(void)
198 {
199 	if (!cpu_is_omap16xx() && !cpu_is_omap24xx())
200 		return -ENODEV;
201 
202 	return platform_driver_register(&omap_rng_driver);
203 }
204 
205 static void __exit omap_rng_exit(void)
206 {
207 	platform_driver_unregister(&omap_rng_driver);
208 }
209 
210 module_init(omap_rng_init);
211 module_exit(omap_rng_exit);
212 
213 MODULE_AUTHOR("Deepak Saxena (and others)");
214 MODULE_LICENSE("GPL");
215