1 /*
2  * omap-rng.c - RNG driver for TI OMAP CPU family
3  *
4  * Author: Deepak Saxena <dsaxena@plexity.net>
5  *
6  * Copyright 2005 (c) MontaVista Software, Inc.
7  *
8  * Mostly based on original driver:
9  *
10  * Copyright (C) 2005 Nokia Corporation
11  * Author: Juha Yrjölä <juha.yrjola@nokia.com>
12  *
13  * This file is licensed under  the terms of the GNU General Public
14  * License version 2. This program is licensed "as is" without any
15  * warranty of any kind, whether express or implied.
16  */
17 
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/random.h>
21 #include <linux/clk.h>
22 #include <linux/err.h>
23 #include <linux/platform_device.h>
24 #include <linux/hw_random.h>
25 #include <linux/delay.h>
26 
27 #include <asm/io.h>
28 
29 #define RNG_OUT_REG		0x00		/* Output register */
30 #define RNG_STAT_REG		0x04		/* Status register
31 							[0] = STAT_BUSY */
32 #define RNG_ALARM_REG		0x24		/* Alarm register
33 							[7:0] = ALARM_COUNTER */
34 #define RNG_CONFIG_REG		0x28		/* Configuration register
35 							[11:6] = RESET_COUNT
36 							[5:3]  = RING2_DELAY
37 							[2:0]  = RING1_DELAY */
38 #define RNG_REV_REG		0x3c		/* Revision register
39 							[7:0] = REV_NB */
40 #define RNG_MASK_REG		0x40		/* Mask and reset register
41 							[2] = IT_EN
42 							[1] = SOFTRESET
43 							[0] = AUTOIDLE */
44 #define RNG_SYSSTATUS		0x44		/* System status
45 							[0] = RESETDONE */
46 
47 static void __iomem *rng_base;
48 static struct clk *rng_ick;
49 static struct platform_device *rng_dev;
50 
51 static inline u32 omap_rng_read_reg(int reg)
52 {
53 	return __raw_readl(rng_base + reg);
54 }
55 
56 static inline void omap_rng_write_reg(int reg, u32 val)
57 {
58 	__raw_writel(val, rng_base + reg);
59 }
60 
61 static int omap_rng_data_present(struct hwrng *rng, int wait)
62 {
63 	int data, i;
64 
65 	for (i = 0; i < 20; i++) {
66 		data = omap_rng_read_reg(RNG_STAT_REG) ? 0 : 1;
67 		if (data || !wait)
68 			break;
69 		/* RNG produces data fast enough (2+ MBit/sec, even
70 		 * during "rngtest" loads, that these delays don't
71 		 * seem to trigger.  We *could* use the RNG IRQ, but
72 		 * that'd be higher overhead ... so why bother?
73 		 */
74 		udelay(10);
75 	}
76 	return data;
77 }
78 
79 static int omap_rng_data_read(struct hwrng *rng, u32 *data)
80 {
81 	*data = omap_rng_read_reg(RNG_OUT_REG);
82 
83 	return 4;
84 }
85 
86 static struct hwrng omap_rng_ops = {
87 	.name		= "omap",
88 	.data_present	= omap_rng_data_present,
89 	.data_read	= omap_rng_data_read,
90 };
91 
92 static int __init omap_rng_probe(struct platform_device *pdev)
93 {
94 	struct resource *res, *mem;
95 	int ret;
96 
97 	/*
98 	 * A bit ugly, and it will never actually happen but there can
99 	 * be only one RNG and this catches any bork
100 	 */
101 	if (rng_dev)
102 		return -EBUSY;
103 
104 	if (cpu_is_omap24xx()) {
105 		rng_ick = clk_get(NULL, "rng_ick");
106 		if (IS_ERR(rng_ick)) {
107 			dev_err(&pdev->dev, "Could not get rng_ick\n");
108 			ret = PTR_ERR(rng_ick);
109 			return ret;
110 		} else
111 			clk_enable(rng_ick);
112 	}
113 
114 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
115 
116 	if (!res)
117 		return -ENOENT;
118 
119 	mem = request_mem_region(res->start, res->end - res->start + 1,
120 				 pdev->name);
121 	if (mem == NULL)
122 		return -EBUSY;
123 
124 	dev_set_drvdata(&pdev->dev, mem);
125 	rng_base = (u32 __force __iomem *)io_p2v(res->start);
126 
127 	ret = hwrng_register(&omap_rng_ops);
128 	if (ret) {
129 		release_resource(mem);
130 		rng_base = NULL;
131 		return ret;
132 	}
133 
134 	dev_info(&pdev->dev, "OMAP Random Number Generator ver. %02x\n",
135 		omap_rng_read_reg(RNG_REV_REG));
136 	omap_rng_write_reg(RNG_MASK_REG, 0x1);
137 
138 	rng_dev = pdev;
139 
140 	return 0;
141 }
142 
143 static int __exit omap_rng_remove(struct platform_device *pdev)
144 {
145 	struct resource *mem = dev_get_drvdata(&pdev->dev);
146 
147 	hwrng_unregister(&omap_rng_ops);
148 
149 	omap_rng_write_reg(RNG_MASK_REG, 0x0);
150 
151 	if (cpu_is_omap24xx()) {
152 		clk_disable(rng_ick);
153 		clk_put(rng_ick);
154 	}
155 
156 	release_resource(mem);
157 	rng_base = NULL;
158 
159 	return 0;
160 }
161 
162 #ifdef CONFIG_PM
163 
164 static int omap_rng_suspend(struct platform_device *pdev, pm_message_t message)
165 {
166 	omap_rng_write_reg(RNG_MASK_REG, 0x0);
167 	return 0;
168 }
169 
170 static int omap_rng_resume(struct platform_device *pdev)
171 {
172 	omap_rng_write_reg(RNG_MASK_REG, 0x1);
173 	return 0;
174 }
175 
176 #else
177 
178 #define	omap_rng_suspend	NULL
179 #define	omap_rng_resume		NULL
180 
181 #endif
182 
183 /* work with hotplug and coldplug */
184 MODULE_ALIAS("platform:omap_rng");
185 
186 static struct platform_driver omap_rng_driver = {
187 	.driver = {
188 		.name		= "omap_rng",
189 		.owner		= THIS_MODULE,
190 	},
191 	.probe		= omap_rng_probe,
192 	.remove		= __exit_p(omap_rng_remove),
193 	.suspend	= omap_rng_suspend,
194 	.resume		= omap_rng_resume
195 };
196 
197 static int __init omap_rng_init(void)
198 {
199 	if (!cpu_is_omap16xx() && !cpu_is_omap24xx())
200 		return -ENODEV;
201 
202 	return platform_driver_register(&omap_rng_driver);
203 }
204 
205 static void __exit omap_rng_exit(void)
206 {
207 	platform_driver_unregister(&omap_rng_driver);
208 }
209 
210 module_init(omap_rng_init);
211 module_exit(omap_rng_exit);
212 
213 MODULE_AUTHOR("Deepak Saxena (and others)");
214 MODULE_LICENSE("GPL");
215