1 /* n2-drv.c: Niagara-2 RNG driver. 2 * 3 * Copyright (C) 2008, 2011 David S. Miller <davem@davemloft.net> 4 */ 5 6 #include <linux/kernel.h> 7 #include <linux/module.h> 8 #include <linux/types.h> 9 #include <linux/delay.h> 10 #include <linux/slab.h> 11 #include <linux/workqueue.h> 12 #include <linux/preempt.h> 13 #include <linux/hw_random.h> 14 15 #include <linux/of.h> 16 #include <linux/of_device.h> 17 18 #include <asm/hypervisor.h> 19 20 #include "n2rng.h" 21 22 #define DRV_MODULE_NAME "n2rng" 23 #define PFX DRV_MODULE_NAME ": " 24 #define DRV_MODULE_VERSION "0.2" 25 #define DRV_MODULE_RELDATE "July 27, 2011" 26 27 static char version[] = 28 DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n"; 29 30 MODULE_AUTHOR("David S. Miller (davem@davemloft.net)"); 31 MODULE_DESCRIPTION("Niagara2 RNG driver"); 32 MODULE_LICENSE("GPL"); 33 MODULE_VERSION(DRV_MODULE_VERSION); 34 35 /* The Niagara2 RNG provides a 64-bit read-only random number 36 * register, plus a control register. Access to the RNG is 37 * virtualized through the hypervisor so that both guests and control 38 * nodes can access the device. 39 * 40 * The entropy source consists of raw entropy sources, each 41 * constructed from a voltage controlled oscillator whose phase is 42 * jittered by thermal noise sources. 43 * 44 * The oscillator in each of the three raw entropy sources run at 45 * different frequencies. Normally, all three generator outputs are 46 * gathered, xored together, and fed into a CRC circuit, the output of 47 * which is the 64-bit read-only register. 48 * 49 * Some time is necessary for all the necessary entropy to build up 50 * such that a full 64-bits of entropy are available in the register. 51 * In normal operating mode (RNG_CTL_LFSR is set), the chip implements 52 * an interlock which blocks register reads until sufficient entropy 53 * is available. 54 * 55 * A control register is provided for adjusting various aspects of RNG 56 * operation, and to enable diagnostic modes. Each of the three raw 57 * entropy sources has an enable bit (RNG_CTL_ES{1,2,3}). Also 58 * provided are fields for controlling the minimum time in cycles 59 * between read accesses to the register (RNG_CTL_WAIT, this controls 60 * the interlock described in the previous paragraph). 61 * 62 * The standard setting is to have the mode bit (RNG_CTL_LFSR) set, 63 * all three entropy sources enabled, and the interlock time set 64 * appropriately. 65 * 66 * The CRC polynomial used by the chip is: 67 * 68 * P(X) = x64 + x61 + x57 + x56 + x52 + x51 + x50 + x48 + x47 + x46 + 69 * x43 + x42 + x41 + x39 + x38 + x37 + x35 + x32 + x28 + x25 + 70 * x22 + x21 + x17 + x15 + x13 + x12 + x11 + x7 + x5 + x + 1 71 * 72 * The RNG_CTL_VCO value of each noise cell must be programmed 73 * separately. This is why 4 control register values must be provided 74 * to the hypervisor. During a write, the hypervisor writes them all, 75 * one at a time, to the actual RNG_CTL register. The first three 76 * values are used to setup the desired RNG_CTL_VCO for each entropy 77 * source, for example: 78 * 79 * control 0: (1 << RNG_CTL_VCO_SHIFT) | RNG_CTL_ES1 80 * control 1: (2 << RNG_CTL_VCO_SHIFT) | RNG_CTL_ES2 81 * control 2: (3 << RNG_CTL_VCO_SHIFT) | RNG_CTL_ES3 82 * 83 * And then the fourth value sets the final chip state and enables 84 * desired. 85 */ 86 87 static int n2rng_hv_err_trans(unsigned long hv_err) 88 { 89 switch (hv_err) { 90 case HV_EOK: 91 return 0; 92 case HV_EWOULDBLOCK: 93 return -EAGAIN; 94 case HV_ENOACCESS: 95 return -EPERM; 96 case HV_EIO: 97 return -EIO; 98 case HV_EBUSY: 99 return -EBUSY; 100 case HV_EBADALIGN: 101 case HV_ENORADDR: 102 return -EFAULT; 103 default: 104 return -EINVAL; 105 } 106 } 107 108 static unsigned long n2rng_generic_read_control_v2(unsigned long ra, 109 unsigned long unit) 110 { 111 unsigned long hv_err, state, ticks, watchdog_delta, watchdog_status; 112 int block = 0, busy = 0; 113 114 while (1) { 115 hv_err = sun4v_rng_ctl_read_v2(ra, unit, &state, 116 &ticks, 117 &watchdog_delta, 118 &watchdog_status); 119 if (hv_err == HV_EOK) 120 break; 121 122 if (hv_err == HV_EBUSY) { 123 if (++busy >= N2RNG_BUSY_LIMIT) 124 break; 125 126 udelay(1); 127 } else if (hv_err == HV_EWOULDBLOCK) { 128 if (++block >= N2RNG_BLOCK_LIMIT) 129 break; 130 131 __delay(ticks); 132 } else 133 break; 134 } 135 136 return hv_err; 137 } 138 139 /* In multi-socket situations, the hypervisor might need to 140 * queue up the RNG control register write if it's for a unit 141 * that is on a cpu socket other than the one we are executing on. 142 * 143 * We poll here waiting for a successful read of that control 144 * register to make sure the write has been actually performed. 145 */ 146 static unsigned long n2rng_control_settle_v2(struct n2rng *np, int unit) 147 { 148 unsigned long ra = __pa(&np->scratch_control[0]); 149 150 return n2rng_generic_read_control_v2(ra, unit); 151 } 152 153 static unsigned long n2rng_write_ctl_one(struct n2rng *np, int unit, 154 unsigned long state, 155 unsigned long control_ra, 156 unsigned long watchdog_timeout, 157 unsigned long *ticks) 158 { 159 unsigned long hv_err; 160 161 if (np->hvapi_major == 1) { 162 hv_err = sun4v_rng_ctl_write_v1(control_ra, state, 163 watchdog_timeout, ticks); 164 } else { 165 hv_err = sun4v_rng_ctl_write_v2(control_ra, state, 166 watchdog_timeout, unit); 167 if (hv_err == HV_EOK) 168 hv_err = n2rng_control_settle_v2(np, unit); 169 *ticks = N2RNG_ACCUM_CYCLES_DEFAULT; 170 } 171 172 return hv_err; 173 } 174 175 static int n2rng_generic_read_data(unsigned long data_ra) 176 { 177 unsigned long ticks, hv_err; 178 int block = 0, hcheck = 0; 179 180 while (1) { 181 hv_err = sun4v_rng_data_read(data_ra, &ticks); 182 if (hv_err == HV_EOK) 183 return 0; 184 185 if (hv_err == HV_EWOULDBLOCK) { 186 if (++block >= N2RNG_BLOCK_LIMIT) 187 return -EWOULDBLOCK; 188 __delay(ticks); 189 } else if (hv_err == HV_ENOACCESS) { 190 return -EPERM; 191 } else if (hv_err == HV_EIO) { 192 if (++hcheck >= N2RNG_HCHECK_LIMIT) 193 return -EIO; 194 udelay(10000); 195 } else 196 return -ENODEV; 197 } 198 } 199 200 static unsigned long n2rng_read_diag_data_one(struct n2rng *np, 201 unsigned long unit, 202 unsigned long data_ra, 203 unsigned long data_len, 204 unsigned long *ticks) 205 { 206 unsigned long hv_err; 207 208 if (np->hvapi_major == 1) { 209 hv_err = sun4v_rng_data_read_diag_v1(data_ra, data_len, ticks); 210 } else { 211 hv_err = sun4v_rng_data_read_diag_v2(data_ra, data_len, 212 unit, ticks); 213 if (!*ticks) 214 *ticks = N2RNG_ACCUM_CYCLES_DEFAULT; 215 } 216 return hv_err; 217 } 218 219 static int n2rng_generic_read_diag_data(struct n2rng *np, 220 unsigned long unit, 221 unsigned long data_ra, 222 unsigned long data_len) 223 { 224 unsigned long ticks, hv_err; 225 int block = 0; 226 227 while (1) { 228 hv_err = n2rng_read_diag_data_one(np, unit, 229 data_ra, data_len, 230 &ticks); 231 if (hv_err == HV_EOK) 232 return 0; 233 234 if (hv_err == HV_EWOULDBLOCK) { 235 if (++block >= N2RNG_BLOCK_LIMIT) 236 return -EWOULDBLOCK; 237 __delay(ticks); 238 } else if (hv_err == HV_ENOACCESS) { 239 return -EPERM; 240 } else if (hv_err == HV_EIO) { 241 return -EIO; 242 } else 243 return -ENODEV; 244 } 245 } 246 247 248 static int n2rng_generic_write_control(struct n2rng *np, 249 unsigned long control_ra, 250 unsigned long unit, 251 unsigned long state) 252 { 253 unsigned long hv_err, ticks; 254 int block = 0, busy = 0; 255 256 while (1) { 257 hv_err = n2rng_write_ctl_one(np, unit, state, control_ra, 258 np->wd_timeo, &ticks); 259 if (hv_err == HV_EOK) 260 return 0; 261 262 if (hv_err == HV_EWOULDBLOCK) { 263 if (++block >= N2RNG_BLOCK_LIMIT) 264 return -EWOULDBLOCK; 265 __delay(ticks); 266 } else if (hv_err == HV_EBUSY) { 267 if (++busy >= N2RNG_BUSY_LIMIT) 268 return -EBUSY; 269 udelay(1); 270 } else 271 return -ENODEV; 272 } 273 } 274 275 /* Just try to see if we can successfully access the control register 276 * of the RNG on the domain on which we are currently executing. 277 */ 278 static int n2rng_try_read_ctl(struct n2rng *np) 279 { 280 unsigned long hv_err; 281 unsigned long x; 282 283 if (np->hvapi_major == 1) { 284 hv_err = sun4v_rng_get_diag_ctl(); 285 } else { 286 /* We purposefully give invalid arguments, HV_NOACCESS 287 * is higher priority than the errors we'd get from 288 * these other cases, and that's the error we are 289 * truly interested in. 290 */ 291 hv_err = sun4v_rng_ctl_read_v2(0UL, ~0UL, &x, &x, &x, &x); 292 switch (hv_err) { 293 case HV_EWOULDBLOCK: 294 case HV_ENOACCESS: 295 break; 296 default: 297 hv_err = HV_EOK; 298 break; 299 } 300 } 301 302 return n2rng_hv_err_trans(hv_err); 303 } 304 305 #define CONTROL_DEFAULT_BASE \ 306 ((2 << RNG_CTL_ASEL_SHIFT) | \ 307 (N2RNG_ACCUM_CYCLES_DEFAULT << RNG_CTL_WAIT_SHIFT) | \ 308 RNG_CTL_LFSR) 309 310 #define CONTROL_DEFAULT_0 \ 311 (CONTROL_DEFAULT_BASE | \ 312 (1 << RNG_CTL_VCO_SHIFT) | \ 313 RNG_CTL_ES1) 314 #define CONTROL_DEFAULT_1 \ 315 (CONTROL_DEFAULT_BASE | \ 316 (2 << RNG_CTL_VCO_SHIFT) | \ 317 RNG_CTL_ES2) 318 #define CONTROL_DEFAULT_2 \ 319 (CONTROL_DEFAULT_BASE | \ 320 (3 << RNG_CTL_VCO_SHIFT) | \ 321 RNG_CTL_ES3) 322 #define CONTROL_DEFAULT_3 \ 323 (CONTROL_DEFAULT_BASE | \ 324 RNG_CTL_ES1 | RNG_CTL_ES2 | RNG_CTL_ES3) 325 326 static void n2rng_control_swstate_init(struct n2rng *np) 327 { 328 int i; 329 330 np->flags |= N2RNG_FLAG_CONTROL; 331 332 np->health_check_sec = N2RNG_HEALTH_CHECK_SEC_DEFAULT; 333 np->accum_cycles = N2RNG_ACCUM_CYCLES_DEFAULT; 334 np->wd_timeo = N2RNG_WD_TIMEO_DEFAULT; 335 336 for (i = 0; i < np->num_units; i++) { 337 struct n2rng_unit *up = &np->units[i]; 338 339 up->control[0] = CONTROL_DEFAULT_0; 340 up->control[1] = CONTROL_DEFAULT_1; 341 up->control[2] = CONTROL_DEFAULT_2; 342 up->control[3] = CONTROL_DEFAULT_3; 343 } 344 345 np->hv_state = HV_RNG_STATE_UNCONFIGURED; 346 } 347 348 static int n2rng_grab_diag_control(struct n2rng *np) 349 { 350 int i, busy_count, err = -ENODEV; 351 352 busy_count = 0; 353 for (i = 0; i < 100; i++) { 354 err = n2rng_try_read_ctl(np); 355 if (err != -EAGAIN) 356 break; 357 358 if (++busy_count > 100) { 359 dev_err(&np->op->dev, 360 "Grab diag control timeout.\n"); 361 return -ENODEV; 362 } 363 364 udelay(1); 365 } 366 367 return err; 368 } 369 370 static int n2rng_init_control(struct n2rng *np) 371 { 372 int err = n2rng_grab_diag_control(np); 373 374 /* Not in the control domain, that's OK we are only a consumer 375 * of the RNG data, we don't setup and program it. 376 */ 377 if (err == -EPERM) 378 return 0; 379 if (err) 380 return err; 381 382 n2rng_control_swstate_init(np); 383 384 return 0; 385 } 386 387 static int n2rng_data_read(struct hwrng *rng, u32 *data) 388 { 389 struct n2rng *np = (struct n2rng *) rng->priv; 390 unsigned long ra = __pa(&np->test_data); 391 int len; 392 393 if (!(np->flags & N2RNG_FLAG_READY)) { 394 len = 0; 395 } else if (np->flags & N2RNG_FLAG_BUFFER_VALID) { 396 np->flags &= ~N2RNG_FLAG_BUFFER_VALID; 397 *data = np->buffer; 398 len = 4; 399 } else { 400 int err = n2rng_generic_read_data(ra); 401 if (!err) { 402 np->buffer = np->test_data >> 32; 403 *data = np->test_data & 0xffffffff; 404 len = 4; 405 } else { 406 dev_err(&np->op->dev, "RNG error, restesting\n"); 407 np->flags &= ~N2RNG_FLAG_READY; 408 if (!(np->flags & N2RNG_FLAG_SHUTDOWN)) 409 schedule_delayed_work(&np->work, 0); 410 len = 0; 411 } 412 } 413 414 return len; 415 } 416 417 /* On a guest node, just make sure we can read random data properly. 418 * If a control node reboots or reloads it's n2rng driver, this won't 419 * work during that time. So we have to keep probing until the device 420 * becomes usable. 421 */ 422 static int n2rng_guest_check(struct n2rng *np) 423 { 424 unsigned long ra = __pa(&np->test_data); 425 426 return n2rng_generic_read_data(ra); 427 } 428 429 static int n2rng_entropy_diag_read(struct n2rng *np, unsigned long unit, 430 u64 *pre_control, u64 pre_state, 431 u64 *buffer, unsigned long buf_len, 432 u64 *post_control, u64 post_state) 433 { 434 unsigned long post_ctl_ra = __pa(post_control); 435 unsigned long pre_ctl_ra = __pa(pre_control); 436 unsigned long buffer_ra = __pa(buffer); 437 int err; 438 439 err = n2rng_generic_write_control(np, pre_ctl_ra, unit, pre_state); 440 if (err) 441 return err; 442 443 err = n2rng_generic_read_diag_data(np, unit, 444 buffer_ra, buf_len); 445 446 (void) n2rng_generic_write_control(np, post_ctl_ra, unit, 447 post_state); 448 449 return err; 450 } 451 452 static u64 advance_polynomial(u64 poly, u64 val, int count) 453 { 454 int i; 455 456 for (i = 0; i < count; i++) { 457 int highbit_set = ((s64)val < 0); 458 459 val <<= 1; 460 if (highbit_set) 461 val ^= poly; 462 } 463 464 return val; 465 } 466 467 static int n2rng_test_buffer_find(struct n2rng *np, u64 val) 468 { 469 int i, count = 0; 470 471 /* Purposefully skip over the first word. */ 472 for (i = 1; i < SELFTEST_BUFFER_WORDS; i++) { 473 if (np->test_buffer[i] == val) 474 count++; 475 } 476 return count; 477 } 478 479 static void n2rng_dump_test_buffer(struct n2rng *np) 480 { 481 int i; 482 483 for (i = 0; i < SELFTEST_BUFFER_WORDS; i++) 484 dev_err(&np->op->dev, "Test buffer slot %d [0x%016llx]\n", 485 i, np->test_buffer[i]); 486 } 487 488 static int n2rng_check_selftest_buffer(struct n2rng *np, unsigned long unit) 489 { 490 u64 val = SELFTEST_VAL; 491 int err, matches, limit; 492 493 matches = 0; 494 for (limit = 0; limit < SELFTEST_LOOPS_MAX; limit++) { 495 matches += n2rng_test_buffer_find(np, val); 496 if (matches >= SELFTEST_MATCH_GOAL) 497 break; 498 val = advance_polynomial(SELFTEST_POLY, val, 1); 499 } 500 501 err = 0; 502 if (limit >= SELFTEST_LOOPS_MAX) { 503 err = -ENODEV; 504 dev_err(&np->op->dev, "Selftest failed on unit %lu\n", unit); 505 n2rng_dump_test_buffer(np); 506 } else 507 dev_info(&np->op->dev, "Selftest passed on unit %lu\n", unit); 508 509 return err; 510 } 511 512 static int n2rng_control_selftest(struct n2rng *np, unsigned long unit) 513 { 514 int err; 515 516 np->test_control[0] = (0x2 << RNG_CTL_ASEL_SHIFT); 517 np->test_control[1] = (0x2 << RNG_CTL_ASEL_SHIFT); 518 np->test_control[2] = (0x2 << RNG_CTL_ASEL_SHIFT); 519 np->test_control[3] = ((0x2 << RNG_CTL_ASEL_SHIFT) | 520 RNG_CTL_LFSR | 521 ((SELFTEST_TICKS - 2) << RNG_CTL_WAIT_SHIFT)); 522 523 524 err = n2rng_entropy_diag_read(np, unit, np->test_control, 525 HV_RNG_STATE_HEALTHCHECK, 526 np->test_buffer, 527 sizeof(np->test_buffer), 528 &np->units[unit].control[0], 529 np->hv_state); 530 if (err) 531 return err; 532 533 return n2rng_check_selftest_buffer(np, unit); 534 } 535 536 static int n2rng_control_check(struct n2rng *np) 537 { 538 int i; 539 540 for (i = 0; i < np->num_units; i++) { 541 int err = n2rng_control_selftest(np, i); 542 if (err) 543 return err; 544 } 545 return 0; 546 } 547 548 /* The sanity checks passed, install the final configuration into the 549 * chip, it's ready to use. 550 */ 551 static int n2rng_control_configure_units(struct n2rng *np) 552 { 553 int unit, err; 554 555 err = 0; 556 for (unit = 0; unit < np->num_units; unit++) { 557 struct n2rng_unit *up = &np->units[unit]; 558 unsigned long ctl_ra = __pa(&up->control[0]); 559 int esrc; 560 u64 base; 561 562 base = ((np->accum_cycles << RNG_CTL_WAIT_SHIFT) | 563 (2 << RNG_CTL_ASEL_SHIFT) | 564 RNG_CTL_LFSR); 565 566 /* XXX This isn't the best. We should fetch a bunch 567 * XXX of words using each entropy source combined XXX 568 * with each VCO setting, and see which combinations 569 * XXX give the best random data. 570 */ 571 for (esrc = 0; esrc < 3; esrc++) 572 up->control[esrc] = base | 573 (esrc << RNG_CTL_VCO_SHIFT) | 574 (RNG_CTL_ES1 << esrc); 575 576 up->control[3] = base | 577 (RNG_CTL_ES1 | RNG_CTL_ES2 | RNG_CTL_ES3); 578 579 err = n2rng_generic_write_control(np, ctl_ra, unit, 580 HV_RNG_STATE_CONFIGURED); 581 if (err) 582 break; 583 } 584 585 return err; 586 } 587 588 static void n2rng_work(struct work_struct *work) 589 { 590 struct n2rng *np = container_of(work, struct n2rng, work.work); 591 int err = 0; 592 593 if (!(np->flags & N2RNG_FLAG_CONTROL)) { 594 err = n2rng_guest_check(np); 595 } else { 596 preempt_disable(); 597 err = n2rng_control_check(np); 598 preempt_enable(); 599 600 if (!err) 601 err = n2rng_control_configure_units(np); 602 } 603 604 if (!err) { 605 np->flags |= N2RNG_FLAG_READY; 606 dev_info(&np->op->dev, "RNG ready\n"); 607 } 608 609 if (err && !(np->flags & N2RNG_FLAG_SHUTDOWN)) 610 schedule_delayed_work(&np->work, HZ * 2); 611 } 612 613 static void n2rng_driver_version(void) 614 { 615 static int n2rng_version_printed; 616 617 if (n2rng_version_printed++ == 0) 618 pr_info("%s", version); 619 } 620 621 static const struct of_device_id n2rng_match[]; 622 static int n2rng_probe(struct platform_device *op) 623 { 624 const struct of_device_id *match; 625 int multi_capable; 626 int err = -ENOMEM; 627 struct n2rng *np; 628 629 match = of_match_device(n2rng_match, &op->dev); 630 if (!match) 631 return -EINVAL; 632 multi_capable = (match->data != NULL); 633 634 n2rng_driver_version(); 635 np = devm_kzalloc(&op->dev, sizeof(*np), GFP_KERNEL); 636 if (!np) 637 goto out; 638 np->op = op; 639 640 INIT_DELAYED_WORK(&np->work, n2rng_work); 641 642 if (multi_capable) 643 np->flags |= N2RNG_FLAG_MULTI; 644 645 err = -ENODEV; 646 np->hvapi_major = 2; 647 if (sun4v_hvapi_register(HV_GRP_RNG, 648 np->hvapi_major, 649 &np->hvapi_minor)) { 650 np->hvapi_major = 1; 651 if (sun4v_hvapi_register(HV_GRP_RNG, 652 np->hvapi_major, 653 &np->hvapi_minor)) { 654 dev_err(&op->dev, "Cannot register suitable " 655 "HVAPI version.\n"); 656 goto out; 657 } 658 } 659 660 if (np->flags & N2RNG_FLAG_MULTI) { 661 if (np->hvapi_major < 2) { 662 dev_err(&op->dev, "multi-unit-capable RNG requires " 663 "HVAPI major version 2 or later, got %lu\n", 664 np->hvapi_major); 665 goto out_hvapi_unregister; 666 } 667 np->num_units = of_getintprop_default(op->dev.of_node, 668 "rng-#units", 0); 669 if (!np->num_units) { 670 dev_err(&op->dev, "VF RNG lacks rng-#units property\n"); 671 goto out_hvapi_unregister; 672 } 673 } else 674 np->num_units = 1; 675 676 dev_info(&op->dev, "Registered RNG HVAPI major %lu minor %lu\n", 677 np->hvapi_major, np->hvapi_minor); 678 679 np->units = devm_kzalloc(&op->dev, 680 sizeof(struct n2rng_unit) * np->num_units, 681 GFP_KERNEL); 682 err = -ENOMEM; 683 if (!np->units) 684 goto out_hvapi_unregister; 685 686 err = n2rng_init_control(np); 687 if (err) 688 goto out_hvapi_unregister; 689 690 dev_info(&op->dev, "Found %s RNG, units: %d\n", 691 ((np->flags & N2RNG_FLAG_MULTI) ? 692 "multi-unit-capable" : "single-unit"), 693 np->num_units); 694 695 np->hwrng.name = "n2rng"; 696 np->hwrng.data_read = n2rng_data_read; 697 np->hwrng.priv = (unsigned long) np; 698 699 err = hwrng_register(&np->hwrng); 700 if (err) 701 goto out_hvapi_unregister; 702 703 platform_set_drvdata(op, np); 704 705 schedule_delayed_work(&np->work, 0); 706 707 return 0; 708 709 out_hvapi_unregister: 710 sun4v_hvapi_unregister(HV_GRP_RNG); 711 712 out: 713 return err; 714 } 715 716 static int n2rng_remove(struct platform_device *op) 717 { 718 struct n2rng *np = platform_get_drvdata(op); 719 720 np->flags |= N2RNG_FLAG_SHUTDOWN; 721 722 cancel_delayed_work_sync(&np->work); 723 724 hwrng_unregister(&np->hwrng); 725 726 sun4v_hvapi_unregister(HV_GRP_RNG); 727 728 return 0; 729 } 730 731 static const struct of_device_id n2rng_match[] = { 732 { 733 .name = "random-number-generator", 734 .compatible = "SUNW,n2-rng", 735 }, 736 { 737 .name = "random-number-generator", 738 .compatible = "SUNW,vf-rng", 739 .data = (void *) 1, 740 }, 741 { 742 .name = "random-number-generator", 743 .compatible = "SUNW,kt-rng", 744 .data = (void *) 1, 745 }, 746 { 747 .name = "random-number-generator", 748 .compatible = "ORCL,m4-rng", 749 .data = (void *) 1, 750 }, 751 { 752 .name = "random-number-generator", 753 .compatible = "ORCL,m7-rng", 754 .data = (void *) 1, 755 }, 756 {}, 757 }; 758 MODULE_DEVICE_TABLE(of, n2rng_match); 759 760 static struct platform_driver n2rng_driver = { 761 .driver = { 762 .name = "n2rng", 763 .of_match_table = n2rng_match, 764 }, 765 .probe = n2rng_probe, 766 .remove = n2rng_remove, 767 }; 768 769 module_platform_driver(n2rng_driver); 770