1 /* 2 * Driver for Mediatek Hardware Random Number Generator 3 * 4 * Copyright (C) 2017 Sean Wang <sean.wang@mediatek.com> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 #define MTK_RNG_DEV KBUILD_MODNAME 17 18 #include <linux/clk.h> 19 #include <linux/delay.h> 20 #include <linux/err.h> 21 #include <linux/hw_random.h> 22 #include <linux/io.h> 23 #include <linux/iopoll.h> 24 #include <linux/kernel.h> 25 #include <linux/module.h> 26 #include <linux/of.h> 27 #include <linux/platform_device.h> 28 #include <linux/pm_runtime.h> 29 30 /* Runtime PM autosuspend timeout: */ 31 #define RNG_AUTOSUSPEND_TIMEOUT 100 32 33 #define USEC_POLL 2 34 #define TIMEOUT_POLL 20 35 36 #define RNG_CTRL 0x00 37 #define RNG_EN BIT(0) 38 #define RNG_READY BIT(31) 39 40 #define RNG_DATA 0x08 41 42 #define to_mtk_rng(p) container_of(p, struct mtk_rng, rng) 43 44 struct mtk_rng { 45 void __iomem *base; 46 struct clk *clk; 47 struct hwrng rng; 48 }; 49 50 static int mtk_rng_init(struct hwrng *rng) 51 { 52 struct mtk_rng *priv = to_mtk_rng(rng); 53 u32 val; 54 int err; 55 56 err = clk_prepare_enable(priv->clk); 57 if (err) 58 return err; 59 60 val = readl(priv->base + RNG_CTRL); 61 val |= RNG_EN; 62 writel(val, priv->base + RNG_CTRL); 63 64 return 0; 65 } 66 67 static void mtk_rng_cleanup(struct hwrng *rng) 68 { 69 struct mtk_rng *priv = to_mtk_rng(rng); 70 u32 val; 71 72 val = readl(priv->base + RNG_CTRL); 73 val &= ~RNG_EN; 74 writel(val, priv->base + RNG_CTRL); 75 76 clk_disable_unprepare(priv->clk); 77 } 78 79 static bool mtk_rng_wait_ready(struct hwrng *rng, bool wait) 80 { 81 struct mtk_rng *priv = to_mtk_rng(rng); 82 int ready; 83 84 ready = readl(priv->base + RNG_CTRL) & RNG_READY; 85 if (!ready && wait) 86 readl_poll_timeout_atomic(priv->base + RNG_CTRL, ready, 87 ready & RNG_READY, USEC_POLL, 88 TIMEOUT_POLL); 89 return !!ready; 90 } 91 92 static int mtk_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait) 93 { 94 struct mtk_rng *priv = to_mtk_rng(rng); 95 int retval = 0; 96 97 pm_runtime_get_sync((struct device *)priv->rng.priv); 98 99 while (max >= sizeof(u32)) { 100 if (!mtk_rng_wait_ready(rng, wait)) 101 break; 102 103 *(u32 *)buf = readl(priv->base + RNG_DATA); 104 retval += sizeof(u32); 105 buf += sizeof(u32); 106 max -= sizeof(u32); 107 } 108 109 pm_runtime_mark_last_busy((struct device *)priv->rng.priv); 110 pm_runtime_put_sync_autosuspend((struct device *)priv->rng.priv); 111 112 return retval || !wait ? retval : -EIO; 113 } 114 115 static int mtk_rng_probe(struct platform_device *pdev) 116 { 117 struct resource *res; 118 int ret; 119 struct mtk_rng *priv; 120 121 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 122 if (!res) { 123 dev_err(&pdev->dev, "no iomem resource\n"); 124 return -ENXIO; 125 } 126 127 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 128 if (!priv) 129 return -ENOMEM; 130 131 priv->rng.name = pdev->name; 132 #ifndef CONFIG_PM 133 priv->rng.init = mtk_rng_init; 134 priv->rng.cleanup = mtk_rng_cleanup; 135 #endif 136 priv->rng.read = mtk_rng_read; 137 priv->rng.priv = (unsigned long)&pdev->dev; 138 139 priv->clk = devm_clk_get(&pdev->dev, "rng"); 140 if (IS_ERR(priv->clk)) { 141 ret = PTR_ERR(priv->clk); 142 dev_err(&pdev->dev, "no clock for device: %d\n", ret); 143 return ret; 144 } 145 146 priv->base = devm_ioremap_resource(&pdev->dev, res); 147 if (IS_ERR(priv->base)) 148 return PTR_ERR(priv->base); 149 150 ret = devm_hwrng_register(&pdev->dev, &priv->rng); 151 if (ret) { 152 dev_err(&pdev->dev, "failed to register rng device: %d\n", 153 ret); 154 return ret; 155 } 156 157 dev_set_drvdata(&pdev->dev, priv); 158 pm_runtime_set_autosuspend_delay(&pdev->dev, RNG_AUTOSUSPEND_TIMEOUT); 159 pm_runtime_use_autosuspend(&pdev->dev); 160 pm_runtime_enable(&pdev->dev); 161 162 dev_info(&pdev->dev, "registered RNG driver\n"); 163 164 return 0; 165 } 166 167 #ifdef CONFIG_PM 168 static int mtk_rng_runtime_suspend(struct device *dev) 169 { 170 struct mtk_rng *priv = dev_get_drvdata(dev); 171 172 mtk_rng_cleanup(&priv->rng); 173 174 return 0; 175 } 176 177 static int mtk_rng_runtime_resume(struct device *dev) 178 { 179 struct mtk_rng *priv = dev_get_drvdata(dev); 180 181 return mtk_rng_init(&priv->rng); 182 } 183 184 static UNIVERSAL_DEV_PM_OPS(mtk_rng_pm_ops, mtk_rng_runtime_suspend, 185 mtk_rng_runtime_resume, NULL); 186 #define MTK_RNG_PM_OPS (&mtk_rng_pm_ops) 187 #else /* CONFIG_PM */ 188 #define MTK_RNG_PM_OPS NULL 189 #endif /* CONFIG_PM */ 190 191 static const struct of_device_id mtk_rng_match[] = { 192 { .compatible = "mediatek,mt7623-rng" }, 193 {}, 194 }; 195 MODULE_DEVICE_TABLE(of, mtk_rng_match); 196 197 static struct platform_driver mtk_rng_driver = { 198 .probe = mtk_rng_probe, 199 .driver = { 200 .name = MTK_RNG_DEV, 201 .pm = MTK_RNG_PM_OPS, 202 .of_match_table = mtk_rng_match, 203 }, 204 }; 205 206 module_platform_driver(mtk_rng_driver); 207 208 MODULE_DESCRIPTION("Mediatek Random Number Generator Driver"); 209 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>"); 210 MODULE_LICENSE("GPL"); 211