1*716a757cSConor Dooley // SPDX-License-Identifier: GPL-2.0
2*716a757cSConor Dooley /*
3*716a757cSConor Dooley  * Microchip PolarFire SoC (MPFS) hardware random driver
4*716a757cSConor Dooley  *
5*716a757cSConor Dooley  * Copyright (c) 2020-2022 Microchip Corporation. All rights reserved.
6*716a757cSConor Dooley  *
7*716a757cSConor Dooley  * Author: Conor Dooley <conor.dooley@microchip.com>
8*716a757cSConor Dooley  */
9*716a757cSConor Dooley 
10*716a757cSConor Dooley #include <linux/module.h>
11*716a757cSConor Dooley #include <linux/hw_random.h>
12*716a757cSConor Dooley #include <linux/platform_device.h>
13*716a757cSConor Dooley #include <soc/microchip/mpfs.h>
14*716a757cSConor Dooley 
15*716a757cSConor Dooley #define CMD_OPCODE	0x21
16*716a757cSConor Dooley #define CMD_DATA_SIZE	0U
17*716a757cSConor Dooley #define CMD_DATA	NULL
18*716a757cSConor Dooley #define MBOX_OFFSET	0U
19*716a757cSConor Dooley #define RESP_OFFSET	0U
20*716a757cSConor Dooley #define RNG_RESP_BYTES	32U
21*716a757cSConor Dooley 
22*716a757cSConor Dooley struct mpfs_rng {
23*716a757cSConor Dooley 	struct mpfs_sys_controller *sys_controller;
24*716a757cSConor Dooley 	struct hwrng rng;
25*716a757cSConor Dooley };
26*716a757cSConor Dooley 
mpfs_rng_read(struct hwrng * rng,void * buf,size_t max,bool wait)27*716a757cSConor Dooley static int mpfs_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
28*716a757cSConor Dooley {
29*716a757cSConor Dooley 	struct mpfs_rng *rng_priv = container_of(rng, struct mpfs_rng, rng);
30*716a757cSConor Dooley 	u32 response_msg[RNG_RESP_BYTES / sizeof(u32)];
31*716a757cSConor Dooley 	unsigned int count = 0, copy_size_bytes;
32*716a757cSConor Dooley 	int ret;
33*716a757cSConor Dooley 
34*716a757cSConor Dooley 	struct mpfs_mss_response response = {
35*716a757cSConor Dooley 		.resp_status = 0U,
36*716a757cSConor Dooley 		.resp_msg = (u32 *)response_msg,
37*716a757cSConor Dooley 		.resp_size = RNG_RESP_BYTES
38*716a757cSConor Dooley 	};
39*716a757cSConor Dooley 	struct mpfs_mss_msg msg = {
40*716a757cSConor Dooley 		.cmd_opcode = CMD_OPCODE,
41*716a757cSConor Dooley 		.cmd_data_size = CMD_DATA_SIZE,
42*716a757cSConor Dooley 		.response = &response,
43*716a757cSConor Dooley 		.cmd_data = CMD_DATA,
44*716a757cSConor Dooley 		.mbox_offset = MBOX_OFFSET,
45*716a757cSConor Dooley 		.resp_offset = RESP_OFFSET
46*716a757cSConor Dooley 	};
47*716a757cSConor Dooley 
48*716a757cSConor Dooley 	while (count < max) {
49*716a757cSConor Dooley 		ret = mpfs_blocking_transaction(rng_priv->sys_controller, &msg);
50*716a757cSConor Dooley 		if (ret)
51*716a757cSConor Dooley 			return ret;
52*716a757cSConor Dooley 
53*716a757cSConor Dooley 		copy_size_bytes = max - count > RNG_RESP_BYTES ? RNG_RESP_BYTES : max - count;
54*716a757cSConor Dooley 		memcpy(buf + count, response_msg, copy_size_bytes);
55*716a757cSConor Dooley 
56*716a757cSConor Dooley 		count += copy_size_bytes;
57*716a757cSConor Dooley 		if (!wait)
58*716a757cSConor Dooley 			break;
59*716a757cSConor Dooley 	}
60*716a757cSConor Dooley 
61*716a757cSConor Dooley 	return count;
62*716a757cSConor Dooley }
63*716a757cSConor Dooley 
mpfs_rng_probe(struct platform_device * pdev)64*716a757cSConor Dooley static int mpfs_rng_probe(struct platform_device *pdev)
65*716a757cSConor Dooley {
66*716a757cSConor Dooley 	struct device *dev = &pdev->dev;
67*716a757cSConor Dooley 	struct mpfs_rng *rng_priv;
68*716a757cSConor Dooley 	int ret;
69*716a757cSConor Dooley 
70*716a757cSConor Dooley 	rng_priv = devm_kzalloc(dev, sizeof(*rng_priv), GFP_KERNEL);
71*716a757cSConor Dooley 	if (!rng_priv)
72*716a757cSConor Dooley 		return -ENOMEM;
73*716a757cSConor Dooley 
74*716a757cSConor Dooley 	rng_priv->sys_controller =  mpfs_sys_controller_get(&pdev->dev);
75*716a757cSConor Dooley 	if (IS_ERR(rng_priv->sys_controller))
76*716a757cSConor Dooley 		return dev_err_probe(dev, PTR_ERR(rng_priv->sys_controller),
77*716a757cSConor Dooley 				     "Failed to register system controller hwrng sub device\n");
78*716a757cSConor Dooley 
79*716a757cSConor Dooley 	rng_priv->rng.read = mpfs_rng_read;
80*716a757cSConor Dooley 	rng_priv->rng.name = pdev->name;
81*716a757cSConor Dooley 
82*716a757cSConor Dooley 	platform_set_drvdata(pdev, rng_priv);
83*716a757cSConor Dooley 
84*716a757cSConor Dooley 	ret = devm_hwrng_register(&pdev->dev, &rng_priv->rng);
85*716a757cSConor Dooley 	if (ret)
86*716a757cSConor Dooley 		return dev_err_probe(&pdev->dev, ret, "Failed to register MPFS hwrng\n");
87*716a757cSConor Dooley 
88*716a757cSConor Dooley 	dev_info(&pdev->dev, "Registered MPFS hwrng\n");
89*716a757cSConor Dooley 
90*716a757cSConor Dooley 	return 0;
91*716a757cSConor Dooley }
92*716a757cSConor Dooley 
93*716a757cSConor Dooley static struct platform_driver mpfs_rng_driver = {
94*716a757cSConor Dooley 	.driver = {
95*716a757cSConor Dooley 		.name = "mpfs-rng",
96*716a757cSConor Dooley 	},
97*716a757cSConor Dooley 	.probe = mpfs_rng_probe,
98*716a757cSConor Dooley };
99*716a757cSConor Dooley module_platform_driver(mpfs_rng_driver);
100*716a757cSConor Dooley 
101*716a757cSConor Dooley MODULE_LICENSE("GPL");
102*716a757cSConor Dooley MODULE_AUTHOR("Conor Dooley <conor.dooley@microchip.com>");
103*716a757cSConor Dooley MODULE_DESCRIPTION("PolarFire SoC (MPFS) hardware random driver");
104