1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Intel & MS High Precision Event Timer Implementation. 4 * 5 * Copyright (C) 2003 Intel Corporation 6 * Venki Pallipadi 7 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P. 8 * Bob Picco <robert.picco@hp.com> 9 */ 10 11 #include <linux/interrupt.h> 12 #include <linux/kernel.h> 13 #include <linux/types.h> 14 #include <linux/miscdevice.h> 15 #include <linux/major.h> 16 #include <linux/ioport.h> 17 #include <linux/fcntl.h> 18 #include <linux/init.h> 19 #include <linux/io-64-nonatomic-lo-hi.h> 20 #include <linux/poll.h> 21 #include <linux/mm.h> 22 #include <linux/proc_fs.h> 23 #include <linux/spinlock.h> 24 #include <linux/sysctl.h> 25 #include <linux/wait.h> 26 #include <linux/sched/signal.h> 27 #include <linux/bcd.h> 28 #include <linux/seq_file.h> 29 #include <linux/bitops.h> 30 #include <linux/compat.h> 31 #include <linux/clocksource.h> 32 #include <linux/uaccess.h> 33 #include <linux/slab.h> 34 #include <linux/io.h> 35 #include <linux/acpi.h> 36 #include <linux/hpet.h> 37 #include <asm/current.h> 38 #include <asm/irq.h> 39 #include <asm/div64.h> 40 41 /* 42 * The High Precision Event Timer driver. 43 * This driver is closely modelled after the rtc.c driver. 44 * See HPET spec revision 1. 45 */ 46 #define HPET_USER_FREQ (64) 47 #define HPET_DRIFT (500) 48 49 #define HPET_RANGE_SIZE 1024 /* from HPET spec */ 50 51 52 /* WARNING -- don't get confused. These macros are never used 53 * to write the (single) counter, and rarely to read it. 54 * They're badly named; to fix, someday. 55 */ 56 #if BITS_PER_LONG == 64 57 #define write_counter(V, MC) writeq(V, MC) 58 #define read_counter(MC) readq(MC) 59 #else 60 #define write_counter(V, MC) writel(V, MC) 61 #define read_counter(MC) readl(MC) 62 #endif 63 64 static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */ 65 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ; 66 67 /* This clocksource driver currently only works on ia64 */ 68 #ifdef CONFIG_IA64 69 static void __iomem *hpet_mctr; 70 71 static u64 read_hpet(struct clocksource *cs) 72 { 73 return (u64)read_counter((void __iomem *)hpet_mctr); 74 } 75 76 static struct clocksource clocksource_hpet = { 77 .name = "hpet", 78 .rating = 250, 79 .read = read_hpet, 80 .mask = CLOCKSOURCE_MASK(64), 81 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 82 }; 83 static struct clocksource *hpet_clocksource; 84 #endif 85 86 /* A lock for concurrent access by app and isr hpet activity. */ 87 static DEFINE_SPINLOCK(hpet_lock); 88 89 #define HPET_DEV_NAME (7) 90 91 struct hpet_dev { 92 struct hpets *hd_hpets; 93 struct hpet __iomem *hd_hpet; 94 struct hpet_timer __iomem *hd_timer; 95 unsigned long hd_ireqfreq; 96 unsigned long hd_irqdata; 97 wait_queue_head_t hd_waitqueue; 98 struct fasync_struct *hd_async_queue; 99 unsigned int hd_flags; 100 unsigned int hd_irq; 101 unsigned int hd_hdwirq; 102 char hd_name[HPET_DEV_NAME]; 103 }; 104 105 struct hpets { 106 struct hpets *hp_next; 107 struct hpet __iomem *hp_hpet; 108 unsigned long hp_hpet_phys; 109 struct clocksource *hp_clocksource; 110 unsigned long long hp_tick_freq; 111 unsigned long hp_delta; 112 unsigned int hp_ntimer; 113 unsigned int hp_which; 114 struct hpet_dev hp_dev[]; 115 }; 116 117 static struct hpets *hpets; 118 119 #define HPET_OPEN 0x0001 120 #define HPET_IE 0x0002 /* interrupt enabled */ 121 #define HPET_PERIODIC 0x0004 122 #define HPET_SHARED_IRQ 0x0008 123 124 static irqreturn_t hpet_interrupt(int irq, void *data) 125 { 126 struct hpet_dev *devp; 127 unsigned long isr; 128 129 devp = data; 130 isr = 1 << (devp - devp->hd_hpets->hp_dev); 131 132 if ((devp->hd_flags & HPET_SHARED_IRQ) && 133 !(isr & readl(&devp->hd_hpet->hpet_isr))) 134 return IRQ_NONE; 135 136 spin_lock(&hpet_lock); 137 devp->hd_irqdata++; 138 139 /* 140 * For non-periodic timers, increment the accumulator. 141 * This has the effect of treating non-periodic like periodic. 142 */ 143 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) { 144 unsigned long t, mc, base, k; 145 struct hpet __iomem *hpet = devp->hd_hpet; 146 struct hpets *hpetp = devp->hd_hpets; 147 148 t = devp->hd_ireqfreq; 149 read_counter(&devp->hd_timer->hpet_compare); 150 mc = read_counter(&hpet->hpet_mc); 151 /* The time for the next interrupt would logically be t + m, 152 * however, if we are very unlucky and the interrupt is delayed 153 * for longer than t then we will completely miss the next 154 * interrupt if we set t + m and an application will hang. 155 * Therefore we need to make a more complex computation assuming 156 * that there exists a k for which the following is true: 157 * k * t + base < mc + delta 158 * (k + 1) * t + base > mc + delta 159 * where t is the interval in hpet ticks for the given freq, 160 * base is the theoretical start value 0 < base < t, 161 * mc is the main counter value at the time of the interrupt, 162 * delta is the time it takes to write the a value to the 163 * comparator. 164 * k may then be computed as (mc - base + delta) / t . 165 */ 166 base = mc % t; 167 k = (mc - base + hpetp->hp_delta) / t; 168 write_counter(t * (k + 1) + base, 169 &devp->hd_timer->hpet_compare); 170 } 171 172 if (devp->hd_flags & HPET_SHARED_IRQ) 173 writel(isr, &devp->hd_hpet->hpet_isr); 174 spin_unlock(&hpet_lock); 175 176 wake_up_interruptible(&devp->hd_waitqueue); 177 178 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN); 179 180 return IRQ_HANDLED; 181 } 182 183 static void hpet_timer_set_irq(struct hpet_dev *devp) 184 { 185 unsigned long v; 186 int irq, gsi; 187 struct hpet_timer __iomem *timer; 188 189 spin_lock_irq(&hpet_lock); 190 if (devp->hd_hdwirq) { 191 spin_unlock_irq(&hpet_lock); 192 return; 193 } 194 195 timer = devp->hd_timer; 196 197 /* we prefer level triggered mode */ 198 v = readl(&timer->hpet_config); 199 if (!(v & Tn_INT_TYPE_CNF_MASK)) { 200 v |= Tn_INT_TYPE_CNF_MASK; 201 writel(v, &timer->hpet_config); 202 } 203 spin_unlock_irq(&hpet_lock); 204 205 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> 206 Tn_INT_ROUTE_CAP_SHIFT; 207 208 /* 209 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by 210 * legacy device. In IO APIC mode, we skip all the legacy IRQS. 211 */ 212 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) 213 v &= ~0xf3df; 214 else 215 v &= ~0xffff; 216 217 for_each_set_bit(irq, &v, HPET_MAX_IRQ) { 218 if (irq >= nr_irqs) { 219 irq = HPET_MAX_IRQ; 220 break; 221 } 222 223 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE, 224 ACPI_ACTIVE_LOW); 225 if (gsi > 0) 226 break; 227 228 /* FIXME: Setup interrupt source table */ 229 } 230 231 if (irq < HPET_MAX_IRQ) { 232 spin_lock_irq(&hpet_lock); 233 v = readl(&timer->hpet_config); 234 v |= irq << Tn_INT_ROUTE_CNF_SHIFT; 235 writel(v, &timer->hpet_config); 236 devp->hd_hdwirq = gsi; 237 spin_unlock_irq(&hpet_lock); 238 } 239 return; 240 } 241 242 static int hpet_open(struct inode *inode, struct file *file) 243 { 244 struct hpet_dev *devp; 245 struct hpets *hpetp; 246 int i; 247 248 if (file->f_mode & FMODE_WRITE) 249 return -EINVAL; 250 251 mutex_lock(&hpet_mutex); 252 spin_lock_irq(&hpet_lock); 253 254 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next) 255 for (i = 0; i < hpetp->hp_ntimer; i++) 256 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) { 257 continue; 258 } else { 259 devp = &hpetp->hp_dev[i]; 260 break; 261 } 262 263 if (!devp) { 264 spin_unlock_irq(&hpet_lock); 265 mutex_unlock(&hpet_mutex); 266 return -EBUSY; 267 } 268 269 file->private_data = devp; 270 devp->hd_irqdata = 0; 271 devp->hd_flags |= HPET_OPEN; 272 spin_unlock_irq(&hpet_lock); 273 mutex_unlock(&hpet_mutex); 274 275 hpet_timer_set_irq(devp); 276 277 return 0; 278 } 279 280 static ssize_t 281 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) 282 { 283 DECLARE_WAITQUEUE(wait, current); 284 unsigned long data; 285 ssize_t retval; 286 struct hpet_dev *devp; 287 288 devp = file->private_data; 289 if (!devp->hd_ireqfreq) 290 return -EIO; 291 292 if (in_compat_syscall()) { 293 if (count < sizeof(compat_ulong_t)) 294 return -EINVAL; 295 } else { 296 if (count < sizeof(unsigned long)) 297 return -EINVAL; 298 } 299 300 add_wait_queue(&devp->hd_waitqueue, &wait); 301 302 for ( ; ; ) { 303 set_current_state(TASK_INTERRUPTIBLE); 304 305 spin_lock_irq(&hpet_lock); 306 data = devp->hd_irqdata; 307 devp->hd_irqdata = 0; 308 spin_unlock_irq(&hpet_lock); 309 310 if (data) { 311 break; 312 } else if (file->f_flags & O_NONBLOCK) { 313 retval = -EAGAIN; 314 goto out; 315 } else if (signal_pending(current)) { 316 retval = -ERESTARTSYS; 317 goto out; 318 } 319 schedule(); 320 } 321 322 if (in_compat_syscall()) { 323 retval = put_user(data, (compat_ulong_t __user *)buf); 324 if (!retval) 325 retval = sizeof(compat_ulong_t); 326 } else { 327 retval = put_user(data, (unsigned long __user *)buf); 328 if (!retval) 329 retval = sizeof(unsigned long); 330 } 331 332 out: 333 __set_current_state(TASK_RUNNING); 334 remove_wait_queue(&devp->hd_waitqueue, &wait); 335 336 return retval; 337 } 338 339 static __poll_t hpet_poll(struct file *file, poll_table * wait) 340 { 341 unsigned long v; 342 struct hpet_dev *devp; 343 344 devp = file->private_data; 345 346 if (!devp->hd_ireqfreq) 347 return 0; 348 349 poll_wait(file, &devp->hd_waitqueue, wait); 350 351 spin_lock_irq(&hpet_lock); 352 v = devp->hd_irqdata; 353 spin_unlock_irq(&hpet_lock); 354 355 if (v != 0) 356 return EPOLLIN | EPOLLRDNORM; 357 358 return 0; 359 } 360 361 #ifdef CONFIG_HPET_MMAP 362 #ifdef CONFIG_HPET_MMAP_DEFAULT 363 static int hpet_mmap_enabled = 1; 364 #else 365 static int hpet_mmap_enabled = 0; 366 #endif 367 368 static __init int hpet_mmap_enable(char *str) 369 { 370 get_option(&str, &hpet_mmap_enabled); 371 pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled"); 372 return 1; 373 } 374 __setup("hpet_mmap=", hpet_mmap_enable); 375 376 static int hpet_mmap(struct file *file, struct vm_area_struct *vma) 377 { 378 struct hpet_dev *devp; 379 unsigned long addr; 380 381 if (!hpet_mmap_enabled) 382 return -EACCES; 383 384 devp = file->private_data; 385 addr = devp->hd_hpets->hp_hpet_phys; 386 387 if (addr & (PAGE_SIZE - 1)) 388 return -ENOSYS; 389 390 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 391 return vm_iomap_memory(vma, addr, PAGE_SIZE); 392 } 393 #else 394 static int hpet_mmap(struct file *file, struct vm_area_struct *vma) 395 { 396 return -ENOSYS; 397 } 398 #endif 399 400 static int hpet_fasync(int fd, struct file *file, int on) 401 { 402 struct hpet_dev *devp; 403 404 devp = file->private_data; 405 406 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0) 407 return 0; 408 else 409 return -EIO; 410 } 411 412 static int hpet_release(struct inode *inode, struct file *file) 413 { 414 struct hpet_dev *devp; 415 struct hpet_timer __iomem *timer; 416 int irq = 0; 417 418 devp = file->private_data; 419 timer = devp->hd_timer; 420 421 spin_lock_irq(&hpet_lock); 422 423 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), 424 &timer->hpet_config); 425 426 irq = devp->hd_irq; 427 devp->hd_irq = 0; 428 429 devp->hd_ireqfreq = 0; 430 431 if (devp->hd_flags & HPET_PERIODIC 432 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { 433 unsigned long v; 434 435 v = readq(&timer->hpet_config); 436 v ^= Tn_TYPE_CNF_MASK; 437 writeq(v, &timer->hpet_config); 438 } 439 440 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC); 441 spin_unlock_irq(&hpet_lock); 442 443 if (irq) 444 free_irq(irq, devp); 445 446 file->private_data = NULL; 447 return 0; 448 } 449 450 static int hpet_ioctl_ieon(struct hpet_dev *devp) 451 { 452 struct hpet_timer __iomem *timer; 453 struct hpet __iomem *hpet; 454 struct hpets *hpetp; 455 int irq; 456 unsigned long g, v, t, m; 457 unsigned long flags, isr; 458 459 timer = devp->hd_timer; 460 hpet = devp->hd_hpet; 461 hpetp = devp->hd_hpets; 462 463 if (!devp->hd_ireqfreq) 464 return -EIO; 465 466 spin_lock_irq(&hpet_lock); 467 468 if (devp->hd_flags & HPET_IE) { 469 spin_unlock_irq(&hpet_lock); 470 return -EBUSY; 471 } 472 473 devp->hd_flags |= HPET_IE; 474 475 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK) 476 devp->hd_flags |= HPET_SHARED_IRQ; 477 spin_unlock_irq(&hpet_lock); 478 479 irq = devp->hd_hdwirq; 480 481 if (irq) { 482 unsigned long irq_flags; 483 484 if (devp->hd_flags & HPET_SHARED_IRQ) { 485 /* 486 * To prevent the interrupt handler from seeing an 487 * unwanted interrupt status bit, program the timer 488 * so that it will not fire in the near future ... 489 */ 490 writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK, 491 &timer->hpet_config); 492 write_counter(read_counter(&hpet->hpet_mc), 493 &timer->hpet_compare); 494 /* ... and clear any left-over status. */ 495 isr = 1 << (devp - devp->hd_hpets->hp_dev); 496 writel(isr, &hpet->hpet_isr); 497 } 498 499 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev)); 500 irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0; 501 if (request_irq(irq, hpet_interrupt, irq_flags, 502 devp->hd_name, (void *)devp)) { 503 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq); 504 irq = 0; 505 } 506 } 507 508 if (irq == 0) { 509 spin_lock_irq(&hpet_lock); 510 devp->hd_flags ^= HPET_IE; 511 spin_unlock_irq(&hpet_lock); 512 return -EIO; 513 } 514 515 devp->hd_irq = irq; 516 t = devp->hd_ireqfreq; 517 v = readq(&timer->hpet_config); 518 519 /* 64-bit comparators are not yet supported through the ioctls, 520 * so force this into 32-bit mode if it supports both modes 521 */ 522 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK; 523 524 if (devp->hd_flags & HPET_PERIODIC) { 525 g |= Tn_TYPE_CNF_MASK; 526 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK; 527 writeq(v, &timer->hpet_config); 528 local_irq_save(flags); 529 530 /* 531 * NOTE: First we modify the hidden accumulator 532 * register supported by periodic-capable comparators. 533 * We never want to modify the (single) counter; that 534 * would affect all the comparators. The value written 535 * is the counter value when the first interrupt is due. 536 */ 537 m = read_counter(&hpet->hpet_mc); 538 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 539 /* 540 * Then we modify the comparator, indicating the period 541 * for subsequent interrupt. 542 */ 543 write_counter(t, &timer->hpet_compare); 544 } else { 545 local_irq_save(flags); 546 m = read_counter(&hpet->hpet_mc); 547 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 548 } 549 550 if (devp->hd_flags & HPET_SHARED_IRQ) { 551 isr = 1 << (devp - devp->hd_hpets->hp_dev); 552 writel(isr, &hpet->hpet_isr); 553 } 554 writeq(g, &timer->hpet_config); 555 local_irq_restore(flags); 556 557 return 0; 558 } 559 560 /* converts Hz to number of timer ticks */ 561 static inline unsigned long hpet_time_div(struct hpets *hpets, 562 unsigned long dis) 563 { 564 unsigned long long m; 565 566 m = hpets->hp_tick_freq + (dis >> 1); 567 return div64_ul(m, dis); 568 } 569 570 static int 571 hpet_ioctl_common(struct hpet_dev *devp, unsigned int cmd, unsigned long arg, 572 struct hpet_info *info) 573 { 574 struct hpet_timer __iomem *timer; 575 struct hpets *hpetp; 576 int err; 577 unsigned long v; 578 579 switch (cmd) { 580 case HPET_IE_OFF: 581 case HPET_INFO: 582 case HPET_EPI: 583 case HPET_DPI: 584 case HPET_IRQFREQ: 585 timer = devp->hd_timer; 586 hpetp = devp->hd_hpets; 587 break; 588 case HPET_IE_ON: 589 return hpet_ioctl_ieon(devp); 590 default: 591 return -EINVAL; 592 } 593 594 err = 0; 595 596 switch (cmd) { 597 case HPET_IE_OFF: 598 if ((devp->hd_flags & HPET_IE) == 0) 599 break; 600 v = readq(&timer->hpet_config); 601 v &= ~Tn_INT_ENB_CNF_MASK; 602 writeq(v, &timer->hpet_config); 603 if (devp->hd_irq) { 604 free_irq(devp->hd_irq, devp); 605 devp->hd_irq = 0; 606 } 607 devp->hd_flags ^= HPET_IE; 608 break; 609 case HPET_INFO: 610 { 611 memset(info, 0, sizeof(*info)); 612 if (devp->hd_ireqfreq) 613 info->hi_ireqfreq = 614 hpet_time_div(hpetp, devp->hd_ireqfreq); 615 info->hi_flags = 616 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; 617 info->hi_hpet = hpetp->hp_which; 618 info->hi_timer = devp - hpetp->hp_dev; 619 break; 620 } 621 case HPET_EPI: 622 v = readq(&timer->hpet_config); 623 if ((v & Tn_PER_INT_CAP_MASK) == 0) { 624 err = -ENXIO; 625 break; 626 } 627 devp->hd_flags |= HPET_PERIODIC; 628 break; 629 case HPET_DPI: 630 v = readq(&timer->hpet_config); 631 if ((v & Tn_PER_INT_CAP_MASK) == 0) { 632 err = -ENXIO; 633 break; 634 } 635 if (devp->hd_flags & HPET_PERIODIC && 636 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { 637 v = readq(&timer->hpet_config); 638 v ^= Tn_TYPE_CNF_MASK; 639 writeq(v, &timer->hpet_config); 640 } 641 devp->hd_flags &= ~HPET_PERIODIC; 642 break; 643 case HPET_IRQFREQ: 644 if ((arg > hpet_max_freq) && 645 !capable(CAP_SYS_RESOURCE)) { 646 err = -EACCES; 647 break; 648 } 649 650 if (!arg) { 651 err = -EINVAL; 652 break; 653 } 654 655 devp->hd_ireqfreq = hpet_time_div(hpetp, arg); 656 } 657 658 return err; 659 } 660 661 static long 662 hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 663 { 664 struct hpet_info info; 665 int err; 666 667 mutex_lock(&hpet_mutex); 668 err = hpet_ioctl_common(file->private_data, cmd, arg, &info); 669 mutex_unlock(&hpet_mutex); 670 671 if ((cmd == HPET_INFO) && !err && 672 (copy_to_user((void __user *)arg, &info, sizeof(info)))) 673 err = -EFAULT; 674 675 return err; 676 } 677 678 #ifdef CONFIG_COMPAT 679 struct compat_hpet_info { 680 compat_ulong_t hi_ireqfreq; /* Hz */ 681 compat_ulong_t hi_flags; /* information */ 682 unsigned short hi_hpet; 683 unsigned short hi_timer; 684 }; 685 686 /* 32-bit types would lead to different command codes which should be 687 * translated into 64-bit ones before passed to hpet_ioctl_common 688 */ 689 #define COMPAT_HPET_INFO _IOR('h', 0x03, struct compat_hpet_info) 690 #define COMPAT_HPET_IRQFREQ _IOW('h', 0x6, compat_ulong_t) 691 692 static long 693 hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 694 { 695 struct hpet_info info; 696 int err; 697 698 if (cmd == COMPAT_HPET_INFO) 699 cmd = HPET_INFO; 700 701 if (cmd == COMPAT_HPET_IRQFREQ) 702 cmd = HPET_IRQFREQ; 703 704 mutex_lock(&hpet_mutex); 705 err = hpet_ioctl_common(file->private_data, cmd, arg, &info); 706 mutex_unlock(&hpet_mutex); 707 708 if ((cmd == HPET_INFO) && !err) { 709 struct compat_hpet_info __user *u = compat_ptr(arg); 710 if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) || 711 put_user(info.hi_flags, &u->hi_flags) || 712 put_user(info.hi_hpet, &u->hi_hpet) || 713 put_user(info.hi_timer, &u->hi_timer)) 714 err = -EFAULT; 715 } 716 717 return err; 718 } 719 #endif 720 721 static const struct file_operations hpet_fops = { 722 .owner = THIS_MODULE, 723 .llseek = no_llseek, 724 .read = hpet_read, 725 .poll = hpet_poll, 726 .unlocked_ioctl = hpet_ioctl, 727 #ifdef CONFIG_COMPAT 728 .compat_ioctl = hpet_compat_ioctl, 729 #endif 730 .open = hpet_open, 731 .release = hpet_release, 732 .fasync = hpet_fasync, 733 .mmap = hpet_mmap, 734 }; 735 736 static int hpet_is_known(struct hpet_data *hdp) 737 { 738 struct hpets *hpetp; 739 740 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next) 741 if (hpetp->hp_hpet_phys == hdp->hd_phys_address) 742 return 1; 743 744 return 0; 745 } 746 747 static struct ctl_table hpet_table[] = { 748 { 749 .procname = "max-user-freq", 750 .data = &hpet_max_freq, 751 .maxlen = sizeof(int), 752 .mode = 0644, 753 .proc_handler = proc_dointvec, 754 }, 755 {} 756 }; 757 758 static struct ctl_table_header *sysctl_header; 759 760 /* 761 * Adjustment for when arming the timer with 762 * initial conditions. That is, main counter 763 * ticks expired before interrupts are enabled. 764 */ 765 #define TICK_CALIBRATE (1000UL) 766 767 static unsigned long __hpet_calibrate(struct hpets *hpetp) 768 { 769 struct hpet_timer __iomem *timer = NULL; 770 unsigned long t, m, count, i, flags, start; 771 struct hpet_dev *devp; 772 int j; 773 struct hpet __iomem *hpet; 774 775 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++) 776 if ((devp->hd_flags & HPET_OPEN) == 0) { 777 timer = devp->hd_timer; 778 break; 779 } 780 781 if (!timer) 782 return 0; 783 784 hpet = hpetp->hp_hpet; 785 t = read_counter(&timer->hpet_compare); 786 787 i = 0; 788 count = hpet_time_div(hpetp, TICK_CALIBRATE); 789 790 local_irq_save(flags); 791 792 start = read_counter(&hpet->hpet_mc); 793 794 do { 795 m = read_counter(&hpet->hpet_mc); 796 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 797 } while (i++, (m - start) < count); 798 799 local_irq_restore(flags); 800 801 return (m - start) / i; 802 } 803 804 static unsigned long hpet_calibrate(struct hpets *hpetp) 805 { 806 unsigned long ret = ~0UL; 807 unsigned long tmp; 808 809 /* 810 * Try to calibrate until return value becomes stable small value. 811 * If SMI interruption occurs in calibration loop, the return value 812 * will be big. This avoids its impact. 813 */ 814 for ( ; ; ) { 815 tmp = __hpet_calibrate(hpetp); 816 if (ret <= tmp) 817 break; 818 ret = tmp; 819 } 820 821 return ret; 822 } 823 824 int hpet_alloc(struct hpet_data *hdp) 825 { 826 u64 cap, mcfg; 827 struct hpet_dev *devp; 828 u32 i, ntimer; 829 struct hpets *hpetp; 830 struct hpet __iomem *hpet; 831 static struct hpets *last; 832 unsigned long period; 833 unsigned long long temp; 834 u32 remainder; 835 836 /* 837 * hpet_alloc can be called by platform dependent code. 838 * If platform dependent code has allocated the hpet that 839 * ACPI has also reported, then we catch it here. 840 */ 841 if (hpet_is_known(hdp)) { 842 printk(KERN_DEBUG "%s: duplicate HPET ignored\n", 843 __func__); 844 return 0; 845 } 846 847 hpetp = kzalloc(struct_size(hpetp, hp_dev, hdp->hd_nirqs), 848 GFP_KERNEL); 849 850 if (!hpetp) 851 return -ENOMEM; 852 853 hpetp->hp_which = hpet_nhpet++; 854 hpetp->hp_hpet = hdp->hd_address; 855 hpetp->hp_hpet_phys = hdp->hd_phys_address; 856 857 hpetp->hp_ntimer = hdp->hd_nirqs; 858 859 for (i = 0; i < hdp->hd_nirqs; i++) 860 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i]; 861 862 hpet = hpetp->hp_hpet; 863 864 cap = readq(&hpet->hpet_cap); 865 866 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1; 867 868 if (hpetp->hp_ntimer != ntimer) { 869 printk(KERN_WARNING "hpet: number irqs doesn't agree" 870 " with number of timers\n"); 871 kfree(hpetp); 872 return -ENODEV; 873 } 874 875 if (last) 876 last->hp_next = hpetp; 877 else 878 hpets = hpetp; 879 880 last = hpetp; 881 882 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >> 883 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */ 884 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */ 885 temp += period >> 1; /* round */ 886 do_div(temp, period); 887 hpetp->hp_tick_freq = temp; /* ticks per second */ 888 889 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s", 890 hpetp->hp_which, hdp->hd_phys_address, 891 hpetp->hp_ntimer > 1 ? "s" : ""); 892 for (i = 0; i < hpetp->hp_ntimer; i++) 893 printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]); 894 printk(KERN_CONT "\n"); 895 896 temp = hpetp->hp_tick_freq; 897 remainder = do_div(temp, 1000000); 898 printk(KERN_INFO 899 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n", 900 hpetp->hp_which, hpetp->hp_ntimer, 901 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, 902 (unsigned) temp, remainder); 903 904 mcfg = readq(&hpet->hpet_config); 905 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) { 906 write_counter(0L, &hpet->hpet_mc); 907 mcfg |= HPET_ENABLE_CNF_MASK; 908 writeq(mcfg, &hpet->hpet_config); 909 } 910 911 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) { 912 struct hpet_timer __iomem *timer; 913 914 timer = &hpet->hpet_timers[devp - hpetp->hp_dev]; 915 916 devp->hd_hpets = hpetp; 917 devp->hd_hpet = hpet; 918 devp->hd_timer = timer; 919 920 /* 921 * If the timer was reserved by platform code, 922 * then make timer unavailable for opens. 923 */ 924 if (hdp->hd_state & (1 << i)) { 925 devp->hd_flags = HPET_OPEN; 926 continue; 927 } 928 929 init_waitqueue_head(&devp->hd_waitqueue); 930 } 931 932 hpetp->hp_delta = hpet_calibrate(hpetp); 933 934 /* This clocksource driver currently only works on ia64 */ 935 #ifdef CONFIG_IA64 936 if (!hpet_clocksource) { 937 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc; 938 clocksource_hpet.archdata.fsys_mmio = hpet_mctr; 939 clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq); 940 hpetp->hp_clocksource = &clocksource_hpet; 941 hpet_clocksource = &clocksource_hpet; 942 } 943 #endif 944 945 return 0; 946 } 947 948 static acpi_status hpet_resources(struct acpi_resource *res, void *data) 949 { 950 struct hpet_data *hdp; 951 acpi_status status; 952 struct acpi_resource_address64 addr; 953 954 hdp = data; 955 956 status = acpi_resource_to_address64(res, &addr); 957 958 if (ACPI_SUCCESS(status)) { 959 hdp->hd_phys_address = addr.address.minimum; 960 hdp->hd_address = ioremap(addr.address.minimum, addr.address.address_length); 961 if (!hdp->hd_address) 962 return AE_ERROR; 963 964 if (hpet_is_known(hdp)) { 965 iounmap(hdp->hd_address); 966 return AE_ALREADY_EXISTS; 967 } 968 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) { 969 struct acpi_resource_fixed_memory32 *fixmem32; 970 971 fixmem32 = &res->data.fixed_memory32; 972 973 hdp->hd_phys_address = fixmem32->address; 974 hdp->hd_address = ioremap(fixmem32->address, 975 HPET_RANGE_SIZE); 976 if (!hdp->hd_address) 977 return AE_ERROR; 978 979 if (hpet_is_known(hdp)) { 980 iounmap(hdp->hd_address); 981 return AE_ALREADY_EXISTS; 982 } 983 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) { 984 struct acpi_resource_extended_irq *irqp; 985 int i, irq; 986 987 irqp = &res->data.extended_irq; 988 989 for (i = 0; i < irqp->interrupt_count; i++) { 990 if (hdp->hd_nirqs >= HPET_MAX_TIMERS) 991 break; 992 993 irq = acpi_register_gsi(NULL, irqp->interrupts[i], 994 irqp->triggering, 995 irqp->polarity); 996 if (irq < 0) 997 return AE_ERROR; 998 999 hdp->hd_irq[hdp->hd_nirqs] = irq; 1000 hdp->hd_nirqs++; 1001 } 1002 } 1003 1004 return AE_OK; 1005 } 1006 1007 static int hpet_acpi_add(struct acpi_device *device) 1008 { 1009 acpi_status result; 1010 struct hpet_data data; 1011 1012 memset(&data, 0, sizeof(data)); 1013 1014 result = 1015 acpi_walk_resources(device->handle, METHOD_NAME__CRS, 1016 hpet_resources, &data); 1017 1018 if (ACPI_FAILURE(result)) 1019 return -ENODEV; 1020 1021 if (!data.hd_address || !data.hd_nirqs) { 1022 if (data.hd_address) 1023 iounmap(data.hd_address); 1024 printk("%s: no address or irqs in _CRS\n", __func__); 1025 return -ENODEV; 1026 } 1027 1028 return hpet_alloc(&data); 1029 } 1030 1031 static const struct acpi_device_id hpet_device_ids[] = { 1032 {"PNP0103", 0}, 1033 {"", 0}, 1034 }; 1035 1036 static struct acpi_driver hpet_acpi_driver = { 1037 .name = "hpet", 1038 .ids = hpet_device_ids, 1039 .ops = { 1040 .add = hpet_acpi_add, 1041 }, 1042 }; 1043 1044 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops }; 1045 1046 static int __init hpet_init(void) 1047 { 1048 int result; 1049 1050 result = misc_register(&hpet_misc); 1051 if (result < 0) 1052 return -ENODEV; 1053 1054 sysctl_header = register_sysctl("dev/hpet", hpet_table); 1055 1056 result = acpi_bus_register_driver(&hpet_acpi_driver); 1057 if (result < 0) { 1058 if (sysctl_header) 1059 unregister_sysctl_table(sysctl_header); 1060 misc_deregister(&hpet_misc); 1061 return result; 1062 } 1063 1064 return 0; 1065 } 1066 device_initcall(hpet_init); 1067 1068 /* 1069 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>"); 1070 MODULE_LICENSE("GPL"); 1071 */ 1072