xref: /openbmc/linux/drivers/char/agp/intel-agp.h (revision 99a15348)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Common Intel AGPGART and GTT definitions.
4  */
5 #ifndef _INTEL_AGP_H
6 #define _INTEL_AGP_H
7 
8 /* Intel registers */
9 #define INTEL_APSIZE	0xb4
10 #define INTEL_ATTBASE	0xb8
11 #define INTEL_AGPCTRL	0xb0
12 #define INTEL_NBXCFG	0x50
13 #define INTEL_ERRSTS	0x91
14 
15 /* Intel i830 registers */
16 #define I830_GMCH_CTRL			0x52
17 #define I830_GMCH_ENABLED		0x4
18 #define I830_GMCH_MEM_MASK		0x1
19 #define I830_GMCH_MEM_64M		0x1
20 #define I830_GMCH_MEM_128M		0
21 #define I830_GMCH_GMS_MASK		0x70
22 #define I830_GMCH_GMS_DISABLED		0x00
23 #define I830_GMCH_GMS_LOCAL		0x10
24 #define I830_GMCH_GMS_STOLEN_512	0x20
25 #define I830_GMCH_GMS_STOLEN_1024	0x30
26 #define I830_GMCH_GMS_STOLEN_8192	0x40
27 #define I830_RDRAM_CHANNEL_TYPE		0x03010
28 #define I830_RDRAM_ND(x)		(((x) & 0x20) >> 5)
29 #define I830_RDRAM_DDT(x)		(((x) & 0x18) >> 3)
30 
31 /* This one is for I830MP w. an external graphic card */
32 #define INTEL_I830_ERRSTS	0x92
33 
34 /* Intel 855GM/852GM registers */
35 #define I855_GMCH_GMS_MASK		0xF0
36 #define I855_GMCH_GMS_STOLEN_0M		0x0
37 #define I855_GMCH_GMS_STOLEN_1M		(0x1 << 4)
38 #define I855_GMCH_GMS_STOLEN_4M		(0x2 << 4)
39 #define I855_GMCH_GMS_STOLEN_8M		(0x3 << 4)
40 #define I855_GMCH_GMS_STOLEN_16M	(0x4 << 4)
41 #define I855_GMCH_GMS_STOLEN_32M	(0x5 << 4)
42 #define I85X_CAPID			0x44
43 #define I85X_VARIANT_MASK		0x7
44 #define I85X_VARIANT_SHIFT		5
45 #define I855_GME			0x0
46 #define I855_GM				0x4
47 #define I852_GME			0x2
48 #define I852_GM				0x5
49 
50 /* Intel i845 registers */
51 #define INTEL_I845_AGPM		0x51
52 #define INTEL_I845_ERRSTS	0xc8
53 
54 /* Intel i860 registers */
55 #define INTEL_I860_MCHCFG	0x50
56 #define INTEL_I860_ERRSTS	0xc8
57 
58 /* Intel i810 registers */
59 #define I810_GMADR_BAR		0
60 #define I810_MMADR_BAR		1
61 #define I810_PTE_BASE		0x10000
62 #define I810_PTE_MAIN_UNCACHED	0x00000000
63 #define I810_PTE_LOCAL		0x00000002
64 #define I810_PTE_VALID		0x00000001
65 #define I830_PTE_SYSTEM_CACHED  0x00000006
66 
67 #define I810_SMRAM_MISCC	0x70
68 #define I810_GFX_MEM_WIN_SIZE	0x00010000
69 #define I810_GFX_MEM_WIN_32M	0x00010000
70 #define I810_GMS		0x000000c0
71 #define I810_GMS_DISABLE	0x00000000
72 #define I810_PGETBL_CTL		0x2020
73 #define I810_PGETBL_ENABLED	0x00000001
74 /* Note: PGETBL_CTL2 has a different offset on G33. */
75 #define I965_PGETBL_CTL2	0x20c4
76 #define I965_PGETBL_SIZE_MASK	0x0000000e
77 #define I965_PGETBL_SIZE_512KB	(0 << 1)
78 #define I965_PGETBL_SIZE_256KB	(1 << 1)
79 #define I965_PGETBL_SIZE_128KB	(2 << 1)
80 #define I965_PGETBL_SIZE_1MB	(3 << 1)
81 #define I965_PGETBL_SIZE_2MB	(4 << 1)
82 #define I965_PGETBL_SIZE_1_5MB	(5 << 1)
83 #define G33_GMCH_SIZE_MASK	(3 << 8)
84 #define G33_GMCH_SIZE_1M	(1 << 8)
85 #define G33_GMCH_SIZE_2M	(2 << 8)
86 #define G4x_GMCH_SIZE_MASK	(0xf << 8)
87 #define G4x_GMCH_SIZE_1M	(0x1 << 8)
88 #define G4x_GMCH_SIZE_2M	(0x3 << 8)
89 #define G4x_GMCH_SIZE_VT_EN	(0x8 << 8)
90 #define G4x_GMCH_SIZE_VT_1M	(G4x_GMCH_SIZE_1M | G4x_GMCH_SIZE_VT_EN)
91 #define G4x_GMCH_SIZE_VT_1_5M	((0x2 << 8) | G4x_GMCH_SIZE_VT_EN)
92 #define G4x_GMCH_SIZE_VT_2M	(G4x_GMCH_SIZE_2M | G4x_GMCH_SIZE_VT_EN)
93 
94 #define GFX_FLSH_CNTL		0x2170 /* 915+ */
95 
96 #define I810_DRAM_CTL		0x3000
97 #define I810_DRAM_ROW_0		0x00000001
98 #define I810_DRAM_ROW_0_SDRAM	0x00000001
99 
100 /* Intel 815 register */
101 #define INTEL_815_APCONT	0x51
102 #define INTEL_815_ATTBASE_MASK	~0x1FFFFFFF
103 
104 /* Intel i820 registers */
105 #define INTEL_I820_RDCR		0x51
106 #define INTEL_I820_ERRSTS	0xc8
107 
108 /* Intel i840 registers */
109 #define INTEL_I840_MCHCFG	0x50
110 #define INTEL_I840_ERRSTS	0xc8
111 
112 /* Intel i850 registers */
113 #define INTEL_I850_MCHCFG	0x50
114 #define INTEL_I850_ERRSTS	0xc8
115 
116 /* intel 915G registers */
117 #define I915_GMADR_BAR	2
118 #define I915_MMADR_BAR	0
119 #define I915_PTE_BAR	3
120 #define I915_GMCH_GMS_STOLEN_48M	(0x6 << 4)
121 #define I915_GMCH_GMS_STOLEN_64M	(0x7 << 4)
122 #define G33_GMCH_GMS_STOLEN_128M	(0x8 << 4)
123 #define G33_GMCH_GMS_STOLEN_256M	(0x9 << 4)
124 #define INTEL_GMCH_GMS_STOLEN_96M	(0xa << 4)
125 #define INTEL_GMCH_GMS_STOLEN_160M	(0xb << 4)
126 #define INTEL_GMCH_GMS_STOLEN_224M	(0xc << 4)
127 #define INTEL_GMCH_GMS_STOLEN_352M	(0xd << 4)
128 
129 #define I915_IFPADDR    0x60
130 #define I830_HIC        0x70
131 
132 /* Intel 965G registers */
133 #define I965_MSAC 0x62
134 #define I965_IFPADDR    0x70
135 
136 /* Intel 7505 registers */
137 #define INTEL_I7505_APSIZE	0x74
138 #define INTEL_I7505_NCAPID	0x60
139 #define INTEL_I7505_NISTAT	0x6c
140 #define INTEL_I7505_ATTBASE	0x78
141 #define INTEL_I7505_ERRSTS	0x42
142 #define INTEL_I7505_AGPCTRL	0x70
143 #define INTEL_I7505_MCHCFG	0x50
144 
145 /* pci devices ids */
146 #define PCI_DEVICE_ID_INTEL_E7221_HB	0x2588
147 #define PCI_DEVICE_ID_INTEL_E7221_IG	0x258a
148 #define PCI_DEVICE_ID_INTEL_82946GZ_HB      0x2970
149 #define PCI_DEVICE_ID_INTEL_82946GZ_IG      0x2972
150 #define PCI_DEVICE_ID_INTEL_82G35_HB     0x2980
151 #define PCI_DEVICE_ID_INTEL_82G35_IG     0x2982
152 #define PCI_DEVICE_ID_INTEL_82965Q_HB       0x2990
153 #define PCI_DEVICE_ID_INTEL_82965Q_IG       0x2992
154 #define PCI_DEVICE_ID_INTEL_82965G_HB       0x29A0
155 #define PCI_DEVICE_ID_INTEL_82965G_IG       0x29A2
156 #define PCI_DEVICE_ID_INTEL_82965GM_HB      0x2A00
157 #define PCI_DEVICE_ID_INTEL_82965GM_IG      0x2A02
158 #define PCI_DEVICE_ID_INTEL_82965GME_HB     0x2A10
159 #define PCI_DEVICE_ID_INTEL_82965GME_IG     0x2A12
160 #define PCI_DEVICE_ID_INTEL_82945GME_HB     0x27AC
161 #define PCI_DEVICE_ID_INTEL_82945GME_IG     0x27AE
162 #define PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB        0xA010
163 #define PCI_DEVICE_ID_INTEL_PINEVIEW_M_IG        0xA011
164 #define PCI_DEVICE_ID_INTEL_PINEVIEW_HB         0xA000
165 #define PCI_DEVICE_ID_INTEL_PINEVIEW_IG         0xA001
166 #define PCI_DEVICE_ID_INTEL_G33_HB          0x29C0
167 #define PCI_DEVICE_ID_INTEL_G33_IG          0x29C2
168 #define PCI_DEVICE_ID_INTEL_Q35_HB          0x29B0
169 #define PCI_DEVICE_ID_INTEL_Q35_IG          0x29B2
170 #define PCI_DEVICE_ID_INTEL_Q33_HB          0x29D0
171 #define PCI_DEVICE_ID_INTEL_Q33_IG          0x29D2
172 #define PCI_DEVICE_ID_INTEL_B43_HB          0x2E40
173 #define PCI_DEVICE_ID_INTEL_B43_IG          0x2E42
174 #define PCI_DEVICE_ID_INTEL_B43_1_HB        0x2E90
175 #define PCI_DEVICE_ID_INTEL_B43_1_IG        0x2E92
176 #define PCI_DEVICE_ID_INTEL_GM45_HB         0x2A40
177 #define PCI_DEVICE_ID_INTEL_GM45_IG         0x2A42
178 #define PCI_DEVICE_ID_INTEL_EAGLELAKE_HB        0x2E00
179 #define PCI_DEVICE_ID_INTEL_EAGLELAKE_IG        0x2E02
180 #define PCI_DEVICE_ID_INTEL_Q45_HB          0x2E10
181 #define PCI_DEVICE_ID_INTEL_Q45_IG          0x2E12
182 #define PCI_DEVICE_ID_INTEL_G45_HB          0x2E20
183 #define PCI_DEVICE_ID_INTEL_G45_IG          0x2E22
184 #define PCI_DEVICE_ID_INTEL_G41_HB          0x2E30
185 #define PCI_DEVICE_ID_INTEL_G41_IG          0x2E32
186 #define PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB	    0x0040
187 #define PCI_DEVICE_ID_INTEL_IRONLAKE_D2_HB	    0x0069
188 #define PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG	    0x0042
189 #define PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB	    0x0044
190 #define PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB	    0x0062
191 #define PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB    0x006a
192 #define PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG	    0x0046
193 
194 #endif
195