1 /* 2 * AGPGART driver. 3 * Copyright (C) 2004 Silicon Graphics, Inc. 4 * Copyright (C) 2002-2005 Dave Jones. 5 * Copyright (C) 1999 Jeff Hartmann. 6 * Copyright (C) 1999 Precision Insight, Inc. 7 * Copyright (C) 1999 Xi Graphics, Inc. 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a 10 * copy of this software and associated documentation files (the "Software"), 11 * to deal in the Software without restriction, including without limitation 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 13 * and/or sell copies of the Software, and to permit persons to whom the 14 * Software is furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included 17 * in all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, 23 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 24 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE 25 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 26 * 27 * TODO: 28 * - Allocate more than order 0 pages to avoid too much linear map splitting. 29 */ 30 #include <linux/module.h> 31 #include <linux/pci.h> 32 #include <linux/init.h> 33 #include <linux/pagemap.h> 34 #include <linux/miscdevice.h> 35 #include <linux/pm.h> 36 #include <linux/agp_backend.h> 37 #include <linux/vmalloc.h> 38 #include <linux/dma-mapping.h> 39 #include <linux/mm.h> 40 #include <linux/sched.h> 41 #include <asm/io.h> 42 #include <asm/cacheflush.h> 43 #include <asm/pgtable.h> 44 #include "agp.h" 45 46 __u32 *agp_gatt_table; 47 int agp_memory_reserved; 48 49 /* 50 * Needed by the Nforce GART driver for the time being. Would be 51 * nice to do this some other way instead of needing this export. 52 */ 53 EXPORT_SYMBOL_GPL(agp_memory_reserved); 54 55 /* 56 * Generic routines for handling agp_memory structures - 57 * They use the basic page allocation routines to do the brunt of the work. 58 */ 59 60 void agp_free_key(int key) 61 { 62 if (key < 0) 63 return; 64 65 if (key < MAXKEY) 66 clear_bit(key, agp_bridge->key_list); 67 } 68 EXPORT_SYMBOL(agp_free_key); 69 70 71 static int agp_get_key(void) 72 { 73 int bit; 74 75 bit = find_first_zero_bit(agp_bridge->key_list, MAXKEY); 76 if (bit < MAXKEY) { 77 set_bit(bit, agp_bridge->key_list); 78 return bit; 79 } 80 return -1; 81 } 82 83 void agp_flush_chipset(struct agp_bridge_data *bridge) 84 { 85 if (bridge->driver->chipset_flush) 86 bridge->driver->chipset_flush(bridge); 87 } 88 EXPORT_SYMBOL(agp_flush_chipset); 89 90 /* 91 * Use kmalloc if possible for the page list. Otherwise fall back to 92 * vmalloc. This speeds things up and also saves memory for small AGP 93 * regions. 94 */ 95 96 void agp_alloc_page_array(size_t size, struct agp_memory *mem) 97 { 98 mem->memory = NULL; 99 mem->vmalloc_flag = false; 100 101 if (size <= 2*PAGE_SIZE) 102 mem->memory = kmalloc(size, GFP_KERNEL | __GFP_NORETRY); 103 if (mem->memory == NULL) { 104 mem->memory = vmalloc(size); 105 mem->vmalloc_flag = true; 106 } 107 } 108 EXPORT_SYMBOL(agp_alloc_page_array); 109 110 void agp_free_page_array(struct agp_memory *mem) 111 { 112 if (mem->vmalloc_flag) { 113 vfree(mem->memory); 114 } else { 115 kfree(mem->memory); 116 } 117 } 118 EXPORT_SYMBOL(agp_free_page_array); 119 120 121 static struct agp_memory *agp_create_user_memory(unsigned long num_agp_pages) 122 { 123 struct agp_memory *new; 124 unsigned long alloc_size = num_agp_pages*sizeof(struct page *); 125 126 new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL); 127 if (new == NULL) 128 return NULL; 129 130 new->key = agp_get_key(); 131 132 if (new->key < 0) { 133 kfree(new); 134 return NULL; 135 } 136 137 agp_alloc_page_array(alloc_size, new); 138 139 if (new->memory == NULL) { 140 agp_free_key(new->key); 141 kfree(new); 142 return NULL; 143 } 144 new->num_scratch_pages = 0; 145 return new; 146 } 147 148 struct agp_memory *agp_create_memory(int scratch_pages) 149 { 150 struct agp_memory *new; 151 152 new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL); 153 if (new == NULL) 154 return NULL; 155 156 new->key = agp_get_key(); 157 158 if (new->key < 0) { 159 kfree(new); 160 return NULL; 161 } 162 163 agp_alloc_page_array(PAGE_SIZE * scratch_pages, new); 164 165 if (new->memory == NULL) { 166 agp_free_key(new->key); 167 kfree(new); 168 return NULL; 169 } 170 new->num_scratch_pages = scratch_pages; 171 new->type = AGP_NORMAL_MEMORY; 172 return new; 173 } 174 EXPORT_SYMBOL(agp_create_memory); 175 176 /** 177 * agp_free_memory - free memory associated with an agp_memory pointer. 178 * 179 * @curr: agp_memory pointer to be freed. 180 * 181 * It is the only function that can be called when the backend is not owned 182 * by the caller. (So it can free memory on client death.) 183 */ 184 void agp_free_memory(struct agp_memory *curr) 185 { 186 size_t i; 187 188 if (curr == NULL) 189 return; 190 191 if (curr->is_bound) 192 agp_unbind_memory(curr); 193 194 if (curr->type >= AGP_USER_TYPES) { 195 agp_generic_free_by_type(curr); 196 return; 197 } 198 199 if (curr->type != 0) { 200 curr->bridge->driver->free_by_type(curr); 201 return; 202 } 203 if (curr->page_count != 0) { 204 if (curr->bridge->driver->agp_destroy_pages) { 205 curr->bridge->driver->agp_destroy_pages(curr); 206 } else { 207 208 for (i = 0; i < curr->page_count; i++) { 209 curr->memory[i] = (unsigned long)gart_to_virt( 210 curr->memory[i]); 211 curr->bridge->driver->agp_destroy_page( 212 (void *)curr->memory[i], 213 AGP_PAGE_DESTROY_UNMAP); 214 } 215 for (i = 0; i < curr->page_count; i++) { 216 curr->bridge->driver->agp_destroy_page( 217 (void *)curr->memory[i], 218 AGP_PAGE_DESTROY_FREE); 219 } 220 } 221 } 222 agp_free_key(curr->key); 223 agp_free_page_array(curr); 224 kfree(curr); 225 } 226 EXPORT_SYMBOL(agp_free_memory); 227 228 #define ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long)) 229 230 /** 231 * agp_allocate_memory - allocate a group of pages of a certain type. 232 * 233 * @page_count: size_t argument of the number of pages 234 * @type: u32 argument of the type of memory to be allocated. 235 * 236 * Every agp bridge device will allow you to allocate AGP_NORMAL_MEMORY which 237 * maps to physical ram. Any other type is device dependent. 238 * 239 * It returns NULL whenever memory is unavailable. 240 */ 241 struct agp_memory *agp_allocate_memory(struct agp_bridge_data *bridge, 242 size_t page_count, u32 type) 243 { 244 int scratch_pages; 245 struct agp_memory *new; 246 size_t i; 247 248 if (!bridge) 249 return NULL; 250 251 if ((atomic_read(&bridge->current_memory_agp) + page_count) > bridge->max_memory_agp) 252 return NULL; 253 254 if (type >= AGP_USER_TYPES) { 255 new = agp_generic_alloc_user(page_count, type); 256 if (new) 257 new->bridge = bridge; 258 return new; 259 } 260 261 if (type != 0) { 262 new = bridge->driver->alloc_by_type(page_count, type); 263 if (new) 264 new->bridge = bridge; 265 return new; 266 } 267 268 scratch_pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE; 269 270 new = agp_create_memory(scratch_pages); 271 272 if (new == NULL) 273 return NULL; 274 275 if (bridge->driver->agp_alloc_pages) { 276 if (bridge->driver->agp_alloc_pages(bridge, new, page_count)) { 277 agp_free_memory(new); 278 return NULL; 279 } 280 new->bridge = bridge; 281 return new; 282 } 283 284 for (i = 0; i < page_count; i++) { 285 void *addr = bridge->driver->agp_alloc_page(bridge); 286 287 if (addr == NULL) { 288 agp_free_memory(new); 289 return NULL; 290 } 291 new->memory[i] = virt_to_gart(addr); 292 new->page_count++; 293 } 294 new->bridge = bridge; 295 296 return new; 297 } 298 EXPORT_SYMBOL(agp_allocate_memory); 299 300 301 /* End - Generic routines for handling agp_memory structures */ 302 303 304 static int agp_return_size(void) 305 { 306 int current_size; 307 void *temp; 308 309 temp = agp_bridge->current_size; 310 311 switch (agp_bridge->driver->size_type) { 312 case U8_APER_SIZE: 313 current_size = A_SIZE_8(temp)->size; 314 break; 315 case U16_APER_SIZE: 316 current_size = A_SIZE_16(temp)->size; 317 break; 318 case U32_APER_SIZE: 319 current_size = A_SIZE_32(temp)->size; 320 break; 321 case LVL2_APER_SIZE: 322 current_size = A_SIZE_LVL2(temp)->size; 323 break; 324 case FIXED_APER_SIZE: 325 current_size = A_SIZE_FIX(temp)->size; 326 break; 327 default: 328 current_size = 0; 329 break; 330 } 331 332 current_size -= (agp_memory_reserved / (1024*1024)); 333 if (current_size <0) 334 current_size = 0; 335 return current_size; 336 } 337 338 339 int agp_num_entries(void) 340 { 341 int num_entries; 342 void *temp; 343 344 temp = agp_bridge->current_size; 345 346 switch (agp_bridge->driver->size_type) { 347 case U8_APER_SIZE: 348 num_entries = A_SIZE_8(temp)->num_entries; 349 break; 350 case U16_APER_SIZE: 351 num_entries = A_SIZE_16(temp)->num_entries; 352 break; 353 case U32_APER_SIZE: 354 num_entries = A_SIZE_32(temp)->num_entries; 355 break; 356 case LVL2_APER_SIZE: 357 num_entries = A_SIZE_LVL2(temp)->num_entries; 358 break; 359 case FIXED_APER_SIZE: 360 num_entries = A_SIZE_FIX(temp)->num_entries; 361 break; 362 default: 363 num_entries = 0; 364 break; 365 } 366 367 num_entries -= agp_memory_reserved>>PAGE_SHIFT; 368 if (num_entries<0) 369 num_entries = 0; 370 return num_entries; 371 } 372 EXPORT_SYMBOL_GPL(agp_num_entries); 373 374 375 /** 376 * agp_copy_info - copy bridge state information 377 * 378 * @info: agp_kern_info pointer. The caller should insure that this pointer is valid. 379 * 380 * This function copies information about the agp bridge device and the state of 381 * the agp backend into an agp_kern_info pointer. 382 */ 383 int agp_copy_info(struct agp_bridge_data *bridge, struct agp_kern_info *info) 384 { 385 memset(info, 0, sizeof(struct agp_kern_info)); 386 if (!bridge) { 387 info->chipset = NOT_SUPPORTED; 388 return -EIO; 389 } 390 391 info->version.major = bridge->version->major; 392 info->version.minor = bridge->version->minor; 393 info->chipset = SUPPORTED; 394 info->device = bridge->dev; 395 if (bridge->mode & AGPSTAT_MODE_3_0) 396 info->mode = bridge->mode & ~AGP3_RESERVED_MASK; 397 else 398 info->mode = bridge->mode & ~AGP2_RESERVED_MASK; 399 info->aper_base = bridge->gart_bus_addr; 400 info->aper_size = agp_return_size(); 401 info->max_memory = bridge->max_memory_agp; 402 info->current_memory = atomic_read(&bridge->current_memory_agp); 403 info->cant_use_aperture = bridge->driver->cant_use_aperture; 404 info->vm_ops = bridge->vm_ops; 405 info->page_mask = ~0UL; 406 return 0; 407 } 408 EXPORT_SYMBOL(agp_copy_info); 409 410 /* End - Routine to copy over information structure */ 411 412 /* 413 * Routines for handling swapping of agp_memory into the GATT - 414 * These routines take agp_memory and insert them into the GATT. 415 * They call device specific routines to actually write to the GATT. 416 */ 417 418 /** 419 * agp_bind_memory - Bind an agp_memory structure into the GATT. 420 * 421 * @curr: agp_memory pointer 422 * @pg_start: an offset into the graphics aperture translation table 423 * 424 * It returns -EINVAL if the pointer == NULL. 425 * It returns -EBUSY if the area of the table requested is already in use. 426 */ 427 int agp_bind_memory(struct agp_memory *curr, off_t pg_start) 428 { 429 int ret_val; 430 431 if (curr == NULL) 432 return -EINVAL; 433 434 if (curr->is_bound) { 435 printk(KERN_INFO PFX "memory %p is already bound!\n", curr); 436 return -EINVAL; 437 } 438 if (!curr->is_flushed) { 439 curr->bridge->driver->cache_flush(); 440 curr->is_flushed = true; 441 } 442 ret_val = curr->bridge->driver->insert_memory(curr, pg_start, curr->type); 443 444 if (ret_val != 0) 445 return ret_val; 446 447 curr->is_bound = true; 448 curr->pg_start = pg_start; 449 spin_lock(&agp_bridge->mapped_lock); 450 list_add(&curr->mapped_list, &agp_bridge->mapped_list); 451 spin_unlock(&agp_bridge->mapped_lock); 452 453 return 0; 454 } 455 EXPORT_SYMBOL(agp_bind_memory); 456 457 458 /** 459 * agp_unbind_memory - Removes an agp_memory structure from the GATT 460 * 461 * @curr: agp_memory pointer to be removed from the GATT. 462 * 463 * It returns -EINVAL if this piece of agp_memory is not currently bound to 464 * the graphics aperture translation table or if the agp_memory pointer == NULL 465 */ 466 int agp_unbind_memory(struct agp_memory *curr) 467 { 468 int ret_val; 469 470 if (curr == NULL) 471 return -EINVAL; 472 473 if (!curr->is_bound) { 474 printk(KERN_INFO PFX "memory %p was not bound!\n", curr); 475 return -EINVAL; 476 } 477 478 ret_val = curr->bridge->driver->remove_memory(curr, curr->pg_start, curr->type); 479 480 if (ret_val != 0) 481 return ret_val; 482 483 curr->is_bound = false; 484 curr->pg_start = 0; 485 spin_lock(&curr->bridge->mapped_lock); 486 list_del(&curr->mapped_list); 487 spin_unlock(&curr->bridge->mapped_lock); 488 return 0; 489 } 490 EXPORT_SYMBOL(agp_unbind_memory); 491 492 /** 493 * agp_rebind_emmory - Rewrite the entire GATT, useful on resume 494 */ 495 int agp_rebind_memory(void) 496 { 497 struct agp_memory *curr; 498 int ret_val = 0; 499 500 spin_lock(&agp_bridge->mapped_lock); 501 list_for_each_entry(curr, &agp_bridge->mapped_list, mapped_list) { 502 ret_val = curr->bridge->driver->insert_memory(curr, 503 curr->pg_start, 504 curr->type); 505 if (ret_val != 0) 506 break; 507 } 508 spin_unlock(&agp_bridge->mapped_lock); 509 return ret_val; 510 } 511 EXPORT_SYMBOL(agp_rebind_memory); 512 513 /* End - Routines for handling swapping of agp_memory into the GATT */ 514 515 516 /* Generic Agp routines - Start */ 517 static void agp_v2_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_agpstat) 518 { 519 u32 tmp; 520 521 if (*requested_mode & AGP2_RESERVED_MASK) { 522 printk(KERN_INFO PFX "reserved bits set (%x) in mode 0x%x. Fixed.\n", 523 *requested_mode & AGP2_RESERVED_MASK, *requested_mode); 524 *requested_mode &= ~AGP2_RESERVED_MASK; 525 } 526 527 /* 528 * Some dumb bridges are programmed to disobey the AGP2 spec. 529 * This is likely a BIOS misprogramming rather than poweron default, or 530 * it would be a lot more common. 531 * https://bugs.freedesktop.org/show_bug.cgi?id=8816 532 * AGPv2 spec 6.1.9 states: 533 * The RATE field indicates the data transfer rates supported by this 534 * device. A.G.P. devices must report all that apply. 535 * Fix them up as best we can. 536 */ 537 switch (*bridge_agpstat & 7) { 538 case 4: 539 *bridge_agpstat |= (AGPSTAT2_2X | AGPSTAT2_1X); 540 printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x4 rate" 541 "Fixing up support for x2 & x1\n"); 542 break; 543 case 2: 544 *bridge_agpstat |= AGPSTAT2_1X; 545 printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x2 rate" 546 "Fixing up support for x1\n"); 547 break; 548 default: 549 break; 550 } 551 552 /* Check the speed bits make sense. Only one should be set. */ 553 tmp = *requested_mode & 7; 554 switch (tmp) { 555 case 0: 556 printk(KERN_INFO PFX "%s tried to set rate=x0. Setting to x1 mode.\n", current->comm); 557 *requested_mode |= AGPSTAT2_1X; 558 break; 559 case 1: 560 case 2: 561 break; 562 case 3: 563 *requested_mode &= ~(AGPSTAT2_1X); /* rate=2 */ 564 break; 565 case 4: 566 break; 567 case 5: 568 case 6: 569 case 7: 570 *requested_mode &= ~(AGPSTAT2_1X|AGPSTAT2_2X); /* rate=4*/ 571 break; 572 } 573 574 /* disable SBA if it's not supported */ 575 if (!((*bridge_agpstat & AGPSTAT_SBA) && (*vga_agpstat & AGPSTAT_SBA) && (*requested_mode & AGPSTAT_SBA))) 576 *bridge_agpstat &= ~AGPSTAT_SBA; 577 578 /* Set rate */ 579 if (!((*bridge_agpstat & AGPSTAT2_4X) && (*vga_agpstat & AGPSTAT2_4X) && (*requested_mode & AGPSTAT2_4X))) 580 *bridge_agpstat &= ~AGPSTAT2_4X; 581 582 if (!((*bridge_agpstat & AGPSTAT2_2X) && (*vga_agpstat & AGPSTAT2_2X) && (*requested_mode & AGPSTAT2_2X))) 583 *bridge_agpstat &= ~AGPSTAT2_2X; 584 585 if (!((*bridge_agpstat & AGPSTAT2_1X) && (*vga_agpstat & AGPSTAT2_1X) && (*requested_mode & AGPSTAT2_1X))) 586 *bridge_agpstat &= ~AGPSTAT2_1X; 587 588 /* Now we know what mode it should be, clear out the unwanted bits. */ 589 if (*bridge_agpstat & AGPSTAT2_4X) 590 *bridge_agpstat &= ~(AGPSTAT2_1X | AGPSTAT2_2X); /* 4X */ 591 592 if (*bridge_agpstat & AGPSTAT2_2X) 593 *bridge_agpstat &= ~(AGPSTAT2_1X | AGPSTAT2_4X); /* 2X */ 594 595 if (*bridge_agpstat & AGPSTAT2_1X) 596 *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X); /* 1X */ 597 598 /* Apply any errata. */ 599 if (agp_bridge->flags & AGP_ERRATA_FASTWRITES) 600 *bridge_agpstat &= ~AGPSTAT_FW; 601 602 if (agp_bridge->flags & AGP_ERRATA_SBA) 603 *bridge_agpstat &= ~AGPSTAT_SBA; 604 605 if (agp_bridge->flags & AGP_ERRATA_1X) { 606 *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X); 607 *bridge_agpstat |= AGPSTAT2_1X; 608 } 609 610 /* If we've dropped down to 1X, disable fast writes. */ 611 if (*bridge_agpstat & AGPSTAT2_1X) 612 *bridge_agpstat &= ~AGPSTAT_FW; 613 } 614 615 /* 616 * requested_mode = Mode requested by (typically) X. 617 * bridge_agpstat = PCI_AGP_STATUS from agp bridge. 618 * vga_agpstat = PCI_AGP_STATUS from graphic card. 619 */ 620 static void agp_v3_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_agpstat) 621 { 622 u32 origbridge=*bridge_agpstat, origvga=*vga_agpstat; 623 u32 tmp; 624 625 if (*requested_mode & AGP3_RESERVED_MASK) { 626 printk(KERN_INFO PFX "reserved bits set (%x) in mode 0x%x. Fixed.\n", 627 *requested_mode & AGP3_RESERVED_MASK, *requested_mode); 628 *requested_mode &= ~AGP3_RESERVED_MASK; 629 } 630 631 /* Check the speed bits make sense. */ 632 tmp = *requested_mode & 7; 633 if (tmp == 0) { 634 printk(KERN_INFO PFX "%s tried to set rate=x0. Setting to AGP3 x4 mode.\n", current->comm); 635 *requested_mode |= AGPSTAT3_4X; 636 } 637 if (tmp >= 3) { 638 printk(KERN_INFO PFX "%s tried to set rate=x%d. Setting to AGP3 x8 mode.\n", current->comm, tmp * 4); 639 *requested_mode = (*requested_mode & ~7) | AGPSTAT3_8X; 640 } 641 642 /* ARQSZ - Set the value to the maximum one. 643 * Don't allow the mode register to override values. */ 644 *bridge_agpstat = ((*bridge_agpstat & ~AGPSTAT_ARQSZ) | 645 max_t(u32,(*bridge_agpstat & AGPSTAT_ARQSZ),(*vga_agpstat & AGPSTAT_ARQSZ))); 646 647 /* Calibration cycle. 648 * Don't allow the mode register to override values. */ 649 *bridge_agpstat = ((*bridge_agpstat & ~AGPSTAT_CAL_MASK) | 650 min_t(u32,(*bridge_agpstat & AGPSTAT_CAL_MASK),(*vga_agpstat & AGPSTAT_CAL_MASK))); 651 652 /* SBA *must* be supported for AGP v3 */ 653 *bridge_agpstat |= AGPSTAT_SBA; 654 655 /* 656 * Set speed. 657 * Check for invalid speeds. This can happen when applications 658 * written before the AGP 3.0 standard pass AGP2.x modes to AGP3 hardware 659 */ 660 if (*requested_mode & AGPSTAT_MODE_3_0) { 661 /* 662 * Caller hasn't a clue what it is doing. Bridge is in 3.0 mode, 663 * have been passed a 3.0 mode, but with 2.x speed bits set. 664 * AGP2.x 4x -> AGP3.0 4x. 665 */ 666 if (*requested_mode & AGPSTAT2_4X) { 667 printk(KERN_INFO PFX "%s passes broken AGP3 flags (%x). Fixed.\n", 668 current->comm, *requested_mode); 669 *requested_mode &= ~AGPSTAT2_4X; 670 *requested_mode |= AGPSTAT3_4X; 671 } 672 } else { 673 /* 674 * The caller doesn't know what they are doing. We are in 3.0 mode, 675 * but have been passed an AGP 2.x mode. 676 * Convert AGP 1x,2x,4x -> AGP 3.0 4x. 677 */ 678 printk(KERN_INFO PFX "%s passes broken AGP2 flags (%x) in AGP3 mode. Fixed.\n", 679 current->comm, *requested_mode); 680 *requested_mode &= ~(AGPSTAT2_4X | AGPSTAT2_2X | AGPSTAT2_1X); 681 *requested_mode |= AGPSTAT3_4X; 682 } 683 684 if (*requested_mode & AGPSTAT3_8X) { 685 if (!(*bridge_agpstat & AGPSTAT3_8X)) { 686 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD); 687 *bridge_agpstat |= AGPSTAT3_4X; 688 printk(KERN_INFO PFX "%s requested AGPx8 but bridge not capable.\n", current->comm); 689 return; 690 } 691 if (!(*vga_agpstat & AGPSTAT3_8X)) { 692 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD); 693 *bridge_agpstat |= AGPSTAT3_4X; 694 printk(KERN_INFO PFX "%s requested AGPx8 but graphic card not capable.\n", current->comm); 695 return; 696 } 697 /* All set, bridge & device can do AGP x8*/ 698 *bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD); 699 goto done; 700 701 } else if (*requested_mode & AGPSTAT3_4X) { 702 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD); 703 *bridge_agpstat |= AGPSTAT3_4X; 704 goto done; 705 706 } else { 707 708 /* 709 * If we didn't specify an AGP mode, we see if both 710 * the graphics card, and the bridge can do x8, and use if so. 711 * If not, we fall back to x4 mode. 712 */ 713 if ((*bridge_agpstat & AGPSTAT3_8X) && (*vga_agpstat & AGPSTAT3_8X)) { 714 printk(KERN_INFO PFX "No AGP mode specified. Setting to highest mode " 715 "supported by bridge & card (x8).\n"); 716 *bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD); 717 *vga_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD); 718 } else { 719 printk(KERN_INFO PFX "Fell back to AGPx4 mode because"); 720 if (!(*bridge_agpstat & AGPSTAT3_8X)) { 721 printk(KERN_INFO PFX "bridge couldn't do x8. bridge_agpstat:%x (orig=%x)\n", 722 *bridge_agpstat, origbridge); 723 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD); 724 *bridge_agpstat |= AGPSTAT3_4X; 725 } 726 if (!(*vga_agpstat & AGPSTAT3_8X)) { 727 printk(KERN_INFO PFX "graphics card couldn't do x8. vga_agpstat:%x (orig=%x)\n", 728 *vga_agpstat, origvga); 729 *vga_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD); 730 *vga_agpstat |= AGPSTAT3_4X; 731 } 732 } 733 } 734 735 done: 736 /* Apply any errata. */ 737 if (agp_bridge->flags & AGP_ERRATA_FASTWRITES) 738 *bridge_agpstat &= ~AGPSTAT_FW; 739 740 if (agp_bridge->flags & AGP_ERRATA_SBA) 741 *bridge_agpstat &= ~AGPSTAT_SBA; 742 743 if (agp_bridge->flags & AGP_ERRATA_1X) { 744 *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X); 745 *bridge_agpstat |= AGPSTAT2_1X; 746 } 747 } 748 749 750 /** 751 * agp_collect_device_status - determine correct agp_cmd from various agp_stat's 752 * @bridge: an agp_bridge_data struct allocated for the AGP host bridge. 753 * @requested_mode: requested agp_stat from userspace (Typically from X) 754 * @bridge_agpstat: current agp_stat from AGP bridge. 755 * 756 * This function will hunt for an AGP graphics card, and try to match 757 * the requested mode to the capabilities of both the bridge and the card. 758 */ 759 u32 agp_collect_device_status(struct agp_bridge_data *bridge, u32 requested_mode, u32 bridge_agpstat) 760 { 761 struct pci_dev *device = NULL; 762 u32 vga_agpstat; 763 u8 cap_ptr; 764 765 for (;;) { 766 device = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, device); 767 if (!device) { 768 printk(KERN_INFO PFX "Couldn't find an AGP VGA controller.\n"); 769 return 0; 770 } 771 cap_ptr = pci_find_capability(device, PCI_CAP_ID_AGP); 772 if (cap_ptr) 773 break; 774 } 775 776 /* 777 * Ok, here we have a AGP device. Disable impossible 778 * settings, and adjust the readqueue to the minimum. 779 */ 780 pci_read_config_dword(device, cap_ptr+PCI_AGP_STATUS, &vga_agpstat); 781 782 /* adjust RQ depth */ 783 bridge_agpstat = ((bridge_agpstat & ~AGPSTAT_RQ_DEPTH) | 784 min_t(u32, (requested_mode & AGPSTAT_RQ_DEPTH), 785 min_t(u32, (bridge_agpstat & AGPSTAT_RQ_DEPTH), (vga_agpstat & AGPSTAT_RQ_DEPTH)))); 786 787 /* disable FW if it's not supported */ 788 if (!((bridge_agpstat & AGPSTAT_FW) && 789 (vga_agpstat & AGPSTAT_FW) && 790 (requested_mode & AGPSTAT_FW))) 791 bridge_agpstat &= ~AGPSTAT_FW; 792 793 /* Check to see if we are operating in 3.0 mode */ 794 if (agp_bridge->mode & AGPSTAT_MODE_3_0) 795 agp_v3_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat); 796 else 797 agp_v2_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat); 798 799 pci_dev_put(device); 800 return bridge_agpstat; 801 } 802 EXPORT_SYMBOL(agp_collect_device_status); 803 804 805 void agp_device_command(u32 bridge_agpstat, bool agp_v3) 806 { 807 struct pci_dev *device = NULL; 808 int mode; 809 810 mode = bridge_agpstat & 0x7; 811 if (agp_v3) 812 mode *= 4; 813 814 for_each_pci_dev(device) { 815 u8 agp = pci_find_capability(device, PCI_CAP_ID_AGP); 816 if (!agp) 817 continue; 818 819 dev_info(&device->dev, "putting AGP V%d device into %dx mode\n", 820 agp_v3 ? 3 : 2, mode); 821 pci_write_config_dword(device, agp + PCI_AGP_COMMAND, bridge_agpstat); 822 } 823 } 824 EXPORT_SYMBOL(agp_device_command); 825 826 827 void get_agp_version(struct agp_bridge_data *bridge) 828 { 829 u32 ncapid; 830 831 /* Exit early if already set by errata workarounds. */ 832 if (bridge->major_version != 0) 833 return; 834 835 pci_read_config_dword(bridge->dev, bridge->capndx, &ncapid); 836 bridge->major_version = (ncapid >> AGP_MAJOR_VERSION_SHIFT) & 0xf; 837 bridge->minor_version = (ncapid >> AGP_MINOR_VERSION_SHIFT) & 0xf; 838 } 839 EXPORT_SYMBOL(get_agp_version); 840 841 842 void agp_generic_enable(struct agp_bridge_data *bridge, u32 requested_mode) 843 { 844 u32 bridge_agpstat, temp; 845 846 get_agp_version(agp_bridge); 847 848 dev_info(&agp_bridge->dev->dev, "AGP %d.%d bridge\n", 849 agp_bridge->major_version, agp_bridge->minor_version); 850 851 pci_read_config_dword(agp_bridge->dev, 852 agp_bridge->capndx + PCI_AGP_STATUS, &bridge_agpstat); 853 854 bridge_agpstat = agp_collect_device_status(agp_bridge, requested_mode, bridge_agpstat); 855 if (bridge_agpstat == 0) 856 /* Something bad happened. FIXME: Return error code? */ 857 return; 858 859 bridge_agpstat |= AGPSTAT_AGP_ENABLE; 860 861 /* Do AGP version specific frobbing. */ 862 if (bridge->major_version >= 3) { 863 if (bridge->mode & AGPSTAT_MODE_3_0) { 864 /* If we have 3.5, we can do the isoch stuff. */ 865 if (bridge->minor_version >= 5) 866 agp_3_5_enable(bridge); 867 agp_device_command(bridge_agpstat, true); 868 return; 869 } else { 870 /* Disable calibration cycle in RX91<1> when not in AGP3.0 mode of operation.*/ 871 bridge_agpstat &= ~(7<<10) ; 872 pci_read_config_dword(bridge->dev, 873 bridge->capndx+AGPCTRL, &temp); 874 temp |= (1<<9); 875 pci_write_config_dword(bridge->dev, 876 bridge->capndx+AGPCTRL, temp); 877 878 dev_info(&bridge->dev->dev, "bridge is in legacy mode, falling back to 2.x\n"); 879 } 880 } 881 882 /* AGP v<3 */ 883 agp_device_command(bridge_agpstat, false); 884 } 885 EXPORT_SYMBOL(agp_generic_enable); 886 887 888 int agp_generic_create_gatt_table(struct agp_bridge_data *bridge) 889 { 890 char *table; 891 char *table_end; 892 int size; 893 int page_order; 894 int num_entries; 895 int i; 896 void *temp; 897 struct page *page; 898 899 /* The generic routines can't handle 2 level gatt's */ 900 if (bridge->driver->size_type == LVL2_APER_SIZE) 901 return -EINVAL; 902 903 table = NULL; 904 i = bridge->aperture_size_idx; 905 temp = bridge->current_size; 906 size = page_order = num_entries = 0; 907 908 if (bridge->driver->size_type != FIXED_APER_SIZE) { 909 do { 910 switch (bridge->driver->size_type) { 911 case U8_APER_SIZE: 912 size = A_SIZE_8(temp)->size; 913 page_order = 914 A_SIZE_8(temp)->page_order; 915 num_entries = 916 A_SIZE_8(temp)->num_entries; 917 break; 918 case U16_APER_SIZE: 919 size = A_SIZE_16(temp)->size; 920 page_order = A_SIZE_16(temp)->page_order; 921 num_entries = A_SIZE_16(temp)->num_entries; 922 break; 923 case U32_APER_SIZE: 924 size = A_SIZE_32(temp)->size; 925 page_order = A_SIZE_32(temp)->page_order; 926 num_entries = A_SIZE_32(temp)->num_entries; 927 break; 928 /* This case will never really happen. */ 929 case FIXED_APER_SIZE: 930 case LVL2_APER_SIZE: 931 default: 932 size = page_order = num_entries = 0; 933 break; 934 } 935 936 table = alloc_gatt_pages(page_order); 937 938 if (table == NULL) { 939 i++; 940 switch (bridge->driver->size_type) { 941 case U8_APER_SIZE: 942 bridge->current_size = A_IDX8(bridge); 943 break; 944 case U16_APER_SIZE: 945 bridge->current_size = A_IDX16(bridge); 946 break; 947 case U32_APER_SIZE: 948 bridge->current_size = A_IDX32(bridge); 949 break; 950 /* These cases will never really happen. */ 951 case FIXED_APER_SIZE: 952 case LVL2_APER_SIZE: 953 default: 954 break; 955 } 956 temp = bridge->current_size; 957 } else { 958 bridge->aperture_size_idx = i; 959 } 960 } while (!table && (i < bridge->driver->num_aperture_sizes)); 961 } else { 962 size = ((struct aper_size_info_fixed *) temp)->size; 963 page_order = ((struct aper_size_info_fixed *) temp)->page_order; 964 num_entries = ((struct aper_size_info_fixed *) temp)->num_entries; 965 table = alloc_gatt_pages(page_order); 966 } 967 968 if (table == NULL) 969 return -ENOMEM; 970 971 table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1); 972 973 for (page = virt_to_page(table); page <= virt_to_page(table_end); page++) 974 SetPageReserved(page); 975 976 bridge->gatt_table_real = (u32 *) table; 977 agp_gatt_table = (void *)table; 978 979 bridge->driver->cache_flush(); 980 #ifdef CONFIG_X86 981 set_memory_uc((unsigned long)table, 1 << page_order); 982 bridge->gatt_table = (void *)table; 983 #else 984 bridge->gatt_table = ioremap_nocache(virt_to_gart(table), 985 (PAGE_SIZE * (1 << page_order))); 986 bridge->driver->cache_flush(); 987 #endif 988 989 if (bridge->gatt_table == NULL) { 990 for (page = virt_to_page(table); page <= virt_to_page(table_end); page++) 991 ClearPageReserved(page); 992 993 free_gatt_pages(table, page_order); 994 995 return -ENOMEM; 996 } 997 bridge->gatt_bus_addr = virt_to_gart(bridge->gatt_table_real); 998 999 /* AK: bogus, should encode addresses > 4GB */ 1000 for (i = 0; i < num_entries; i++) { 1001 writel(bridge->scratch_page, bridge->gatt_table+i); 1002 readl(bridge->gatt_table+i); /* PCI Posting. */ 1003 } 1004 1005 return 0; 1006 } 1007 EXPORT_SYMBOL(agp_generic_create_gatt_table); 1008 1009 int agp_generic_free_gatt_table(struct agp_bridge_data *bridge) 1010 { 1011 int page_order; 1012 char *table, *table_end; 1013 void *temp; 1014 struct page *page; 1015 1016 temp = bridge->current_size; 1017 1018 switch (bridge->driver->size_type) { 1019 case U8_APER_SIZE: 1020 page_order = A_SIZE_8(temp)->page_order; 1021 break; 1022 case U16_APER_SIZE: 1023 page_order = A_SIZE_16(temp)->page_order; 1024 break; 1025 case U32_APER_SIZE: 1026 page_order = A_SIZE_32(temp)->page_order; 1027 break; 1028 case FIXED_APER_SIZE: 1029 page_order = A_SIZE_FIX(temp)->page_order; 1030 break; 1031 case LVL2_APER_SIZE: 1032 /* The generic routines can't deal with 2 level gatt's */ 1033 return -EINVAL; 1034 break; 1035 default: 1036 page_order = 0; 1037 break; 1038 } 1039 1040 /* Do not worry about freeing memory, because if this is 1041 * called, then all agp memory is deallocated and removed 1042 * from the table. */ 1043 1044 #ifdef CONFIG_X86 1045 set_memory_wb((unsigned long)bridge->gatt_table, 1 << page_order); 1046 #else 1047 iounmap(bridge->gatt_table); 1048 #endif 1049 table = (char *) bridge->gatt_table_real; 1050 table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1); 1051 1052 for (page = virt_to_page(table); page <= virt_to_page(table_end); page++) 1053 ClearPageReserved(page); 1054 1055 free_gatt_pages(bridge->gatt_table_real, page_order); 1056 1057 agp_gatt_table = NULL; 1058 bridge->gatt_table = NULL; 1059 bridge->gatt_table_real = NULL; 1060 bridge->gatt_bus_addr = 0; 1061 1062 return 0; 1063 } 1064 EXPORT_SYMBOL(agp_generic_free_gatt_table); 1065 1066 1067 int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type) 1068 { 1069 int num_entries; 1070 size_t i; 1071 off_t j; 1072 void *temp; 1073 struct agp_bridge_data *bridge; 1074 int mask_type; 1075 1076 bridge = mem->bridge; 1077 if (!bridge) 1078 return -EINVAL; 1079 1080 if (mem->page_count == 0) 1081 return 0; 1082 1083 temp = bridge->current_size; 1084 1085 switch (bridge->driver->size_type) { 1086 case U8_APER_SIZE: 1087 num_entries = A_SIZE_8(temp)->num_entries; 1088 break; 1089 case U16_APER_SIZE: 1090 num_entries = A_SIZE_16(temp)->num_entries; 1091 break; 1092 case U32_APER_SIZE: 1093 num_entries = A_SIZE_32(temp)->num_entries; 1094 break; 1095 case FIXED_APER_SIZE: 1096 num_entries = A_SIZE_FIX(temp)->num_entries; 1097 break; 1098 case LVL2_APER_SIZE: 1099 /* The generic routines can't deal with 2 level gatt's */ 1100 return -EINVAL; 1101 break; 1102 default: 1103 num_entries = 0; 1104 break; 1105 } 1106 1107 num_entries -= agp_memory_reserved/PAGE_SIZE; 1108 if (num_entries < 0) num_entries = 0; 1109 1110 if (type != mem->type) 1111 return -EINVAL; 1112 1113 mask_type = bridge->driver->agp_type_to_mask_type(bridge, type); 1114 if (mask_type != 0) { 1115 /* The generic routines know nothing of memory types */ 1116 return -EINVAL; 1117 } 1118 1119 /* AK: could wrap */ 1120 if ((pg_start + mem->page_count) > num_entries) 1121 return -EINVAL; 1122 1123 j = pg_start; 1124 1125 while (j < (pg_start + mem->page_count)) { 1126 if (!PGE_EMPTY(bridge, readl(bridge->gatt_table+j))) 1127 return -EBUSY; 1128 j++; 1129 } 1130 1131 if (!mem->is_flushed) { 1132 bridge->driver->cache_flush(); 1133 mem->is_flushed = true; 1134 } 1135 1136 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { 1137 writel(bridge->driver->mask_memory(bridge, mem->memory[i], mask_type), 1138 bridge->gatt_table+j); 1139 } 1140 readl(bridge->gatt_table+j-1); /* PCI Posting. */ 1141 1142 bridge->driver->tlb_flush(mem); 1143 return 0; 1144 } 1145 EXPORT_SYMBOL(agp_generic_insert_memory); 1146 1147 1148 int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type) 1149 { 1150 size_t i; 1151 struct agp_bridge_data *bridge; 1152 int mask_type; 1153 1154 bridge = mem->bridge; 1155 if (!bridge) 1156 return -EINVAL; 1157 1158 if (mem->page_count == 0) 1159 return 0; 1160 1161 if (type != mem->type) 1162 return -EINVAL; 1163 1164 mask_type = bridge->driver->agp_type_to_mask_type(bridge, type); 1165 if (mask_type != 0) { 1166 /* The generic routines know nothing of memory types */ 1167 return -EINVAL; 1168 } 1169 1170 /* AK: bogus, should encode addresses > 4GB */ 1171 for (i = pg_start; i < (mem->page_count + pg_start); i++) { 1172 writel(bridge->scratch_page, bridge->gatt_table+i); 1173 } 1174 readl(bridge->gatt_table+i-1); /* PCI Posting. */ 1175 1176 bridge->driver->tlb_flush(mem); 1177 return 0; 1178 } 1179 EXPORT_SYMBOL(agp_generic_remove_memory); 1180 1181 struct agp_memory *agp_generic_alloc_by_type(size_t page_count, int type) 1182 { 1183 return NULL; 1184 } 1185 EXPORT_SYMBOL(agp_generic_alloc_by_type); 1186 1187 void agp_generic_free_by_type(struct agp_memory *curr) 1188 { 1189 agp_free_page_array(curr); 1190 agp_free_key(curr->key); 1191 kfree(curr); 1192 } 1193 EXPORT_SYMBOL(agp_generic_free_by_type); 1194 1195 struct agp_memory *agp_generic_alloc_user(size_t page_count, int type) 1196 { 1197 struct agp_memory *new; 1198 int i; 1199 int pages; 1200 1201 pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE; 1202 new = agp_create_user_memory(page_count); 1203 if (new == NULL) 1204 return NULL; 1205 1206 for (i = 0; i < page_count; i++) 1207 new->memory[i] = 0; 1208 new->page_count = 0; 1209 new->type = type; 1210 new->num_scratch_pages = pages; 1211 1212 return new; 1213 } 1214 EXPORT_SYMBOL(agp_generic_alloc_user); 1215 1216 /* 1217 * Basic Page Allocation Routines - 1218 * These routines handle page allocation and by default they reserve the allocated 1219 * memory. They also handle incrementing the current_memory_agp value, Which is checked 1220 * against a maximum value. 1221 */ 1222 1223 int agp_generic_alloc_pages(struct agp_bridge_data *bridge, struct agp_memory *mem, size_t num_pages) 1224 { 1225 struct page * page; 1226 int i, ret = -ENOMEM; 1227 1228 for (i = 0; i < num_pages; i++) { 1229 page = alloc_page(GFP_KERNEL | GFP_DMA32); 1230 /* agp_free_memory() needs gart address */ 1231 if (page == NULL) 1232 goto out; 1233 1234 #ifndef CONFIG_X86 1235 map_page_into_agp(page); 1236 #endif 1237 get_page(page); 1238 atomic_inc(&agp_bridge->current_memory_agp); 1239 1240 /* set_memory_array_uc() needs virtual address */ 1241 mem->memory[i] = (unsigned long)page_address(page); 1242 mem->page_count++; 1243 } 1244 1245 #ifdef CONFIG_X86 1246 set_memory_array_uc(mem->memory, num_pages); 1247 #endif 1248 ret = 0; 1249 out: 1250 for (i = 0; i < mem->page_count; i++) 1251 mem->memory[i] = virt_to_gart((void *)mem->memory[i]); 1252 return ret; 1253 } 1254 EXPORT_SYMBOL(agp_generic_alloc_pages); 1255 1256 void *agp_generic_alloc_page(struct agp_bridge_data *bridge) 1257 { 1258 struct page * page; 1259 1260 page = alloc_page(GFP_KERNEL | GFP_DMA32); 1261 if (page == NULL) 1262 return NULL; 1263 1264 map_page_into_agp(page); 1265 1266 get_page(page); 1267 atomic_inc(&agp_bridge->current_memory_agp); 1268 return page_address(page); 1269 } 1270 EXPORT_SYMBOL(agp_generic_alloc_page); 1271 1272 void agp_generic_destroy_pages(struct agp_memory *mem) 1273 { 1274 int i; 1275 void *addr; 1276 struct page *page; 1277 1278 if (!mem) 1279 return; 1280 1281 for (i = 0; i < mem->page_count; i++) 1282 mem->memory[i] = (unsigned long)gart_to_virt(mem->memory[i]); 1283 1284 #ifdef CONFIG_X86 1285 set_memory_array_wb(mem->memory, mem->page_count); 1286 #endif 1287 1288 for (i = 0; i < mem->page_count; i++) { 1289 addr = (void *)mem->memory[i]; 1290 page = virt_to_page(addr); 1291 1292 #ifndef CONFIG_X86 1293 unmap_page_from_agp(page); 1294 #endif 1295 1296 put_page(page); 1297 free_page((unsigned long)addr); 1298 atomic_dec(&agp_bridge->current_memory_agp); 1299 mem->memory[i] = 0; 1300 } 1301 } 1302 EXPORT_SYMBOL(agp_generic_destroy_pages); 1303 1304 void agp_generic_destroy_page(void *addr, int flags) 1305 { 1306 struct page *page; 1307 1308 if (addr == NULL) 1309 return; 1310 1311 page = virt_to_page(addr); 1312 if (flags & AGP_PAGE_DESTROY_UNMAP) 1313 unmap_page_from_agp(page); 1314 1315 if (flags & AGP_PAGE_DESTROY_FREE) { 1316 put_page(page); 1317 free_page((unsigned long)addr); 1318 atomic_dec(&agp_bridge->current_memory_agp); 1319 } 1320 } 1321 EXPORT_SYMBOL(agp_generic_destroy_page); 1322 1323 /* End Basic Page Allocation Routines */ 1324 1325 1326 /** 1327 * agp_enable - initialise the agp point-to-point connection. 1328 * 1329 * @mode: agp mode register value to configure with. 1330 */ 1331 void agp_enable(struct agp_bridge_data *bridge, u32 mode) 1332 { 1333 if (!bridge) 1334 return; 1335 bridge->driver->agp_enable(bridge, mode); 1336 } 1337 EXPORT_SYMBOL(agp_enable); 1338 1339 /* When we remove the global variable agp_bridge from all drivers 1340 * then agp_alloc_bridge and agp_generic_find_bridge need to be updated 1341 */ 1342 1343 struct agp_bridge_data *agp_generic_find_bridge(struct pci_dev *pdev) 1344 { 1345 if (list_empty(&agp_bridges)) 1346 return NULL; 1347 1348 return agp_bridge; 1349 } 1350 1351 static void ipi_handler(void *null) 1352 { 1353 flush_agp_cache(); 1354 } 1355 1356 void global_cache_flush(void) 1357 { 1358 if (on_each_cpu(ipi_handler, NULL, 1) != 0) 1359 panic(PFX "timed out waiting for the other CPUs!\n"); 1360 } 1361 EXPORT_SYMBOL(global_cache_flush); 1362 1363 unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge, 1364 unsigned long addr, int type) 1365 { 1366 /* memory type is ignored in the generic routine */ 1367 if (bridge->driver->masks) 1368 return addr | bridge->driver->masks[0].mask; 1369 else 1370 return addr; 1371 } 1372 EXPORT_SYMBOL(agp_generic_mask_memory); 1373 1374 int agp_generic_type_to_mask_type(struct agp_bridge_data *bridge, 1375 int type) 1376 { 1377 if (type >= AGP_USER_TYPES) 1378 return 0; 1379 return type; 1380 } 1381 EXPORT_SYMBOL(agp_generic_type_to_mask_type); 1382 1383 /* 1384 * These functions are implemented according to the AGPv3 spec, 1385 * which covers implementation details that had previously been 1386 * left open. 1387 */ 1388 1389 int agp3_generic_fetch_size(void) 1390 { 1391 u16 temp_size; 1392 int i; 1393 struct aper_size_info_16 *values; 1394 1395 pci_read_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, &temp_size); 1396 values = A_SIZE_16(agp_bridge->driver->aperture_sizes); 1397 1398 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) { 1399 if (temp_size == values[i].size_value) { 1400 agp_bridge->previous_size = 1401 agp_bridge->current_size = (void *) (values + i); 1402 1403 agp_bridge->aperture_size_idx = i; 1404 return values[i].size; 1405 } 1406 } 1407 return 0; 1408 } 1409 EXPORT_SYMBOL(agp3_generic_fetch_size); 1410 1411 void agp3_generic_tlbflush(struct agp_memory *mem) 1412 { 1413 u32 ctrl; 1414 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl); 1415 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_GTLBEN); 1416 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl); 1417 } 1418 EXPORT_SYMBOL(agp3_generic_tlbflush); 1419 1420 int agp3_generic_configure(void) 1421 { 1422 u32 temp; 1423 struct aper_size_info_16 *current_size; 1424 1425 current_size = A_SIZE_16(agp_bridge->current_size); 1426 1427 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp); 1428 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK); 1429 1430 /* set aperture size */ 1431 pci_write_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, current_size->size_value); 1432 /* set gart pointer */ 1433 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPGARTLO, agp_bridge->gatt_bus_addr); 1434 /* enable aperture and GTLB */ 1435 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &temp); 1436 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, temp | AGPCTRL_APERENB | AGPCTRL_GTLBEN); 1437 return 0; 1438 } 1439 EXPORT_SYMBOL(agp3_generic_configure); 1440 1441 void agp3_generic_cleanup(void) 1442 { 1443 u32 ctrl; 1444 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl); 1445 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_APERENB); 1446 } 1447 EXPORT_SYMBOL(agp3_generic_cleanup); 1448 1449 const struct aper_size_info_16 agp3_generic_sizes[AGP_GENERIC_SIZES_ENTRIES] = 1450 { 1451 {4096, 1048576, 10,0x000}, 1452 {2048, 524288, 9, 0x800}, 1453 {1024, 262144, 8, 0xc00}, 1454 { 512, 131072, 7, 0xe00}, 1455 { 256, 65536, 6, 0xf00}, 1456 { 128, 32768, 5, 0xf20}, 1457 { 64, 16384, 4, 0xf30}, 1458 { 32, 8192, 3, 0xf38}, 1459 { 16, 4096, 2, 0xf3c}, 1460 { 8, 2048, 1, 0xf3e}, 1461 { 4, 1024, 0, 0xf3f} 1462 }; 1463 EXPORT_SYMBOL(agp3_generic_sizes); 1464 1465