xref: /openbmc/linux/drivers/char/agp/agp.h (revision 384740dc)
1 /*
2  * AGPGART
3  * Copyright (C) 2004 Silicon Graphics, Inc.
4  * Copyright (C) 2002-2004 Dave Jones
5  * Copyright (C) 1999 Jeff Hartmann
6  * Copyright (C) 1999 Precision Insight, Inc.
7  * Copyright (C) 1999 Xi Graphics, Inc.
8  *
9  * Permission is hereby granted, free of charge, to any person obtaining a
10  * copy of this software and associated documentation files (the "Software"),
11  * to deal in the Software without restriction, including without limitation
12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13  * and/or sell copies of the Software, and to permit persons to whom the
14  * Software is furnished to do so, subject to the following conditions:
15  *
16  * The above copyright notice and this permission notice shall be included
17  * in all copies or substantial portions of the Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
22  * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
23  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
25  * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26  *
27  */
28 
29 #ifndef _AGP_BACKEND_PRIV_H
30 #define _AGP_BACKEND_PRIV_H 1
31 
32 #include <asm/agp.h>	/* for flush_agp_cache() */
33 
34 #define PFX "agpgart: "
35 
36 //#define AGP_DEBUG 1
37 #ifdef AGP_DEBUG
38 #define DBG(x,y...) printk (KERN_DEBUG PFX "%s: " x "\n", __func__ , ## y)
39 #else
40 #define DBG(x,y...) do { } while (0)
41 #endif
42 
43 extern struct agp_bridge_data *agp_bridge;
44 
45 enum aper_size_type {
46 	U8_APER_SIZE,
47 	U16_APER_SIZE,
48 	U32_APER_SIZE,
49 	LVL2_APER_SIZE,
50 	FIXED_APER_SIZE
51 };
52 
53 struct gatt_mask {
54 	unsigned long mask;
55 	u32 type;
56 	/* totally device specific, for integrated chipsets that
57 	 * might have different types of memory masks.  For other
58 	 * devices this will probably be ignored */
59 };
60 
61 #define AGP_PAGE_DESTROY_UNMAP 1
62 #define AGP_PAGE_DESTROY_FREE 2
63 
64 struct aper_size_info_8 {
65 	int size;
66 	int num_entries;
67 	int page_order;
68 	u8 size_value;
69 };
70 
71 struct aper_size_info_16 {
72 	int size;
73 	int num_entries;
74 	int page_order;
75 	u16 size_value;
76 };
77 
78 struct aper_size_info_32 {
79 	int size;
80 	int num_entries;
81 	int page_order;
82 	u32 size_value;
83 };
84 
85 struct aper_size_info_lvl2 {
86 	int size;
87 	int num_entries;
88 	u32 size_value;
89 };
90 
91 struct aper_size_info_fixed {
92 	int size;
93 	int num_entries;
94 	int page_order;
95 };
96 
97 struct agp_bridge_driver {
98 	struct module *owner;
99 	const void *aperture_sizes;
100 	int num_aperture_sizes;
101 	enum aper_size_type size_type;
102 	bool cant_use_aperture;
103 	bool needs_scratch_page;
104 	const struct gatt_mask *masks;
105 	int (*fetch_size)(void);
106 	int (*configure)(void);
107 	void (*agp_enable)(struct agp_bridge_data *, u32);
108 	void (*cleanup)(void);
109 	void (*tlb_flush)(struct agp_memory *);
110 	unsigned long (*mask_memory)(struct agp_bridge_data *, unsigned long, int);
111 	void (*cache_flush)(void);
112 	int (*create_gatt_table)(struct agp_bridge_data *);
113 	int (*free_gatt_table)(struct agp_bridge_data *);
114 	int (*insert_memory)(struct agp_memory *, off_t, int);
115 	int (*remove_memory)(struct agp_memory *, off_t, int);
116 	struct agp_memory *(*alloc_by_type) (size_t, int);
117 	void (*free_by_type)(struct agp_memory *);
118 	void *(*agp_alloc_page)(struct agp_bridge_data *);
119 	void (*agp_destroy_page)(void *, int flags);
120 	int (*agp_type_to_mask_type) (struct agp_bridge_data *, int);
121 	void (*chipset_flush)(struct agp_bridge_data *);
122 };
123 
124 struct agp_bridge_data {
125 	const struct agp_version *version;
126 	const struct agp_bridge_driver *driver;
127 	struct vm_operations_struct *vm_ops;
128 	void *previous_size;
129 	void *current_size;
130 	void *dev_private_data;
131 	struct pci_dev *dev;
132 	u32 __iomem *gatt_table;
133 	u32 *gatt_table_real;
134 	unsigned long scratch_page;
135 	unsigned long scratch_page_real;
136 	unsigned long gart_bus_addr;
137 	unsigned long gatt_bus_addr;
138 	u32 mode;
139 	enum chipset_type type;
140 	unsigned long *key_list;
141 	atomic_t current_memory_agp;
142 	atomic_t agp_in_use;
143 	int max_memory_agp;	/* in number of pages */
144 	int aperture_size_idx;
145 	int capndx;
146 	int flags;
147 	char major_version;
148 	char minor_version;
149 	struct list_head list;
150 	u32 apbase_config;
151 	/* list of agp_memory mapped to the aperture */
152 	struct list_head mapped_list;
153 	spinlock_t mapped_lock;
154 };
155 
156 #define KB(x)	((x) * 1024)
157 #define MB(x)	(KB (KB (x)))
158 #define GB(x)	(MB (KB (x)))
159 
160 #define A_SIZE_8(x)	((struct aper_size_info_8 *) x)
161 #define A_SIZE_16(x)	((struct aper_size_info_16 *) x)
162 #define A_SIZE_32(x)	((struct aper_size_info_32 *) x)
163 #define A_SIZE_LVL2(x)	((struct aper_size_info_lvl2 *) x)
164 #define A_SIZE_FIX(x)	((struct aper_size_info_fixed *) x)
165 #define A_IDX8(bridge)	(A_SIZE_8((bridge)->driver->aperture_sizes) + i)
166 #define A_IDX16(bridge)	(A_SIZE_16((bridge)->driver->aperture_sizes) + i)
167 #define A_IDX32(bridge)	(A_SIZE_32((bridge)->driver->aperture_sizes) + i)
168 #define MAXKEY		(4096 * 32)
169 
170 #define PGE_EMPTY(b, p)	(!(p) || (p) == (unsigned long) (b)->scratch_page)
171 
172 
173 /* Intel registers */
174 #define INTEL_APSIZE	0xb4
175 #define INTEL_ATTBASE	0xb8
176 #define INTEL_AGPCTRL	0xb0
177 #define INTEL_NBXCFG	0x50
178 #define INTEL_ERRSTS	0x91
179 
180 /* Intel i830 registers */
181 #define I830_GMCH_CTRL			0x52
182 #define I830_GMCH_ENABLED		0x4
183 #define I830_GMCH_MEM_MASK		0x1
184 #define I830_GMCH_MEM_64M		0x1
185 #define I830_GMCH_MEM_128M		0
186 #define I830_GMCH_GMS_MASK		0x70
187 #define I830_GMCH_GMS_DISABLED		0x00
188 #define I830_GMCH_GMS_LOCAL		0x10
189 #define I830_GMCH_GMS_STOLEN_512	0x20
190 #define I830_GMCH_GMS_STOLEN_1024	0x30
191 #define I830_GMCH_GMS_STOLEN_8192	0x40
192 #define I830_RDRAM_CHANNEL_TYPE		0x03010
193 #define I830_RDRAM_ND(x)		(((x) & 0x20) >> 5)
194 #define I830_RDRAM_DDT(x)		(((x) & 0x18) >> 3)
195 
196 /* This one is for I830MP w. an external graphic card */
197 #define INTEL_I830_ERRSTS	0x92
198 
199 /* Intel 855GM/852GM registers */
200 #define I855_GMCH_GMS_MASK		0xF0
201 #define I855_GMCH_GMS_STOLEN_0M		0x0
202 #define I855_GMCH_GMS_STOLEN_1M		(0x1 << 4)
203 #define I855_GMCH_GMS_STOLEN_4M		(0x2 << 4)
204 #define I855_GMCH_GMS_STOLEN_8M		(0x3 << 4)
205 #define I855_GMCH_GMS_STOLEN_16M	(0x4 << 4)
206 #define I855_GMCH_GMS_STOLEN_32M	(0x5 << 4)
207 #define I85X_CAPID			0x44
208 #define I85X_VARIANT_MASK		0x7
209 #define I85X_VARIANT_SHIFT		5
210 #define I855_GME			0x0
211 #define I855_GM				0x4
212 #define I852_GME			0x2
213 #define I852_GM				0x5
214 
215 /* Intel i845 registers */
216 #define INTEL_I845_AGPM		0x51
217 #define INTEL_I845_ERRSTS	0xc8
218 
219 /* Intel i860 registers */
220 #define INTEL_I860_MCHCFG	0x50
221 #define INTEL_I860_ERRSTS	0xc8
222 
223 /* Intel i810 registers */
224 #define I810_GMADDR		0x10
225 #define I810_MMADDR		0x14
226 #define I810_PTE_BASE		0x10000
227 #define I810_PTE_MAIN_UNCACHED	0x00000000
228 #define I810_PTE_LOCAL		0x00000002
229 #define I810_PTE_VALID		0x00000001
230 #define I830_PTE_SYSTEM_CACHED  0x00000006
231 #define I810_SMRAM_MISCC	0x70
232 #define I810_GFX_MEM_WIN_SIZE	0x00010000
233 #define I810_GFX_MEM_WIN_32M	0x00010000
234 #define I810_GMS		0x000000c0
235 #define I810_GMS_DISABLE	0x00000000
236 #define I810_PGETBL_CTL		0x2020
237 #define I810_PGETBL_ENABLED	0x00000001
238 #define I965_PGETBL_SIZE_MASK	0x0000000e
239 #define I965_PGETBL_SIZE_512KB	(0 << 1)
240 #define I965_PGETBL_SIZE_256KB	(1 << 1)
241 #define I965_PGETBL_SIZE_128KB	(2 << 1)
242 #define I965_PGETBL_SIZE_1MB	(3 << 1)
243 #define I965_PGETBL_SIZE_2MB	(4 << 1)
244 #define I965_PGETBL_SIZE_1_5MB	(5 << 1)
245 #define G33_PGETBL_SIZE_MASK    (3 << 8)
246 #define G33_PGETBL_SIZE_1M      (1 << 8)
247 #define G33_PGETBL_SIZE_2M      (2 << 8)
248 
249 #define I810_DRAM_CTL		0x3000
250 #define I810_DRAM_ROW_0		0x00000001
251 #define I810_DRAM_ROW_0_SDRAM	0x00000001
252 
253 struct agp_device_ids {
254 	unsigned short device_id; /* first, to make table easier to read */
255 	enum chipset_type chipset;
256 	const char *chipset_name;
257 	int (*chipset_setup) (struct pci_dev *pdev);	/* used to override generic */
258 };
259 
260 /* Driver registration */
261 struct agp_bridge_data *agp_alloc_bridge(void);
262 void agp_put_bridge(struct agp_bridge_data *bridge);
263 int agp_add_bridge(struct agp_bridge_data *bridge);
264 void agp_remove_bridge(struct agp_bridge_data *bridge);
265 
266 /* Frontend routines. */
267 int agp_frontend_initialize(void);
268 void agp_frontend_cleanup(void);
269 
270 /* Generic routines. */
271 void agp_generic_enable(struct agp_bridge_data *bridge, u32 mode);
272 int agp_generic_create_gatt_table(struct agp_bridge_data *bridge);
273 int agp_generic_free_gatt_table(struct agp_bridge_data *bridge);
274 struct agp_memory *agp_create_memory(int scratch_pages);
275 int agp_generic_insert_memory(struct agp_memory *mem, off_t pg_start, int type);
276 int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type);
277 struct agp_memory *agp_generic_alloc_by_type(size_t page_count, int type);
278 void agp_generic_free_by_type(struct agp_memory *curr);
279 void *agp_generic_alloc_page(struct agp_bridge_data *bridge);
280 void agp_generic_destroy_page(void *addr, int flags);
281 void agp_free_key(int key);
282 int agp_num_entries(void);
283 u32 agp_collect_device_status(struct agp_bridge_data *bridge, u32 mode, u32 command);
284 void agp_device_command(u32 command, bool agp_v3);
285 int agp_3_5_enable(struct agp_bridge_data *bridge);
286 void global_cache_flush(void);
287 void get_agp_version(struct agp_bridge_data *bridge);
288 unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge,
289 	unsigned long addr, int type);
290 int agp_generic_type_to_mask_type(struct agp_bridge_data *bridge,
291 				  int type);
292 struct agp_bridge_data *agp_generic_find_bridge(struct pci_dev *pdev);
293 
294 /* generic functions for user-populated AGP memory types */
295 struct agp_memory *agp_generic_alloc_user(size_t page_count, int type);
296 void agp_alloc_page_array(size_t size, struct agp_memory *mem);
297 void agp_free_page_array(struct agp_memory *mem);
298 
299 
300 /* generic routines for agp>=3 */
301 int agp3_generic_fetch_size(void);
302 void agp3_generic_tlbflush(struct agp_memory *mem);
303 int agp3_generic_configure(void);
304 void agp3_generic_cleanup(void);
305 
306 /* aperture sizes have been standardised since v3 */
307 #define AGP_GENERIC_SIZES_ENTRIES 11
308 extern const struct aper_size_info_16 agp3_generic_sizes[];
309 
310 #define virt_to_gart(x) (phys_to_gart(virt_to_phys(x)))
311 #define gart_to_virt(x) (phys_to_virt(gart_to_phys(x)))
312 
313 extern int agp_off;
314 extern int agp_try_unsupported_boot;
315 
316 long compat_agp_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
317 
318 /* Chipset independant registers (from AGP Spec) */
319 #define AGP_APBASE	0x10
320 
321 #define AGPSTAT		0x4
322 #define AGPCMD		0x8
323 #define AGPNISTAT	0xc
324 #define AGPCTRL		0x10
325 #define AGPAPSIZE	0x14
326 #define AGPNEPG		0x16
327 #define AGPGARTLO	0x18
328 #define AGPGARTHI	0x1c
329 #define AGPNICMD	0x20
330 
331 #define AGP_MAJOR_VERSION_SHIFT	(20)
332 #define AGP_MINOR_VERSION_SHIFT	(16)
333 
334 #define AGPSTAT_RQ_DEPTH	(0xff000000)
335 #define AGPSTAT_RQ_DEPTH_SHIFT	24
336 
337 #define AGPSTAT_CAL_MASK	(1<<12|1<<11|1<<10)
338 #define AGPSTAT_ARQSZ		(1<<15|1<<14|1<<13)
339 #define AGPSTAT_ARQSZ_SHIFT	13
340 
341 #define AGPSTAT_SBA		(1<<9)
342 #define AGPSTAT_AGP_ENABLE	(1<<8)
343 #define AGPSTAT_FW		(1<<4)
344 #define AGPSTAT_MODE_3_0	(1<<3)
345 
346 #define AGPSTAT2_1X		(1<<0)
347 #define AGPSTAT2_2X		(1<<1)
348 #define AGPSTAT2_4X		(1<<2)
349 
350 #define AGPSTAT3_RSVD		(1<<2)
351 #define AGPSTAT3_8X		(1<<1)
352 #define AGPSTAT3_4X		(1)
353 
354 #define AGPCTRL_APERENB		(1<<8)
355 #define AGPCTRL_GTLBEN		(1<<7)
356 
357 #define AGP2_RESERVED_MASK 0x00fffcc8
358 #define AGP3_RESERVED_MASK 0x00ff00c4
359 
360 #define AGP_ERRATA_FASTWRITES 1<<0
361 #define AGP_ERRATA_SBA	 1<<1
362 #define AGP_ERRATA_1X 1<<2
363 
364 #endif	/* _AGP_BACKEND_PRIV_H */
365