1 /* 2 * ti-sysc.c - Texas Instruments sysc interconnect target driver 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 9 * kind, whether express or implied; without even the implied warranty 10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 */ 13 14 #include <linux/io.h> 15 #include <linux/clk.h> 16 #include <linux/clkdev.h> 17 #include <linux/delay.h> 18 #include <linux/module.h> 19 #include <linux/platform_device.h> 20 #include <linux/pm_domain.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/reset.h> 23 #include <linux/of_address.h> 24 #include <linux/of_platform.h> 25 #include <linux/slab.h> 26 #include <linux/iopoll.h> 27 28 #include <linux/platform_data/ti-sysc.h> 29 30 #include <dt-bindings/bus/ti-sysc.h> 31 32 #define MAX_MODULE_SOFTRESET_WAIT 10000 33 34 static const char * const reg_names[] = { "rev", "sysc", "syss", }; 35 36 enum sysc_clocks { 37 SYSC_FCK, 38 SYSC_ICK, 39 SYSC_OPTFCK0, 40 SYSC_OPTFCK1, 41 SYSC_OPTFCK2, 42 SYSC_OPTFCK3, 43 SYSC_OPTFCK4, 44 SYSC_OPTFCK5, 45 SYSC_OPTFCK6, 46 SYSC_OPTFCK7, 47 SYSC_MAX_CLOCKS, 48 }; 49 50 static const char * const clock_names[SYSC_ICK + 1] = { "fck", "ick", }; 51 52 #define SYSC_IDLEMODE_MASK 3 53 #define SYSC_CLOCKACTIVITY_MASK 3 54 55 /** 56 * struct sysc - TI sysc interconnect target module registers and capabilities 57 * @dev: struct device pointer 58 * @module_pa: physical address of the interconnect target module 59 * @module_size: size of the interconnect target module 60 * @module_va: virtual address of the interconnect target module 61 * @offsets: register offsets from module base 62 * @clocks: clocks used by the interconnect target module 63 * @clock_roles: clock role names for the found clocks 64 * @nr_clocks: number of clocks used by the interconnect target module 65 * @legacy_mode: configured for legacy mode if set 66 * @cap: interconnect target module capabilities 67 * @cfg: interconnect target module configuration 68 * @name: name if available 69 * @revision: interconnect target module revision 70 * @needs_resume: runtime resume needed on resume from suspend 71 */ 72 struct sysc { 73 struct device *dev; 74 u64 module_pa; 75 u32 module_size; 76 void __iomem *module_va; 77 int offsets[SYSC_MAX_REGS]; 78 struct clk **clocks; 79 const char **clock_roles; 80 int nr_clocks; 81 struct reset_control *rsts; 82 const char *legacy_mode; 83 const struct sysc_capabilities *cap; 84 struct sysc_config cfg; 85 struct ti_sysc_cookie cookie; 86 const char *name; 87 u32 revision; 88 bool enabled; 89 bool needs_resume; 90 bool child_needs_resume; 91 struct delayed_work idle_work; 92 }; 93 94 void sysc_write(struct sysc *ddata, int offset, u32 value) 95 { 96 writel_relaxed(value, ddata->module_va + offset); 97 } 98 99 static u32 sysc_read(struct sysc *ddata, int offset) 100 { 101 if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) { 102 u32 val; 103 104 val = readw_relaxed(ddata->module_va + offset); 105 val |= (readw_relaxed(ddata->module_va + offset + 4) << 16); 106 107 return val; 108 } 109 110 return readl_relaxed(ddata->module_va + offset); 111 } 112 113 static bool sysc_opt_clks_needed(struct sysc *ddata) 114 { 115 return !!(ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_NEEDED); 116 } 117 118 static u32 sysc_read_revision(struct sysc *ddata) 119 { 120 int offset = ddata->offsets[SYSC_REVISION]; 121 122 if (offset < 0) 123 return 0; 124 125 return sysc_read(ddata, offset); 126 } 127 128 static int sysc_get_one_clock(struct sysc *ddata, const char *name) 129 { 130 int error, i, index = -ENODEV; 131 132 if (!strncmp(clock_names[SYSC_FCK], name, 3)) 133 index = SYSC_FCK; 134 else if (!strncmp(clock_names[SYSC_ICK], name, 3)) 135 index = SYSC_ICK; 136 137 if (index < 0) { 138 for (i = SYSC_OPTFCK0; i < SYSC_MAX_CLOCKS; i++) { 139 if (!ddata->clocks[i]) { 140 index = i; 141 break; 142 } 143 } 144 } 145 146 if (index < 0) { 147 dev_err(ddata->dev, "clock %s not added\n", name); 148 return index; 149 } 150 151 ddata->clocks[index] = devm_clk_get(ddata->dev, name); 152 if (IS_ERR(ddata->clocks[index])) { 153 if (PTR_ERR(ddata->clocks[index]) == -ENOENT) 154 return 0; 155 156 dev_err(ddata->dev, "clock get error for %s: %li\n", 157 name, PTR_ERR(ddata->clocks[index])); 158 159 return PTR_ERR(ddata->clocks[index]); 160 } 161 162 error = clk_prepare(ddata->clocks[index]); 163 if (error) { 164 dev_err(ddata->dev, "clock prepare error for %s: %i\n", 165 name, error); 166 167 return error; 168 } 169 170 return 0; 171 } 172 173 static int sysc_get_clocks(struct sysc *ddata) 174 { 175 struct device_node *np = ddata->dev->of_node; 176 struct property *prop; 177 const char *name; 178 int nr_fck = 0, nr_ick = 0, i, error = 0; 179 180 ddata->clock_roles = devm_kcalloc(ddata->dev, 181 SYSC_MAX_CLOCKS, 182 sizeof(*ddata->clock_roles), 183 GFP_KERNEL); 184 if (!ddata->clock_roles) 185 return -ENOMEM; 186 187 of_property_for_each_string(np, "clock-names", prop, name) { 188 if (!strncmp(clock_names[SYSC_FCK], name, 3)) 189 nr_fck++; 190 if (!strncmp(clock_names[SYSC_ICK], name, 3)) 191 nr_ick++; 192 ddata->clock_roles[ddata->nr_clocks] = name; 193 ddata->nr_clocks++; 194 } 195 196 if (ddata->nr_clocks < 1) 197 return 0; 198 199 if (ddata->nr_clocks > SYSC_MAX_CLOCKS) { 200 dev_err(ddata->dev, "too many clocks for %pOF\n", np); 201 202 return -EINVAL; 203 } 204 205 if (nr_fck > 1 || nr_ick > 1) { 206 dev_err(ddata->dev, "max one fck and ick for %pOF\n", np); 207 208 return -EINVAL; 209 } 210 211 ddata->clocks = devm_kcalloc(ddata->dev, 212 ddata->nr_clocks, sizeof(*ddata->clocks), 213 GFP_KERNEL); 214 if (!ddata->clocks) 215 return -ENOMEM; 216 217 for (i = 0; i < ddata->nr_clocks; i++) { 218 error = sysc_get_one_clock(ddata, ddata->clock_roles[i]); 219 if (error && error != -ENOENT) 220 return error; 221 } 222 223 return 0; 224 } 225 226 /** 227 * sysc_init_resets - reset module on init 228 * @ddata: device driver data 229 * 230 * A module can have both OCP softreset control and external rstctrl. 231 * If more complicated rstctrl resets are needed, please handle these 232 * directly from the child device driver and map only the module reset 233 * for the parent interconnect target module device. 234 * 235 * Automatic reset of the module on init can be skipped with the 236 * "ti,no-reset-on-init" device tree property. 237 */ 238 static int sysc_init_resets(struct sysc *ddata) 239 { 240 int error; 241 242 ddata->rsts = 243 devm_reset_control_array_get_optional_exclusive(ddata->dev); 244 if (IS_ERR(ddata->rsts)) 245 return PTR_ERR(ddata->rsts); 246 247 if (ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) 248 goto deassert; 249 250 error = reset_control_assert(ddata->rsts); 251 if (error) 252 return error; 253 254 deassert: 255 error = reset_control_deassert(ddata->rsts); 256 if (error) 257 return error; 258 259 return 0; 260 } 261 262 /** 263 * sysc_parse_and_check_child_range - parses module IO region from ranges 264 * @ddata: device driver data 265 * 266 * In general we only need rev, syss, and sysc registers and not the whole 267 * module range. But we do want the offsets for these registers from the 268 * module base. This allows us to check them against the legacy hwmod 269 * platform data. Let's also check the ranges are configured properly. 270 */ 271 static int sysc_parse_and_check_child_range(struct sysc *ddata) 272 { 273 struct device_node *np = ddata->dev->of_node; 274 const __be32 *ranges; 275 u32 nr_addr, nr_size; 276 int len, error; 277 278 ranges = of_get_property(np, "ranges", &len); 279 if (!ranges) { 280 dev_err(ddata->dev, "missing ranges for %pOF\n", np); 281 282 return -ENOENT; 283 } 284 285 len /= sizeof(*ranges); 286 287 if (len < 3) { 288 dev_err(ddata->dev, "incomplete ranges for %pOF\n", np); 289 290 return -EINVAL; 291 } 292 293 error = of_property_read_u32(np, "#address-cells", &nr_addr); 294 if (error) 295 return -ENOENT; 296 297 error = of_property_read_u32(np, "#size-cells", &nr_size); 298 if (error) 299 return -ENOENT; 300 301 if (nr_addr != 1 || nr_size != 1) { 302 dev_err(ddata->dev, "invalid ranges for %pOF\n", np); 303 304 return -EINVAL; 305 } 306 307 ranges++; 308 ddata->module_pa = of_translate_address(np, ranges++); 309 ddata->module_size = be32_to_cpup(ranges); 310 311 return 0; 312 } 313 314 static struct device_node *stdout_path; 315 316 static void sysc_init_stdout_path(struct sysc *ddata) 317 { 318 struct device_node *np = NULL; 319 const char *uart; 320 321 if (IS_ERR(stdout_path)) 322 return; 323 324 if (stdout_path) 325 return; 326 327 np = of_find_node_by_path("/chosen"); 328 if (!np) 329 goto err; 330 331 uart = of_get_property(np, "stdout-path", NULL); 332 if (!uart) 333 goto err; 334 335 np = of_find_node_by_path(uart); 336 if (!np) 337 goto err; 338 339 stdout_path = np; 340 341 return; 342 343 err: 344 stdout_path = ERR_PTR(-ENODEV); 345 } 346 347 static void sysc_check_quirk_stdout(struct sysc *ddata, 348 struct device_node *np) 349 { 350 sysc_init_stdout_path(ddata); 351 if (np != stdout_path) 352 return; 353 354 ddata->cfg.quirks |= SYSC_QUIRK_NO_IDLE_ON_INIT | 355 SYSC_QUIRK_NO_RESET_ON_INIT; 356 } 357 358 /** 359 * sysc_check_one_child - check child configuration 360 * @ddata: device driver data 361 * @np: child device node 362 * 363 * Let's avoid messy situations where we have new interconnect target 364 * node but children have "ti,hwmods". These belong to the interconnect 365 * target node and are managed by this driver. 366 */ 367 static int sysc_check_one_child(struct sysc *ddata, 368 struct device_node *np) 369 { 370 const char *name; 371 372 name = of_get_property(np, "ti,hwmods", NULL); 373 if (name) 374 dev_warn(ddata->dev, "really a child ti,hwmods property?"); 375 376 sysc_check_quirk_stdout(ddata, np); 377 378 return 0; 379 } 380 381 static int sysc_check_children(struct sysc *ddata) 382 { 383 struct device_node *child; 384 int error; 385 386 for_each_child_of_node(ddata->dev->of_node, child) { 387 error = sysc_check_one_child(ddata, child); 388 if (error) 389 return error; 390 } 391 392 return 0; 393 } 394 395 /* 396 * So far only I2C uses 16-bit read access with clockactivity with revision 397 * in two registers with stride of 4. We can detect this based on the rev 398 * register size to configure things far enough to be able to properly read 399 * the revision register. 400 */ 401 static void sysc_check_quirk_16bit(struct sysc *ddata, struct resource *res) 402 { 403 if (resource_size(res) == 8) 404 ddata->cfg.quirks |= SYSC_QUIRK_16BIT | SYSC_QUIRK_USE_CLOCKACT; 405 } 406 407 /** 408 * sysc_parse_one - parses the interconnect target module registers 409 * @ddata: device driver data 410 * @reg: register to parse 411 */ 412 static int sysc_parse_one(struct sysc *ddata, enum sysc_registers reg) 413 { 414 struct resource *res; 415 const char *name; 416 417 switch (reg) { 418 case SYSC_REVISION: 419 case SYSC_SYSCONFIG: 420 case SYSC_SYSSTATUS: 421 name = reg_names[reg]; 422 break; 423 default: 424 return -EINVAL; 425 } 426 427 res = platform_get_resource_byname(to_platform_device(ddata->dev), 428 IORESOURCE_MEM, name); 429 if (!res) { 430 ddata->offsets[reg] = -ENODEV; 431 432 return 0; 433 } 434 435 ddata->offsets[reg] = res->start - ddata->module_pa; 436 if (reg == SYSC_REVISION) 437 sysc_check_quirk_16bit(ddata, res); 438 439 return 0; 440 } 441 442 static int sysc_parse_registers(struct sysc *ddata) 443 { 444 int i, error; 445 446 for (i = 0; i < SYSC_MAX_REGS; i++) { 447 error = sysc_parse_one(ddata, i); 448 if (error) 449 return error; 450 } 451 452 return 0; 453 } 454 455 /** 456 * sysc_check_registers - check for misconfigured register overlaps 457 * @ddata: device driver data 458 */ 459 static int sysc_check_registers(struct sysc *ddata) 460 { 461 int i, j, nr_regs = 0, nr_matches = 0; 462 463 for (i = 0; i < SYSC_MAX_REGS; i++) { 464 if (ddata->offsets[i] < 0) 465 continue; 466 467 if (ddata->offsets[i] > (ddata->module_size - 4)) { 468 dev_err(ddata->dev, "register outside module range"); 469 470 return -EINVAL; 471 } 472 473 for (j = 0; j < SYSC_MAX_REGS; j++) { 474 if (ddata->offsets[j] < 0) 475 continue; 476 477 if (ddata->offsets[i] == ddata->offsets[j]) 478 nr_matches++; 479 } 480 nr_regs++; 481 } 482 483 if (nr_regs < 1) { 484 dev_err(ddata->dev, "missing registers\n"); 485 486 return -EINVAL; 487 } 488 489 if (nr_matches > nr_regs) { 490 dev_err(ddata->dev, "overlapping registers: (%i/%i)", 491 nr_regs, nr_matches); 492 493 return -EINVAL; 494 } 495 496 return 0; 497 } 498 499 /** 500 * syc_ioremap - ioremap register space for the interconnect target module 501 * @ddata: deviec driver data 502 * 503 * Note that the interconnect target module registers can be anywhere 504 * within the first child device address space. For example, SGX has 505 * them at offset 0x1fc00 in the 32MB module address space. We just 506 * what we need around the interconnect target module registers. 507 */ 508 static int sysc_ioremap(struct sysc *ddata) 509 { 510 u32 size = 0; 511 512 if (ddata->offsets[SYSC_SYSSTATUS] >= 0) 513 size = ddata->offsets[SYSC_SYSSTATUS]; 514 else if (ddata->offsets[SYSC_SYSCONFIG] >= 0) 515 size = ddata->offsets[SYSC_SYSCONFIG]; 516 else if (ddata->offsets[SYSC_REVISION] >= 0) 517 size = ddata->offsets[SYSC_REVISION]; 518 else 519 return -EINVAL; 520 521 size &= 0xfff00; 522 size += SZ_256; 523 524 ddata->module_va = devm_ioremap(ddata->dev, 525 ddata->module_pa, 526 size); 527 if (!ddata->module_va) 528 return -EIO; 529 530 return 0; 531 } 532 533 /** 534 * sysc_map_and_check_registers - ioremap and check device registers 535 * @ddata: device driver data 536 */ 537 static int sysc_map_and_check_registers(struct sysc *ddata) 538 { 539 int error; 540 541 error = sysc_parse_and_check_child_range(ddata); 542 if (error) 543 return error; 544 545 error = sysc_check_children(ddata); 546 if (error) 547 return error; 548 549 error = sysc_parse_registers(ddata); 550 if (error) 551 return error; 552 553 error = sysc_ioremap(ddata); 554 if (error) 555 return error; 556 557 error = sysc_check_registers(ddata); 558 if (error) 559 return error; 560 561 return 0; 562 } 563 564 /** 565 * sysc_show_rev - read and show interconnect target module revision 566 * @bufp: buffer to print the information to 567 * @ddata: device driver data 568 */ 569 static int sysc_show_rev(char *bufp, struct sysc *ddata) 570 { 571 int len; 572 573 if (ddata->offsets[SYSC_REVISION] < 0) 574 return sprintf(bufp, ":NA"); 575 576 len = sprintf(bufp, ":%08x", ddata->revision); 577 578 return len; 579 } 580 581 static int sysc_show_reg(struct sysc *ddata, 582 char *bufp, enum sysc_registers reg) 583 { 584 if (ddata->offsets[reg] < 0) 585 return sprintf(bufp, ":NA"); 586 587 return sprintf(bufp, ":%x", ddata->offsets[reg]); 588 } 589 590 static int sysc_show_name(char *bufp, struct sysc *ddata) 591 { 592 if (!ddata->name) 593 return 0; 594 595 return sprintf(bufp, ":%s", ddata->name); 596 } 597 598 /** 599 * sysc_show_registers - show information about interconnect target module 600 * @ddata: device driver data 601 */ 602 static void sysc_show_registers(struct sysc *ddata) 603 { 604 char buf[128]; 605 char *bufp = buf; 606 int i; 607 608 for (i = 0; i < SYSC_MAX_REGS; i++) 609 bufp += sysc_show_reg(ddata, bufp, i); 610 611 bufp += sysc_show_rev(bufp, ddata); 612 bufp += sysc_show_name(bufp, ddata); 613 614 dev_dbg(ddata->dev, "%llx:%x%s\n", 615 ddata->module_pa, ddata->module_size, 616 buf); 617 } 618 619 static int __maybe_unused sysc_runtime_suspend(struct device *dev) 620 { 621 struct ti_sysc_platform_data *pdata; 622 struct sysc *ddata; 623 int error = 0, i; 624 625 ddata = dev_get_drvdata(dev); 626 627 if (!ddata->enabled) 628 return 0; 629 630 if (ddata->legacy_mode) { 631 pdata = dev_get_platdata(ddata->dev); 632 if (!pdata) 633 return 0; 634 635 if (!pdata->idle_module) 636 return -ENODEV; 637 638 error = pdata->idle_module(dev, &ddata->cookie); 639 if (error) 640 dev_err(dev, "%s: could not idle: %i\n", 641 __func__, error); 642 643 goto idled; 644 } 645 646 for (i = 0; i < ddata->nr_clocks; i++) { 647 if (IS_ERR_OR_NULL(ddata->clocks[i])) 648 continue; 649 650 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata)) 651 break; 652 653 clk_disable(ddata->clocks[i]); 654 } 655 656 idled: 657 ddata->enabled = false; 658 659 return error; 660 } 661 662 static int __maybe_unused sysc_runtime_resume(struct device *dev) 663 { 664 struct ti_sysc_platform_data *pdata; 665 struct sysc *ddata; 666 int error = 0, i; 667 668 ddata = dev_get_drvdata(dev); 669 670 if (ddata->enabled) 671 return 0; 672 673 if (ddata->legacy_mode) { 674 pdata = dev_get_platdata(ddata->dev); 675 if (!pdata) 676 return 0; 677 678 if (!pdata->enable_module) 679 return -ENODEV; 680 681 error = pdata->enable_module(dev, &ddata->cookie); 682 if (error) 683 dev_err(dev, "%s: could not enable: %i\n", 684 __func__, error); 685 686 goto awake; 687 } 688 689 for (i = 0; i < ddata->nr_clocks; i++) { 690 if (IS_ERR_OR_NULL(ddata->clocks[i])) 691 continue; 692 693 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata)) 694 break; 695 696 error = clk_enable(ddata->clocks[i]); 697 if (error) 698 return error; 699 } 700 701 awake: 702 ddata->enabled = true; 703 704 return error; 705 } 706 707 #ifdef CONFIG_PM_SLEEP 708 static int sysc_suspend(struct device *dev) 709 { 710 struct sysc *ddata; 711 int error; 712 713 ddata = dev_get_drvdata(dev); 714 715 if (ddata->cfg.quirks & (SYSC_QUIRK_RESOURCE_PROVIDER | 716 SYSC_QUIRK_LEGACY_IDLE)) 717 return 0; 718 719 if (!ddata->enabled) 720 return 0; 721 722 dev_dbg(ddata->dev, "%s %s\n", __func__, 723 ddata->name ? ddata->name : ""); 724 725 error = pm_runtime_put_sync_suspend(dev); 726 if (error < 0) { 727 dev_warn(ddata->dev, "%s not idle %i %s\n", 728 __func__, error, 729 ddata->name ? ddata->name : ""); 730 731 return 0; 732 } 733 734 ddata->needs_resume = true; 735 736 return 0; 737 } 738 739 static int sysc_resume(struct device *dev) 740 { 741 struct sysc *ddata; 742 int error; 743 744 ddata = dev_get_drvdata(dev); 745 746 if (ddata->cfg.quirks & (SYSC_QUIRK_RESOURCE_PROVIDER | 747 SYSC_QUIRK_LEGACY_IDLE)) 748 return 0; 749 750 if (ddata->needs_resume) { 751 dev_dbg(ddata->dev, "%s %s\n", __func__, 752 ddata->name ? ddata->name : ""); 753 754 error = pm_runtime_get_sync(dev); 755 if (error < 0) { 756 dev_err(ddata->dev, "%s error %i %s\n", 757 __func__, error, 758 ddata->name ? ddata->name : ""); 759 760 return error; 761 } 762 763 ddata->needs_resume = false; 764 } 765 766 return 0; 767 } 768 769 static int sysc_noirq_suspend(struct device *dev) 770 { 771 struct sysc *ddata; 772 773 ddata = dev_get_drvdata(dev); 774 775 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE) 776 return 0; 777 778 if (!(ddata->cfg.quirks & SYSC_QUIRK_RESOURCE_PROVIDER)) 779 return 0; 780 781 if (!ddata->enabled) 782 return 0; 783 784 dev_dbg(ddata->dev, "%s %s\n", __func__, 785 ddata->name ? ddata->name : ""); 786 787 ddata->needs_resume = true; 788 789 return sysc_runtime_suspend(dev); 790 } 791 792 static int sysc_noirq_resume(struct device *dev) 793 { 794 struct sysc *ddata; 795 796 ddata = dev_get_drvdata(dev); 797 798 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE) 799 return 0; 800 801 if (!(ddata->cfg.quirks & SYSC_QUIRK_RESOURCE_PROVIDER)) 802 return 0; 803 804 if (ddata->needs_resume) { 805 dev_dbg(ddata->dev, "%s %s\n", __func__, 806 ddata->name ? ddata->name : ""); 807 808 ddata->needs_resume = false; 809 810 return sysc_runtime_resume(dev); 811 } 812 813 return 0; 814 } 815 #endif 816 817 static const struct dev_pm_ops sysc_pm_ops = { 818 SET_SYSTEM_SLEEP_PM_OPS(sysc_suspend, sysc_resume) 819 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_noirq_suspend, sysc_noirq_resume) 820 SET_RUNTIME_PM_OPS(sysc_runtime_suspend, 821 sysc_runtime_resume, 822 NULL) 823 }; 824 825 /* Module revision register based quirks */ 826 struct sysc_revision_quirk { 827 const char *name; 828 u32 base; 829 int rev_offset; 830 int sysc_offset; 831 int syss_offset; 832 u32 revision; 833 u32 revision_mask; 834 u32 quirks; 835 }; 836 837 #define SYSC_QUIRK(optname, optbase, optrev, optsysc, optsyss, \ 838 optrev_val, optrevmask, optquirkmask) \ 839 { \ 840 .name = (optname), \ 841 .base = (optbase), \ 842 .rev_offset = (optrev), \ 843 .sysc_offset = (optsysc), \ 844 .syss_offset = (optsyss), \ 845 .revision = (optrev_val), \ 846 .revision_mask = (optrevmask), \ 847 .quirks = (optquirkmask), \ 848 } 849 850 static const struct sysc_revision_quirk sysc_revision_quirks[] = { 851 /* These need to use noirq_suspend */ 852 SYSC_QUIRK("control", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 853 SYSC_QUIRK_RESOURCE_PROVIDER), 854 SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xffffffff, 855 SYSC_QUIRK_RESOURCE_PROVIDER), 856 SYSC_QUIRK("mcspi", 0, 0, 0x10, -1, 0x40300a0b, 0xffffffff, 857 SYSC_QUIRK_RESOURCE_PROVIDER), 858 SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x40000100, 0xffffffff, 859 SYSC_QUIRK_RESOURCE_PROVIDER), 860 SYSC_QUIRK("ocp2scp", 0, 0, 0x10, 0x14, 0x50060005, 0xffffffff, 861 SYSC_QUIRK_RESOURCE_PROVIDER), 862 SYSC_QUIRK("padconf", 0, 0, 0x10, -1, 0x4fff0800, 0xffffffff, 863 SYSC_QUIRK_RESOURCE_PROVIDER), 864 SYSC_QUIRK("scm", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 865 SYSC_QUIRK_RESOURCE_PROVIDER), 866 SYSC_QUIRK("scrm", 0, 0, -1, -1, 0x00000010, 0xffffffff, 867 SYSC_QUIRK_RESOURCE_PROVIDER), 868 SYSC_QUIRK("sdma", 0, 0, 0x2c, 0x28, 0x00010900, 0xffffffff, 869 SYSC_QUIRK_RESOURCE_PROVIDER), 870 871 /* These drivers need to be fixed to not use pm_runtime_irq_safe() */ 872 SYSC_QUIRK("gpio", 0, 0, 0x10, 0x114, 0x50600801, 0xffffffff, 873 SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_OPT_CLKS_IN_RESET), 874 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000020, 0xffffffff, 875 SYSC_QUIRK_LEGACY_IDLE), 876 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000030, 0xffffffff, 877 SYSC_QUIRK_LEGACY_IDLE), 878 SYSC_QUIRK("sham", 0, 0x100, 0x110, 0x114, 0x40000c03, 0xffffffff, 879 SYSC_QUIRK_LEGACY_IDLE), 880 SYSC_QUIRK("smartreflex", 0, -1, 0x24, -1, 0x00000000, 0xffffffff, 881 SYSC_QUIRK_LEGACY_IDLE), 882 SYSC_QUIRK("smartreflex", 0, -1, 0x38, -1, 0x00000000, 0xffffffff, 883 SYSC_QUIRK_LEGACY_IDLE), 884 SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff, 885 SYSC_QUIRK_LEGACY_IDLE), 886 /* Some timers on omap4 and later */ 887 SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x4fff1301, 0xffffffff, 888 SYSC_QUIRK_LEGACY_IDLE), 889 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff, 890 SYSC_QUIRK_LEGACY_IDLE), 891 /* Uarts on omap4 and later */ 892 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffffffff, 893 SYSC_QUIRK_LEGACY_IDLE), 894 895 /* These devices don't yet suspend properly without legacy setting */ 896 SYSC_QUIRK("sdio", 0, 0, 0x10, -1, 0x40202301, 0xffffffff, 897 SYSC_QUIRK_LEGACY_IDLE), 898 SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xffffffff, 899 SYSC_QUIRK_LEGACY_IDLE), 900 SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0d00, 0xffffffff, 901 SYSC_QUIRK_LEGACY_IDLE), 902 903 #ifdef DEBUG 904 SYSC_QUIRK("aess", 0, 0, 0x10, -1, 0x40000000, 0xffffffff, 0), 905 SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -1, 0, 0, 0), 906 SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x00000006, 0xffffffff, 0), 907 SYSC_QUIRK("hsi", 0, 0, 0x10, 0x14, 0x50043101, 0xffffffff, 0), 908 SYSC_QUIRK("iss", 0, 0, 0x10, -1, 0x40000101, 0xffffffff, 0), 909 SYSC_QUIRK("mcasp", 0, 0, 0x4, -1, 0x44306302, 0xffffffff, 0), 910 SYSC_QUIRK("mcbsp", 0, -1, 0x8c, -1, 0, 0, 0), 911 SYSC_QUIRK("mailbox", 0, 0, 0x10, -1, 0x00000400, 0xffffffff, 0), 912 SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40000902, 0xffffffff, 0), 913 SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40002903, 0xffffffff, 0), 914 SYSC_QUIRK("spinlock", 0, 0, 0x10, -1, 0x50020000, 0xffffffff, 0), 915 SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000004, 0xffffffff, 0), 916 SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, 0x14, 0x50700100, 0xffffffff, 0), 917 SYSC_QUIRK("usb_otg_hs", 0, 0x400, 0x404, 0x408, 0x00000050, 918 0xffffffff, 0), 919 #endif 920 }; 921 922 static void sysc_init_revision_quirks(struct sysc *ddata) 923 { 924 const struct sysc_revision_quirk *q; 925 int i; 926 927 for (i = 0; i < ARRAY_SIZE(sysc_revision_quirks); i++) { 928 q = &sysc_revision_quirks[i]; 929 930 if (q->base && q->base != ddata->module_pa) 931 continue; 932 933 if (q->rev_offset >= 0 && 934 q->rev_offset != ddata->offsets[SYSC_REVISION]) 935 continue; 936 937 if (q->sysc_offset >= 0 && 938 q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG]) 939 continue; 940 941 if (q->syss_offset >= 0 && 942 q->syss_offset != ddata->offsets[SYSC_SYSSTATUS]) 943 continue; 944 945 if (q->revision == ddata->revision || 946 (q->revision & q->revision_mask) == 947 (ddata->revision & q->revision_mask)) { 948 ddata->name = q->name; 949 ddata->cfg.quirks |= q->quirks; 950 } 951 } 952 } 953 954 static int sysc_reset(struct sysc *ddata) 955 { 956 int offset = ddata->offsets[SYSC_SYSCONFIG]; 957 int val; 958 959 if (ddata->legacy_mode || offset < 0 || 960 ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) 961 return 0; 962 963 /* 964 * Currently only support reset status in sysstatus. 965 * Warn and return error in all other cases 966 */ 967 if (!ddata->cfg.syss_mask) { 968 dev_err(ddata->dev, "No ti,syss-mask. Reset failed\n"); 969 return -EINVAL; 970 } 971 972 val = sysc_read(ddata, offset); 973 val |= (0x1 << ddata->cap->regbits->srst_shift); 974 sysc_write(ddata, offset, val); 975 976 /* Poll on reset status */ 977 offset = ddata->offsets[SYSC_SYSSTATUS]; 978 979 return readl_poll_timeout(ddata->module_va + offset, val, 980 (val & ddata->cfg.syss_mask) == 0x0, 981 100, MAX_MODULE_SOFTRESET_WAIT); 982 } 983 984 /* At this point the module is configured enough to read the revision */ 985 static int sysc_init_module(struct sysc *ddata) 986 { 987 int error; 988 989 if (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE_ON_INIT) { 990 ddata->revision = sysc_read_revision(ddata); 991 goto rev_quirks; 992 } 993 994 error = pm_runtime_get_sync(ddata->dev); 995 if (error < 0) { 996 pm_runtime_put_noidle(ddata->dev); 997 998 return 0; 999 } 1000 1001 error = sysc_reset(ddata); 1002 if (error) { 1003 dev_err(ddata->dev, "Reset failed with %d\n", error); 1004 pm_runtime_put_sync(ddata->dev); 1005 1006 return error; 1007 } 1008 1009 ddata->revision = sysc_read_revision(ddata); 1010 pm_runtime_put_sync(ddata->dev); 1011 1012 rev_quirks: 1013 sysc_init_revision_quirks(ddata); 1014 1015 return 0; 1016 } 1017 1018 static int sysc_init_sysc_mask(struct sysc *ddata) 1019 { 1020 struct device_node *np = ddata->dev->of_node; 1021 int error; 1022 u32 val; 1023 1024 error = of_property_read_u32(np, "ti,sysc-mask", &val); 1025 if (error) 1026 return 0; 1027 1028 if (val) 1029 ddata->cfg.sysc_val = val & ddata->cap->sysc_mask; 1030 else 1031 ddata->cfg.sysc_val = ddata->cap->sysc_mask; 1032 1033 return 0; 1034 } 1035 1036 static int sysc_init_idlemode(struct sysc *ddata, u8 *idlemodes, 1037 const char *name) 1038 { 1039 struct device_node *np = ddata->dev->of_node; 1040 struct property *prop; 1041 const __be32 *p; 1042 u32 val; 1043 1044 of_property_for_each_u32(np, name, prop, p, val) { 1045 if (val >= SYSC_NR_IDLEMODES) { 1046 dev_err(ddata->dev, "invalid idlemode: %i\n", val); 1047 return -EINVAL; 1048 } 1049 *idlemodes |= (1 << val); 1050 } 1051 1052 return 0; 1053 } 1054 1055 static int sysc_init_idlemodes(struct sysc *ddata) 1056 { 1057 int error; 1058 1059 error = sysc_init_idlemode(ddata, &ddata->cfg.midlemodes, 1060 "ti,sysc-midle"); 1061 if (error) 1062 return error; 1063 1064 error = sysc_init_idlemode(ddata, &ddata->cfg.sidlemodes, 1065 "ti,sysc-sidle"); 1066 if (error) 1067 return error; 1068 1069 return 0; 1070 } 1071 1072 /* 1073 * Only some devices on omap4 and later have SYSCONFIG reset done 1074 * bit. We can detect this if there is no SYSSTATUS at all, or the 1075 * SYSTATUS bit 0 is not used. Note that some SYSSTATUS registers 1076 * have multiple bits for the child devices like OHCI and EHCI. 1077 * Depends on SYSC being parsed first. 1078 */ 1079 static int sysc_init_syss_mask(struct sysc *ddata) 1080 { 1081 struct device_node *np = ddata->dev->of_node; 1082 int error; 1083 u32 val; 1084 1085 error = of_property_read_u32(np, "ti,syss-mask", &val); 1086 if (error) { 1087 if ((ddata->cap->type == TI_SYSC_OMAP4 || 1088 ddata->cap->type == TI_SYSC_OMAP4_TIMER) && 1089 (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET)) 1090 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS; 1091 1092 return 0; 1093 } 1094 1095 if (!(val & 1) && (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET)) 1096 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS; 1097 1098 ddata->cfg.syss_mask = val; 1099 1100 return 0; 1101 } 1102 1103 /* 1104 * Many child device drivers need to have fck and opt clocks available 1105 * to get the clock rate for device internal configuration etc. 1106 */ 1107 static int sysc_child_add_named_clock(struct sysc *ddata, 1108 struct device *child, 1109 const char *name) 1110 { 1111 struct clk *clk; 1112 struct clk_lookup *l; 1113 int error = 0; 1114 1115 if (!name) 1116 return 0; 1117 1118 clk = clk_get(child, name); 1119 if (!IS_ERR(clk)) { 1120 clk_put(clk); 1121 1122 return -EEXIST; 1123 } 1124 1125 clk = clk_get(ddata->dev, name); 1126 if (IS_ERR(clk)) 1127 return -ENODEV; 1128 1129 l = clkdev_create(clk, name, dev_name(child)); 1130 if (!l) 1131 error = -ENOMEM; 1132 1133 clk_put(clk); 1134 1135 return error; 1136 } 1137 1138 static int sysc_child_add_clocks(struct sysc *ddata, 1139 struct device *child) 1140 { 1141 int i, error; 1142 1143 for (i = 0; i < ddata->nr_clocks; i++) { 1144 error = sysc_child_add_named_clock(ddata, 1145 child, 1146 ddata->clock_roles[i]); 1147 if (error && error != -EEXIST) { 1148 dev_err(ddata->dev, "could not add child clock %s: %i\n", 1149 ddata->clock_roles[i], error); 1150 1151 return error; 1152 } 1153 } 1154 1155 return 0; 1156 } 1157 1158 static struct device_type sysc_device_type = { 1159 }; 1160 1161 static struct sysc *sysc_child_to_parent(struct device *dev) 1162 { 1163 struct device *parent = dev->parent; 1164 1165 if (!parent || parent->type != &sysc_device_type) 1166 return NULL; 1167 1168 return dev_get_drvdata(parent); 1169 } 1170 1171 static int __maybe_unused sysc_child_runtime_suspend(struct device *dev) 1172 { 1173 struct sysc *ddata; 1174 int error; 1175 1176 ddata = sysc_child_to_parent(dev); 1177 1178 error = pm_generic_runtime_suspend(dev); 1179 if (error) 1180 return error; 1181 1182 if (!ddata->enabled) 1183 return 0; 1184 1185 return sysc_runtime_suspend(ddata->dev); 1186 } 1187 1188 static int __maybe_unused sysc_child_runtime_resume(struct device *dev) 1189 { 1190 struct sysc *ddata; 1191 int error; 1192 1193 ddata = sysc_child_to_parent(dev); 1194 1195 if (!ddata->enabled) { 1196 error = sysc_runtime_resume(ddata->dev); 1197 if (error < 0) 1198 dev_err(ddata->dev, 1199 "%s error: %i\n", __func__, error); 1200 } 1201 1202 return pm_generic_runtime_resume(dev); 1203 } 1204 1205 #ifdef CONFIG_PM_SLEEP 1206 static int sysc_child_suspend_noirq(struct device *dev) 1207 { 1208 struct sysc *ddata; 1209 int error; 1210 1211 ddata = sysc_child_to_parent(dev); 1212 1213 dev_dbg(ddata->dev, "%s %s\n", __func__, 1214 ddata->name ? ddata->name : ""); 1215 1216 error = pm_generic_suspend_noirq(dev); 1217 if (error) { 1218 dev_err(dev, "%s error at %i: %i\n", 1219 __func__, __LINE__, error); 1220 1221 return error; 1222 } 1223 1224 if (!pm_runtime_status_suspended(dev)) { 1225 error = pm_generic_runtime_suspend(dev); 1226 if (error) { 1227 dev_err(dev, "%s error at %i: %i\n", 1228 __func__, __LINE__, error); 1229 1230 return error; 1231 } 1232 1233 error = sysc_runtime_suspend(ddata->dev); 1234 if (error) { 1235 dev_err(dev, "%s error at %i: %i\n", 1236 __func__, __LINE__, error); 1237 1238 return error; 1239 } 1240 1241 ddata->child_needs_resume = true; 1242 } 1243 1244 return 0; 1245 } 1246 1247 static int sysc_child_resume_noirq(struct device *dev) 1248 { 1249 struct sysc *ddata; 1250 int error; 1251 1252 ddata = sysc_child_to_parent(dev); 1253 1254 dev_dbg(ddata->dev, "%s %s\n", __func__, 1255 ddata->name ? ddata->name : ""); 1256 1257 if (ddata->child_needs_resume) { 1258 ddata->child_needs_resume = false; 1259 1260 error = sysc_runtime_resume(ddata->dev); 1261 if (error) 1262 dev_err(ddata->dev, 1263 "%s runtime resume error: %i\n", 1264 __func__, error); 1265 1266 error = pm_generic_runtime_resume(dev); 1267 if (error) 1268 dev_err(ddata->dev, 1269 "%s generic runtime resume: %i\n", 1270 __func__, error); 1271 } 1272 1273 return pm_generic_resume_noirq(dev); 1274 } 1275 #endif 1276 1277 struct dev_pm_domain sysc_child_pm_domain = { 1278 .ops = { 1279 SET_RUNTIME_PM_OPS(sysc_child_runtime_suspend, 1280 sysc_child_runtime_resume, 1281 NULL) 1282 USE_PLATFORM_PM_SLEEP_OPS 1283 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_child_suspend_noirq, 1284 sysc_child_resume_noirq) 1285 } 1286 }; 1287 1288 /** 1289 * sysc_legacy_idle_quirk - handle children in omap_device compatible way 1290 * @ddata: device driver data 1291 * @child: child device driver 1292 * 1293 * Allow idle for child devices as done with _od_runtime_suspend(). 1294 * Otherwise many child devices will not idle because of the permanent 1295 * parent usecount set in pm_runtime_irq_safe(). 1296 * 1297 * Note that the long term solution is to just modify the child device 1298 * drivers to not set pm_runtime_irq_safe() and then this can be just 1299 * dropped. 1300 */ 1301 static void sysc_legacy_idle_quirk(struct sysc *ddata, struct device *child) 1302 { 1303 if (!ddata->legacy_mode) 1304 return; 1305 1306 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE) 1307 dev_pm_domain_set(child, &sysc_child_pm_domain); 1308 } 1309 1310 static int sysc_notifier_call(struct notifier_block *nb, 1311 unsigned long event, void *device) 1312 { 1313 struct device *dev = device; 1314 struct sysc *ddata; 1315 int error; 1316 1317 ddata = sysc_child_to_parent(dev); 1318 if (!ddata) 1319 return NOTIFY_DONE; 1320 1321 switch (event) { 1322 case BUS_NOTIFY_ADD_DEVICE: 1323 error = sysc_child_add_clocks(ddata, dev); 1324 if (error) 1325 return error; 1326 sysc_legacy_idle_quirk(ddata, dev); 1327 break; 1328 default: 1329 break; 1330 } 1331 1332 return NOTIFY_DONE; 1333 } 1334 1335 static struct notifier_block sysc_nb = { 1336 .notifier_call = sysc_notifier_call, 1337 }; 1338 1339 /* Device tree configured quirks */ 1340 struct sysc_dts_quirk { 1341 const char *name; 1342 u32 mask; 1343 }; 1344 1345 static const struct sysc_dts_quirk sysc_dts_quirks[] = { 1346 { .name = "ti,no-idle-on-init", 1347 .mask = SYSC_QUIRK_NO_IDLE_ON_INIT, }, 1348 { .name = "ti,no-reset-on-init", 1349 .mask = SYSC_QUIRK_NO_RESET_ON_INIT, }, 1350 }; 1351 1352 static int sysc_init_dts_quirks(struct sysc *ddata) 1353 { 1354 struct device_node *np = ddata->dev->of_node; 1355 const struct property *prop; 1356 int i, len, error; 1357 u32 val; 1358 1359 ddata->legacy_mode = of_get_property(np, "ti,hwmods", NULL); 1360 1361 for (i = 0; i < ARRAY_SIZE(sysc_dts_quirks); i++) { 1362 prop = of_get_property(np, sysc_dts_quirks[i].name, &len); 1363 if (!prop) 1364 continue; 1365 1366 ddata->cfg.quirks |= sysc_dts_quirks[i].mask; 1367 } 1368 1369 error = of_property_read_u32(np, "ti,sysc-delay-us", &val); 1370 if (!error) { 1371 if (val > 255) { 1372 dev_warn(ddata->dev, "bad ti,sysc-delay-us: %i\n", 1373 val); 1374 } 1375 1376 ddata->cfg.srst_udelay = (u8)val; 1377 } 1378 1379 return 0; 1380 } 1381 1382 static void sysc_unprepare(struct sysc *ddata) 1383 { 1384 int i; 1385 1386 for (i = 0; i < SYSC_MAX_CLOCKS; i++) { 1387 if (!IS_ERR_OR_NULL(ddata->clocks[i])) 1388 clk_unprepare(ddata->clocks[i]); 1389 } 1390 } 1391 1392 /* 1393 * Common sysc register bits found on omap2, also known as type1 1394 */ 1395 static const struct sysc_regbits sysc_regbits_omap2 = { 1396 .dmadisable_shift = -ENODEV, 1397 .midle_shift = 12, 1398 .sidle_shift = 3, 1399 .clkact_shift = 8, 1400 .emufree_shift = 5, 1401 .enwkup_shift = 2, 1402 .srst_shift = 1, 1403 .autoidle_shift = 0, 1404 }; 1405 1406 static const struct sysc_capabilities sysc_omap2 = { 1407 .type = TI_SYSC_OMAP2, 1408 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE | 1409 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET | 1410 SYSC_OMAP2_AUTOIDLE, 1411 .regbits = &sysc_regbits_omap2, 1412 }; 1413 1414 /* All omap2 and 3 timers, and timers 1, 2 & 10 on omap 4 and 5 */ 1415 static const struct sysc_capabilities sysc_omap2_timer = { 1416 .type = TI_SYSC_OMAP2_TIMER, 1417 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE | 1418 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET | 1419 SYSC_OMAP2_AUTOIDLE, 1420 .regbits = &sysc_regbits_omap2, 1421 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT, 1422 }; 1423 1424 /* 1425 * SHAM2 (SHA1/MD5) sysc found on omap3, a variant of sysc_regbits_omap2 1426 * with different sidle position 1427 */ 1428 static const struct sysc_regbits sysc_regbits_omap3_sham = { 1429 .dmadisable_shift = -ENODEV, 1430 .midle_shift = -ENODEV, 1431 .sidle_shift = 4, 1432 .clkact_shift = -ENODEV, 1433 .enwkup_shift = -ENODEV, 1434 .srst_shift = 1, 1435 .autoidle_shift = 0, 1436 .emufree_shift = -ENODEV, 1437 }; 1438 1439 static const struct sysc_capabilities sysc_omap3_sham = { 1440 .type = TI_SYSC_OMAP3_SHAM, 1441 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE, 1442 .regbits = &sysc_regbits_omap3_sham, 1443 }; 1444 1445 /* 1446 * AES register bits found on omap3 and later, a variant of 1447 * sysc_regbits_omap2 with different sidle position 1448 */ 1449 static const struct sysc_regbits sysc_regbits_omap3_aes = { 1450 .dmadisable_shift = -ENODEV, 1451 .midle_shift = -ENODEV, 1452 .sidle_shift = 6, 1453 .clkact_shift = -ENODEV, 1454 .enwkup_shift = -ENODEV, 1455 .srst_shift = 1, 1456 .autoidle_shift = 0, 1457 .emufree_shift = -ENODEV, 1458 }; 1459 1460 static const struct sysc_capabilities sysc_omap3_aes = { 1461 .type = TI_SYSC_OMAP3_AES, 1462 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE, 1463 .regbits = &sysc_regbits_omap3_aes, 1464 }; 1465 1466 /* 1467 * Common sysc register bits found on omap4, also known as type2 1468 */ 1469 static const struct sysc_regbits sysc_regbits_omap4 = { 1470 .dmadisable_shift = 16, 1471 .midle_shift = 4, 1472 .sidle_shift = 2, 1473 .clkact_shift = -ENODEV, 1474 .enwkup_shift = -ENODEV, 1475 .emufree_shift = 1, 1476 .srst_shift = 0, 1477 .autoidle_shift = -ENODEV, 1478 }; 1479 1480 static const struct sysc_capabilities sysc_omap4 = { 1481 .type = TI_SYSC_OMAP4, 1482 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU | 1483 SYSC_OMAP4_SOFTRESET, 1484 .regbits = &sysc_regbits_omap4, 1485 }; 1486 1487 static const struct sysc_capabilities sysc_omap4_timer = { 1488 .type = TI_SYSC_OMAP4_TIMER, 1489 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU | 1490 SYSC_OMAP4_SOFTRESET, 1491 .regbits = &sysc_regbits_omap4, 1492 }; 1493 1494 /* 1495 * Common sysc register bits found on omap4, also known as type3 1496 */ 1497 static const struct sysc_regbits sysc_regbits_omap4_simple = { 1498 .dmadisable_shift = -ENODEV, 1499 .midle_shift = 2, 1500 .sidle_shift = 0, 1501 .clkact_shift = -ENODEV, 1502 .enwkup_shift = -ENODEV, 1503 .srst_shift = -ENODEV, 1504 .emufree_shift = -ENODEV, 1505 .autoidle_shift = -ENODEV, 1506 }; 1507 1508 static const struct sysc_capabilities sysc_omap4_simple = { 1509 .type = TI_SYSC_OMAP4_SIMPLE, 1510 .regbits = &sysc_regbits_omap4_simple, 1511 }; 1512 1513 /* 1514 * SmartReflex sysc found on omap34xx 1515 */ 1516 static const struct sysc_regbits sysc_regbits_omap34xx_sr = { 1517 .dmadisable_shift = -ENODEV, 1518 .midle_shift = -ENODEV, 1519 .sidle_shift = -ENODEV, 1520 .clkact_shift = 20, 1521 .enwkup_shift = -ENODEV, 1522 .srst_shift = -ENODEV, 1523 .emufree_shift = -ENODEV, 1524 .autoidle_shift = -ENODEV, 1525 }; 1526 1527 static const struct sysc_capabilities sysc_34xx_sr = { 1528 .type = TI_SYSC_OMAP34XX_SR, 1529 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY, 1530 .regbits = &sysc_regbits_omap34xx_sr, 1531 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT | SYSC_QUIRK_UNCACHED | 1532 SYSC_QUIRK_LEGACY_IDLE, 1533 }; 1534 1535 /* 1536 * SmartReflex sysc found on omap36xx and later 1537 */ 1538 static const struct sysc_regbits sysc_regbits_omap36xx_sr = { 1539 .dmadisable_shift = -ENODEV, 1540 .midle_shift = -ENODEV, 1541 .sidle_shift = 24, 1542 .clkact_shift = -ENODEV, 1543 .enwkup_shift = 26, 1544 .srst_shift = -ENODEV, 1545 .emufree_shift = -ENODEV, 1546 .autoidle_shift = -ENODEV, 1547 }; 1548 1549 static const struct sysc_capabilities sysc_36xx_sr = { 1550 .type = TI_SYSC_OMAP36XX_SR, 1551 .sysc_mask = SYSC_OMAP3_SR_ENAWAKEUP, 1552 .regbits = &sysc_regbits_omap36xx_sr, 1553 .mod_quirks = SYSC_QUIRK_UNCACHED | SYSC_QUIRK_LEGACY_IDLE, 1554 }; 1555 1556 static const struct sysc_capabilities sysc_omap4_sr = { 1557 .type = TI_SYSC_OMAP4_SR, 1558 .regbits = &sysc_regbits_omap36xx_sr, 1559 .mod_quirks = SYSC_QUIRK_LEGACY_IDLE, 1560 }; 1561 1562 /* 1563 * McASP register bits found on omap4 and later 1564 */ 1565 static const struct sysc_regbits sysc_regbits_omap4_mcasp = { 1566 .dmadisable_shift = -ENODEV, 1567 .midle_shift = -ENODEV, 1568 .sidle_shift = 0, 1569 .clkact_shift = -ENODEV, 1570 .enwkup_shift = -ENODEV, 1571 .srst_shift = -ENODEV, 1572 .emufree_shift = -ENODEV, 1573 .autoidle_shift = -ENODEV, 1574 }; 1575 1576 static const struct sysc_capabilities sysc_omap4_mcasp = { 1577 .type = TI_SYSC_OMAP4_MCASP, 1578 .regbits = &sysc_regbits_omap4_mcasp, 1579 }; 1580 1581 /* 1582 * FS USB host found on omap4 and later 1583 */ 1584 static const struct sysc_regbits sysc_regbits_omap4_usb_host_fs = { 1585 .dmadisable_shift = -ENODEV, 1586 .midle_shift = -ENODEV, 1587 .sidle_shift = 24, 1588 .clkact_shift = -ENODEV, 1589 .enwkup_shift = 26, 1590 .srst_shift = -ENODEV, 1591 .emufree_shift = -ENODEV, 1592 .autoidle_shift = -ENODEV, 1593 }; 1594 1595 static const struct sysc_capabilities sysc_omap4_usb_host_fs = { 1596 .type = TI_SYSC_OMAP4_USB_HOST_FS, 1597 .sysc_mask = SYSC_OMAP2_ENAWAKEUP, 1598 .regbits = &sysc_regbits_omap4_usb_host_fs, 1599 }; 1600 1601 static const struct sysc_regbits sysc_regbits_dra7_mcan = { 1602 .dmadisable_shift = -ENODEV, 1603 .midle_shift = -ENODEV, 1604 .sidle_shift = -ENODEV, 1605 .clkact_shift = -ENODEV, 1606 .enwkup_shift = 4, 1607 .srst_shift = 0, 1608 .emufree_shift = -ENODEV, 1609 .autoidle_shift = -ENODEV, 1610 }; 1611 1612 static const struct sysc_capabilities sysc_dra7_mcan = { 1613 .type = TI_SYSC_DRA7_MCAN, 1614 .sysc_mask = SYSC_DRA7_MCAN_ENAWAKEUP | SYSC_OMAP4_SOFTRESET, 1615 .regbits = &sysc_regbits_dra7_mcan, 1616 }; 1617 1618 static int sysc_init_pdata(struct sysc *ddata) 1619 { 1620 struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev); 1621 struct ti_sysc_module_data mdata; 1622 int error = 0; 1623 1624 if (!pdata || !ddata->legacy_mode) 1625 return 0; 1626 1627 mdata.name = ddata->legacy_mode; 1628 mdata.module_pa = ddata->module_pa; 1629 mdata.module_size = ddata->module_size; 1630 mdata.offsets = ddata->offsets; 1631 mdata.nr_offsets = SYSC_MAX_REGS; 1632 mdata.cap = ddata->cap; 1633 mdata.cfg = &ddata->cfg; 1634 1635 if (!pdata->init_module) 1636 return -ENODEV; 1637 1638 error = pdata->init_module(ddata->dev, &mdata, &ddata->cookie); 1639 if (error == -EEXIST) 1640 error = 0; 1641 1642 return error; 1643 } 1644 1645 static int sysc_init_match(struct sysc *ddata) 1646 { 1647 const struct sysc_capabilities *cap; 1648 1649 cap = of_device_get_match_data(ddata->dev); 1650 if (!cap) 1651 return -EINVAL; 1652 1653 ddata->cap = cap; 1654 if (ddata->cap) 1655 ddata->cfg.quirks |= ddata->cap->mod_quirks; 1656 1657 return 0; 1658 } 1659 1660 static void ti_sysc_idle(struct work_struct *work) 1661 { 1662 struct sysc *ddata; 1663 1664 ddata = container_of(work, struct sysc, idle_work.work); 1665 1666 if (pm_runtime_active(ddata->dev)) 1667 pm_runtime_put_sync(ddata->dev); 1668 } 1669 1670 static const struct of_device_id sysc_match_table[] = { 1671 { .compatible = "simple-bus", }, 1672 { /* sentinel */ }, 1673 }; 1674 1675 static int sysc_probe(struct platform_device *pdev) 1676 { 1677 struct ti_sysc_platform_data *pdata = dev_get_platdata(&pdev->dev); 1678 struct sysc *ddata; 1679 int error; 1680 1681 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL); 1682 if (!ddata) 1683 return -ENOMEM; 1684 1685 ddata->dev = &pdev->dev; 1686 platform_set_drvdata(pdev, ddata); 1687 1688 error = sysc_init_match(ddata); 1689 if (error) 1690 return error; 1691 1692 error = sysc_init_dts_quirks(ddata); 1693 if (error) 1694 goto unprepare; 1695 1696 error = sysc_get_clocks(ddata); 1697 if (error) 1698 return error; 1699 1700 error = sysc_map_and_check_registers(ddata); 1701 if (error) 1702 goto unprepare; 1703 1704 error = sysc_init_sysc_mask(ddata); 1705 if (error) 1706 goto unprepare; 1707 1708 error = sysc_init_idlemodes(ddata); 1709 if (error) 1710 goto unprepare; 1711 1712 error = sysc_init_syss_mask(ddata); 1713 if (error) 1714 goto unprepare; 1715 1716 error = sysc_init_pdata(ddata); 1717 if (error) 1718 goto unprepare; 1719 1720 error = sysc_init_resets(ddata); 1721 if (error) 1722 return error; 1723 1724 pm_runtime_enable(ddata->dev); 1725 error = sysc_init_module(ddata); 1726 if (error) 1727 goto unprepare; 1728 1729 error = pm_runtime_get_sync(ddata->dev); 1730 if (error < 0) { 1731 pm_runtime_put_noidle(ddata->dev); 1732 pm_runtime_disable(ddata->dev); 1733 goto unprepare; 1734 } 1735 1736 sysc_show_registers(ddata); 1737 1738 ddata->dev->type = &sysc_device_type; 1739 error = of_platform_populate(ddata->dev->of_node, sysc_match_table, 1740 pdata ? pdata->auxdata : NULL, 1741 ddata->dev); 1742 if (error) 1743 goto err; 1744 1745 INIT_DELAYED_WORK(&ddata->idle_work, ti_sysc_idle); 1746 1747 /* At least earlycon won't survive without deferred idle */ 1748 if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE_ON_INIT | 1749 SYSC_QUIRK_NO_RESET_ON_INIT)) { 1750 schedule_delayed_work(&ddata->idle_work, 3000); 1751 } else { 1752 pm_runtime_put(&pdev->dev); 1753 } 1754 1755 if (!of_get_available_child_count(ddata->dev->of_node)) 1756 reset_control_assert(ddata->rsts); 1757 1758 return 0; 1759 1760 err: 1761 pm_runtime_put_sync(&pdev->dev); 1762 pm_runtime_disable(&pdev->dev); 1763 unprepare: 1764 sysc_unprepare(ddata); 1765 1766 return error; 1767 } 1768 1769 static int sysc_remove(struct platform_device *pdev) 1770 { 1771 struct sysc *ddata = platform_get_drvdata(pdev); 1772 int error; 1773 1774 cancel_delayed_work_sync(&ddata->idle_work); 1775 1776 error = pm_runtime_get_sync(ddata->dev); 1777 if (error < 0) { 1778 pm_runtime_put_noidle(ddata->dev); 1779 pm_runtime_disable(ddata->dev); 1780 goto unprepare; 1781 } 1782 1783 of_platform_depopulate(&pdev->dev); 1784 1785 pm_runtime_put_sync(&pdev->dev); 1786 pm_runtime_disable(&pdev->dev); 1787 reset_control_assert(ddata->rsts); 1788 1789 unprepare: 1790 sysc_unprepare(ddata); 1791 1792 return 0; 1793 } 1794 1795 static const struct of_device_id sysc_match[] = { 1796 { .compatible = "ti,sysc-omap2", .data = &sysc_omap2, }, 1797 { .compatible = "ti,sysc-omap2-timer", .data = &sysc_omap2_timer, }, 1798 { .compatible = "ti,sysc-omap4", .data = &sysc_omap4, }, 1799 { .compatible = "ti,sysc-omap4-timer", .data = &sysc_omap4_timer, }, 1800 { .compatible = "ti,sysc-omap4-simple", .data = &sysc_omap4_simple, }, 1801 { .compatible = "ti,sysc-omap3430-sr", .data = &sysc_34xx_sr, }, 1802 { .compatible = "ti,sysc-omap3630-sr", .data = &sysc_36xx_sr, }, 1803 { .compatible = "ti,sysc-omap4-sr", .data = &sysc_omap4_sr, }, 1804 { .compatible = "ti,sysc-omap3-sham", .data = &sysc_omap3_sham, }, 1805 { .compatible = "ti,sysc-omap-aes", .data = &sysc_omap3_aes, }, 1806 { .compatible = "ti,sysc-mcasp", .data = &sysc_omap4_mcasp, }, 1807 { .compatible = "ti,sysc-usb-host-fs", 1808 .data = &sysc_omap4_usb_host_fs, }, 1809 { .compatible = "ti,sysc-dra7-mcan", .data = &sysc_dra7_mcan, }, 1810 { }, 1811 }; 1812 MODULE_DEVICE_TABLE(of, sysc_match); 1813 1814 static struct platform_driver sysc_driver = { 1815 .probe = sysc_probe, 1816 .remove = sysc_remove, 1817 .driver = { 1818 .name = "ti-sysc", 1819 .of_match_table = sysc_match, 1820 .pm = &sysc_pm_ops, 1821 }, 1822 }; 1823 1824 static int __init sysc_init(void) 1825 { 1826 bus_register_notifier(&platform_bus_type, &sysc_nb); 1827 1828 return platform_driver_register(&sysc_driver); 1829 } 1830 module_init(sysc_init); 1831 1832 static void __exit sysc_exit(void) 1833 { 1834 bus_unregister_notifier(&platform_bus_type, &sysc_nb); 1835 platform_driver_unregister(&sysc_driver); 1836 } 1837 module_exit(sysc_exit); 1838 1839 MODULE_DESCRIPTION("TI sysc interconnect target driver"); 1840 MODULE_LICENSE("GPL v2"); 1841