1 /* 2 * ti-sysc.c - Texas Instruments sysc interconnect target driver 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 9 * kind, whether express or implied; without even the implied warranty 10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 */ 13 14 #include <linux/io.h> 15 #include <linux/clk.h> 16 #include <linux/clkdev.h> 17 #include <linux/delay.h> 18 #include <linux/module.h> 19 #include <linux/platform_device.h> 20 #include <linux/pm_domain.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/reset.h> 23 #include <linux/of_address.h> 24 #include <linux/of_platform.h> 25 #include <linux/slab.h> 26 #include <linux/iopoll.h> 27 28 #include <linux/platform_data/ti-sysc.h> 29 30 #include <dt-bindings/bus/ti-sysc.h> 31 32 #define MAX_MODULE_SOFTRESET_WAIT 10000 33 34 static const char * const reg_names[] = { "rev", "sysc", "syss", }; 35 36 enum sysc_clocks { 37 SYSC_FCK, 38 SYSC_ICK, 39 SYSC_OPTFCK0, 40 SYSC_OPTFCK1, 41 SYSC_OPTFCK2, 42 SYSC_OPTFCK3, 43 SYSC_OPTFCK4, 44 SYSC_OPTFCK5, 45 SYSC_OPTFCK6, 46 SYSC_OPTFCK7, 47 SYSC_MAX_CLOCKS, 48 }; 49 50 static const char * const clock_names[SYSC_ICK + 1] = { "fck", "ick", }; 51 52 #define SYSC_IDLEMODE_MASK 3 53 #define SYSC_CLOCKACTIVITY_MASK 3 54 55 /** 56 * struct sysc - TI sysc interconnect target module registers and capabilities 57 * @dev: struct device pointer 58 * @module_pa: physical address of the interconnect target module 59 * @module_size: size of the interconnect target module 60 * @module_va: virtual address of the interconnect target module 61 * @offsets: register offsets from module base 62 * @clocks: clocks used by the interconnect target module 63 * @clock_roles: clock role names for the found clocks 64 * @nr_clocks: number of clocks used by the interconnect target module 65 * @legacy_mode: configured for legacy mode if set 66 * @cap: interconnect target module capabilities 67 * @cfg: interconnect target module configuration 68 * @name: name if available 69 * @revision: interconnect target module revision 70 * @needs_resume: runtime resume needed on resume from suspend 71 */ 72 struct sysc { 73 struct device *dev; 74 u64 module_pa; 75 u32 module_size; 76 void __iomem *module_va; 77 int offsets[SYSC_MAX_REGS]; 78 struct clk **clocks; 79 const char **clock_roles; 80 int nr_clocks; 81 struct reset_control *rsts; 82 const char *legacy_mode; 83 const struct sysc_capabilities *cap; 84 struct sysc_config cfg; 85 struct ti_sysc_cookie cookie; 86 const char *name; 87 u32 revision; 88 bool enabled; 89 bool needs_resume; 90 bool child_needs_resume; 91 struct delayed_work idle_work; 92 }; 93 94 void sysc_write(struct sysc *ddata, int offset, u32 value) 95 { 96 writel_relaxed(value, ddata->module_va + offset); 97 } 98 99 static u32 sysc_read(struct sysc *ddata, int offset) 100 { 101 if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) { 102 u32 val; 103 104 val = readw_relaxed(ddata->module_va + offset); 105 val |= (readw_relaxed(ddata->module_va + offset + 4) << 16); 106 107 return val; 108 } 109 110 return readl_relaxed(ddata->module_va + offset); 111 } 112 113 static bool sysc_opt_clks_needed(struct sysc *ddata) 114 { 115 return !!(ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_NEEDED); 116 } 117 118 static u32 sysc_read_revision(struct sysc *ddata) 119 { 120 int offset = ddata->offsets[SYSC_REVISION]; 121 122 if (offset < 0) 123 return 0; 124 125 return sysc_read(ddata, offset); 126 } 127 128 static int sysc_get_one_clock(struct sysc *ddata, const char *name) 129 { 130 int error, i, index = -ENODEV; 131 132 if (!strncmp(clock_names[SYSC_FCK], name, 3)) 133 index = SYSC_FCK; 134 else if (!strncmp(clock_names[SYSC_ICK], name, 3)) 135 index = SYSC_ICK; 136 137 if (index < 0) { 138 for (i = SYSC_OPTFCK0; i < SYSC_MAX_CLOCKS; i++) { 139 if (!ddata->clocks[i]) { 140 index = i; 141 break; 142 } 143 } 144 } 145 146 if (index < 0) { 147 dev_err(ddata->dev, "clock %s not added\n", name); 148 return index; 149 } 150 151 ddata->clocks[index] = devm_clk_get(ddata->dev, name); 152 if (IS_ERR(ddata->clocks[index])) { 153 if (PTR_ERR(ddata->clocks[index]) == -ENOENT) 154 return 0; 155 156 dev_err(ddata->dev, "clock get error for %s: %li\n", 157 name, PTR_ERR(ddata->clocks[index])); 158 159 return PTR_ERR(ddata->clocks[index]); 160 } 161 162 error = clk_prepare(ddata->clocks[index]); 163 if (error) { 164 dev_err(ddata->dev, "clock prepare error for %s: %i\n", 165 name, error); 166 167 return error; 168 } 169 170 return 0; 171 } 172 173 static int sysc_get_clocks(struct sysc *ddata) 174 { 175 struct device_node *np = ddata->dev->of_node; 176 struct property *prop; 177 const char *name; 178 int nr_fck = 0, nr_ick = 0, i, error = 0; 179 180 ddata->clock_roles = devm_kcalloc(ddata->dev, 181 SYSC_MAX_CLOCKS, 182 sizeof(*ddata->clock_roles), 183 GFP_KERNEL); 184 if (!ddata->clock_roles) 185 return -ENOMEM; 186 187 of_property_for_each_string(np, "clock-names", prop, name) { 188 if (!strncmp(clock_names[SYSC_FCK], name, 3)) 189 nr_fck++; 190 if (!strncmp(clock_names[SYSC_ICK], name, 3)) 191 nr_ick++; 192 ddata->clock_roles[ddata->nr_clocks] = name; 193 ddata->nr_clocks++; 194 } 195 196 if (ddata->nr_clocks < 1) 197 return 0; 198 199 if (ddata->nr_clocks > SYSC_MAX_CLOCKS) { 200 dev_err(ddata->dev, "too many clocks for %pOF\n", np); 201 202 return -EINVAL; 203 } 204 205 if (nr_fck > 1 || nr_ick > 1) { 206 dev_err(ddata->dev, "max one fck and ick for %pOF\n", np); 207 208 return -EINVAL; 209 } 210 211 ddata->clocks = devm_kcalloc(ddata->dev, 212 ddata->nr_clocks, sizeof(*ddata->clocks), 213 GFP_KERNEL); 214 if (!ddata->clocks) 215 return -ENOMEM; 216 217 for (i = 0; i < ddata->nr_clocks; i++) { 218 error = sysc_get_one_clock(ddata, ddata->clock_roles[i]); 219 if (error && error != -ENOENT) 220 return error; 221 } 222 223 return 0; 224 } 225 226 /** 227 * sysc_init_resets - reset module on init 228 * @ddata: device driver data 229 * 230 * A module can have both OCP softreset control and external rstctrl. 231 * If more complicated rstctrl resets are needed, please handle these 232 * directly from the child device driver and map only the module reset 233 * for the parent interconnect target module device. 234 * 235 * Automatic reset of the module on init can be skipped with the 236 * "ti,no-reset-on-init" device tree property. 237 */ 238 static int sysc_init_resets(struct sysc *ddata) 239 { 240 int error; 241 242 ddata->rsts = 243 devm_reset_control_array_get_optional_exclusive(ddata->dev); 244 if (IS_ERR(ddata->rsts)) 245 return PTR_ERR(ddata->rsts); 246 247 if (ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) 248 goto deassert; 249 250 error = reset_control_assert(ddata->rsts); 251 if (error) 252 return error; 253 254 deassert: 255 error = reset_control_deassert(ddata->rsts); 256 if (error) 257 return error; 258 259 return 0; 260 } 261 262 /** 263 * sysc_parse_and_check_child_range - parses module IO region from ranges 264 * @ddata: device driver data 265 * 266 * In general we only need rev, syss, and sysc registers and not the whole 267 * module range. But we do want the offsets for these registers from the 268 * module base. This allows us to check them against the legacy hwmod 269 * platform data. Let's also check the ranges are configured properly. 270 */ 271 static int sysc_parse_and_check_child_range(struct sysc *ddata) 272 { 273 struct device_node *np = ddata->dev->of_node; 274 const __be32 *ranges; 275 u32 nr_addr, nr_size; 276 int len, error; 277 278 ranges = of_get_property(np, "ranges", &len); 279 if (!ranges) { 280 dev_err(ddata->dev, "missing ranges for %pOF\n", np); 281 282 return -ENOENT; 283 } 284 285 len /= sizeof(*ranges); 286 287 if (len < 3) { 288 dev_err(ddata->dev, "incomplete ranges for %pOF\n", np); 289 290 return -EINVAL; 291 } 292 293 error = of_property_read_u32(np, "#address-cells", &nr_addr); 294 if (error) 295 return -ENOENT; 296 297 error = of_property_read_u32(np, "#size-cells", &nr_size); 298 if (error) 299 return -ENOENT; 300 301 if (nr_addr != 1 || nr_size != 1) { 302 dev_err(ddata->dev, "invalid ranges for %pOF\n", np); 303 304 return -EINVAL; 305 } 306 307 ranges++; 308 ddata->module_pa = of_translate_address(np, ranges++); 309 ddata->module_size = be32_to_cpup(ranges); 310 311 return 0; 312 } 313 314 static struct device_node *stdout_path; 315 316 static void sysc_init_stdout_path(struct sysc *ddata) 317 { 318 struct device_node *np = NULL; 319 const char *uart; 320 321 if (IS_ERR(stdout_path)) 322 return; 323 324 if (stdout_path) 325 return; 326 327 np = of_find_node_by_path("/chosen"); 328 if (!np) 329 goto err; 330 331 uart = of_get_property(np, "stdout-path", NULL); 332 if (!uart) 333 goto err; 334 335 np = of_find_node_by_path(uart); 336 if (!np) 337 goto err; 338 339 stdout_path = np; 340 341 return; 342 343 err: 344 stdout_path = ERR_PTR(-ENODEV); 345 } 346 347 static void sysc_check_quirk_stdout(struct sysc *ddata, 348 struct device_node *np) 349 { 350 sysc_init_stdout_path(ddata); 351 if (np != stdout_path) 352 return; 353 354 ddata->cfg.quirks |= SYSC_QUIRK_NO_IDLE_ON_INIT | 355 SYSC_QUIRK_NO_RESET_ON_INIT; 356 } 357 358 /** 359 * sysc_check_one_child - check child configuration 360 * @ddata: device driver data 361 * @np: child device node 362 * 363 * Let's avoid messy situations where we have new interconnect target 364 * node but children have "ti,hwmods". These belong to the interconnect 365 * target node and are managed by this driver. 366 */ 367 static int sysc_check_one_child(struct sysc *ddata, 368 struct device_node *np) 369 { 370 const char *name; 371 372 name = of_get_property(np, "ti,hwmods", NULL); 373 if (name) 374 dev_warn(ddata->dev, "really a child ti,hwmods property?"); 375 376 sysc_check_quirk_stdout(ddata, np); 377 378 return 0; 379 } 380 381 static int sysc_check_children(struct sysc *ddata) 382 { 383 struct device_node *child; 384 int error; 385 386 for_each_child_of_node(ddata->dev->of_node, child) { 387 error = sysc_check_one_child(ddata, child); 388 if (error) 389 return error; 390 } 391 392 return 0; 393 } 394 395 /* 396 * So far only I2C uses 16-bit read access with clockactivity with revision 397 * in two registers with stride of 4. We can detect this based on the rev 398 * register size to configure things far enough to be able to properly read 399 * the revision register. 400 */ 401 static void sysc_check_quirk_16bit(struct sysc *ddata, struct resource *res) 402 { 403 if (resource_size(res) == 8) 404 ddata->cfg.quirks |= SYSC_QUIRK_16BIT | SYSC_QUIRK_USE_CLOCKACT; 405 } 406 407 /** 408 * sysc_parse_one - parses the interconnect target module registers 409 * @ddata: device driver data 410 * @reg: register to parse 411 */ 412 static int sysc_parse_one(struct sysc *ddata, enum sysc_registers reg) 413 { 414 struct resource *res; 415 const char *name; 416 417 switch (reg) { 418 case SYSC_REVISION: 419 case SYSC_SYSCONFIG: 420 case SYSC_SYSSTATUS: 421 name = reg_names[reg]; 422 break; 423 default: 424 return -EINVAL; 425 } 426 427 res = platform_get_resource_byname(to_platform_device(ddata->dev), 428 IORESOURCE_MEM, name); 429 if (!res) { 430 ddata->offsets[reg] = -ENODEV; 431 432 return 0; 433 } 434 435 ddata->offsets[reg] = res->start - ddata->module_pa; 436 if (reg == SYSC_REVISION) 437 sysc_check_quirk_16bit(ddata, res); 438 439 return 0; 440 } 441 442 static int sysc_parse_registers(struct sysc *ddata) 443 { 444 int i, error; 445 446 for (i = 0; i < SYSC_MAX_REGS; i++) { 447 error = sysc_parse_one(ddata, i); 448 if (error) 449 return error; 450 } 451 452 return 0; 453 } 454 455 /** 456 * sysc_check_registers - check for misconfigured register overlaps 457 * @ddata: device driver data 458 */ 459 static int sysc_check_registers(struct sysc *ddata) 460 { 461 int i, j, nr_regs = 0, nr_matches = 0; 462 463 for (i = 0; i < SYSC_MAX_REGS; i++) { 464 if (ddata->offsets[i] < 0) 465 continue; 466 467 if (ddata->offsets[i] > (ddata->module_size - 4)) { 468 dev_err(ddata->dev, "register outside module range"); 469 470 return -EINVAL; 471 } 472 473 for (j = 0; j < SYSC_MAX_REGS; j++) { 474 if (ddata->offsets[j] < 0) 475 continue; 476 477 if (ddata->offsets[i] == ddata->offsets[j]) 478 nr_matches++; 479 } 480 nr_regs++; 481 } 482 483 if (nr_regs < 1) { 484 dev_err(ddata->dev, "missing registers\n"); 485 486 return -EINVAL; 487 } 488 489 if (nr_matches > nr_regs) { 490 dev_err(ddata->dev, "overlapping registers: (%i/%i)", 491 nr_regs, nr_matches); 492 493 return -EINVAL; 494 } 495 496 return 0; 497 } 498 499 /** 500 * syc_ioremap - ioremap register space for the interconnect target module 501 * @ddata: device driver data 502 * 503 * Note that the interconnect target module registers can be anywhere 504 * within the interconnect target module range. For example, SGX has 505 * them at offset 0x1fc00 in the 32MB module address space. And cpsw 506 * has them at offset 0x1200 in the CPSW_WR child. Usually the 507 * the interconnect target module registers are at the beginning of 508 * the module range though. 509 */ 510 static int sysc_ioremap(struct sysc *ddata) 511 { 512 int size; 513 514 size = max3(ddata->offsets[SYSC_REVISION], 515 ddata->offsets[SYSC_SYSCONFIG], 516 ddata->offsets[SYSC_SYSSTATUS]); 517 518 if (size < 0 || (size + sizeof(u32)) > ddata->module_size) 519 return -EINVAL; 520 521 ddata->module_va = devm_ioremap(ddata->dev, 522 ddata->module_pa, 523 size + sizeof(u32)); 524 if (!ddata->module_va) 525 return -EIO; 526 527 return 0; 528 } 529 530 /** 531 * sysc_map_and_check_registers - ioremap and check device registers 532 * @ddata: device driver data 533 */ 534 static int sysc_map_and_check_registers(struct sysc *ddata) 535 { 536 int error; 537 538 error = sysc_parse_and_check_child_range(ddata); 539 if (error) 540 return error; 541 542 error = sysc_check_children(ddata); 543 if (error) 544 return error; 545 546 error = sysc_parse_registers(ddata); 547 if (error) 548 return error; 549 550 error = sysc_ioremap(ddata); 551 if (error) 552 return error; 553 554 error = sysc_check_registers(ddata); 555 if (error) 556 return error; 557 558 return 0; 559 } 560 561 /** 562 * sysc_show_rev - read and show interconnect target module revision 563 * @bufp: buffer to print the information to 564 * @ddata: device driver data 565 */ 566 static int sysc_show_rev(char *bufp, struct sysc *ddata) 567 { 568 int len; 569 570 if (ddata->offsets[SYSC_REVISION] < 0) 571 return sprintf(bufp, ":NA"); 572 573 len = sprintf(bufp, ":%08x", ddata->revision); 574 575 return len; 576 } 577 578 static int sysc_show_reg(struct sysc *ddata, 579 char *bufp, enum sysc_registers reg) 580 { 581 if (ddata->offsets[reg] < 0) 582 return sprintf(bufp, ":NA"); 583 584 return sprintf(bufp, ":%x", ddata->offsets[reg]); 585 } 586 587 static int sysc_show_name(char *bufp, struct sysc *ddata) 588 { 589 if (!ddata->name) 590 return 0; 591 592 return sprintf(bufp, ":%s", ddata->name); 593 } 594 595 /** 596 * sysc_show_registers - show information about interconnect target module 597 * @ddata: device driver data 598 */ 599 static void sysc_show_registers(struct sysc *ddata) 600 { 601 char buf[128]; 602 char *bufp = buf; 603 int i; 604 605 for (i = 0; i < SYSC_MAX_REGS; i++) 606 bufp += sysc_show_reg(ddata, bufp, i); 607 608 bufp += sysc_show_rev(bufp, ddata); 609 bufp += sysc_show_name(bufp, ddata); 610 611 dev_dbg(ddata->dev, "%llx:%x%s\n", 612 ddata->module_pa, ddata->module_size, 613 buf); 614 } 615 616 static int __maybe_unused sysc_runtime_suspend(struct device *dev) 617 { 618 struct ti_sysc_platform_data *pdata; 619 struct sysc *ddata; 620 int error = 0, i; 621 622 ddata = dev_get_drvdata(dev); 623 624 if (!ddata->enabled) 625 return 0; 626 627 if (ddata->legacy_mode) { 628 pdata = dev_get_platdata(ddata->dev); 629 if (!pdata) 630 return 0; 631 632 if (!pdata->idle_module) 633 return -ENODEV; 634 635 error = pdata->idle_module(dev, &ddata->cookie); 636 if (error) 637 dev_err(dev, "%s: could not idle: %i\n", 638 __func__, error); 639 640 goto idled; 641 } 642 643 for (i = 0; i < ddata->nr_clocks; i++) { 644 if (IS_ERR_OR_NULL(ddata->clocks[i])) 645 continue; 646 647 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata)) 648 break; 649 650 clk_disable(ddata->clocks[i]); 651 } 652 653 idled: 654 ddata->enabled = false; 655 656 return error; 657 } 658 659 static int __maybe_unused sysc_runtime_resume(struct device *dev) 660 { 661 struct ti_sysc_platform_data *pdata; 662 struct sysc *ddata; 663 int error = 0, i; 664 665 ddata = dev_get_drvdata(dev); 666 667 if (ddata->enabled) 668 return 0; 669 670 if (ddata->legacy_mode) { 671 pdata = dev_get_platdata(ddata->dev); 672 if (!pdata) 673 return 0; 674 675 if (!pdata->enable_module) 676 return -ENODEV; 677 678 error = pdata->enable_module(dev, &ddata->cookie); 679 if (error) 680 dev_err(dev, "%s: could not enable: %i\n", 681 __func__, error); 682 683 goto awake; 684 } 685 686 for (i = 0; i < ddata->nr_clocks; i++) { 687 if (IS_ERR_OR_NULL(ddata->clocks[i])) 688 continue; 689 690 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata)) 691 break; 692 693 error = clk_enable(ddata->clocks[i]); 694 if (error) 695 return error; 696 } 697 698 awake: 699 ddata->enabled = true; 700 701 return error; 702 } 703 704 #ifdef CONFIG_PM_SLEEP 705 static int sysc_suspend(struct device *dev) 706 { 707 struct sysc *ddata; 708 int error; 709 710 ddata = dev_get_drvdata(dev); 711 712 if (ddata->cfg.quirks & (SYSC_QUIRK_RESOURCE_PROVIDER | 713 SYSC_QUIRK_LEGACY_IDLE)) 714 return 0; 715 716 if (!ddata->enabled) 717 return 0; 718 719 dev_dbg(ddata->dev, "%s %s\n", __func__, 720 ddata->name ? ddata->name : ""); 721 722 error = pm_runtime_put_sync_suspend(dev); 723 if (error < 0) { 724 dev_warn(ddata->dev, "%s not idle %i %s\n", 725 __func__, error, 726 ddata->name ? ddata->name : ""); 727 728 return 0; 729 } 730 731 ddata->needs_resume = true; 732 733 return 0; 734 } 735 736 static int sysc_resume(struct device *dev) 737 { 738 struct sysc *ddata; 739 int error; 740 741 ddata = dev_get_drvdata(dev); 742 743 if (ddata->cfg.quirks & (SYSC_QUIRK_RESOURCE_PROVIDER | 744 SYSC_QUIRK_LEGACY_IDLE)) 745 return 0; 746 747 if (ddata->needs_resume) { 748 dev_dbg(ddata->dev, "%s %s\n", __func__, 749 ddata->name ? ddata->name : ""); 750 751 error = pm_runtime_get_sync(dev); 752 if (error < 0) { 753 dev_err(ddata->dev, "%s error %i %s\n", 754 __func__, error, 755 ddata->name ? ddata->name : ""); 756 757 return error; 758 } 759 760 ddata->needs_resume = false; 761 } 762 763 return 0; 764 } 765 766 static int sysc_noirq_suspend(struct device *dev) 767 { 768 struct sysc *ddata; 769 770 ddata = dev_get_drvdata(dev); 771 772 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE) 773 return 0; 774 775 if (!(ddata->cfg.quirks & SYSC_QUIRK_RESOURCE_PROVIDER)) 776 return 0; 777 778 if (!ddata->enabled) 779 return 0; 780 781 dev_dbg(ddata->dev, "%s %s\n", __func__, 782 ddata->name ? ddata->name : ""); 783 784 ddata->needs_resume = true; 785 786 return sysc_runtime_suspend(dev); 787 } 788 789 static int sysc_noirq_resume(struct device *dev) 790 { 791 struct sysc *ddata; 792 793 ddata = dev_get_drvdata(dev); 794 795 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE) 796 return 0; 797 798 if (!(ddata->cfg.quirks & SYSC_QUIRK_RESOURCE_PROVIDER)) 799 return 0; 800 801 if (ddata->needs_resume) { 802 dev_dbg(ddata->dev, "%s %s\n", __func__, 803 ddata->name ? ddata->name : ""); 804 805 ddata->needs_resume = false; 806 807 return sysc_runtime_resume(dev); 808 } 809 810 return 0; 811 } 812 #endif 813 814 static const struct dev_pm_ops sysc_pm_ops = { 815 SET_SYSTEM_SLEEP_PM_OPS(sysc_suspend, sysc_resume) 816 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_noirq_suspend, sysc_noirq_resume) 817 SET_RUNTIME_PM_OPS(sysc_runtime_suspend, 818 sysc_runtime_resume, 819 NULL) 820 }; 821 822 /* Module revision register based quirks */ 823 struct sysc_revision_quirk { 824 const char *name; 825 u32 base; 826 int rev_offset; 827 int sysc_offset; 828 int syss_offset; 829 u32 revision; 830 u32 revision_mask; 831 u32 quirks; 832 }; 833 834 #define SYSC_QUIRK(optname, optbase, optrev, optsysc, optsyss, \ 835 optrev_val, optrevmask, optquirkmask) \ 836 { \ 837 .name = (optname), \ 838 .base = (optbase), \ 839 .rev_offset = (optrev), \ 840 .sysc_offset = (optsysc), \ 841 .syss_offset = (optsyss), \ 842 .revision = (optrev_val), \ 843 .revision_mask = (optrevmask), \ 844 .quirks = (optquirkmask), \ 845 } 846 847 static const struct sysc_revision_quirk sysc_revision_quirks[] = { 848 /* These need to use noirq_suspend */ 849 SYSC_QUIRK("control", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 850 SYSC_QUIRK_RESOURCE_PROVIDER), 851 SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xffffffff, 852 SYSC_QUIRK_RESOURCE_PROVIDER), 853 SYSC_QUIRK("mcspi", 0, 0, 0x10, -1, 0x40300a0b, 0xffffffff, 854 SYSC_QUIRK_RESOURCE_PROVIDER), 855 SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x40000100, 0xffffffff, 856 SYSC_QUIRK_RESOURCE_PROVIDER), 857 SYSC_QUIRK("ocp2scp", 0, 0, 0x10, 0x14, 0x50060005, 0xffffffff, 858 SYSC_QUIRK_RESOURCE_PROVIDER), 859 SYSC_QUIRK("padconf", 0, 0, 0x10, -1, 0x4fff0800, 0xffffffff, 860 SYSC_QUIRK_RESOURCE_PROVIDER), 861 SYSC_QUIRK("scm", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 862 SYSC_QUIRK_RESOURCE_PROVIDER), 863 SYSC_QUIRK("scrm", 0, 0, -1, -1, 0x00000010, 0xffffffff, 864 SYSC_QUIRK_RESOURCE_PROVIDER), 865 SYSC_QUIRK("sdma", 0, 0, 0x2c, 0x28, 0x00010900, 0xffffffff, 866 SYSC_QUIRK_RESOURCE_PROVIDER), 867 868 /* These drivers need to be fixed to not use pm_runtime_irq_safe() */ 869 SYSC_QUIRK("gpio", 0, 0, 0x10, 0x114, 0x50600801, 0xffffffff, 870 SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_OPT_CLKS_IN_RESET), 871 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000020, 0xffffffff, 872 SYSC_QUIRK_LEGACY_IDLE), 873 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000030, 0xffffffff, 874 SYSC_QUIRK_LEGACY_IDLE), 875 SYSC_QUIRK("sham", 0, 0x100, 0x110, 0x114, 0x40000c03, 0xffffffff, 876 SYSC_QUIRK_LEGACY_IDLE), 877 SYSC_QUIRK("smartreflex", 0, -1, 0x24, -1, 0x00000000, 0xffffffff, 878 SYSC_QUIRK_LEGACY_IDLE), 879 SYSC_QUIRK("smartreflex", 0, -1, 0x38, -1, 0x00000000, 0xffffffff, 880 SYSC_QUIRK_LEGACY_IDLE), 881 SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff, 882 SYSC_QUIRK_LEGACY_IDLE), 883 /* Some timers on omap4 and later */ 884 SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x4fff1301, 0xffffffff, 885 SYSC_QUIRK_LEGACY_IDLE), 886 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff, 887 SYSC_QUIRK_LEGACY_IDLE), 888 /* Uarts on omap4 and later */ 889 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffffffff, 890 SYSC_QUIRK_LEGACY_IDLE), 891 892 /* These devices don't yet suspend properly without legacy setting */ 893 SYSC_QUIRK("sdio", 0, 0, 0x10, -1, 0x40202301, 0xffffffff, 894 SYSC_QUIRK_LEGACY_IDLE), 895 SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xffffffff, 896 SYSC_QUIRK_LEGACY_IDLE), 897 SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0d00, 0xffffffff, 898 SYSC_QUIRK_LEGACY_IDLE), 899 900 #ifdef DEBUG 901 SYSC_QUIRK("aess", 0, 0, 0x10, -1, 0x40000000, 0xffffffff, 0), 902 SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -1, 0, 0, 0), 903 SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x00000006, 0xffffffff, 0), 904 SYSC_QUIRK("hsi", 0, 0, 0x10, 0x14, 0x50043101, 0xffffffff, 0), 905 SYSC_QUIRK("iss", 0, 0, 0x10, -1, 0x40000101, 0xffffffff, 0), 906 SYSC_QUIRK("mcasp", 0, 0, 0x4, -1, 0x44306302, 0xffffffff, 0), 907 SYSC_QUIRK("mcbsp", 0, -1, 0x8c, -1, 0, 0, 0), 908 SYSC_QUIRK("mailbox", 0, 0, 0x10, -1, 0x00000400, 0xffffffff, 0), 909 SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40000902, 0xffffffff, 0), 910 SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40002903, 0xffffffff, 0), 911 SYSC_QUIRK("spinlock", 0, 0, 0x10, -1, 0x50020000, 0xffffffff, 0), 912 SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000004, 0xffffffff, 0), 913 SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, 0x14, 0x50700100, 0xffffffff, 0), 914 SYSC_QUIRK("usb_otg_hs", 0, 0x400, 0x404, 0x408, 0x00000050, 915 0xffffffff, 0), 916 #endif 917 }; 918 919 static void sysc_init_revision_quirks(struct sysc *ddata) 920 { 921 const struct sysc_revision_quirk *q; 922 int i; 923 924 for (i = 0; i < ARRAY_SIZE(sysc_revision_quirks); i++) { 925 q = &sysc_revision_quirks[i]; 926 927 if (q->base && q->base != ddata->module_pa) 928 continue; 929 930 if (q->rev_offset >= 0 && 931 q->rev_offset != ddata->offsets[SYSC_REVISION]) 932 continue; 933 934 if (q->sysc_offset >= 0 && 935 q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG]) 936 continue; 937 938 if (q->syss_offset >= 0 && 939 q->syss_offset != ddata->offsets[SYSC_SYSSTATUS]) 940 continue; 941 942 if (q->revision == ddata->revision || 943 (q->revision & q->revision_mask) == 944 (ddata->revision & q->revision_mask)) { 945 ddata->name = q->name; 946 ddata->cfg.quirks |= q->quirks; 947 } 948 } 949 } 950 951 static int sysc_reset(struct sysc *ddata) 952 { 953 int offset = ddata->offsets[SYSC_SYSCONFIG]; 954 int val; 955 956 if (ddata->legacy_mode || offset < 0 || 957 ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) 958 return 0; 959 960 /* 961 * Currently only support reset status in sysstatus. 962 * Warn and return error in all other cases 963 */ 964 if (!ddata->cfg.syss_mask) { 965 dev_err(ddata->dev, "No ti,syss-mask. Reset failed\n"); 966 return -EINVAL; 967 } 968 969 val = sysc_read(ddata, offset); 970 val |= (0x1 << ddata->cap->regbits->srst_shift); 971 sysc_write(ddata, offset, val); 972 973 /* Poll on reset status */ 974 offset = ddata->offsets[SYSC_SYSSTATUS]; 975 976 return readl_poll_timeout(ddata->module_va + offset, val, 977 (val & ddata->cfg.syss_mask) == 0x0, 978 100, MAX_MODULE_SOFTRESET_WAIT); 979 } 980 981 /* At this point the module is configured enough to read the revision */ 982 static int sysc_init_module(struct sysc *ddata) 983 { 984 int error; 985 986 if (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE_ON_INIT) { 987 ddata->revision = sysc_read_revision(ddata); 988 goto rev_quirks; 989 } 990 991 error = pm_runtime_get_sync(ddata->dev); 992 if (error < 0) { 993 pm_runtime_put_noidle(ddata->dev); 994 995 return 0; 996 } 997 998 error = sysc_reset(ddata); 999 if (error) { 1000 dev_err(ddata->dev, "Reset failed with %d\n", error); 1001 pm_runtime_put_sync(ddata->dev); 1002 1003 return error; 1004 } 1005 1006 ddata->revision = sysc_read_revision(ddata); 1007 pm_runtime_put_sync(ddata->dev); 1008 1009 rev_quirks: 1010 sysc_init_revision_quirks(ddata); 1011 1012 return 0; 1013 } 1014 1015 static int sysc_init_sysc_mask(struct sysc *ddata) 1016 { 1017 struct device_node *np = ddata->dev->of_node; 1018 int error; 1019 u32 val; 1020 1021 error = of_property_read_u32(np, "ti,sysc-mask", &val); 1022 if (error) 1023 return 0; 1024 1025 if (val) 1026 ddata->cfg.sysc_val = val & ddata->cap->sysc_mask; 1027 else 1028 ddata->cfg.sysc_val = ddata->cap->sysc_mask; 1029 1030 return 0; 1031 } 1032 1033 static int sysc_init_idlemode(struct sysc *ddata, u8 *idlemodes, 1034 const char *name) 1035 { 1036 struct device_node *np = ddata->dev->of_node; 1037 struct property *prop; 1038 const __be32 *p; 1039 u32 val; 1040 1041 of_property_for_each_u32(np, name, prop, p, val) { 1042 if (val >= SYSC_NR_IDLEMODES) { 1043 dev_err(ddata->dev, "invalid idlemode: %i\n", val); 1044 return -EINVAL; 1045 } 1046 *idlemodes |= (1 << val); 1047 } 1048 1049 return 0; 1050 } 1051 1052 static int sysc_init_idlemodes(struct sysc *ddata) 1053 { 1054 int error; 1055 1056 error = sysc_init_idlemode(ddata, &ddata->cfg.midlemodes, 1057 "ti,sysc-midle"); 1058 if (error) 1059 return error; 1060 1061 error = sysc_init_idlemode(ddata, &ddata->cfg.sidlemodes, 1062 "ti,sysc-sidle"); 1063 if (error) 1064 return error; 1065 1066 return 0; 1067 } 1068 1069 /* 1070 * Only some devices on omap4 and later have SYSCONFIG reset done 1071 * bit. We can detect this if there is no SYSSTATUS at all, or the 1072 * SYSTATUS bit 0 is not used. Note that some SYSSTATUS registers 1073 * have multiple bits for the child devices like OHCI and EHCI. 1074 * Depends on SYSC being parsed first. 1075 */ 1076 static int sysc_init_syss_mask(struct sysc *ddata) 1077 { 1078 struct device_node *np = ddata->dev->of_node; 1079 int error; 1080 u32 val; 1081 1082 error = of_property_read_u32(np, "ti,syss-mask", &val); 1083 if (error) { 1084 if ((ddata->cap->type == TI_SYSC_OMAP4 || 1085 ddata->cap->type == TI_SYSC_OMAP4_TIMER) && 1086 (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET)) 1087 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS; 1088 1089 return 0; 1090 } 1091 1092 if (!(val & 1) && (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET)) 1093 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS; 1094 1095 ddata->cfg.syss_mask = val; 1096 1097 return 0; 1098 } 1099 1100 /* 1101 * Many child device drivers need to have fck and opt clocks available 1102 * to get the clock rate for device internal configuration etc. 1103 */ 1104 static int sysc_child_add_named_clock(struct sysc *ddata, 1105 struct device *child, 1106 const char *name) 1107 { 1108 struct clk *clk; 1109 struct clk_lookup *l; 1110 int error = 0; 1111 1112 if (!name) 1113 return 0; 1114 1115 clk = clk_get(child, name); 1116 if (!IS_ERR(clk)) { 1117 clk_put(clk); 1118 1119 return -EEXIST; 1120 } 1121 1122 clk = clk_get(ddata->dev, name); 1123 if (IS_ERR(clk)) 1124 return -ENODEV; 1125 1126 l = clkdev_create(clk, name, dev_name(child)); 1127 if (!l) 1128 error = -ENOMEM; 1129 1130 clk_put(clk); 1131 1132 return error; 1133 } 1134 1135 static int sysc_child_add_clocks(struct sysc *ddata, 1136 struct device *child) 1137 { 1138 int i, error; 1139 1140 for (i = 0; i < ddata->nr_clocks; i++) { 1141 error = sysc_child_add_named_clock(ddata, 1142 child, 1143 ddata->clock_roles[i]); 1144 if (error && error != -EEXIST) { 1145 dev_err(ddata->dev, "could not add child clock %s: %i\n", 1146 ddata->clock_roles[i], error); 1147 1148 return error; 1149 } 1150 } 1151 1152 return 0; 1153 } 1154 1155 static struct device_type sysc_device_type = { 1156 }; 1157 1158 static struct sysc *sysc_child_to_parent(struct device *dev) 1159 { 1160 struct device *parent = dev->parent; 1161 1162 if (!parent || parent->type != &sysc_device_type) 1163 return NULL; 1164 1165 return dev_get_drvdata(parent); 1166 } 1167 1168 static int __maybe_unused sysc_child_runtime_suspend(struct device *dev) 1169 { 1170 struct sysc *ddata; 1171 int error; 1172 1173 ddata = sysc_child_to_parent(dev); 1174 1175 error = pm_generic_runtime_suspend(dev); 1176 if (error) 1177 return error; 1178 1179 if (!ddata->enabled) 1180 return 0; 1181 1182 return sysc_runtime_suspend(ddata->dev); 1183 } 1184 1185 static int __maybe_unused sysc_child_runtime_resume(struct device *dev) 1186 { 1187 struct sysc *ddata; 1188 int error; 1189 1190 ddata = sysc_child_to_parent(dev); 1191 1192 if (!ddata->enabled) { 1193 error = sysc_runtime_resume(ddata->dev); 1194 if (error < 0) 1195 dev_err(ddata->dev, 1196 "%s error: %i\n", __func__, error); 1197 } 1198 1199 return pm_generic_runtime_resume(dev); 1200 } 1201 1202 #ifdef CONFIG_PM_SLEEP 1203 static int sysc_child_suspend_noirq(struct device *dev) 1204 { 1205 struct sysc *ddata; 1206 int error; 1207 1208 ddata = sysc_child_to_parent(dev); 1209 1210 dev_dbg(ddata->dev, "%s %s\n", __func__, 1211 ddata->name ? ddata->name : ""); 1212 1213 error = pm_generic_suspend_noirq(dev); 1214 if (error) { 1215 dev_err(dev, "%s error at %i: %i\n", 1216 __func__, __LINE__, error); 1217 1218 return error; 1219 } 1220 1221 if (!pm_runtime_status_suspended(dev)) { 1222 error = pm_generic_runtime_suspend(dev); 1223 if (error) { 1224 dev_warn(dev, "%s busy at %i: %i\n", 1225 __func__, __LINE__, error); 1226 1227 return 0; 1228 } 1229 1230 error = sysc_runtime_suspend(ddata->dev); 1231 if (error) { 1232 dev_err(dev, "%s error at %i: %i\n", 1233 __func__, __LINE__, error); 1234 1235 return error; 1236 } 1237 1238 ddata->child_needs_resume = true; 1239 } 1240 1241 return 0; 1242 } 1243 1244 static int sysc_child_resume_noirq(struct device *dev) 1245 { 1246 struct sysc *ddata; 1247 int error; 1248 1249 ddata = sysc_child_to_parent(dev); 1250 1251 dev_dbg(ddata->dev, "%s %s\n", __func__, 1252 ddata->name ? ddata->name : ""); 1253 1254 if (ddata->child_needs_resume) { 1255 ddata->child_needs_resume = false; 1256 1257 error = sysc_runtime_resume(ddata->dev); 1258 if (error) 1259 dev_err(ddata->dev, 1260 "%s runtime resume error: %i\n", 1261 __func__, error); 1262 1263 error = pm_generic_runtime_resume(dev); 1264 if (error) 1265 dev_err(ddata->dev, 1266 "%s generic runtime resume: %i\n", 1267 __func__, error); 1268 } 1269 1270 return pm_generic_resume_noirq(dev); 1271 } 1272 #endif 1273 1274 struct dev_pm_domain sysc_child_pm_domain = { 1275 .ops = { 1276 SET_RUNTIME_PM_OPS(sysc_child_runtime_suspend, 1277 sysc_child_runtime_resume, 1278 NULL) 1279 USE_PLATFORM_PM_SLEEP_OPS 1280 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_child_suspend_noirq, 1281 sysc_child_resume_noirq) 1282 } 1283 }; 1284 1285 /** 1286 * sysc_legacy_idle_quirk - handle children in omap_device compatible way 1287 * @ddata: device driver data 1288 * @child: child device driver 1289 * 1290 * Allow idle for child devices as done with _od_runtime_suspend(). 1291 * Otherwise many child devices will not idle because of the permanent 1292 * parent usecount set in pm_runtime_irq_safe(). 1293 * 1294 * Note that the long term solution is to just modify the child device 1295 * drivers to not set pm_runtime_irq_safe() and then this can be just 1296 * dropped. 1297 */ 1298 static void sysc_legacy_idle_quirk(struct sysc *ddata, struct device *child) 1299 { 1300 if (!ddata->legacy_mode) 1301 return; 1302 1303 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE) 1304 dev_pm_domain_set(child, &sysc_child_pm_domain); 1305 } 1306 1307 static int sysc_notifier_call(struct notifier_block *nb, 1308 unsigned long event, void *device) 1309 { 1310 struct device *dev = device; 1311 struct sysc *ddata; 1312 int error; 1313 1314 ddata = sysc_child_to_parent(dev); 1315 if (!ddata) 1316 return NOTIFY_DONE; 1317 1318 switch (event) { 1319 case BUS_NOTIFY_ADD_DEVICE: 1320 error = sysc_child_add_clocks(ddata, dev); 1321 if (error) 1322 return error; 1323 sysc_legacy_idle_quirk(ddata, dev); 1324 break; 1325 default: 1326 break; 1327 } 1328 1329 return NOTIFY_DONE; 1330 } 1331 1332 static struct notifier_block sysc_nb = { 1333 .notifier_call = sysc_notifier_call, 1334 }; 1335 1336 /* Device tree configured quirks */ 1337 struct sysc_dts_quirk { 1338 const char *name; 1339 u32 mask; 1340 }; 1341 1342 static const struct sysc_dts_quirk sysc_dts_quirks[] = { 1343 { .name = "ti,no-idle-on-init", 1344 .mask = SYSC_QUIRK_NO_IDLE_ON_INIT, }, 1345 { .name = "ti,no-reset-on-init", 1346 .mask = SYSC_QUIRK_NO_RESET_ON_INIT, }, 1347 }; 1348 1349 static int sysc_init_dts_quirks(struct sysc *ddata) 1350 { 1351 struct device_node *np = ddata->dev->of_node; 1352 const struct property *prop; 1353 int i, len, error; 1354 u32 val; 1355 1356 ddata->legacy_mode = of_get_property(np, "ti,hwmods", NULL); 1357 1358 for (i = 0; i < ARRAY_SIZE(sysc_dts_quirks); i++) { 1359 prop = of_get_property(np, sysc_dts_quirks[i].name, &len); 1360 if (!prop) 1361 continue; 1362 1363 ddata->cfg.quirks |= sysc_dts_quirks[i].mask; 1364 } 1365 1366 error = of_property_read_u32(np, "ti,sysc-delay-us", &val); 1367 if (!error) { 1368 if (val > 255) { 1369 dev_warn(ddata->dev, "bad ti,sysc-delay-us: %i\n", 1370 val); 1371 } 1372 1373 ddata->cfg.srst_udelay = (u8)val; 1374 } 1375 1376 return 0; 1377 } 1378 1379 static void sysc_unprepare(struct sysc *ddata) 1380 { 1381 int i; 1382 1383 for (i = 0; i < SYSC_MAX_CLOCKS; i++) { 1384 if (!IS_ERR_OR_NULL(ddata->clocks[i])) 1385 clk_unprepare(ddata->clocks[i]); 1386 } 1387 } 1388 1389 /* 1390 * Common sysc register bits found on omap2, also known as type1 1391 */ 1392 static const struct sysc_regbits sysc_regbits_omap2 = { 1393 .dmadisable_shift = -ENODEV, 1394 .midle_shift = 12, 1395 .sidle_shift = 3, 1396 .clkact_shift = 8, 1397 .emufree_shift = 5, 1398 .enwkup_shift = 2, 1399 .srst_shift = 1, 1400 .autoidle_shift = 0, 1401 }; 1402 1403 static const struct sysc_capabilities sysc_omap2 = { 1404 .type = TI_SYSC_OMAP2, 1405 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE | 1406 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET | 1407 SYSC_OMAP2_AUTOIDLE, 1408 .regbits = &sysc_regbits_omap2, 1409 }; 1410 1411 /* All omap2 and 3 timers, and timers 1, 2 & 10 on omap 4 and 5 */ 1412 static const struct sysc_capabilities sysc_omap2_timer = { 1413 .type = TI_SYSC_OMAP2_TIMER, 1414 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE | 1415 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET | 1416 SYSC_OMAP2_AUTOIDLE, 1417 .regbits = &sysc_regbits_omap2, 1418 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT, 1419 }; 1420 1421 /* 1422 * SHAM2 (SHA1/MD5) sysc found on omap3, a variant of sysc_regbits_omap2 1423 * with different sidle position 1424 */ 1425 static const struct sysc_regbits sysc_regbits_omap3_sham = { 1426 .dmadisable_shift = -ENODEV, 1427 .midle_shift = -ENODEV, 1428 .sidle_shift = 4, 1429 .clkact_shift = -ENODEV, 1430 .enwkup_shift = -ENODEV, 1431 .srst_shift = 1, 1432 .autoidle_shift = 0, 1433 .emufree_shift = -ENODEV, 1434 }; 1435 1436 static const struct sysc_capabilities sysc_omap3_sham = { 1437 .type = TI_SYSC_OMAP3_SHAM, 1438 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE, 1439 .regbits = &sysc_regbits_omap3_sham, 1440 }; 1441 1442 /* 1443 * AES register bits found on omap3 and later, a variant of 1444 * sysc_regbits_omap2 with different sidle position 1445 */ 1446 static const struct sysc_regbits sysc_regbits_omap3_aes = { 1447 .dmadisable_shift = -ENODEV, 1448 .midle_shift = -ENODEV, 1449 .sidle_shift = 6, 1450 .clkact_shift = -ENODEV, 1451 .enwkup_shift = -ENODEV, 1452 .srst_shift = 1, 1453 .autoidle_shift = 0, 1454 .emufree_shift = -ENODEV, 1455 }; 1456 1457 static const struct sysc_capabilities sysc_omap3_aes = { 1458 .type = TI_SYSC_OMAP3_AES, 1459 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE, 1460 .regbits = &sysc_regbits_omap3_aes, 1461 }; 1462 1463 /* 1464 * Common sysc register bits found on omap4, also known as type2 1465 */ 1466 static const struct sysc_regbits sysc_regbits_omap4 = { 1467 .dmadisable_shift = 16, 1468 .midle_shift = 4, 1469 .sidle_shift = 2, 1470 .clkact_shift = -ENODEV, 1471 .enwkup_shift = -ENODEV, 1472 .emufree_shift = 1, 1473 .srst_shift = 0, 1474 .autoidle_shift = -ENODEV, 1475 }; 1476 1477 static const struct sysc_capabilities sysc_omap4 = { 1478 .type = TI_SYSC_OMAP4, 1479 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU | 1480 SYSC_OMAP4_SOFTRESET, 1481 .regbits = &sysc_regbits_omap4, 1482 }; 1483 1484 static const struct sysc_capabilities sysc_omap4_timer = { 1485 .type = TI_SYSC_OMAP4_TIMER, 1486 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU | 1487 SYSC_OMAP4_SOFTRESET, 1488 .regbits = &sysc_regbits_omap4, 1489 }; 1490 1491 /* 1492 * Common sysc register bits found on omap4, also known as type3 1493 */ 1494 static const struct sysc_regbits sysc_regbits_omap4_simple = { 1495 .dmadisable_shift = -ENODEV, 1496 .midle_shift = 2, 1497 .sidle_shift = 0, 1498 .clkact_shift = -ENODEV, 1499 .enwkup_shift = -ENODEV, 1500 .srst_shift = -ENODEV, 1501 .emufree_shift = -ENODEV, 1502 .autoidle_shift = -ENODEV, 1503 }; 1504 1505 static const struct sysc_capabilities sysc_omap4_simple = { 1506 .type = TI_SYSC_OMAP4_SIMPLE, 1507 .regbits = &sysc_regbits_omap4_simple, 1508 }; 1509 1510 /* 1511 * SmartReflex sysc found on omap34xx 1512 */ 1513 static const struct sysc_regbits sysc_regbits_omap34xx_sr = { 1514 .dmadisable_shift = -ENODEV, 1515 .midle_shift = -ENODEV, 1516 .sidle_shift = -ENODEV, 1517 .clkact_shift = 20, 1518 .enwkup_shift = -ENODEV, 1519 .srst_shift = -ENODEV, 1520 .emufree_shift = -ENODEV, 1521 .autoidle_shift = -ENODEV, 1522 }; 1523 1524 static const struct sysc_capabilities sysc_34xx_sr = { 1525 .type = TI_SYSC_OMAP34XX_SR, 1526 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY, 1527 .regbits = &sysc_regbits_omap34xx_sr, 1528 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT | SYSC_QUIRK_UNCACHED | 1529 SYSC_QUIRK_LEGACY_IDLE, 1530 }; 1531 1532 /* 1533 * SmartReflex sysc found on omap36xx and later 1534 */ 1535 static const struct sysc_regbits sysc_regbits_omap36xx_sr = { 1536 .dmadisable_shift = -ENODEV, 1537 .midle_shift = -ENODEV, 1538 .sidle_shift = 24, 1539 .clkact_shift = -ENODEV, 1540 .enwkup_shift = 26, 1541 .srst_shift = -ENODEV, 1542 .emufree_shift = -ENODEV, 1543 .autoidle_shift = -ENODEV, 1544 }; 1545 1546 static const struct sysc_capabilities sysc_36xx_sr = { 1547 .type = TI_SYSC_OMAP36XX_SR, 1548 .sysc_mask = SYSC_OMAP3_SR_ENAWAKEUP, 1549 .regbits = &sysc_regbits_omap36xx_sr, 1550 .mod_quirks = SYSC_QUIRK_UNCACHED | SYSC_QUIRK_LEGACY_IDLE, 1551 }; 1552 1553 static const struct sysc_capabilities sysc_omap4_sr = { 1554 .type = TI_SYSC_OMAP4_SR, 1555 .regbits = &sysc_regbits_omap36xx_sr, 1556 .mod_quirks = SYSC_QUIRK_LEGACY_IDLE, 1557 }; 1558 1559 /* 1560 * McASP register bits found on omap4 and later 1561 */ 1562 static const struct sysc_regbits sysc_regbits_omap4_mcasp = { 1563 .dmadisable_shift = -ENODEV, 1564 .midle_shift = -ENODEV, 1565 .sidle_shift = 0, 1566 .clkact_shift = -ENODEV, 1567 .enwkup_shift = -ENODEV, 1568 .srst_shift = -ENODEV, 1569 .emufree_shift = -ENODEV, 1570 .autoidle_shift = -ENODEV, 1571 }; 1572 1573 static const struct sysc_capabilities sysc_omap4_mcasp = { 1574 .type = TI_SYSC_OMAP4_MCASP, 1575 .regbits = &sysc_regbits_omap4_mcasp, 1576 }; 1577 1578 /* 1579 * FS USB host found on omap4 and later 1580 */ 1581 static const struct sysc_regbits sysc_regbits_omap4_usb_host_fs = { 1582 .dmadisable_shift = -ENODEV, 1583 .midle_shift = -ENODEV, 1584 .sidle_shift = 24, 1585 .clkact_shift = -ENODEV, 1586 .enwkup_shift = 26, 1587 .srst_shift = -ENODEV, 1588 .emufree_shift = -ENODEV, 1589 .autoidle_shift = -ENODEV, 1590 }; 1591 1592 static const struct sysc_capabilities sysc_omap4_usb_host_fs = { 1593 .type = TI_SYSC_OMAP4_USB_HOST_FS, 1594 .sysc_mask = SYSC_OMAP2_ENAWAKEUP, 1595 .regbits = &sysc_regbits_omap4_usb_host_fs, 1596 }; 1597 1598 static const struct sysc_regbits sysc_regbits_dra7_mcan = { 1599 .dmadisable_shift = -ENODEV, 1600 .midle_shift = -ENODEV, 1601 .sidle_shift = -ENODEV, 1602 .clkact_shift = -ENODEV, 1603 .enwkup_shift = 4, 1604 .srst_shift = 0, 1605 .emufree_shift = -ENODEV, 1606 .autoidle_shift = -ENODEV, 1607 }; 1608 1609 static const struct sysc_capabilities sysc_dra7_mcan = { 1610 .type = TI_SYSC_DRA7_MCAN, 1611 .sysc_mask = SYSC_DRA7_MCAN_ENAWAKEUP | SYSC_OMAP4_SOFTRESET, 1612 .regbits = &sysc_regbits_dra7_mcan, 1613 }; 1614 1615 static int sysc_init_pdata(struct sysc *ddata) 1616 { 1617 struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev); 1618 struct ti_sysc_module_data mdata; 1619 int error = 0; 1620 1621 if (!pdata || !ddata->legacy_mode) 1622 return 0; 1623 1624 mdata.name = ddata->legacy_mode; 1625 mdata.module_pa = ddata->module_pa; 1626 mdata.module_size = ddata->module_size; 1627 mdata.offsets = ddata->offsets; 1628 mdata.nr_offsets = SYSC_MAX_REGS; 1629 mdata.cap = ddata->cap; 1630 mdata.cfg = &ddata->cfg; 1631 1632 if (!pdata->init_module) 1633 return -ENODEV; 1634 1635 error = pdata->init_module(ddata->dev, &mdata, &ddata->cookie); 1636 if (error == -EEXIST) 1637 error = 0; 1638 1639 return error; 1640 } 1641 1642 static int sysc_init_match(struct sysc *ddata) 1643 { 1644 const struct sysc_capabilities *cap; 1645 1646 cap = of_device_get_match_data(ddata->dev); 1647 if (!cap) 1648 return -EINVAL; 1649 1650 ddata->cap = cap; 1651 if (ddata->cap) 1652 ddata->cfg.quirks |= ddata->cap->mod_quirks; 1653 1654 return 0; 1655 } 1656 1657 static void ti_sysc_idle(struct work_struct *work) 1658 { 1659 struct sysc *ddata; 1660 1661 ddata = container_of(work, struct sysc, idle_work.work); 1662 1663 if (pm_runtime_active(ddata->dev)) 1664 pm_runtime_put_sync(ddata->dev); 1665 } 1666 1667 static const struct of_device_id sysc_match_table[] = { 1668 { .compatible = "simple-bus", }, 1669 { /* sentinel */ }, 1670 }; 1671 1672 static int sysc_probe(struct platform_device *pdev) 1673 { 1674 struct ti_sysc_platform_data *pdata = dev_get_platdata(&pdev->dev); 1675 struct sysc *ddata; 1676 int error; 1677 1678 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL); 1679 if (!ddata) 1680 return -ENOMEM; 1681 1682 ddata->dev = &pdev->dev; 1683 platform_set_drvdata(pdev, ddata); 1684 1685 error = sysc_init_match(ddata); 1686 if (error) 1687 return error; 1688 1689 error = sysc_init_dts_quirks(ddata); 1690 if (error) 1691 goto unprepare; 1692 1693 error = sysc_get_clocks(ddata); 1694 if (error) 1695 return error; 1696 1697 error = sysc_map_and_check_registers(ddata); 1698 if (error) 1699 goto unprepare; 1700 1701 error = sysc_init_sysc_mask(ddata); 1702 if (error) 1703 goto unprepare; 1704 1705 error = sysc_init_idlemodes(ddata); 1706 if (error) 1707 goto unprepare; 1708 1709 error = sysc_init_syss_mask(ddata); 1710 if (error) 1711 goto unprepare; 1712 1713 error = sysc_init_pdata(ddata); 1714 if (error) 1715 goto unprepare; 1716 1717 error = sysc_init_resets(ddata); 1718 if (error) 1719 return error; 1720 1721 pm_runtime_enable(ddata->dev); 1722 error = sysc_init_module(ddata); 1723 if (error) 1724 goto unprepare; 1725 1726 error = pm_runtime_get_sync(ddata->dev); 1727 if (error < 0) { 1728 pm_runtime_put_noidle(ddata->dev); 1729 pm_runtime_disable(ddata->dev); 1730 goto unprepare; 1731 } 1732 1733 sysc_show_registers(ddata); 1734 1735 ddata->dev->type = &sysc_device_type; 1736 error = of_platform_populate(ddata->dev->of_node, sysc_match_table, 1737 pdata ? pdata->auxdata : NULL, 1738 ddata->dev); 1739 if (error) 1740 goto err; 1741 1742 INIT_DELAYED_WORK(&ddata->idle_work, ti_sysc_idle); 1743 1744 /* At least earlycon won't survive without deferred idle */ 1745 if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE_ON_INIT | 1746 SYSC_QUIRK_NO_RESET_ON_INIT)) { 1747 schedule_delayed_work(&ddata->idle_work, 3000); 1748 } else { 1749 pm_runtime_put(&pdev->dev); 1750 } 1751 1752 if (!of_get_available_child_count(ddata->dev->of_node)) 1753 reset_control_assert(ddata->rsts); 1754 1755 return 0; 1756 1757 err: 1758 pm_runtime_put_sync(&pdev->dev); 1759 pm_runtime_disable(&pdev->dev); 1760 unprepare: 1761 sysc_unprepare(ddata); 1762 1763 return error; 1764 } 1765 1766 static int sysc_remove(struct platform_device *pdev) 1767 { 1768 struct sysc *ddata = platform_get_drvdata(pdev); 1769 int error; 1770 1771 cancel_delayed_work_sync(&ddata->idle_work); 1772 1773 error = pm_runtime_get_sync(ddata->dev); 1774 if (error < 0) { 1775 pm_runtime_put_noidle(ddata->dev); 1776 pm_runtime_disable(ddata->dev); 1777 goto unprepare; 1778 } 1779 1780 of_platform_depopulate(&pdev->dev); 1781 1782 pm_runtime_put_sync(&pdev->dev); 1783 pm_runtime_disable(&pdev->dev); 1784 reset_control_assert(ddata->rsts); 1785 1786 unprepare: 1787 sysc_unprepare(ddata); 1788 1789 return 0; 1790 } 1791 1792 static const struct of_device_id sysc_match[] = { 1793 { .compatible = "ti,sysc-omap2", .data = &sysc_omap2, }, 1794 { .compatible = "ti,sysc-omap2-timer", .data = &sysc_omap2_timer, }, 1795 { .compatible = "ti,sysc-omap4", .data = &sysc_omap4, }, 1796 { .compatible = "ti,sysc-omap4-timer", .data = &sysc_omap4_timer, }, 1797 { .compatible = "ti,sysc-omap4-simple", .data = &sysc_omap4_simple, }, 1798 { .compatible = "ti,sysc-omap3430-sr", .data = &sysc_34xx_sr, }, 1799 { .compatible = "ti,sysc-omap3630-sr", .data = &sysc_36xx_sr, }, 1800 { .compatible = "ti,sysc-omap4-sr", .data = &sysc_omap4_sr, }, 1801 { .compatible = "ti,sysc-omap3-sham", .data = &sysc_omap3_sham, }, 1802 { .compatible = "ti,sysc-omap-aes", .data = &sysc_omap3_aes, }, 1803 { .compatible = "ti,sysc-mcasp", .data = &sysc_omap4_mcasp, }, 1804 { .compatible = "ti,sysc-usb-host-fs", 1805 .data = &sysc_omap4_usb_host_fs, }, 1806 { .compatible = "ti,sysc-dra7-mcan", .data = &sysc_dra7_mcan, }, 1807 { }, 1808 }; 1809 MODULE_DEVICE_TABLE(of, sysc_match); 1810 1811 static struct platform_driver sysc_driver = { 1812 .probe = sysc_probe, 1813 .remove = sysc_remove, 1814 .driver = { 1815 .name = "ti-sysc", 1816 .of_match_table = sysc_match, 1817 .pm = &sysc_pm_ops, 1818 }, 1819 }; 1820 1821 static int __init sysc_init(void) 1822 { 1823 bus_register_notifier(&platform_bus_type, &sysc_nb); 1824 1825 return platform_driver_register(&sysc_driver); 1826 } 1827 module_init(sysc_init); 1828 1829 static void __exit sysc_exit(void) 1830 { 1831 bus_unregister_notifier(&platform_bus_type, &sysc_nb); 1832 platform_driver_unregister(&sysc_driver); 1833 } 1834 module_exit(sysc_exit); 1835 1836 MODULE_DESCRIPTION("TI sysc interconnect target driver"); 1837 MODULE_LICENSE("GPL v2"); 1838