1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * RSB (Reduced Serial Bus) driver. 4 * 5 * Author: Chen-Yu Tsai <wens@csie.org> 6 * 7 * The RSB controller looks like an SMBus controller which only supports 8 * byte and word data transfers. But, it differs from standard SMBus 9 * protocol on several aspects: 10 * - it uses addresses set at runtime to address slaves. Runtime addresses 11 * are sent to slaves using their 12bit hardware addresses. Up to 15 12 * runtime addresses are available. 13 * - it adds a parity bit every 8bits of data and address for read and 14 * write accesses; this replaces the ack bit 15 * - only one read access is required to read a byte (instead of a write 16 * followed by a read access in standard SMBus protocol) 17 * - there's no Ack bit after each read access 18 * 19 * This means this bus cannot be used to interface with standard SMBus 20 * devices. Devices known to support this interface include the AXP223, 21 * AXP809, and AXP806 PMICs, and the AC100 audio codec, all from X-Powers. 22 * 23 * A description of the operation and wire protocol can be found in the 24 * RSB section of Allwinner's A80 user manual, which can be found at 25 * 26 * https://github.com/allwinner-zh/documents/tree/master/A80 27 * 28 * This document is officially released by Allwinner. 29 * 30 * This driver is based on i2c-sun6i-p2wi.c, the P2WI bus driver. 31 */ 32 33 #include <linux/clk.h> 34 #include <linux/clk/clk-conf.h> 35 #include <linux/device.h> 36 #include <linux/interrupt.h> 37 #include <linux/io.h> 38 #include <linux/iopoll.h> 39 #include <linux/module.h> 40 #include <linux/of.h> 41 #include <linux/of_irq.h> 42 #include <linux/of_platform.h> 43 #include <linux/platform_device.h> 44 #include <linux/pm.h> 45 #include <linux/pm_runtime.h> 46 #include <linux/regmap.h> 47 #include <linux/reset.h> 48 #include <linux/slab.h> 49 #include <linux/sunxi-rsb.h> 50 #include <linux/types.h> 51 52 /* RSB registers */ 53 #define RSB_CTRL 0x0 /* Global control */ 54 #define RSB_CCR 0x4 /* Clock control */ 55 #define RSB_INTE 0x8 /* Interrupt controls */ 56 #define RSB_INTS 0xc /* Interrupt status */ 57 #define RSB_ADDR 0x10 /* Address to send with read/write command */ 58 #define RSB_DATA 0x1c /* Data to read/write */ 59 #define RSB_LCR 0x24 /* Line control */ 60 #define RSB_DMCR 0x28 /* Device mode (init) control */ 61 #define RSB_CMD 0x2c /* RSB Command */ 62 #define RSB_DAR 0x30 /* Device address / runtime address */ 63 64 /* CTRL fields */ 65 #define RSB_CTRL_START_TRANS BIT(7) 66 #define RSB_CTRL_ABORT_TRANS BIT(6) 67 #define RSB_CTRL_GLOBAL_INT_ENB BIT(1) 68 #define RSB_CTRL_SOFT_RST BIT(0) 69 70 /* CLK CTRL fields */ 71 #define RSB_CCR_SDA_OUT_DELAY(v) (((v) & 0x7) << 8) 72 #define RSB_CCR_MAX_CLK_DIV 0xff 73 #define RSB_CCR_CLK_DIV(v) ((v) & RSB_CCR_MAX_CLK_DIV) 74 75 /* STATUS fields */ 76 #define RSB_INTS_TRANS_ERR_ACK BIT(16) 77 #define RSB_INTS_TRANS_ERR_DATA_BIT(v) (((v) >> 8) & 0xf) 78 #define RSB_INTS_TRANS_ERR_DATA GENMASK(11, 8) 79 #define RSB_INTS_LOAD_BSY BIT(2) 80 #define RSB_INTS_TRANS_ERR BIT(1) 81 #define RSB_INTS_TRANS_OVER BIT(0) 82 83 /* LINE CTRL fields*/ 84 #define RSB_LCR_SCL_STATE BIT(5) 85 #define RSB_LCR_SDA_STATE BIT(4) 86 #define RSB_LCR_SCL_CTL BIT(3) 87 #define RSB_LCR_SCL_CTL_EN BIT(2) 88 #define RSB_LCR_SDA_CTL BIT(1) 89 #define RSB_LCR_SDA_CTL_EN BIT(0) 90 91 /* DEVICE MODE CTRL field values */ 92 #define RSB_DMCR_DEVICE_START BIT(31) 93 #define RSB_DMCR_MODE_DATA (0x7c << 16) 94 #define RSB_DMCR_MODE_REG (0x3e << 8) 95 #define RSB_DMCR_DEV_ADDR 0x00 96 97 /* CMD values */ 98 #define RSB_CMD_RD8 0x8b 99 #define RSB_CMD_RD16 0x9c 100 #define RSB_CMD_RD32 0xa6 101 #define RSB_CMD_WR8 0x4e 102 #define RSB_CMD_WR16 0x59 103 #define RSB_CMD_WR32 0x63 104 #define RSB_CMD_STRA 0xe8 105 106 /* DAR fields */ 107 #define RSB_DAR_RTA(v) (((v) & 0xff) << 16) 108 #define RSB_DAR_DA(v) ((v) & 0xffff) 109 110 #define RSB_MAX_FREQ 20000000 111 112 #define RSB_CTRL_NAME "sunxi-rsb" 113 114 struct sunxi_rsb_addr_map { 115 u16 hwaddr; 116 u8 rtaddr; 117 }; 118 119 struct sunxi_rsb { 120 struct device *dev; 121 void __iomem *regs; 122 struct clk *clk; 123 struct reset_control *rstc; 124 struct completion complete; 125 struct mutex lock; 126 unsigned int status; 127 u32 clk_freq; 128 }; 129 130 /* bus / slave device related functions */ 131 static struct bus_type sunxi_rsb_bus; 132 133 static int sunxi_rsb_device_match(struct device *dev, struct device_driver *drv) 134 { 135 return of_driver_match_device(dev, drv); 136 } 137 138 static int sunxi_rsb_device_probe(struct device *dev) 139 { 140 const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver); 141 struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev); 142 int ret; 143 144 if (!drv->probe) 145 return -ENODEV; 146 147 if (!rdev->irq) { 148 int irq = -ENOENT; 149 150 if (dev->of_node) 151 irq = of_irq_get(dev->of_node, 0); 152 153 if (irq == -EPROBE_DEFER) 154 return irq; 155 if (irq < 0) 156 irq = 0; 157 158 rdev->irq = irq; 159 } 160 161 ret = of_clk_set_defaults(dev->of_node, false); 162 if (ret < 0) 163 return ret; 164 165 return drv->probe(rdev); 166 } 167 168 static void sunxi_rsb_device_remove(struct device *dev) 169 { 170 const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver); 171 172 drv->remove(to_sunxi_rsb_device(dev)); 173 } 174 175 static struct bus_type sunxi_rsb_bus = { 176 .name = RSB_CTRL_NAME, 177 .match = sunxi_rsb_device_match, 178 .probe = sunxi_rsb_device_probe, 179 .remove = sunxi_rsb_device_remove, 180 .uevent = of_device_uevent_modalias, 181 }; 182 183 static void sunxi_rsb_dev_release(struct device *dev) 184 { 185 struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev); 186 187 kfree(rdev); 188 } 189 190 /** 191 * sunxi_rsb_device_create() - allocate and add an RSB device 192 * @rsb: RSB controller 193 * @node: RSB slave device node 194 * @hwaddr: RSB slave hardware address 195 * @rtaddr: RSB slave runtime address 196 */ 197 static struct sunxi_rsb_device *sunxi_rsb_device_create(struct sunxi_rsb *rsb, 198 struct device_node *node, u16 hwaddr, u8 rtaddr) 199 { 200 int err; 201 struct sunxi_rsb_device *rdev; 202 203 rdev = kzalloc(sizeof(*rdev), GFP_KERNEL); 204 if (!rdev) 205 return ERR_PTR(-ENOMEM); 206 207 rdev->rsb = rsb; 208 rdev->hwaddr = hwaddr; 209 rdev->rtaddr = rtaddr; 210 rdev->dev.bus = &sunxi_rsb_bus; 211 rdev->dev.parent = rsb->dev; 212 rdev->dev.of_node = node; 213 rdev->dev.release = sunxi_rsb_dev_release; 214 215 dev_set_name(&rdev->dev, "%s-%x", RSB_CTRL_NAME, hwaddr); 216 217 err = device_register(&rdev->dev); 218 if (err < 0) { 219 dev_err(&rdev->dev, "Can't add %s, status %d\n", 220 dev_name(&rdev->dev), err); 221 goto err_device_add; 222 } 223 224 dev_dbg(&rdev->dev, "device %s registered\n", dev_name(&rdev->dev)); 225 226 return rdev; 227 228 err_device_add: 229 put_device(&rdev->dev); 230 231 return ERR_PTR(err); 232 } 233 234 /** 235 * sunxi_rsb_device_unregister(): unregister an RSB device 236 * @rdev: rsb_device to be removed 237 */ 238 static void sunxi_rsb_device_unregister(struct sunxi_rsb_device *rdev) 239 { 240 device_unregister(&rdev->dev); 241 } 242 243 static int sunxi_rsb_remove_devices(struct device *dev, void *data) 244 { 245 struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev); 246 247 if (dev->bus == &sunxi_rsb_bus) 248 sunxi_rsb_device_unregister(rdev); 249 250 return 0; 251 } 252 253 /** 254 * sunxi_rsb_driver_register() - Register device driver with RSB core 255 * @rdrv: device driver to be associated with slave-device. 256 * 257 * This API will register the client driver with the RSB framework. 258 * It is typically called from the driver's module-init function. 259 */ 260 int sunxi_rsb_driver_register(struct sunxi_rsb_driver *rdrv) 261 { 262 rdrv->driver.bus = &sunxi_rsb_bus; 263 return driver_register(&rdrv->driver); 264 } 265 EXPORT_SYMBOL_GPL(sunxi_rsb_driver_register); 266 267 /* common code that starts a transfer */ 268 static int _sunxi_rsb_run_xfer(struct sunxi_rsb *rsb) 269 { 270 u32 int_mask, status; 271 bool timeout; 272 273 if (readl(rsb->regs + RSB_CTRL) & RSB_CTRL_START_TRANS) { 274 dev_dbg(rsb->dev, "RSB transfer still in progress\n"); 275 return -EBUSY; 276 } 277 278 reinit_completion(&rsb->complete); 279 280 int_mask = RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR | RSB_INTS_TRANS_OVER; 281 writel(int_mask, rsb->regs + RSB_INTE); 282 writel(RSB_CTRL_START_TRANS | RSB_CTRL_GLOBAL_INT_ENB, 283 rsb->regs + RSB_CTRL); 284 285 if (irqs_disabled()) { 286 timeout = readl_poll_timeout_atomic(rsb->regs + RSB_INTS, 287 status, (status & int_mask), 288 10, 100000); 289 writel(status, rsb->regs + RSB_INTS); 290 } else { 291 timeout = !wait_for_completion_io_timeout(&rsb->complete, 292 msecs_to_jiffies(100)); 293 status = rsb->status; 294 } 295 296 if (timeout) { 297 dev_dbg(rsb->dev, "RSB timeout\n"); 298 299 /* abort the transfer */ 300 writel(RSB_CTRL_ABORT_TRANS, rsb->regs + RSB_CTRL); 301 302 /* clear any interrupt flags */ 303 writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS); 304 305 return -ETIMEDOUT; 306 } 307 308 if (status & RSB_INTS_LOAD_BSY) { 309 dev_dbg(rsb->dev, "RSB busy\n"); 310 return -EBUSY; 311 } 312 313 if (status & RSB_INTS_TRANS_ERR) { 314 if (status & RSB_INTS_TRANS_ERR_ACK) { 315 dev_dbg(rsb->dev, "RSB slave nack\n"); 316 return -EINVAL; 317 } 318 319 if (status & RSB_INTS_TRANS_ERR_DATA) { 320 dev_dbg(rsb->dev, "RSB transfer data error\n"); 321 return -EIO; 322 } 323 } 324 325 return 0; 326 } 327 328 static int sunxi_rsb_read(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr, 329 u32 *buf, size_t len) 330 { 331 u32 cmd; 332 int ret; 333 334 if (!buf) 335 return -EINVAL; 336 337 switch (len) { 338 case 1: 339 cmd = RSB_CMD_RD8; 340 break; 341 case 2: 342 cmd = RSB_CMD_RD16; 343 break; 344 case 4: 345 cmd = RSB_CMD_RD32; 346 break; 347 default: 348 dev_err(rsb->dev, "Invalid access width: %zd\n", len); 349 return -EINVAL; 350 } 351 352 ret = pm_runtime_resume_and_get(rsb->dev); 353 if (ret) 354 return ret; 355 356 mutex_lock(&rsb->lock); 357 358 writel(addr, rsb->regs + RSB_ADDR); 359 writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR); 360 writel(cmd, rsb->regs + RSB_CMD); 361 362 ret = _sunxi_rsb_run_xfer(rsb); 363 if (ret) 364 goto unlock; 365 366 *buf = readl(rsb->regs + RSB_DATA) & GENMASK(len * 8 - 1, 0); 367 368 unlock: 369 mutex_unlock(&rsb->lock); 370 371 pm_runtime_mark_last_busy(rsb->dev); 372 pm_runtime_put_autosuspend(rsb->dev); 373 374 return ret; 375 } 376 377 static int sunxi_rsb_write(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr, 378 const u32 *buf, size_t len) 379 { 380 u32 cmd; 381 int ret; 382 383 if (!buf) 384 return -EINVAL; 385 386 switch (len) { 387 case 1: 388 cmd = RSB_CMD_WR8; 389 break; 390 case 2: 391 cmd = RSB_CMD_WR16; 392 break; 393 case 4: 394 cmd = RSB_CMD_WR32; 395 break; 396 default: 397 dev_err(rsb->dev, "Invalid access width: %zd\n", len); 398 return -EINVAL; 399 } 400 401 ret = pm_runtime_resume_and_get(rsb->dev); 402 if (ret) 403 return ret; 404 405 mutex_lock(&rsb->lock); 406 407 writel(addr, rsb->regs + RSB_ADDR); 408 writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR); 409 writel(*buf, rsb->regs + RSB_DATA); 410 writel(cmd, rsb->regs + RSB_CMD); 411 ret = _sunxi_rsb_run_xfer(rsb); 412 413 mutex_unlock(&rsb->lock); 414 415 pm_runtime_mark_last_busy(rsb->dev); 416 pm_runtime_put_autosuspend(rsb->dev); 417 418 return ret; 419 } 420 421 /* RSB regmap functions */ 422 struct sunxi_rsb_ctx { 423 struct sunxi_rsb_device *rdev; 424 int size; 425 }; 426 427 static int regmap_sunxi_rsb_reg_read(void *context, unsigned int reg, 428 unsigned int *val) 429 { 430 struct sunxi_rsb_ctx *ctx = context; 431 struct sunxi_rsb_device *rdev = ctx->rdev; 432 433 if (reg > 0xff) 434 return -EINVAL; 435 436 return sunxi_rsb_read(rdev->rsb, rdev->rtaddr, reg, val, ctx->size); 437 } 438 439 static int regmap_sunxi_rsb_reg_write(void *context, unsigned int reg, 440 unsigned int val) 441 { 442 struct sunxi_rsb_ctx *ctx = context; 443 struct sunxi_rsb_device *rdev = ctx->rdev; 444 445 return sunxi_rsb_write(rdev->rsb, rdev->rtaddr, reg, &val, ctx->size); 446 } 447 448 static void regmap_sunxi_rsb_free_ctx(void *context) 449 { 450 struct sunxi_rsb_ctx *ctx = context; 451 452 kfree(ctx); 453 } 454 455 static struct regmap_bus regmap_sunxi_rsb = { 456 .reg_write = regmap_sunxi_rsb_reg_write, 457 .reg_read = regmap_sunxi_rsb_reg_read, 458 .free_context = regmap_sunxi_rsb_free_ctx, 459 .reg_format_endian_default = REGMAP_ENDIAN_NATIVE, 460 .val_format_endian_default = REGMAP_ENDIAN_NATIVE, 461 }; 462 463 static struct sunxi_rsb_ctx *regmap_sunxi_rsb_init_ctx(struct sunxi_rsb_device *rdev, 464 const struct regmap_config *config) 465 { 466 struct sunxi_rsb_ctx *ctx; 467 468 switch (config->val_bits) { 469 case 8: 470 case 16: 471 case 32: 472 break; 473 default: 474 return ERR_PTR(-EINVAL); 475 } 476 477 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); 478 if (!ctx) 479 return ERR_PTR(-ENOMEM); 480 481 ctx->rdev = rdev; 482 ctx->size = config->val_bits / 8; 483 484 return ctx; 485 } 486 487 struct regmap *__devm_regmap_init_sunxi_rsb(struct sunxi_rsb_device *rdev, 488 const struct regmap_config *config, 489 struct lock_class_key *lock_key, 490 const char *lock_name) 491 { 492 struct sunxi_rsb_ctx *ctx = regmap_sunxi_rsb_init_ctx(rdev, config); 493 494 if (IS_ERR(ctx)) 495 return ERR_CAST(ctx); 496 497 return __devm_regmap_init(&rdev->dev, ®map_sunxi_rsb, ctx, config, 498 lock_key, lock_name); 499 } 500 EXPORT_SYMBOL_GPL(__devm_regmap_init_sunxi_rsb); 501 502 /* RSB controller driver functions */ 503 static irqreturn_t sunxi_rsb_irq(int irq, void *dev_id) 504 { 505 struct sunxi_rsb *rsb = dev_id; 506 u32 status; 507 508 status = readl(rsb->regs + RSB_INTS); 509 rsb->status = status; 510 511 /* Clear interrupts */ 512 status &= (RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR | 513 RSB_INTS_TRANS_OVER); 514 writel(status, rsb->regs + RSB_INTS); 515 516 complete(&rsb->complete); 517 518 return IRQ_HANDLED; 519 } 520 521 static int sunxi_rsb_init_device_mode(struct sunxi_rsb *rsb) 522 { 523 int ret = 0; 524 u32 reg; 525 526 /* send init sequence */ 527 writel(RSB_DMCR_DEVICE_START | RSB_DMCR_MODE_DATA | 528 RSB_DMCR_MODE_REG | RSB_DMCR_DEV_ADDR, rsb->regs + RSB_DMCR); 529 530 readl_poll_timeout(rsb->regs + RSB_DMCR, reg, 531 !(reg & RSB_DMCR_DEVICE_START), 100, 250000); 532 if (reg & RSB_DMCR_DEVICE_START) 533 ret = -ETIMEDOUT; 534 535 /* clear interrupt status bits */ 536 writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS); 537 538 return ret; 539 } 540 541 /* 542 * There are 15 valid runtime addresses, though Allwinner typically 543 * skips the first, for unknown reasons, and uses the following three. 544 * 545 * 0x17, 0x2d, 0x3a, 0x4e, 0x59, 0x63, 0x74, 0x8b, 546 * 0x9c, 0xa6, 0xb1, 0xc5, 0xd2, 0xe8, 0xff 547 * 548 * No designs with 2 RSB slave devices sharing identical hardware 549 * addresses on the same bus have been seen in the wild. All designs 550 * use 0x2d for the primary PMIC, 0x3a for the secondary PMIC if 551 * there is one, and 0x45 for peripheral ICs. 552 * 553 * The hardware does not seem to support re-setting runtime addresses. 554 * Attempts to do so result in the slave devices returning a NACK. 555 * Hence we just hardcode the mapping here, like Allwinner does. 556 */ 557 558 static const struct sunxi_rsb_addr_map sunxi_rsb_addr_maps[] = { 559 { 0x3a3, 0x2d }, /* Primary PMIC: AXP223, AXP809, AXP81X, ... */ 560 { 0x745, 0x3a }, /* Secondary PMIC: AXP806, ... */ 561 { 0xe89, 0x4e }, /* Peripheral IC: AC100, ... */ 562 }; 563 564 static u8 sunxi_rsb_get_rtaddr(u16 hwaddr) 565 { 566 int i; 567 568 for (i = 0; i < ARRAY_SIZE(sunxi_rsb_addr_maps); i++) 569 if (hwaddr == sunxi_rsb_addr_maps[i].hwaddr) 570 return sunxi_rsb_addr_maps[i].rtaddr; 571 572 return 0; /* 0 is an invalid runtime address */ 573 } 574 575 static int of_rsb_register_devices(struct sunxi_rsb *rsb) 576 { 577 struct device *dev = rsb->dev; 578 struct device_node *child, *np = dev->of_node; 579 u32 hwaddr; 580 u8 rtaddr; 581 int ret; 582 583 if (!np) 584 return -EINVAL; 585 586 /* Runtime addresses for all slaves should be set first */ 587 for_each_available_child_of_node(np, child) { 588 dev_dbg(dev, "setting child %pOF runtime address\n", 589 child); 590 591 ret = of_property_read_u32(child, "reg", &hwaddr); 592 if (ret) { 593 dev_err(dev, "%pOF: invalid 'reg' property: %d\n", 594 child, ret); 595 continue; 596 } 597 598 rtaddr = sunxi_rsb_get_rtaddr(hwaddr); 599 if (!rtaddr) { 600 dev_err(dev, "%pOF: unknown hardware device address\n", 601 child); 602 continue; 603 } 604 605 /* 606 * Since no devices have been registered yet, we are the 607 * only ones using the bus, we can skip locking the bus. 608 */ 609 610 /* setup command parameters */ 611 writel(RSB_CMD_STRA, rsb->regs + RSB_CMD); 612 writel(RSB_DAR_RTA(rtaddr) | RSB_DAR_DA(hwaddr), 613 rsb->regs + RSB_DAR); 614 615 /* send command */ 616 ret = _sunxi_rsb_run_xfer(rsb); 617 if (ret) 618 dev_warn(dev, "%pOF: set runtime address failed: %d\n", 619 child, ret); 620 } 621 622 /* Then we start adding devices and probing them */ 623 for_each_available_child_of_node(np, child) { 624 struct sunxi_rsb_device *rdev; 625 626 dev_dbg(dev, "adding child %pOF\n", child); 627 628 ret = of_property_read_u32(child, "reg", &hwaddr); 629 if (ret) 630 continue; 631 632 rtaddr = sunxi_rsb_get_rtaddr(hwaddr); 633 if (!rtaddr) 634 continue; 635 636 rdev = sunxi_rsb_device_create(rsb, child, hwaddr, rtaddr); 637 if (IS_ERR(rdev)) 638 dev_err(dev, "failed to add child device %pOF: %ld\n", 639 child, PTR_ERR(rdev)); 640 } 641 642 return 0; 643 } 644 645 static int sunxi_rsb_hw_init(struct sunxi_rsb *rsb) 646 { 647 struct device *dev = rsb->dev; 648 unsigned long p_clk_freq; 649 u32 clk_delay, reg; 650 int clk_div, ret; 651 652 ret = clk_prepare_enable(rsb->clk); 653 if (ret) { 654 dev_err(dev, "failed to enable clk: %d\n", ret); 655 return ret; 656 } 657 658 ret = reset_control_deassert(rsb->rstc); 659 if (ret) { 660 dev_err(dev, "failed to deassert reset line: %d\n", ret); 661 goto err_clk_disable; 662 } 663 664 /* reset the controller */ 665 writel(RSB_CTRL_SOFT_RST, rsb->regs + RSB_CTRL); 666 readl_poll_timeout(rsb->regs + RSB_CTRL, reg, 667 !(reg & RSB_CTRL_SOFT_RST), 1000, 100000); 668 669 /* 670 * Clock frequency and delay calculation code is from 671 * Allwinner U-boot sources. 672 * 673 * From A83 user manual: 674 * bus clock frequency = parent clock frequency / (2 * (divider + 1)) 675 */ 676 p_clk_freq = clk_get_rate(rsb->clk); 677 clk_div = p_clk_freq / rsb->clk_freq / 2; 678 if (!clk_div) 679 clk_div = 1; 680 else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1) 681 clk_div = RSB_CCR_MAX_CLK_DIV + 1; 682 683 clk_delay = clk_div >> 1; 684 if (!clk_delay) 685 clk_delay = 1; 686 687 dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2); 688 writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1), 689 rsb->regs + RSB_CCR); 690 691 return 0; 692 693 err_clk_disable: 694 clk_disable_unprepare(rsb->clk); 695 696 return ret; 697 } 698 699 static void sunxi_rsb_hw_exit(struct sunxi_rsb *rsb) 700 { 701 reset_control_assert(rsb->rstc); 702 703 /* Keep the clock and PM reference counts consistent. */ 704 if (!pm_runtime_status_suspended(rsb->dev)) 705 clk_disable_unprepare(rsb->clk); 706 } 707 708 static int __maybe_unused sunxi_rsb_runtime_suspend(struct device *dev) 709 { 710 struct sunxi_rsb *rsb = dev_get_drvdata(dev); 711 712 clk_disable_unprepare(rsb->clk); 713 714 return 0; 715 } 716 717 static int __maybe_unused sunxi_rsb_runtime_resume(struct device *dev) 718 { 719 struct sunxi_rsb *rsb = dev_get_drvdata(dev); 720 721 return clk_prepare_enable(rsb->clk); 722 } 723 724 static int __maybe_unused sunxi_rsb_suspend(struct device *dev) 725 { 726 struct sunxi_rsb *rsb = dev_get_drvdata(dev); 727 728 sunxi_rsb_hw_exit(rsb); 729 730 return 0; 731 } 732 733 static int __maybe_unused sunxi_rsb_resume(struct device *dev) 734 { 735 struct sunxi_rsb *rsb = dev_get_drvdata(dev); 736 737 return sunxi_rsb_hw_init(rsb); 738 } 739 740 static int sunxi_rsb_probe(struct platform_device *pdev) 741 { 742 struct device *dev = &pdev->dev; 743 struct device_node *np = dev->of_node; 744 struct resource *r; 745 struct sunxi_rsb *rsb; 746 u32 clk_freq = 3000000; 747 int irq, ret; 748 749 of_property_read_u32(np, "clock-frequency", &clk_freq); 750 if (clk_freq > RSB_MAX_FREQ) { 751 dev_err(dev, 752 "clock-frequency (%u Hz) is too high (max = 20MHz)\n", 753 clk_freq); 754 return -EINVAL; 755 } 756 757 rsb = devm_kzalloc(dev, sizeof(*rsb), GFP_KERNEL); 758 if (!rsb) 759 return -ENOMEM; 760 761 rsb->dev = dev; 762 rsb->clk_freq = clk_freq; 763 platform_set_drvdata(pdev, rsb); 764 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 765 rsb->regs = devm_ioremap_resource(dev, r); 766 if (IS_ERR(rsb->regs)) 767 return PTR_ERR(rsb->regs); 768 769 irq = platform_get_irq(pdev, 0); 770 if (irq < 0) 771 return irq; 772 773 rsb->clk = devm_clk_get(dev, NULL); 774 if (IS_ERR(rsb->clk)) { 775 ret = PTR_ERR(rsb->clk); 776 dev_err(dev, "failed to retrieve clk: %d\n", ret); 777 return ret; 778 } 779 780 rsb->rstc = devm_reset_control_get(dev, NULL); 781 if (IS_ERR(rsb->rstc)) { 782 ret = PTR_ERR(rsb->rstc); 783 dev_err(dev, "failed to retrieve reset controller: %d\n", ret); 784 return ret; 785 } 786 787 init_completion(&rsb->complete); 788 mutex_init(&rsb->lock); 789 790 ret = devm_request_irq(dev, irq, sunxi_rsb_irq, 0, RSB_CTRL_NAME, rsb); 791 if (ret) { 792 dev_err(dev, "can't register interrupt handler irq %d: %d\n", 793 irq, ret); 794 return ret; 795 } 796 797 ret = sunxi_rsb_hw_init(rsb); 798 if (ret) 799 return ret; 800 801 /* initialize all devices on the bus into RSB mode */ 802 ret = sunxi_rsb_init_device_mode(rsb); 803 if (ret) 804 dev_warn(dev, "Initialize device mode failed: %d\n", ret); 805 806 pm_suspend_ignore_children(dev, true); 807 pm_runtime_set_active(dev); 808 pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC); 809 pm_runtime_use_autosuspend(dev); 810 pm_runtime_enable(dev); 811 812 of_rsb_register_devices(rsb); 813 814 return 0; 815 } 816 817 static int sunxi_rsb_remove(struct platform_device *pdev) 818 { 819 struct sunxi_rsb *rsb = platform_get_drvdata(pdev); 820 821 device_for_each_child(rsb->dev, NULL, sunxi_rsb_remove_devices); 822 pm_runtime_disable(&pdev->dev); 823 sunxi_rsb_hw_exit(rsb); 824 825 return 0; 826 } 827 828 static const struct dev_pm_ops sunxi_rsb_dev_pm_ops = { 829 SET_RUNTIME_PM_OPS(sunxi_rsb_runtime_suspend, 830 sunxi_rsb_runtime_resume, NULL) 831 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sunxi_rsb_suspend, sunxi_rsb_resume) 832 }; 833 834 static const struct of_device_id sunxi_rsb_of_match_table[] = { 835 { .compatible = "allwinner,sun8i-a23-rsb" }, 836 {} 837 }; 838 MODULE_DEVICE_TABLE(of, sunxi_rsb_of_match_table); 839 840 static struct platform_driver sunxi_rsb_driver = { 841 .probe = sunxi_rsb_probe, 842 .remove = sunxi_rsb_remove, 843 .driver = { 844 .name = RSB_CTRL_NAME, 845 .of_match_table = sunxi_rsb_of_match_table, 846 .pm = &sunxi_rsb_dev_pm_ops, 847 }, 848 }; 849 850 static int __init sunxi_rsb_init(void) 851 { 852 int ret; 853 854 ret = bus_register(&sunxi_rsb_bus); 855 if (ret) { 856 pr_err("failed to register sunxi sunxi_rsb bus: %d\n", ret); 857 return ret; 858 } 859 860 return platform_driver_register(&sunxi_rsb_driver); 861 } 862 module_init(sunxi_rsb_init); 863 864 static void __exit sunxi_rsb_exit(void) 865 { 866 platform_driver_unregister(&sunxi_rsb_driver); 867 bus_unregister(&sunxi_rsb_bus); 868 } 869 module_exit(sunxi_rsb_exit); 870 871 MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>"); 872 MODULE_DESCRIPTION("Allwinner sunXi Reduced Serial Bus controller driver"); 873 MODULE_LICENSE("GPL v2"); 874