1 /* 2 * EIM driver for Freescale's i.MX chips 3 * 4 * Copyright (C) 2013 Freescale Semiconductor, Inc. 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without any 8 * warranty of any kind, whether express or implied. 9 */ 10 #include <linux/module.h> 11 #include <linux/clk.h> 12 #include <linux/io.h> 13 #include <linux/of_device.h> 14 #include <linux/mfd/syscon.h> 15 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> 16 #include <linux/regmap.h> 17 18 struct imx_weim_devtype { 19 unsigned int cs_count; 20 unsigned int cs_regs_count; 21 unsigned int cs_stride; 22 }; 23 24 static const struct imx_weim_devtype imx1_weim_devtype = { 25 .cs_count = 6, 26 .cs_regs_count = 2, 27 .cs_stride = 0x08, 28 }; 29 30 static const struct imx_weim_devtype imx27_weim_devtype = { 31 .cs_count = 6, 32 .cs_regs_count = 3, 33 .cs_stride = 0x10, 34 }; 35 36 static const struct imx_weim_devtype imx50_weim_devtype = { 37 .cs_count = 4, 38 .cs_regs_count = 6, 39 .cs_stride = 0x18, 40 }; 41 42 static const struct imx_weim_devtype imx51_weim_devtype = { 43 .cs_count = 6, 44 .cs_regs_count = 6, 45 .cs_stride = 0x18, 46 }; 47 48 #define MAX_CS_REGS_COUNT 6 49 #define MAX_CS_COUNT 6 50 #define OF_REG_SIZE 3 51 52 struct cs_timing { 53 bool is_applied; 54 u32 regs[MAX_CS_REGS_COUNT]; 55 }; 56 57 struct cs_timing_state { 58 struct cs_timing cs[MAX_CS_COUNT]; 59 }; 60 61 static const struct of_device_id weim_id_table[] = { 62 /* i.MX1/21 */ 63 { .compatible = "fsl,imx1-weim", .data = &imx1_weim_devtype, }, 64 /* i.MX25/27/31/35 */ 65 { .compatible = "fsl,imx27-weim", .data = &imx27_weim_devtype, }, 66 /* i.MX50/53/6Q */ 67 { .compatible = "fsl,imx50-weim", .data = &imx50_weim_devtype, }, 68 { .compatible = "fsl,imx6q-weim", .data = &imx50_weim_devtype, }, 69 /* i.MX51 */ 70 { .compatible = "fsl,imx51-weim", .data = &imx51_weim_devtype, }, 71 { } 72 }; 73 MODULE_DEVICE_TABLE(of, weim_id_table); 74 75 static int __init imx_weim_gpr_setup(struct platform_device *pdev) 76 { 77 struct device_node *np = pdev->dev.of_node; 78 struct property *prop; 79 const __be32 *p; 80 struct regmap *gpr; 81 u32 gprvals[4] = { 82 05, /* CS0(128M) CS1(0M) CS2(0M) CS3(0M) */ 83 033, /* CS0(64M) CS1(64M) CS2(0M) CS3(0M) */ 84 0113, /* CS0(64M) CS1(32M) CS2(32M) CS3(0M) */ 85 01111, /* CS0(32M) CS1(32M) CS2(32M) CS3(32M) */ 86 }; 87 u32 gprval = 0; 88 u32 val; 89 int cs = 0; 90 int i = 0; 91 92 gpr = syscon_regmap_lookup_by_phandle(np, "fsl,weim-cs-gpr"); 93 if (IS_ERR(gpr)) { 94 dev_dbg(&pdev->dev, "failed to find weim-cs-gpr\n"); 95 return 0; 96 } 97 98 of_property_for_each_u32(np, "ranges", prop, p, val) { 99 if (i % 4 == 0) { 100 cs = val; 101 } else if (i % 4 == 3 && val) { 102 val = (val / SZ_32M) | 1; 103 gprval |= val << cs * 3; 104 } 105 i++; 106 } 107 108 if (i == 0 || i % 4) 109 goto err; 110 111 for (i = 0; i < ARRAY_SIZE(gprvals); i++) { 112 if (gprval == gprvals[i]) { 113 /* Found it. Set up IOMUXC_GPR1[11:0] with it. */ 114 regmap_update_bits(gpr, IOMUXC_GPR1, 0xfff, gprval); 115 return 0; 116 } 117 } 118 119 err: 120 dev_err(&pdev->dev, "Invalid 'ranges' configuration\n"); 121 return -EINVAL; 122 } 123 124 /* Parse and set the timing for this device. */ 125 static int __init weim_timing_setup(struct device *dev, 126 struct device_node *np, void __iomem *base, 127 const struct imx_weim_devtype *devtype, 128 struct cs_timing_state *ts) 129 { 130 u32 cs_idx, value[MAX_CS_REGS_COUNT]; 131 int i, ret; 132 int reg_idx, num_regs; 133 struct cs_timing *cst; 134 135 if (WARN_ON(devtype->cs_regs_count > MAX_CS_REGS_COUNT)) 136 return -EINVAL; 137 if (WARN_ON(devtype->cs_count > MAX_CS_COUNT)) 138 return -EINVAL; 139 140 ret = of_property_read_u32_array(np, "fsl,weim-cs-timing", 141 value, devtype->cs_regs_count); 142 if (ret) 143 return ret; 144 145 /* 146 * the child node's "reg" property may contain multiple address ranges, 147 * extract the chip select for each. 148 */ 149 num_regs = of_property_count_elems_of_size(np, "reg", OF_REG_SIZE); 150 if (num_regs < 0) 151 return num_regs; 152 if (!num_regs) 153 return -EINVAL; 154 for (reg_idx = 0; reg_idx < num_regs; reg_idx++) { 155 /* get the CS index from this child node's "reg" property. */ 156 ret = of_property_read_u32_index(np, "reg", 157 reg_idx * OF_REG_SIZE, &cs_idx); 158 if (ret) 159 break; 160 161 if (cs_idx >= devtype->cs_count) 162 return -EINVAL; 163 164 /* prevent re-configuring a CS that's already been configured */ 165 cst = &ts->cs[cs_idx]; 166 if (cst->is_applied && memcmp(value, cst->regs, 167 devtype->cs_regs_count * sizeof(u32))) { 168 dev_err(dev, "fsl,weim-cs-timing conflict on %pOF", np); 169 return -EINVAL; 170 } 171 172 /* set the timing for WEIM */ 173 for (i = 0; i < devtype->cs_regs_count; i++) 174 writel(value[i], 175 base + cs_idx * devtype->cs_stride + i * 4); 176 if (!cst->is_applied) { 177 cst->is_applied = true; 178 memcpy(cst->regs, value, 179 devtype->cs_regs_count * sizeof(u32)); 180 } 181 } 182 183 return 0; 184 } 185 186 static int __init weim_parse_dt(struct platform_device *pdev, 187 void __iomem *base) 188 { 189 const struct of_device_id *of_id = of_match_device(weim_id_table, 190 &pdev->dev); 191 const struct imx_weim_devtype *devtype = of_id->data; 192 struct device_node *child; 193 int ret, have_child = 0; 194 struct cs_timing_state ts = {}; 195 196 if (devtype == &imx50_weim_devtype) { 197 ret = imx_weim_gpr_setup(pdev); 198 if (ret) 199 return ret; 200 } 201 202 for_each_available_child_of_node(pdev->dev.of_node, child) { 203 ret = weim_timing_setup(&pdev->dev, child, base, devtype, &ts); 204 if (ret) 205 dev_warn(&pdev->dev, "%pOF set timing failed.\n", 206 child); 207 else 208 have_child = 1; 209 } 210 211 if (have_child) 212 ret = of_platform_default_populate(pdev->dev.of_node, 213 NULL, &pdev->dev); 214 if (ret) 215 dev_err(&pdev->dev, "%pOF fail to create devices.\n", 216 pdev->dev.of_node); 217 return ret; 218 } 219 220 static int __init weim_probe(struct platform_device *pdev) 221 { 222 struct resource *res; 223 struct clk *clk; 224 void __iomem *base; 225 int ret; 226 227 /* get the resource */ 228 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 229 base = devm_ioremap_resource(&pdev->dev, res); 230 if (IS_ERR(base)) 231 return PTR_ERR(base); 232 233 /* get the clock */ 234 clk = devm_clk_get(&pdev->dev, NULL); 235 if (IS_ERR(clk)) 236 return PTR_ERR(clk); 237 238 ret = clk_prepare_enable(clk); 239 if (ret) 240 return ret; 241 242 /* parse the device node */ 243 ret = weim_parse_dt(pdev, base); 244 if (ret) 245 clk_disable_unprepare(clk); 246 else 247 dev_info(&pdev->dev, "Driver registered.\n"); 248 249 return ret; 250 } 251 252 static struct platform_driver weim_driver = { 253 .driver = { 254 .name = "imx-weim", 255 .of_match_table = weim_id_table, 256 }, 257 }; 258 module_platform_driver_probe(weim_driver, weim_probe); 259 260 MODULE_AUTHOR("Freescale Semiconductor Inc."); 261 MODULE_DESCRIPTION("i.MX EIM Controller Driver"); 262 MODULE_LICENSE("GPL"); 263