1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2014-2021 Broadcom 4 */ 5 6 #include <linux/init.h> 7 #include <linux/types.h> 8 #include <linux/module.h> 9 #include <linux/panic_notifier.h> 10 #include <linux/platform_device.h> 11 #include <linux/interrupt.h> 12 #include <linux/sysfs.h> 13 #include <linux/io.h> 14 #include <linux/string.h> 15 #include <linux/device.h> 16 #include <linux/list.h> 17 #include <linux/of.h> 18 #include <linux/bitops.h> 19 #include <linux/pm.h> 20 #include <linux/kernel.h> 21 #include <linux/kdebug.h> 22 #include <linux/notifier.h> 23 24 #ifdef CONFIG_MIPS 25 #include <asm/traps.h> 26 #endif 27 28 #define ARB_ERR_CAP_CLEAR (1 << 0) 29 #define ARB_ERR_CAP_STATUS_TIMEOUT (1 << 12) 30 #define ARB_ERR_CAP_STATUS_TEA (1 << 11) 31 #define ARB_ERR_CAP_STATUS_WRITE (1 << 1) 32 #define ARB_ERR_CAP_STATUS_VALID (1 << 0) 33 34 #define ARB_BP_CAP_CLEAR (1 << 0) 35 #define ARB_BP_CAP_STATUS_PROT_SHIFT 14 36 #define ARB_BP_CAP_STATUS_TYPE (1 << 13) 37 #define ARB_BP_CAP_STATUS_RSP_SHIFT 10 38 #define ARB_BP_CAP_STATUS_MASK GENMASK(1, 0) 39 #define ARB_BP_CAP_STATUS_BS_SHIFT 2 40 #define ARB_BP_CAP_STATUS_WRITE (1 << 1) 41 #define ARB_BP_CAP_STATUS_VALID (1 << 0) 42 43 enum { 44 ARB_TIMER, 45 ARB_BP_CAP_CLR, 46 ARB_BP_CAP_HI_ADDR, 47 ARB_BP_CAP_ADDR, 48 ARB_BP_CAP_STATUS, 49 ARB_BP_CAP_MASTER, 50 ARB_ERR_CAP_CLR, 51 ARB_ERR_CAP_HI_ADDR, 52 ARB_ERR_CAP_ADDR, 53 ARB_ERR_CAP_STATUS, 54 ARB_ERR_CAP_MASTER, 55 }; 56 57 static const int gisb_offsets_bcm7038[] = { 58 [ARB_TIMER] = 0x00c, 59 [ARB_BP_CAP_CLR] = 0x014, 60 [ARB_BP_CAP_HI_ADDR] = -1, 61 [ARB_BP_CAP_ADDR] = 0x0b8, 62 [ARB_BP_CAP_STATUS] = 0x0c0, 63 [ARB_BP_CAP_MASTER] = -1, 64 [ARB_ERR_CAP_CLR] = 0x0c4, 65 [ARB_ERR_CAP_HI_ADDR] = -1, 66 [ARB_ERR_CAP_ADDR] = 0x0c8, 67 [ARB_ERR_CAP_STATUS] = 0x0d0, 68 [ARB_ERR_CAP_MASTER] = -1, 69 }; 70 71 static const int gisb_offsets_bcm7278[] = { 72 [ARB_TIMER] = 0x008, 73 [ARB_BP_CAP_CLR] = 0x01c, 74 [ARB_BP_CAP_HI_ADDR] = -1, 75 [ARB_BP_CAP_ADDR] = 0x220, 76 [ARB_BP_CAP_STATUS] = 0x230, 77 [ARB_BP_CAP_MASTER] = 0x234, 78 [ARB_ERR_CAP_CLR] = 0x7f8, 79 [ARB_ERR_CAP_HI_ADDR] = -1, 80 [ARB_ERR_CAP_ADDR] = 0x7e0, 81 [ARB_ERR_CAP_STATUS] = 0x7f0, 82 [ARB_ERR_CAP_MASTER] = 0x7f4, 83 }; 84 85 static const int gisb_offsets_bcm7400[] = { 86 [ARB_TIMER] = 0x00c, 87 [ARB_BP_CAP_CLR] = 0x014, 88 [ARB_BP_CAP_HI_ADDR] = -1, 89 [ARB_BP_CAP_ADDR] = 0x0b8, 90 [ARB_BP_CAP_STATUS] = 0x0c0, 91 [ARB_BP_CAP_MASTER] = 0x0c4, 92 [ARB_ERR_CAP_CLR] = 0x0c8, 93 [ARB_ERR_CAP_HI_ADDR] = -1, 94 [ARB_ERR_CAP_ADDR] = 0x0cc, 95 [ARB_ERR_CAP_STATUS] = 0x0d4, 96 [ARB_ERR_CAP_MASTER] = 0x0d8, 97 }; 98 99 static const int gisb_offsets_bcm7435[] = { 100 [ARB_TIMER] = 0x00c, 101 [ARB_BP_CAP_CLR] = 0x014, 102 [ARB_BP_CAP_HI_ADDR] = -1, 103 [ARB_BP_CAP_ADDR] = 0x158, 104 [ARB_BP_CAP_STATUS] = 0x160, 105 [ARB_BP_CAP_MASTER] = 0x164, 106 [ARB_ERR_CAP_CLR] = 0x168, 107 [ARB_ERR_CAP_HI_ADDR] = -1, 108 [ARB_ERR_CAP_ADDR] = 0x16c, 109 [ARB_ERR_CAP_STATUS] = 0x174, 110 [ARB_ERR_CAP_MASTER] = 0x178, 111 }; 112 113 static const int gisb_offsets_bcm7445[] = { 114 [ARB_TIMER] = 0x008, 115 [ARB_BP_CAP_CLR] = 0x010, 116 [ARB_BP_CAP_HI_ADDR] = -1, 117 [ARB_BP_CAP_ADDR] = 0x1d8, 118 [ARB_BP_CAP_STATUS] = 0x1e0, 119 [ARB_BP_CAP_MASTER] = 0x1e4, 120 [ARB_ERR_CAP_CLR] = 0x7e4, 121 [ARB_ERR_CAP_HI_ADDR] = 0x7e8, 122 [ARB_ERR_CAP_ADDR] = 0x7ec, 123 [ARB_ERR_CAP_STATUS] = 0x7f4, 124 [ARB_ERR_CAP_MASTER] = 0x7f8, 125 }; 126 127 struct brcmstb_gisb_arb_device { 128 void __iomem *base; 129 const int *gisb_offsets; 130 bool big_endian; 131 struct mutex lock; 132 struct list_head next; 133 u32 valid_mask; 134 const char *master_names[sizeof(u32) * BITS_PER_BYTE]; 135 u32 saved_timeout; 136 }; 137 138 static LIST_HEAD(brcmstb_gisb_arb_device_list); 139 140 static u32 gisb_read(struct brcmstb_gisb_arb_device *gdev, int reg) 141 { 142 int offset = gdev->gisb_offsets[reg]; 143 144 if (offset < 0) { 145 /* return 1 if the hardware doesn't have ARB_ERR_CAP_MASTER */ 146 if (reg == ARB_ERR_CAP_MASTER) 147 return 1; 148 else 149 return 0; 150 } 151 152 if (gdev->big_endian) 153 return ioread32be(gdev->base + offset); 154 else 155 return ioread32(gdev->base + offset); 156 } 157 158 static u64 gisb_read_address(struct brcmstb_gisb_arb_device *gdev) 159 { 160 u64 value; 161 162 value = gisb_read(gdev, ARB_ERR_CAP_ADDR); 163 value |= (u64)gisb_read(gdev, ARB_ERR_CAP_HI_ADDR) << 32; 164 165 return value; 166 } 167 168 static u64 gisb_read_bp_address(struct brcmstb_gisb_arb_device *gdev) 169 { 170 u64 value; 171 172 value = gisb_read(gdev, ARB_BP_CAP_ADDR); 173 value |= (u64)gisb_read(gdev, ARB_BP_CAP_HI_ADDR) << 32; 174 175 return value; 176 } 177 178 static void gisb_write(struct brcmstb_gisb_arb_device *gdev, u32 val, int reg) 179 { 180 int offset = gdev->gisb_offsets[reg]; 181 182 if (offset == -1) 183 return; 184 185 if (gdev->big_endian) 186 iowrite32be(val, gdev->base + offset); 187 else 188 iowrite32(val, gdev->base + offset); 189 } 190 191 static ssize_t gisb_arb_get_timeout(struct device *dev, 192 struct device_attribute *attr, 193 char *buf) 194 { 195 struct brcmstb_gisb_arb_device *gdev = dev_get_drvdata(dev); 196 u32 timeout; 197 198 mutex_lock(&gdev->lock); 199 timeout = gisb_read(gdev, ARB_TIMER); 200 mutex_unlock(&gdev->lock); 201 202 return sprintf(buf, "%d", timeout); 203 } 204 205 static ssize_t gisb_arb_set_timeout(struct device *dev, 206 struct device_attribute *attr, 207 const char *buf, size_t count) 208 { 209 struct brcmstb_gisb_arb_device *gdev = dev_get_drvdata(dev); 210 int val, ret; 211 212 ret = kstrtoint(buf, 10, &val); 213 if (ret < 0) 214 return ret; 215 216 if (val == 0 || val >= 0xffffffff) 217 return -EINVAL; 218 219 mutex_lock(&gdev->lock); 220 gisb_write(gdev, val, ARB_TIMER); 221 mutex_unlock(&gdev->lock); 222 223 return count; 224 } 225 226 static const char * 227 brcmstb_gisb_master_to_str(struct brcmstb_gisb_arb_device *gdev, 228 u32 masters) 229 { 230 u32 mask = gdev->valid_mask & masters; 231 232 if (hweight_long(mask) != 1) 233 return NULL; 234 235 return gdev->master_names[ffs(mask) - 1]; 236 } 237 238 static int brcmstb_gisb_arb_decode_addr(struct brcmstb_gisb_arb_device *gdev, 239 const char *reason) 240 { 241 u32 cap_status; 242 u64 arb_addr; 243 u32 master; 244 const char *m_name; 245 char m_fmt[11]; 246 247 cap_status = gisb_read(gdev, ARB_ERR_CAP_STATUS); 248 249 /* Invalid captured address, bail out */ 250 if (!(cap_status & ARB_ERR_CAP_STATUS_VALID)) 251 return 1; 252 253 /* Read the address and master */ 254 arb_addr = gisb_read_address(gdev); 255 master = gisb_read(gdev, ARB_ERR_CAP_MASTER); 256 257 m_name = brcmstb_gisb_master_to_str(gdev, master); 258 if (!m_name) { 259 snprintf(m_fmt, sizeof(m_fmt), "0x%08x", master); 260 m_name = m_fmt; 261 } 262 263 pr_crit("GISB: %s at 0x%llx [%c %s], core: %s\n", 264 reason, arb_addr, 265 cap_status & ARB_ERR_CAP_STATUS_WRITE ? 'W' : 'R', 266 cap_status & ARB_ERR_CAP_STATUS_TIMEOUT ? "timeout" : "", 267 m_name); 268 269 /* clear the GISB error */ 270 gisb_write(gdev, ARB_ERR_CAP_CLEAR, ARB_ERR_CAP_CLR); 271 272 return 0; 273 } 274 275 #ifdef CONFIG_MIPS 276 static int brcmstb_bus_error_handler(struct pt_regs *regs, int is_fixup) 277 { 278 int ret = 0; 279 struct brcmstb_gisb_arb_device *gdev; 280 u32 cap_status; 281 282 list_for_each_entry(gdev, &brcmstb_gisb_arb_device_list, next) { 283 cap_status = gisb_read(gdev, ARB_ERR_CAP_STATUS); 284 285 /* Invalid captured address, bail out */ 286 if (!(cap_status & ARB_ERR_CAP_STATUS_VALID)) { 287 is_fixup = 1; 288 goto out; 289 } 290 291 ret |= brcmstb_gisb_arb_decode_addr(gdev, "bus error"); 292 } 293 out: 294 return is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL; 295 } 296 #endif 297 298 static irqreturn_t brcmstb_gisb_timeout_handler(int irq, void *dev_id) 299 { 300 brcmstb_gisb_arb_decode_addr(dev_id, "timeout"); 301 302 return IRQ_HANDLED; 303 } 304 305 static irqreturn_t brcmstb_gisb_tea_handler(int irq, void *dev_id) 306 { 307 brcmstb_gisb_arb_decode_addr(dev_id, "target abort"); 308 309 return IRQ_HANDLED; 310 } 311 312 static irqreturn_t brcmstb_gisb_bp_handler(int irq, void *dev_id) 313 { 314 struct brcmstb_gisb_arb_device *gdev = dev_id; 315 const char *m_name; 316 u32 bp_status; 317 u64 arb_addr; 318 u32 master; 319 char m_fmt[11]; 320 321 bp_status = gisb_read(gdev, ARB_BP_CAP_STATUS); 322 323 /* Invalid captured address, bail out */ 324 if (!(bp_status & ARB_BP_CAP_STATUS_VALID)) 325 return IRQ_HANDLED; 326 327 /* Read the address and master */ 328 arb_addr = gisb_read_bp_address(gdev); 329 master = gisb_read(gdev, ARB_BP_CAP_MASTER); 330 331 m_name = brcmstb_gisb_master_to_str(gdev, master); 332 if (!m_name) { 333 snprintf(m_fmt, sizeof(m_fmt), "0x%08x", master); 334 m_name = m_fmt; 335 } 336 337 pr_crit("GISB: breakpoint at 0x%llx [%c], core: %s\n", 338 arb_addr, bp_status & ARB_BP_CAP_STATUS_WRITE ? 'W' : 'R', 339 m_name); 340 341 /* clear the GISB error */ 342 gisb_write(gdev, ARB_ERR_CAP_CLEAR, ARB_ERR_CAP_CLR); 343 344 return IRQ_HANDLED; 345 } 346 347 /* 348 * Dump out gisb errors on die or panic. 349 */ 350 static int dump_gisb_error(struct notifier_block *self, unsigned long v, 351 void *p); 352 353 static struct notifier_block gisb_die_notifier = { 354 .notifier_call = dump_gisb_error, 355 }; 356 357 static struct notifier_block gisb_panic_notifier = { 358 .notifier_call = dump_gisb_error, 359 }; 360 361 static int dump_gisb_error(struct notifier_block *self, unsigned long v, 362 void *p) 363 { 364 struct brcmstb_gisb_arb_device *gdev; 365 const char *reason = "panic"; 366 367 if (self == &gisb_die_notifier) 368 reason = "die"; 369 370 /* iterate over each GISB arb registered handlers */ 371 list_for_each_entry(gdev, &brcmstb_gisb_arb_device_list, next) 372 brcmstb_gisb_arb_decode_addr(gdev, reason); 373 374 return NOTIFY_DONE; 375 } 376 377 static DEVICE_ATTR(gisb_arb_timeout, S_IWUSR | S_IRUGO, 378 gisb_arb_get_timeout, gisb_arb_set_timeout); 379 380 static struct attribute *gisb_arb_sysfs_attrs[] = { 381 &dev_attr_gisb_arb_timeout.attr, 382 NULL, 383 }; 384 385 static struct attribute_group gisb_arb_sysfs_attr_group = { 386 .attrs = gisb_arb_sysfs_attrs, 387 }; 388 389 static const struct of_device_id brcmstb_gisb_arb_of_match[] = { 390 { .compatible = "brcm,gisb-arb", .data = gisb_offsets_bcm7445 }, 391 { .compatible = "brcm,bcm7445-gisb-arb", .data = gisb_offsets_bcm7445 }, 392 { .compatible = "brcm,bcm7435-gisb-arb", .data = gisb_offsets_bcm7435 }, 393 { .compatible = "brcm,bcm7400-gisb-arb", .data = gisb_offsets_bcm7400 }, 394 { .compatible = "brcm,bcm7278-gisb-arb", .data = gisb_offsets_bcm7278 }, 395 { .compatible = "brcm,bcm7038-gisb-arb", .data = gisb_offsets_bcm7038 }, 396 { }, 397 }; 398 399 static int __init brcmstb_gisb_arb_probe(struct platform_device *pdev) 400 { 401 struct device_node *dn = pdev->dev.of_node; 402 struct brcmstb_gisb_arb_device *gdev; 403 const struct of_device_id *of_id; 404 struct resource *r; 405 int err, timeout_irq, tea_irq, bp_irq; 406 unsigned int num_masters, j = 0; 407 int i, first, last; 408 409 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 410 timeout_irq = platform_get_irq(pdev, 0); 411 tea_irq = platform_get_irq(pdev, 1); 412 bp_irq = platform_get_irq(pdev, 2); 413 414 gdev = devm_kzalloc(&pdev->dev, sizeof(*gdev), GFP_KERNEL); 415 if (!gdev) 416 return -ENOMEM; 417 418 mutex_init(&gdev->lock); 419 INIT_LIST_HEAD(&gdev->next); 420 421 gdev->base = devm_ioremap_resource(&pdev->dev, r); 422 if (IS_ERR(gdev->base)) 423 return PTR_ERR(gdev->base); 424 425 of_id = of_match_node(brcmstb_gisb_arb_of_match, dn); 426 if (!of_id) { 427 pr_err("failed to look up compatible string\n"); 428 return -EINVAL; 429 } 430 gdev->gisb_offsets = of_id->data; 431 gdev->big_endian = of_device_is_big_endian(dn); 432 433 err = devm_request_irq(&pdev->dev, timeout_irq, 434 brcmstb_gisb_timeout_handler, 0, pdev->name, 435 gdev); 436 if (err < 0) 437 return err; 438 439 err = devm_request_irq(&pdev->dev, tea_irq, 440 brcmstb_gisb_tea_handler, 0, pdev->name, 441 gdev); 442 if (err < 0) 443 return err; 444 445 /* Interrupt is optional */ 446 if (bp_irq > 0) { 447 err = devm_request_irq(&pdev->dev, bp_irq, 448 brcmstb_gisb_bp_handler, 0, pdev->name, 449 gdev); 450 if (err < 0) 451 return err; 452 } 453 454 /* If we do not have a valid mask, assume all masters are enabled */ 455 if (of_property_read_u32(dn, "brcm,gisb-arb-master-mask", 456 &gdev->valid_mask)) 457 gdev->valid_mask = 0xffffffff; 458 459 /* Proceed with reading the litteral names if we agree on the 460 * number of masters 461 */ 462 num_masters = of_property_count_strings(dn, 463 "brcm,gisb-arb-master-names"); 464 if (hweight_long(gdev->valid_mask) == num_masters) { 465 first = ffs(gdev->valid_mask) - 1; 466 last = fls(gdev->valid_mask) - 1; 467 468 for (i = first; i < last; i++) { 469 if (!(gdev->valid_mask & BIT(i))) 470 continue; 471 472 of_property_read_string_index(dn, 473 "brcm,gisb-arb-master-names", j, 474 &gdev->master_names[i]); 475 j++; 476 } 477 } 478 479 err = sysfs_create_group(&pdev->dev.kobj, &gisb_arb_sysfs_attr_group); 480 if (err) 481 return err; 482 483 platform_set_drvdata(pdev, gdev); 484 485 list_add_tail(&gdev->next, &brcmstb_gisb_arb_device_list); 486 487 #ifdef CONFIG_MIPS 488 mips_set_be_handler(brcmstb_bus_error_handler); 489 #endif 490 491 if (list_is_singular(&brcmstb_gisb_arb_device_list)) { 492 register_die_notifier(&gisb_die_notifier); 493 atomic_notifier_chain_register(&panic_notifier_list, 494 &gisb_panic_notifier); 495 } 496 497 dev_info(&pdev->dev, "registered irqs: %d, %d\n", 498 timeout_irq, tea_irq); 499 500 return 0; 501 } 502 503 #ifdef CONFIG_PM_SLEEP 504 static int brcmstb_gisb_arb_suspend(struct device *dev) 505 { 506 struct brcmstb_gisb_arb_device *gdev = dev_get_drvdata(dev); 507 508 gdev->saved_timeout = gisb_read(gdev, ARB_TIMER); 509 510 return 0; 511 } 512 513 /* Make sure we provide the same timeout value that was configured before, and 514 * do this before the GISB timeout interrupt handler has any chance to run. 515 */ 516 static int brcmstb_gisb_arb_resume_noirq(struct device *dev) 517 { 518 struct brcmstb_gisb_arb_device *gdev = dev_get_drvdata(dev); 519 520 gisb_write(gdev, gdev->saved_timeout, ARB_TIMER); 521 522 return 0; 523 } 524 #else 525 #define brcmstb_gisb_arb_suspend NULL 526 #define brcmstb_gisb_arb_resume_noirq NULL 527 #endif 528 529 static const struct dev_pm_ops brcmstb_gisb_arb_pm_ops = { 530 .suspend = brcmstb_gisb_arb_suspend, 531 .resume_noirq = brcmstb_gisb_arb_resume_noirq, 532 }; 533 534 static struct platform_driver brcmstb_gisb_arb_driver = { 535 .driver = { 536 .name = "brcm-gisb-arb", 537 .of_match_table = brcmstb_gisb_arb_of_match, 538 .pm = &brcmstb_gisb_arb_pm_ops, 539 .suppress_bind_attrs = true, 540 }, 541 }; 542 543 static int __init brcm_gisb_driver_init(void) 544 { 545 return platform_driver_probe(&brcmstb_gisb_arb_driver, 546 brcmstb_gisb_arb_probe); 547 } 548 549 module_init(brcm_gisb_driver_init); 550 551 MODULE_AUTHOR("Broadcom"); 552 MODULE_DESCRIPTION("Broadcom STB GISB arbiter driver"); 553 MODULE_LICENSE("GPL v2"); 554