1 /* SPDX-License-Identifier: ISC */ 2 /* Copyright (C) 2021 MediaTek Inc. */ 3 4 #define FIRMWARE_MT7663 "mediatek/mt7663pr2h.bin" 5 #define FIRMWARE_MT7668 "mediatek/mt7668pr2h.bin" 6 #define FIRMWARE_MT7961 "mediatek/BT_RAM_CODE_MT7961_1_2_hdr.bin" 7 8 #define HCI_WMT_MAX_EVENT_SIZE 64 9 10 #define BTMTK_WMT_REG_WRITE 0x1 11 #define BTMTK_WMT_REG_READ 0x2 12 13 #define MT7921_PINMUX_0 0x70005050 14 #define MT7921_PINMUX_1 0x70005054 15 16 enum { 17 BTMTK_WMT_PATCH_DWNLD = 0x1, 18 BTMTK_WMT_TEST = 0x2, 19 BTMTK_WMT_WAKEUP = 0x3, 20 BTMTK_WMT_HIF = 0x4, 21 BTMTK_WMT_FUNC_CTRL = 0x6, 22 BTMTK_WMT_RST = 0x7, 23 BTMTK_WMT_REGISTER = 0x8, 24 BTMTK_WMT_SEMAPHORE = 0x17, 25 }; 26 27 enum { 28 BTMTK_WMT_INVALID, 29 BTMTK_WMT_PATCH_UNDONE, 30 BTMTK_WMT_PATCH_PROGRESS, 31 BTMTK_WMT_PATCH_DONE, 32 BTMTK_WMT_ON_UNDONE, 33 BTMTK_WMT_ON_DONE, 34 BTMTK_WMT_ON_PROGRESS, 35 }; 36 37 struct btmtk_wmt_hdr { 38 u8 dir; 39 u8 op; 40 __le16 dlen; 41 u8 flag; 42 } __packed; 43 44 struct btmtk_hci_wmt_cmd { 45 struct btmtk_wmt_hdr hdr; 46 u8 data[]; 47 } __packed; 48 49 struct btmtk_hci_wmt_evt { 50 struct hci_event_hdr hhdr; 51 struct btmtk_wmt_hdr whdr; 52 } __packed; 53 54 struct btmtk_hci_wmt_evt_funcc { 55 struct btmtk_hci_wmt_evt hwhdr; 56 __be16 status; 57 } __packed; 58 59 struct btmtk_hci_wmt_evt_reg { 60 struct btmtk_hci_wmt_evt hwhdr; 61 u8 rsv[2]; 62 u8 num; 63 __le32 addr; 64 __le32 val; 65 } __packed; 66 67 struct btmtk_tci_sleep { 68 u8 mode; 69 __le16 duration; 70 __le16 host_duration; 71 u8 host_wakeup_pin; 72 u8 time_compensation; 73 } __packed; 74 75 struct btmtk_wakeon { 76 u8 mode; 77 u8 gpo; 78 u8 active_high; 79 __le16 enable_delay; 80 __le16 wakeup_delay; 81 } __packed; 82 83 struct btmtk_sco { 84 u8 clock_config; 85 u8 transmit_format_config; 86 u8 channel_format_config; 87 u8 channel_select_config; 88 } __packed; 89 90 struct reg_read_cmd { 91 u8 type; 92 u8 rsv; 93 u8 num; 94 __le32 addr; 95 } __packed; 96 97 struct reg_write_cmd { 98 u8 type; 99 u8 rsv; 100 u8 num; 101 __le32 addr; 102 __le32 data; 103 __le32 mask; 104 } __packed; 105 106 struct btmtk_hci_wmt_params { 107 u8 op; 108 u8 flag; 109 u16 dlen; 110 const void *data; 111 u32 *status; 112 }; 113 114 typedef int (*wmt_cmd_sync_func_t)(struct hci_dev *, 115 struct btmtk_hci_wmt_params *); 116 117 #if IS_ENABLED(CONFIG_BT_MTK) 118 119 int btmtk_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr); 120 121 int btmtk_setup_firmware_79xx(struct hci_dev *hdev, const char *fwname, 122 wmt_cmd_sync_func_t wmt_cmd_sync); 123 124 int btmtk_setup_firmware(struct hci_dev *hdev, const char *fwname, 125 wmt_cmd_sync_func_t wmt_cmd_sync); 126 #else 127 128 static inline int btmtk_set_bdaddr(struct hci_dev *hdev, 129 const bdaddr_t *bdaddr) 130 { 131 return -EOPNOTSUPP; 132 } 133 134 static int btmtk_setup_firmware_79xx(struct hci_dev *hdev, const char *fwname, 135 wmt_cmd_sync_func_t wmt_cmd_sync) 136 { 137 return -EOPNOTSUPP; 138 } 139 140 static int btmtk_setup_firmware(struct hci_dev *hdev, const char *fwname, 141 wmt_cmd_sync_func_t wmt_cmd_sync) 142 { 143 return -EOPNOTSUPP; 144 } 145 146 #endif 147