1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * 4 * Bluetooth support for Intel devices 5 * 6 * Copyright (C) 2015 Intel Corporation 7 */ 8 9 /* List of tlv type */ 10 enum { 11 INTEL_TLV_CNVI_TOP = 0x10, 12 INTEL_TLV_CNVR_TOP, 13 INTEL_TLV_CNVI_BT, 14 INTEL_TLV_CNVR_BT, 15 INTEL_TLV_CNVI_OTP, 16 INTEL_TLV_CNVR_OTP, 17 INTEL_TLV_DEV_REV_ID, 18 INTEL_TLV_USB_VENDOR_ID, 19 INTEL_TLV_USB_PRODUCT_ID, 20 INTEL_TLV_PCIE_VENDOR_ID, 21 INTEL_TLV_PCIE_DEVICE_ID, 22 INTEL_TLV_PCIE_SUBSYSTEM_ID, 23 INTEL_TLV_IMAGE_TYPE, 24 INTEL_TLV_TIME_STAMP, 25 INTEL_TLV_BUILD_TYPE, 26 INTEL_TLV_BUILD_NUM, 27 INTEL_TLV_FW_BUILD_PRODUCT, 28 INTEL_TLV_FW_BUILD_HW, 29 INTEL_TLV_FW_STEP, 30 INTEL_TLV_BT_SPEC, 31 INTEL_TLV_MFG_NAME, 32 INTEL_TLV_HCI_REV, 33 INTEL_TLV_LMP_SUBVER, 34 INTEL_TLV_OTP_PATCH_VER, 35 INTEL_TLV_SECURE_BOOT, 36 INTEL_TLV_KEY_FROM_HDR, 37 INTEL_TLV_OTP_LOCK, 38 INTEL_TLV_API_LOCK, 39 INTEL_TLV_DEBUG_LOCK, 40 INTEL_TLV_MIN_FW, 41 INTEL_TLV_LIMITED_CCE, 42 INTEL_TLV_SBE_TYPE, 43 INTEL_TLV_OTP_BDADDR, 44 INTEL_TLV_UNLOCKED_STATE 45 }; 46 47 struct intel_tlv { 48 u8 type; 49 u8 len; 50 u8 val[]; 51 } __packed; 52 53 struct intel_version_tlv { 54 u32 cnvi_top; 55 u32 cnvr_top; 56 u32 cnvi_bt; 57 u32 cnvr_bt; 58 u16 dev_rev_id; 59 u8 img_type; 60 u16 timestamp; 61 u8 build_type; 62 u32 build_num; 63 u8 secure_boot; 64 u8 otp_lock; 65 u8 api_lock; 66 u8 debug_lock; 67 u8 min_fw_build_nn; 68 u8 min_fw_build_cw; 69 u8 min_fw_build_yy; 70 u8 limited_cce; 71 u8 sbe_type; 72 bdaddr_t otp_bd_addr; 73 }; 74 75 struct intel_version { 76 u8 status; 77 u8 hw_platform; 78 u8 hw_variant; 79 u8 hw_revision; 80 u8 fw_variant; 81 u8 fw_revision; 82 u8 fw_build_num; 83 u8 fw_build_ww; 84 u8 fw_build_yy; 85 u8 fw_patch_num; 86 } __packed; 87 88 struct intel_boot_params { 89 __u8 status; 90 __u8 otp_format; 91 __u8 otp_content; 92 __u8 otp_patch; 93 __le16 dev_revid; 94 __u8 secure_boot; 95 __u8 key_from_hdr; 96 __u8 key_type; 97 __u8 otp_lock; 98 __u8 api_lock; 99 __u8 debug_lock; 100 bdaddr_t otp_bdaddr; 101 __u8 min_fw_build_nn; 102 __u8 min_fw_build_cw; 103 __u8 min_fw_build_yy; 104 __u8 limited_cce; 105 __u8 unlocked_state; 106 } __packed; 107 108 struct intel_bootup { 109 __u8 zero; 110 __u8 num_cmds; 111 __u8 source; 112 __u8 reset_type; 113 __u8 reset_reason; 114 __u8 ddc_status; 115 } __packed; 116 117 struct intel_secure_send_result { 118 __u8 result; 119 __le16 opcode; 120 __u8 status; 121 } __packed; 122 123 struct intel_reset { 124 __u8 reset_type; 125 __u8 patch_enable; 126 __u8 ddc_reload; 127 __u8 boot_option; 128 __le32 boot_param; 129 } __packed; 130 131 struct intel_debug_features { 132 __u8 page1[16]; 133 } __packed; 134 135 #define INTEL_HW_PLATFORM(cnvx_bt) ((u8)(((cnvx_bt) & 0x0000ff00) >> 8)) 136 #define INTEL_HW_VARIANT(cnvx_bt) ((u8)(((cnvx_bt) & 0x003f0000) >> 16)) 137 #define INTEL_CNVX_TOP_TYPE(cnvx_top) ((cnvx_top) & 0x00000fff) 138 #define INTEL_CNVX_TOP_STEP(cnvx_top) (((cnvx_top) & 0x0f000000) >> 24) 139 #define INTEL_CNVX_TOP_PACK_SWAB(t, s) __swab16(((__u16)(((t) << 4) | (s)))) 140 141 enum { 142 INTEL_BOOTLOADER, 143 INTEL_DOWNLOADING, 144 INTEL_FIRMWARE_LOADED, 145 INTEL_FIRMWARE_FAILED, 146 INTEL_BOOTING, 147 INTEL_BROKEN_INITIAL_NCMD, 148 INTEL_BROKEN_LED, 149 INTEL_ROM_LEGACY, 150 151 __INTEL_NUM_FLAGS, 152 }; 153 154 struct btintel_data { 155 DECLARE_BITMAP(flags, __INTEL_NUM_FLAGS); 156 }; 157 158 #define btintel_set_flag(hdev, nr) \ 159 do { \ 160 struct btintel_data *intel = hci_get_priv((hdev)); \ 161 set_bit((nr), intel->flags); \ 162 } while (0) 163 164 #define btintel_clear_flag(hdev, nr) \ 165 do { \ 166 struct btintel_data *intel = hci_get_priv((hdev)); \ 167 clear_bit((nr), intel->flags); \ 168 } while (0) 169 170 #define btintel_wake_up_flag(hdev, nr) \ 171 do { \ 172 struct btintel_data *intel = hci_get_priv((hdev)); \ 173 wake_up_bit(intel->flags, (nr)); \ 174 } while (0) 175 176 #define btintel_get_flag(hdev) \ 177 (((struct btintel_data *)hci_get_priv(hdev))->flags) 178 179 #define btintel_test_flag(hdev, nr) test_bit((nr), btintel_get_flag(hdev)) 180 #define btintel_test_and_clear_flag(hdev, nr) test_and_clear_bit((nr), btintel_get_flag(hdev)) 181 #define btintel_wait_on_flag_timeout(hdev, nr, m, to) \ 182 wait_on_bit_timeout(btintel_get_flag(hdev), (nr), m, to) 183 184 #if IS_ENABLED(CONFIG_BT_INTEL) 185 186 int btintel_check_bdaddr(struct hci_dev *hdev); 187 int btintel_enter_mfg(struct hci_dev *hdev); 188 int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched); 189 int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr); 190 int btintel_set_diag(struct hci_dev *hdev, bool enable); 191 192 int btintel_version_info(struct hci_dev *hdev, struct intel_version *ver); 193 int btintel_load_ddc_config(struct hci_dev *hdev, const char *ddc_name); 194 int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug); 195 int btintel_read_version(struct hci_dev *hdev, struct intel_version *ver); 196 struct regmap *btintel_regmap_init(struct hci_dev *hdev, u16 opcode_read, 197 u16 opcode_write); 198 int btintel_send_intel_reset(struct hci_dev *hdev, u32 boot_param); 199 int btintel_read_boot_params(struct hci_dev *hdev, 200 struct intel_boot_params *params); 201 int btintel_download_firmware(struct hci_dev *dev, struct intel_version *ver, 202 const struct firmware *fw, u32 *boot_param); 203 int btintel_configure_setup(struct hci_dev *hdev); 204 void btintel_bootup(struct hci_dev *hdev, const void *ptr, unsigned int len); 205 void btintel_secure_send_result(struct hci_dev *hdev, 206 const void *ptr, unsigned int len); 207 #else 208 209 static inline int btintel_check_bdaddr(struct hci_dev *hdev) 210 { 211 return -EOPNOTSUPP; 212 } 213 214 static inline int btintel_enter_mfg(struct hci_dev *hdev) 215 { 216 return -EOPNOTSUPP; 217 } 218 219 static inline int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched) 220 { 221 return -EOPNOTSUPP; 222 } 223 224 static inline int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr) 225 { 226 return -EOPNOTSUPP; 227 } 228 229 static inline int btintel_set_diag(struct hci_dev *hdev, bool enable) 230 { 231 return -EOPNOTSUPP; 232 } 233 234 static inline int btintel_version_info(struct hci_dev *hdev, 235 struct intel_version *ver) 236 { 237 return -EOPNOTSUPP; 238 } 239 240 static inline int btintel_load_ddc_config(struct hci_dev *hdev, 241 const char *ddc_name) 242 { 243 return -EOPNOTSUPP; 244 } 245 246 static inline int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug) 247 { 248 return -EOPNOTSUPP; 249 } 250 251 static inline int btintel_read_version(struct hci_dev *hdev, 252 struct intel_version *ver) 253 { 254 return -EOPNOTSUPP; 255 } 256 257 static inline struct regmap *btintel_regmap_init(struct hci_dev *hdev, 258 u16 opcode_read, 259 u16 opcode_write) 260 { 261 return ERR_PTR(-EINVAL); 262 } 263 264 static inline int btintel_send_intel_reset(struct hci_dev *hdev, 265 u32 reset_param) 266 { 267 return -EOPNOTSUPP; 268 } 269 270 static inline int btintel_read_boot_params(struct hci_dev *hdev, 271 struct intel_boot_params *params) 272 { 273 return -EOPNOTSUPP; 274 } 275 276 static inline int btintel_download_firmware(struct hci_dev *dev, 277 const struct firmware *fw, 278 u32 *boot_param) 279 { 280 return -EOPNOTSUPP; 281 } 282 283 static inline int btintel_configure_setup(struct hci_dev *hdev) 284 { 285 return -ENODEV; 286 } 287 288 static inline void btintel_bootup(struct hci_dev *hdev, 289 const void *ptr, unsigned int len) 290 { 291 } 292 293 static inline void btintel_secure_send_result(struct hci_dev *hdev, 294 const void *ptr, unsigned int len) 295 { 296 } 297 #endif 298