1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * 4 * Bluetooth support for Intel devices 5 * 6 * Copyright (C) 2015 Intel Corporation 7 */ 8 9 /* List of tlv type */ 10 enum { 11 INTEL_TLV_CNVI_TOP = 0x10, 12 INTEL_TLV_CNVR_TOP, 13 INTEL_TLV_CNVI_BT, 14 INTEL_TLV_CNVR_BT, 15 INTEL_TLV_CNVI_OTP, 16 INTEL_TLV_CNVR_OTP, 17 INTEL_TLV_DEV_REV_ID, 18 INTEL_TLV_USB_VENDOR_ID, 19 INTEL_TLV_USB_PRODUCT_ID, 20 INTEL_TLV_PCIE_VENDOR_ID, 21 INTEL_TLV_PCIE_DEVICE_ID, 22 INTEL_TLV_PCIE_SUBSYSTEM_ID, 23 INTEL_TLV_IMAGE_TYPE, 24 INTEL_TLV_TIME_STAMP, 25 INTEL_TLV_BUILD_TYPE, 26 INTEL_TLV_BUILD_NUM, 27 INTEL_TLV_FW_BUILD_PRODUCT, 28 INTEL_TLV_FW_BUILD_HW, 29 INTEL_TLV_FW_STEP, 30 INTEL_TLV_BT_SPEC, 31 INTEL_TLV_MFG_NAME, 32 INTEL_TLV_HCI_REV, 33 INTEL_TLV_LMP_SUBVER, 34 INTEL_TLV_OTP_PATCH_VER, 35 INTEL_TLV_SECURE_BOOT, 36 INTEL_TLV_KEY_FROM_HDR, 37 INTEL_TLV_OTP_LOCK, 38 INTEL_TLV_API_LOCK, 39 INTEL_TLV_DEBUG_LOCK, 40 INTEL_TLV_MIN_FW, 41 INTEL_TLV_LIMITED_CCE, 42 INTEL_TLV_SBE_TYPE, 43 INTEL_TLV_OTP_BDADDR, 44 INTEL_TLV_UNLOCKED_STATE 45 }; 46 47 struct intel_tlv { 48 u8 type; 49 u8 len; 50 u8 val[]; 51 } __packed; 52 53 struct intel_version_tlv { 54 u32 cnvi_top; 55 u32 cnvr_top; 56 u32 cnvi_bt; 57 u32 cnvr_bt; 58 u16 dev_rev_id; 59 u8 img_type; 60 u16 timestamp; 61 u8 build_type; 62 u32 build_num; 63 u8 secure_boot; 64 u8 otp_lock; 65 u8 api_lock; 66 u8 debug_lock; 67 u8 min_fw_build_nn; 68 u8 min_fw_build_cw; 69 u8 min_fw_build_yy; 70 u8 limited_cce; 71 u8 sbe_type; 72 bdaddr_t otp_bd_addr; 73 }; 74 75 struct intel_version { 76 u8 status; 77 u8 hw_platform; 78 u8 hw_variant; 79 u8 hw_revision; 80 u8 fw_variant; 81 u8 fw_revision; 82 u8 fw_build_num; 83 u8 fw_build_ww; 84 u8 fw_build_yy; 85 u8 fw_patch_num; 86 } __packed; 87 88 struct intel_boot_params { 89 __u8 status; 90 __u8 otp_format; 91 __u8 otp_content; 92 __u8 otp_patch; 93 __le16 dev_revid; 94 __u8 secure_boot; 95 __u8 key_from_hdr; 96 __u8 key_type; 97 __u8 otp_lock; 98 __u8 api_lock; 99 __u8 debug_lock; 100 bdaddr_t otp_bdaddr; 101 __u8 min_fw_build_nn; 102 __u8 min_fw_build_cw; 103 __u8 min_fw_build_yy; 104 __u8 limited_cce; 105 __u8 unlocked_state; 106 } __packed; 107 108 struct intel_bootup { 109 __u8 zero; 110 __u8 num_cmds; 111 __u8 source; 112 __u8 reset_type; 113 __u8 reset_reason; 114 __u8 ddc_status; 115 } __packed; 116 117 struct intel_secure_send_result { 118 __u8 result; 119 __le16 opcode; 120 __u8 status; 121 } __packed; 122 123 struct intel_reset { 124 __u8 reset_type; 125 __u8 patch_enable; 126 __u8 ddc_reload; 127 __u8 boot_option; 128 __le32 boot_param; 129 } __packed; 130 131 struct intel_debug_features { 132 __u8 page1[16]; 133 } __packed; 134 135 struct intel_offload_use_cases { 136 __u8 status; 137 __u8 preset[8]; 138 } __packed; 139 140 struct btintel_loc_aware_reg { 141 __le32 mcc; 142 __le32 sel; 143 __le32 delta; 144 } __packed; 145 146 #define INTEL_HW_PLATFORM(cnvx_bt) ((u8)(((cnvx_bt) & 0x0000ff00) >> 8)) 147 #define INTEL_HW_VARIANT(cnvx_bt) ((u8)(((cnvx_bt) & 0x003f0000) >> 16)) 148 #define INTEL_CNVX_TOP_TYPE(cnvx_top) ((cnvx_top) & 0x00000fff) 149 #define INTEL_CNVX_TOP_STEP(cnvx_top) (((cnvx_top) & 0x0f000000) >> 24) 150 #define INTEL_CNVX_TOP_PACK_SWAB(t, s) __swab16(((__u16)(((t) << 4) | (s)))) 151 152 enum { 153 INTEL_BOOTLOADER, 154 INTEL_DOWNLOADING, 155 INTEL_FIRMWARE_LOADED, 156 INTEL_FIRMWARE_FAILED, 157 INTEL_BOOTING, 158 INTEL_BROKEN_INITIAL_NCMD, 159 INTEL_BROKEN_SHUTDOWN_LED, 160 INTEL_ROM_LEGACY, 161 INTEL_ROM_LEGACY_NO_WBS_SUPPORT, 162 163 __INTEL_NUM_FLAGS, 164 }; 165 166 struct btintel_data { 167 DECLARE_BITMAP(flags, __INTEL_NUM_FLAGS); 168 }; 169 170 #define btintel_set_flag(hdev, nr) \ 171 do { \ 172 struct btintel_data *intel = hci_get_priv((hdev)); \ 173 set_bit((nr), intel->flags); \ 174 } while (0) 175 176 #define btintel_clear_flag(hdev, nr) \ 177 do { \ 178 struct btintel_data *intel = hci_get_priv((hdev)); \ 179 clear_bit((nr), intel->flags); \ 180 } while (0) 181 182 #define btintel_wake_up_flag(hdev, nr) \ 183 do { \ 184 struct btintel_data *intel = hci_get_priv((hdev)); \ 185 wake_up_bit(intel->flags, (nr)); \ 186 } while (0) 187 188 #define btintel_get_flag(hdev) \ 189 (((struct btintel_data *)hci_get_priv(hdev))->flags) 190 191 #define btintel_test_flag(hdev, nr) test_bit((nr), btintel_get_flag(hdev)) 192 #define btintel_test_and_clear_flag(hdev, nr) test_and_clear_bit((nr), btintel_get_flag(hdev)) 193 #define btintel_wait_on_flag_timeout(hdev, nr, m, to) \ 194 wait_on_bit_timeout(btintel_get_flag(hdev), (nr), m, to) 195 196 #if IS_ENABLED(CONFIG_BT_INTEL) 197 198 int btintel_check_bdaddr(struct hci_dev *hdev); 199 int btintel_enter_mfg(struct hci_dev *hdev); 200 int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched); 201 int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr); 202 int btintel_set_diag(struct hci_dev *hdev, bool enable); 203 204 int btintel_version_info(struct hci_dev *hdev, struct intel_version *ver); 205 int btintel_load_ddc_config(struct hci_dev *hdev, const char *ddc_name); 206 int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug); 207 int btintel_read_version(struct hci_dev *hdev, struct intel_version *ver); 208 struct regmap *btintel_regmap_init(struct hci_dev *hdev, u16 opcode_read, 209 u16 opcode_write); 210 int btintel_send_intel_reset(struct hci_dev *hdev, u32 boot_param); 211 int btintel_read_boot_params(struct hci_dev *hdev, 212 struct intel_boot_params *params); 213 int btintel_download_firmware(struct hci_dev *dev, struct intel_version *ver, 214 const struct firmware *fw, u32 *boot_param); 215 int btintel_configure_setup(struct hci_dev *hdev); 216 void btintel_bootup(struct hci_dev *hdev, const void *ptr, unsigned int len); 217 void btintel_secure_send_result(struct hci_dev *hdev, 218 const void *ptr, unsigned int len); 219 int btintel_set_quality_report(struct hci_dev *hdev, bool enable); 220 #else 221 222 static inline int btintel_check_bdaddr(struct hci_dev *hdev) 223 { 224 return -EOPNOTSUPP; 225 } 226 227 static inline int btintel_enter_mfg(struct hci_dev *hdev) 228 { 229 return -EOPNOTSUPP; 230 } 231 232 static inline int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched) 233 { 234 return -EOPNOTSUPP; 235 } 236 237 static inline int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr) 238 { 239 return -EOPNOTSUPP; 240 } 241 242 static inline int btintel_set_diag(struct hci_dev *hdev, bool enable) 243 { 244 return -EOPNOTSUPP; 245 } 246 247 static inline int btintel_version_info(struct hci_dev *hdev, 248 struct intel_version *ver) 249 { 250 return -EOPNOTSUPP; 251 } 252 253 static inline int btintel_load_ddc_config(struct hci_dev *hdev, 254 const char *ddc_name) 255 { 256 return -EOPNOTSUPP; 257 } 258 259 static inline int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug) 260 { 261 return -EOPNOTSUPP; 262 } 263 264 static inline int btintel_read_version(struct hci_dev *hdev, 265 struct intel_version *ver) 266 { 267 return -EOPNOTSUPP; 268 } 269 270 static inline struct regmap *btintel_regmap_init(struct hci_dev *hdev, 271 u16 opcode_read, 272 u16 opcode_write) 273 { 274 return ERR_PTR(-EINVAL); 275 } 276 277 static inline int btintel_send_intel_reset(struct hci_dev *hdev, 278 u32 reset_param) 279 { 280 return -EOPNOTSUPP; 281 } 282 283 static inline int btintel_read_boot_params(struct hci_dev *hdev, 284 struct intel_boot_params *params) 285 { 286 return -EOPNOTSUPP; 287 } 288 289 static inline int btintel_download_firmware(struct hci_dev *dev, 290 const struct firmware *fw, 291 u32 *boot_param) 292 { 293 return -EOPNOTSUPP; 294 } 295 296 static inline int btintel_configure_setup(struct hci_dev *hdev) 297 { 298 return -ENODEV; 299 } 300 301 static inline void btintel_bootup(struct hci_dev *hdev, 302 const void *ptr, unsigned int len) 303 { 304 } 305 306 static inline void btintel_secure_send_result(struct hci_dev *hdev, 307 const void *ptr, unsigned int len) 308 { 309 } 310 311 static inline int btintel_set_quality_report(struct hci_dev *hdev, bool enable) 312 { 313 return -ENODEV; 314 } 315 #endif 316