1 /* 2 * 3 * Bluetooth support for Intel devices 4 * 5 * Copyright (C) 2015 Intel Corporation 6 * 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 21 * 22 */ 23 24 #include <linux/module.h> 25 #include <linux/firmware.h> 26 #include <linux/regmap.h> 27 #include <asm/unaligned.h> 28 29 #include <net/bluetooth/bluetooth.h> 30 #include <net/bluetooth/hci_core.h> 31 32 #include "btintel.h" 33 34 #define VERSION "0.1" 35 36 #define BDADDR_INTEL (&(bdaddr_t) {{0x00, 0x8b, 0x9e, 0x19, 0x03, 0x00}}) 37 38 int btintel_check_bdaddr(struct hci_dev *hdev) 39 { 40 struct hci_rp_read_bd_addr *bda; 41 struct sk_buff *skb; 42 43 skb = __hci_cmd_sync(hdev, HCI_OP_READ_BD_ADDR, 0, NULL, 44 HCI_INIT_TIMEOUT); 45 if (IS_ERR(skb)) { 46 int err = PTR_ERR(skb); 47 bt_dev_err(hdev, "Reading Intel device address failed (%d)", 48 err); 49 return err; 50 } 51 52 if (skb->len != sizeof(*bda)) { 53 bt_dev_err(hdev, "Intel device address length mismatch"); 54 kfree_skb(skb); 55 return -EIO; 56 } 57 58 bda = (struct hci_rp_read_bd_addr *)skb->data; 59 60 /* For some Intel based controllers, the default Bluetooth device 61 * address 00:03:19:9E:8B:00 can be found. These controllers are 62 * fully operational, but have the danger of duplicate addresses 63 * and that in turn can cause problems with Bluetooth operation. 64 */ 65 if (!bacmp(&bda->bdaddr, BDADDR_INTEL)) { 66 bt_dev_err(hdev, "Found Intel default device address (%pMR)", 67 &bda->bdaddr); 68 set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks); 69 } 70 71 kfree_skb(skb); 72 73 return 0; 74 } 75 EXPORT_SYMBOL_GPL(btintel_check_bdaddr); 76 77 int btintel_enter_mfg(struct hci_dev *hdev) 78 { 79 static const u8 param[] = { 0x01, 0x00 }; 80 struct sk_buff *skb; 81 82 skb = __hci_cmd_sync(hdev, 0xfc11, 2, param, HCI_CMD_TIMEOUT); 83 if (IS_ERR(skb)) { 84 bt_dev_err(hdev, "Entering manufacturer mode failed (%ld)", 85 PTR_ERR(skb)); 86 return PTR_ERR(skb); 87 } 88 kfree_skb(skb); 89 90 return 0; 91 } 92 EXPORT_SYMBOL_GPL(btintel_enter_mfg); 93 94 int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched) 95 { 96 u8 param[] = { 0x00, 0x00 }; 97 struct sk_buff *skb; 98 99 /* The 2nd command parameter specifies the manufacturing exit method: 100 * 0x00: Just disable the manufacturing mode (0x00). 101 * 0x01: Disable manufacturing mode and reset with patches deactivated. 102 * 0x02: Disable manufacturing mode and reset with patches activated. 103 */ 104 if (reset) 105 param[1] |= patched ? 0x02 : 0x01; 106 107 skb = __hci_cmd_sync(hdev, 0xfc11, 2, param, HCI_CMD_TIMEOUT); 108 if (IS_ERR(skb)) { 109 bt_dev_err(hdev, "Exiting manufacturer mode failed (%ld)", 110 PTR_ERR(skb)); 111 return PTR_ERR(skb); 112 } 113 kfree_skb(skb); 114 115 return 0; 116 } 117 EXPORT_SYMBOL_GPL(btintel_exit_mfg); 118 119 int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr) 120 { 121 struct sk_buff *skb; 122 int err; 123 124 skb = __hci_cmd_sync(hdev, 0xfc31, 6, bdaddr, HCI_INIT_TIMEOUT); 125 if (IS_ERR(skb)) { 126 err = PTR_ERR(skb); 127 bt_dev_err(hdev, "Changing Intel device address failed (%d)", 128 err); 129 return err; 130 } 131 kfree_skb(skb); 132 133 return 0; 134 } 135 EXPORT_SYMBOL_GPL(btintel_set_bdaddr); 136 137 int btintel_set_diag(struct hci_dev *hdev, bool enable) 138 { 139 struct sk_buff *skb; 140 u8 param[3]; 141 int err; 142 143 if (enable) { 144 param[0] = 0x03; 145 param[1] = 0x03; 146 param[2] = 0x03; 147 } else { 148 param[0] = 0x00; 149 param[1] = 0x00; 150 param[2] = 0x00; 151 } 152 153 skb = __hci_cmd_sync(hdev, 0xfc43, 3, param, HCI_INIT_TIMEOUT); 154 if (IS_ERR(skb)) { 155 err = PTR_ERR(skb); 156 if (err == -ENODATA) 157 goto done; 158 bt_dev_err(hdev, "Changing Intel diagnostic mode failed (%d)", 159 err); 160 return err; 161 } 162 kfree_skb(skb); 163 164 done: 165 btintel_set_event_mask(hdev, enable); 166 return 0; 167 } 168 EXPORT_SYMBOL_GPL(btintel_set_diag); 169 170 int btintel_set_diag_mfg(struct hci_dev *hdev, bool enable) 171 { 172 int err, ret; 173 174 err = btintel_enter_mfg(hdev); 175 if (err) 176 return err; 177 178 ret = btintel_set_diag(hdev, enable); 179 180 err = btintel_exit_mfg(hdev, false, false); 181 if (err) 182 return err; 183 184 return ret; 185 } 186 EXPORT_SYMBOL_GPL(btintel_set_diag_mfg); 187 188 void btintel_hw_error(struct hci_dev *hdev, u8 code) 189 { 190 struct sk_buff *skb; 191 u8 type = 0x00; 192 193 bt_dev_err(hdev, "Hardware error 0x%2.2x", code); 194 195 skb = __hci_cmd_sync(hdev, HCI_OP_RESET, 0, NULL, HCI_INIT_TIMEOUT); 196 if (IS_ERR(skb)) { 197 bt_dev_err(hdev, "Reset after hardware error failed (%ld)", 198 PTR_ERR(skb)); 199 return; 200 } 201 kfree_skb(skb); 202 203 skb = __hci_cmd_sync(hdev, 0xfc22, 1, &type, HCI_INIT_TIMEOUT); 204 if (IS_ERR(skb)) { 205 bt_dev_err(hdev, "Retrieving Intel exception info failed (%ld)", 206 PTR_ERR(skb)); 207 return; 208 } 209 210 if (skb->len != 13) { 211 bt_dev_err(hdev, "Exception info size mismatch"); 212 kfree_skb(skb); 213 return; 214 } 215 216 bt_dev_err(hdev, "Exception info %s", (char *)(skb->data + 1)); 217 218 kfree_skb(skb); 219 } 220 EXPORT_SYMBOL_GPL(btintel_hw_error); 221 222 void btintel_version_info(struct hci_dev *hdev, struct intel_version *ver) 223 { 224 const char *variant; 225 226 switch (ver->fw_variant) { 227 case 0x06: 228 variant = "Bootloader"; 229 break; 230 case 0x23: 231 variant = "Firmware"; 232 break; 233 default: 234 return; 235 } 236 237 bt_dev_info(hdev, "%s revision %u.%u build %u week %u %u", 238 variant, ver->fw_revision >> 4, ver->fw_revision & 0x0f, 239 ver->fw_build_num, ver->fw_build_ww, 240 2000 + ver->fw_build_yy); 241 } 242 EXPORT_SYMBOL_GPL(btintel_version_info); 243 244 int btintel_secure_send(struct hci_dev *hdev, u8 fragment_type, u32 plen, 245 const void *param) 246 { 247 while (plen > 0) { 248 struct sk_buff *skb; 249 u8 cmd_param[253], fragment_len = (plen > 252) ? 252 : plen; 250 251 cmd_param[0] = fragment_type; 252 memcpy(cmd_param + 1, param, fragment_len); 253 254 skb = __hci_cmd_sync(hdev, 0xfc09, fragment_len + 1, 255 cmd_param, HCI_INIT_TIMEOUT); 256 if (IS_ERR(skb)) 257 return PTR_ERR(skb); 258 259 kfree_skb(skb); 260 261 plen -= fragment_len; 262 param += fragment_len; 263 } 264 265 return 0; 266 } 267 EXPORT_SYMBOL_GPL(btintel_secure_send); 268 269 int btintel_load_ddc_config(struct hci_dev *hdev, const char *ddc_name) 270 { 271 const struct firmware *fw; 272 struct sk_buff *skb; 273 const u8 *fw_ptr; 274 int err; 275 276 err = request_firmware_direct(&fw, ddc_name, &hdev->dev); 277 if (err < 0) { 278 bt_dev_err(hdev, "Failed to load Intel DDC file %s (%d)", 279 ddc_name, err); 280 return err; 281 } 282 283 bt_dev_info(hdev, "Found Intel DDC parameters: %s", ddc_name); 284 285 fw_ptr = fw->data; 286 287 /* DDC file contains one or more DDC structure which has 288 * Length (1 byte), DDC ID (2 bytes), and DDC value (Length - 2). 289 */ 290 while (fw->size > fw_ptr - fw->data) { 291 u8 cmd_plen = fw_ptr[0] + sizeof(u8); 292 293 skb = __hci_cmd_sync(hdev, 0xfc8b, cmd_plen, fw_ptr, 294 HCI_INIT_TIMEOUT); 295 if (IS_ERR(skb)) { 296 bt_dev_err(hdev, "Failed to send Intel_Write_DDC (%ld)", 297 PTR_ERR(skb)); 298 release_firmware(fw); 299 return PTR_ERR(skb); 300 } 301 302 fw_ptr += cmd_plen; 303 kfree_skb(skb); 304 } 305 306 release_firmware(fw); 307 308 bt_dev_info(hdev, "Applying Intel DDC parameters completed"); 309 310 return 0; 311 } 312 EXPORT_SYMBOL_GPL(btintel_load_ddc_config); 313 314 int btintel_set_event_mask(struct hci_dev *hdev, bool debug) 315 { 316 u8 mask[8] = { 0x87, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; 317 struct sk_buff *skb; 318 int err; 319 320 if (debug) 321 mask[1] |= 0x62; 322 323 skb = __hci_cmd_sync(hdev, 0xfc52, 8, mask, HCI_INIT_TIMEOUT); 324 if (IS_ERR(skb)) { 325 err = PTR_ERR(skb); 326 bt_dev_err(hdev, "Setting Intel event mask failed (%d)", err); 327 return err; 328 } 329 kfree_skb(skb); 330 331 return 0; 332 } 333 EXPORT_SYMBOL_GPL(btintel_set_event_mask); 334 335 int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug) 336 { 337 int err, ret; 338 339 err = btintel_enter_mfg(hdev); 340 if (err) 341 return err; 342 343 ret = btintel_set_event_mask(hdev, debug); 344 345 err = btintel_exit_mfg(hdev, false, false); 346 if (err) 347 return err; 348 349 return ret; 350 } 351 EXPORT_SYMBOL_GPL(btintel_set_event_mask_mfg); 352 353 int btintel_read_version(struct hci_dev *hdev, struct intel_version *ver) 354 { 355 struct sk_buff *skb; 356 357 skb = __hci_cmd_sync(hdev, 0xfc05, 0, NULL, HCI_CMD_TIMEOUT); 358 if (IS_ERR(skb)) { 359 bt_dev_err(hdev, "Reading Intel version information failed (%ld)", 360 PTR_ERR(skb)); 361 return PTR_ERR(skb); 362 } 363 364 if (skb->len != sizeof(*ver)) { 365 bt_dev_err(hdev, "Intel version event size mismatch"); 366 kfree_skb(skb); 367 return -EILSEQ; 368 } 369 370 memcpy(ver, skb->data, sizeof(*ver)); 371 372 kfree_skb(skb); 373 374 return 0; 375 } 376 EXPORT_SYMBOL_GPL(btintel_read_version); 377 378 /* ------- REGMAP IBT SUPPORT ------- */ 379 380 #define IBT_REG_MODE_8BIT 0x00 381 #define IBT_REG_MODE_16BIT 0x01 382 #define IBT_REG_MODE_32BIT 0x02 383 384 struct regmap_ibt_context { 385 struct hci_dev *hdev; 386 __u16 op_write; 387 __u16 op_read; 388 }; 389 390 struct ibt_cp_reg_access { 391 __le32 addr; 392 __u8 mode; 393 __u8 len; 394 __u8 data[0]; 395 } __packed; 396 397 struct ibt_rp_reg_access { 398 __u8 status; 399 __le32 addr; 400 __u8 data[0]; 401 } __packed; 402 403 static int regmap_ibt_read(void *context, const void *addr, size_t reg_size, 404 void *val, size_t val_size) 405 { 406 struct regmap_ibt_context *ctx = context; 407 struct ibt_cp_reg_access cp; 408 struct ibt_rp_reg_access *rp; 409 struct sk_buff *skb; 410 int err = 0; 411 412 if (reg_size != sizeof(__le32)) 413 return -EINVAL; 414 415 switch (val_size) { 416 case 1: 417 cp.mode = IBT_REG_MODE_8BIT; 418 break; 419 case 2: 420 cp.mode = IBT_REG_MODE_16BIT; 421 break; 422 case 4: 423 cp.mode = IBT_REG_MODE_32BIT; 424 break; 425 default: 426 return -EINVAL; 427 } 428 429 /* regmap provides a little-endian formatted addr */ 430 cp.addr = *(__le32 *)addr; 431 cp.len = val_size; 432 433 bt_dev_dbg(ctx->hdev, "Register (0x%x) read", le32_to_cpu(cp.addr)); 434 435 skb = hci_cmd_sync(ctx->hdev, ctx->op_read, sizeof(cp), &cp, 436 HCI_CMD_TIMEOUT); 437 if (IS_ERR(skb)) { 438 err = PTR_ERR(skb); 439 bt_dev_err(ctx->hdev, "regmap: Register (0x%x) read error (%d)", 440 le32_to_cpu(cp.addr), err); 441 return err; 442 } 443 444 if (skb->len != sizeof(*rp) + val_size) { 445 bt_dev_err(ctx->hdev, "regmap: Register (0x%x) read error, bad len", 446 le32_to_cpu(cp.addr)); 447 err = -EINVAL; 448 goto done; 449 } 450 451 rp = (struct ibt_rp_reg_access *)skb->data; 452 453 if (rp->addr != cp.addr) { 454 bt_dev_err(ctx->hdev, "regmap: Register (0x%x) read error, bad addr", 455 le32_to_cpu(rp->addr)); 456 err = -EINVAL; 457 goto done; 458 } 459 460 memcpy(val, rp->data, val_size); 461 462 done: 463 kfree_skb(skb); 464 return err; 465 } 466 467 static int regmap_ibt_gather_write(void *context, 468 const void *addr, size_t reg_size, 469 const void *val, size_t val_size) 470 { 471 struct regmap_ibt_context *ctx = context; 472 struct ibt_cp_reg_access *cp; 473 struct sk_buff *skb; 474 int plen = sizeof(*cp) + val_size; 475 u8 mode; 476 int err = 0; 477 478 if (reg_size != sizeof(__le32)) 479 return -EINVAL; 480 481 switch (val_size) { 482 case 1: 483 mode = IBT_REG_MODE_8BIT; 484 break; 485 case 2: 486 mode = IBT_REG_MODE_16BIT; 487 break; 488 case 4: 489 mode = IBT_REG_MODE_32BIT; 490 break; 491 default: 492 return -EINVAL; 493 } 494 495 cp = kmalloc(plen, GFP_KERNEL); 496 if (!cp) 497 return -ENOMEM; 498 499 /* regmap provides a little-endian formatted addr/value */ 500 cp->addr = *(__le32 *)addr; 501 cp->mode = mode; 502 cp->len = val_size; 503 memcpy(&cp->data, val, val_size); 504 505 bt_dev_dbg(ctx->hdev, "Register (0x%x) write", le32_to_cpu(cp->addr)); 506 507 skb = hci_cmd_sync(ctx->hdev, ctx->op_write, plen, cp, HCI_CMD_TIMEOUT); 508 if (IS_ERR(skb)) { 509 err = PTR_ERR(skb); 510 bt_dev_err(ctx->hdev, "regmap: Register (0x%x) write error (%d)", 511 le32_to_cpu(cp->addr), err); 512 goto done; 513 } 514 kfree_skb(skb); 515 516 done: 517 kfree(cp); 518 return err; 519 } 520 521 static int regmap_ibt_write(void *context, const void *data, size_t count) 522 { 523 /* data contains register+value, since we only support 32bit addr, 524 * minimum data size is 4 bytes. 525 */ 526 if (WARN_ONCE(count < 4, "Invalid register access")) 527 return -EINVAL; 528 529 return regmap_ibt_gather_write(context, data, 4, data + 4, count - 4); 530 } 531 532 static void regmap_ibt_free_context(void *context) 533 { 534 kfree(context); 535 } 536 537 static struct regmap_bus regmap_ibt = { 538 .read = regmap_ibt_read, 539 .write = regmap_ibt_write, 540 .gather_write = regmap_ibt_gather_write, 541 .free_context = regmap_ibt_free_context, 542 .reg_format_endian_default = REGMAP_ENDIAN_LITTLE, 543 .val_format_endian_default = REGMAP_ENDIAN_LITTLE, 544 }; 545 546 /* Config is the same for all register regions */ 547 static const struct regmap_config regmap_ibt_cfg = { 548 .name = "btintel_regmap", 549 .reg_bits = 32, 550 .val_bits = 32, 551 }; 552 553 struct regmap *btintel_regmap_init(struct hci_dev *hdev, u16 opcode_read, 554 u16 opcode_write) 555 { 556 struct regmap_ibt_context *ctx; 557 558 bt_dev_info(hdev, "regmap: Init R%x-W%x region", opcode_read, 559 opcode_write); 560 561 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); 562 if (!ctx) 563 return ERR_PTR(-ENOMEM); 564 565 ctx->op_read = opcode_read; 566 ctx->op_write = opcode_write; 567 ctx->hdev = hdev; 568 569 return regmap_init(&hdev->dev, ®map_ibt, ctx, ®map_ibt_cfg); 570 } 571 EXPORT_SYMBOL_GPL(btintel_regmap_init); 572 573 int btintel_send_intel_reset(struct hci_dev *hdev, u32 boot_param) 574 { 575 struct intel_reset params = { 0x00, 0x01, 0x00, 0x01, 0x00000000 }; 576 struct sk_buff *skb; 577 578 params.boot_param = cpu_to_le32(boot_param); 579 580 skb = __hci_cmd_sync(hdev, 0xfc01, sizeof(params), ¶ms, 581 HCI_INIT_TIMEOUT); 582 if (IS_ERR(skb)) { 583 bt_dev_err(hdev, "Failed to send Intel Reset command"); 584 return PTR_ERR(skb); 585 } 586 587 kfree_skb(skb); 588 589 return 0; 590 } 591 EXPORT_SYMBOL_GPL(btintel_send_intel_reset); 592 593 int btintel_read_boot_params(struct hci_dev *hdev, 594 struct intel_boot_params *params) 595 { 596 struct sk_buff *skb; 597 598 skb = __hci_cmd_sync(hdev, 0xfc0d, 0, NULL, HCI_INIT_TIMEOUT); 599 if (IS_ERR(skb)) { 600 bt_dev_err(hdev, "Reading Intel boot parameters failed (%ld)", 601 PTR_ERR(skb)); 602 return PTR_ERR(skb); 603 } 604 605 if (skb->len != sizeof(*params)) { 606 bt_dev_err(hdev, "Intel boot parameters size mismatch"); 607 kfree_skb(skb); 608 return -EILSEQ; 609 } 610 611 memcpy(params, skb->data, sizeof(*params)); 612 613 kfree_skb(skb); 614 615 if (params->status) { 616 bt_dev_err(hdev, "Intel boot parameters command failed (%02x)", 617 params->status); 618 return -bt_to_errno(params->status); 619 } 620 621 bt_dev_info(hdev, "Device revision is %u", 622 le16_to_cpu(params->dev_revid)); 623 624 bt_dev_info(hdev, "Secure boot is %s", 625 params->secure_boot ? "enabled" : "disabled"); 626 627 bt_dev_info(hdev, "OTP lock is %s", 628 params->otp_lock ? "enabled" : "disabled"); 629 630 bt_dev_info(hdev, "API lock is %s", 631 params->api_lock ? "enabled" : "disabled"); 632 633 bt_dev_info(hdev, "Debug lock is %s", 634 params->debug_lock ? "enabled" : "disabled"); 635 636 bt_dev_info(hdev, "Minimum firmware build %u week %u %u", 637 params->min_fw_build_nn, params->min_fw_build_cw, 638 2000 + params->min_fw_build_yy); 639 640 return 0; 641 } 642 EXPORT_SYMBOL_GPL(btintel_read_boot_params); 643 644 int btintel_download_firmware(struct hci_dev *hdev, const struct firmware *fw, 645 u32 *boot_param) 646 { 647 int err; 648 const u8 *fw_ptr; 649 u32 frag_len; 650 651 /* Start the firmware download transaction with the Init fragment 652 * represented by the 128 bytes of CSS header. 653 */ 654 err = btintel_secure_send(hdev, 0x00, 128, fw->data); 655 if (err < 0) { 656 bt_dev_err(hdev, "Failed to send firmware header (%d)", err); 657 goto done; 658 } 659 660 /* Send the 256 bytes of public key information from the firmware 661 * as the PKey fragment. 662 */ 663 err = btintel_secure_send(hdev, 0x03, 256, fw->data + 128); 664 if (err < 0) { 665 bt_dev_err(hdev, "Failed to send firmware pkey (%d)", err); 666 goto done; 667 } 668 669 /* Send the 256 bytes of signature information from the firmware 670 * as the Sign fragment. 671 */ 672 err = btintel_secure_send(hdev, 0x02, 256, fw->data + 388); 673 if (err < 0) { 674 bt_dev_err(hdev, "Failed to send firmware signature (%d)", err); 675 goto done; 676 } 677 678 fw_ptr = fw->data + 644; 679 frag_len = 0; 680 681 while (fw_ptr - fw->data < fw->size) { 682 struct hci_command_hdr *cmd = (void *)(fw_ptr + frag_len); 683 684 /* Each SKU has a different reset parameter to use in the 685 * HCI_Intel_Reset command and it is embedded in the firmware 686 * data. So, instead of using static value per SKU, check 687 * the firmware data and save it for later use. 688 */ 689 if (le16_to_cpu(cmd->opcode) == 0xfc0e) { 690 /* The boot parameter is the first 32-bit value 691 * and rest of 3 octets are reserved. 692 */ 693 *boot_param = get_unaligned_le32(fw_ptr + sizeof(*cmd)); 694 695 bt_dev_dbg(hdev, "boot_param=0x%x", *boot_param); 696 } 697 698 frag_len += sizeof(*cmd) + cmd->plen; 699 700 /* The parameter length of the secure send command requires 701 * a 4 byte alignment. It happens so that the firmware file 702 * contains proper Intel_NOP commands to align the fragments 703 * as needed. 704 * 705 * Send set of commands with 4 byte alignment from the 706 * firmware data buffer as a single Data fragement. 707 */ 708 if (!(frag_len % 4)) { 709 err = btintel_secure_send(hdev, 0x01, frag_len, fw_ptr); 710 if (err < 0) { 711 bt_dev_err(hdev, 712 "Failed to send firmware data (%d)", 713 err); 714 goto done; 715 } 716 717 fw_ptr += frag_len; 718 frag_len = 0; 719 } 720 } 721 722 done: 723 return err; 724 } 725 EXPORT_SYMBOL_GPL(btintel_download_firmware); 726 727 MODULE_AUTHOR("Marcel Holtmann <marcel@holtmann.org>"); 728 MODULE_DESCRIPTION("Bluetooth support for Intel devices ver " VERSION); 729 MODULE_VERSION(VERSION); 730 MODULE_LICENSE("GPL"); 731 MODULE_FIRMWARE("intel/ibt-11-5.sfi"); 732 MODULE_FIRMWARE("intel/ibt-11-5.ddc"); 733 MODULE_FIRMWARE("intel/ibt-12-16.sfi"); 734 MODULE_FIRMWARE("intel/ibt-12-16.ddc"); 735