1 /* 2 * Driver for the SWIM3 (Super Woz Integrated Machine 3) 3 * floppy controller found on Power Macintoshes. 4 * 5 * Copyright (C) 1996 Paul Mackerras. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 /* 14 * TODO: 15 * handle 2 drives 16 * handle GCR disks 17 */ 18 19 #include <linux/stddef.h> 20 #include <linux/kernel.h> 21 #include <linux/sched.h> 22 #include <linux/timer.h> 23 #include <linux/delay.h> 24 #include <linux/fd.h> 25 #include <linux/ioctl.h> 26 #include <linux/blkdev.h> 27 #include <linux/interrupt.h> 28 #include <linux/mutex.h> 29 #include <linux/module.h> 30 #include <linux/spinlock.h> 31 #include <asm/io.h> 32 #include <asm/dbdma.h> 33 #include <asm/prom.h> 34 #include <asm/uaccess.h> 35 #include <asm/mediabay.h> 36 #include <asm/machdep.h> 37 #include <asm/pmac_feature.h> 38 39 static DEFINE_MUTEX(swim3_mutex); 40 static struct request_queue *swim3_queue; 41 static struct gendisk *disks[2]; 42 static struct request *fd_req; 43 44 #define MAX_FLOPPIES 2 45 46 enum swim_state { 47 idle, 48 locating, 49 seeking, 50 settling, 51 do_transfer, 52 jogging, 53 available, 54 revalidating, 55 ejecting 56 }; 57 58 #define REG(x) unsigned char x; char x ## _pad[15]; 59 60 /* 61 * The names for these registers mostly represent speculation on my part. 62 * It will be interesting to see how close they are to the names Apple uses. 63 */ 64 struct swim3 { 65 REG(data); 66 REG(timer); /* counts down at 1MHz */ 67 REG(error); 68 REG(mode); 69 REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */ 70 REG(setup); 71 REG(control); /* writing bits clears them */ 72 REG(status); /* writing bits sets them in control */ 73 REG(intr); 74 REG(nseek); /* # tracks to seek */ 75 REG(ctrack); /* current track number */ 76 REG(csect); /* current sector number */ 77 REG(gap3); /* size of gap 3 in track format */ 78 REG(sector); /* sector # to read or write */ 79 REG(nsect); /* # sectors to read or write */ 80 REG(intr_enable); 81 }; 82 83 #define control_bic control 84 #define control_bis status 85 86 /* Bits in select register */ 87 #define CA_MASK 7 88 #define LSTRB 8 89 90 /* Bits in control register */ 91 #define DO_SEEK 0x80 92 #define FORMAT 0x40 93 #define SELECT 0x20 94 #define WRITE_SECTORS 0x10 95 #define DO_ACTION 0x08 96 #define DRIVE2_ENABLE 0x04 97 #define DRIVE_ENABLE 0x02 98 #define INTR_ENABLE 0x01 99 100 /* Bits in status register */ 101 #define FIFO_1BYTE 0x80 102 #define FIFO_2BYTE 0x40 103 #define ERROR 0x20 104 #define DATA 0x08 105 #define RDDATA 0x04 106 #define INTR_PENDING 0x02 107 #define MARK_BYTE 0x01 108 109 /* Bits in intr and intr_enable registers */ 110 #define ERROR_INTR 0x20 111 #define DATA_CHANGED 0x10 112 #define TRANSFER_DONE 0x08 113 #define SEEN_SECTOR 0x04 114 #define SEEK_DONE 0x02 115 #define TIMER_DONE 0x01 116 117 /* Bits in error register */ 118 #define ERR_DATA_CRC 0x80 119 #define ERR_ADDR_CRC 0x40 120 #define ERR_OVERRUN 0x04 121 #define ERR_UNDERRUN 0x01 122 123 /* Bits in setup register */ 124 #define S_SW_RESET 0x80 125 #define S_GCR_WRITE 0x40 126 #define S_IBM_DRIVE 0x20 127 #define S_TEST_MODE 0x10 128 #define S_FCLK_DIV2 0x08 129 #define S_GCR 0x04 130 #define S_COPY_PROT 0x02 131 #define S_INV_WDATA 0x01 132 133 /* Select values for swim3_action */ 134 #define SEEK_POSITIVE 0 135 #define SEEK_NEGATIVE 4 136 #define STEP 1 137 #define MOTOR_ON 2 138 #define MOTOR_OFF 6 139 #define INDEX 3 140 #define EJECT 7 141 #define SETMFM 9 142 #define SETGCR 13 143 144 /* Select values for swim3_select and swim3_readbit */ 145 #define STEP_DIR 0 146 #define STEPPING 1 147 #define MOTOR_ON 2 148 #define RELAX 3 /* also eject in progress */ 149 #define READ_DATA_0 4 150 #define TWOMEG_DRIVE 5 151 #define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */ 152 #define DRIVE_PRESENT 7 153 #define DISK_IN 8 154 #define WRITE_PROT 9 155 #define TRACK_ZERO 10 156 #define TACHO 11 157 #define READ_DATA_1 12 158 #define MFM_MODE 13 159 #define SEEK_COMPLETE 14 160 #define ONEMEG_MEDIA 15 161 162 /* Definitions of values used in writing and formatting */ 163 #define DATA_ESCAPE 0x99 164 #define GCR_SYNC_EXC 0x3f 165 #define GCR_SYNC_CONV 0x80 166 #define GCR_FIRST_MARK 0xd5 167 #define GCR_SECOND_MARK 0xaa 168 #define GCR_ADDR_MARK "\xd5\xaa\x00" 169 #define GCR_DATA_MARK "\xd5\xaa\x0b" 170 #define GCR_SLIP_BYTE "\x27\xaa" 171 #define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f" 172 173 #define DATA_99 "\x99\x99" 174 #define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe" 175 #define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc" 176 #define MFM_GAP_LEN 12 177 178 struct floppy_state { 179 enum swim_state state; 180 spinlock_t lock; 181 struct swim3 __iomem *swim3; /* hardware registers */ 182 struct dbdma_regs __iomem *dma; /* DMA controller registers */ 183 int swim3_intr; /* interrupt number for SWIM3 */ 184 int dma_intr; /* interrupt number for DMA channel */ 185 int cur_cyl; /* cylinder head is on, or -1 */ 186 int cur_sector; /* last sector we saw go past */ 187 int req_cyl; /* the cylinder for the current r/w request */ 188 int head; /* head number ditto */ 189 int req_sector; /* sector number ditto */ 190 int scount; /* # sectors we're transferring at present */ 191 int retries; 192 int settle_time; 193 int secpercyl; /* disk geometry information */ 194 int secpertrack; 195 int total_secs; 196 int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */ 197 struct dbdma_cmd *dma_cmd; 198 int ref_count; 199 int expect_cyl; 200 struct timer_list timeout; 201 int timeout_pending; 202 int ejected; 203 wait_queue_head_t wait; 204 int wanted; 205 struct macio_dev *mdev; 206 char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)]; 207 }; 208 209 static struct floppy_state floppy_states[MAX_FLOPPIES]; 210 static int floppy_count = 0; 211 static DEFINE_SPINLOCK(swim3_lock); 212 213 static unsigned short write_preamble[] = { 214 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */ 215 0, 0, 0, 0, 0, 0, /* sync field */ 216 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */ 217 0x990f /* no escape for 512 bytes */ 218 }; 219 220 static unsigned short write_postamble[] = { 221 0x9904, /* insert CRC */ 222 0x4e4e, 0x4e4e, 223 0x9908, /* stop writing */ 224 0, 0, 0, 0, 0, 0 225 }; 226 227 static void swim3_select(struct floppy_state *fs, int sel); 228 static void swim3_action(struct floppy_state *fs, int action); 229 static int swim3_readbit(struct floppy_state *fs, int bit); 230 static void do_fd_request(struct request_queue * q); 231 static void start_request(struct floppy_state *fs); 232 static void set_timeout(struct floppy_state *fs, int nticks, 233 void (*proc)(unsigned long)); 234 static void scan_track(struct floppy_state *fs); 235 static void seek_track(struct floppy_state *fs, int n); 236 static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count); 237 static void setup_transfer(struct floppy_state *fs); 238 static void act(struct floppy_state *fs); 239 static void scan_timeout(unsigned long data); 240 static void seek_timeout(unsigned long data); 241 static void settle_timeout(unsigned long data); 242 static void xfer_timeout(unsigned long data); 243 static irqreturn_t swim3_interrupt(int irq, void *dev_id); 244 /*static void fd_dma_interrupt(int irq, void *dev_id);*/ 245 static int grab_drive(struct floppy_state *fs, enum swim_state state, 246 int interruptible); 247 static void release_drive(struct floppy_state *fs); 248 static int fd_eject(struct floppy_state *fs); 249 static int floppy_ioctl(struct block_device *bdev, fmode_t mode, 250 unsigned int cmd, unsigned long param); 251 static int floppy_open(struct block_device *bdev, fmode_t mode); 252 static int floppy_release(struct gendisk *disk, fmode_t mode); 253 static int floppy_check_change(struct gendisk *disk); 254 static int floppy_revalidate(struct gendisk *disk); 255 256 static bool swim3_end_request(int err, unsigned int nr_bytes) 257 { 258 if (__blk_end_request(fd_req, err, nr_bytes)) 259 return true; 260 261 fd_req = NULL; 262 return false; 263 } 264 265 static bool swim3_end_request_cur(int err) 266 { 267 return swim3_end_request(err, blk_rq_cur_bytes(fd_req)); 268 } 269 270 static void swim3_select(struct floppy_state *fs, int sel) 271 { 272 struct swim3 __iomem *sw = fs->swim3; 273 274 out_8(&sw->select, RELAX); 275 if (sel & 8) 276 out_8(&sw->control_bis, SELECT); 277 else 278 out_8(&sw->control_bic, SELECT); 279 out_8(&sw->select, sel & CA_MASK); 280 } 281 282 static void swim3_action(struct floppy_state *fs, int action) 283 { 284 struct swim3 __iomem *sw = fs->swim3; 285 286 swim3_select(fs, action); 287 udelay(1); 288 out_8(&sw->select, sw->select | LSTRB); 289 udelay(2); 290 out_8(&sw->select, sw->select & ~LSTRB); 291 udelay(1); 292 } 293 294 static int swim3_readbit(struct floppy_state *fs, int bit) 295 { 296 struct swim3 __iomem *sw = fs->swim3; 297 int stat; 298 299 swim3_select(fs, bit); 300 udelay(1); 301 stat = in_8(&sw->status); 302 return (stat & DATA) == 0; 303 } 304 305 static void do_fd_request(struct request_queue * q) 306 { 307 int i; 308 309 for(i=0; i<floppy_count; i++) { 310 struct floppy_state *fs = &floppy_states[i]; 311 if (fs->mdev->media_bay && 312 check_media_bay(fs->mdev->media_bay) != MB_FD) 313 continue; 314 start_request(fs); 315 } 316 } 317 318 static void start_request(struct floppy_state *fs) 319 { 320 struct request *req; 321 unsigned long x; 322 323 if (fs->state == idle && fs->wanted) { 324 fs->state = available; 325 wake_up(&fs->wait); 326 return; 327 } 328 while (fs->state == idle) { 329 if (!fd_req) { 330 fd_req = blk_fetch_request(swim3_queue); 331 if (!fd_req) 332 break; 333 } 334 req = fd_req; 335 #if 0 336 printk("do_fd_req: dev=%s cmd=%d sec=%ld nr_sec=%u buf=%p\n", 337 req->rq_disk->disk_name, req->cmd, 338 (long)blk_rq_pos(req), blk_rq_sectors(req), req->buffer); 339 printk(" errors=%d current_nr_sectors=%u\n", 340 req->errors, blk_rq_cur_sectors(req)); 341 #endif 342 343 if (blk_rq_pos(req) >= fs->total_secs) { 344 swim3_end_request_cur(-EIO); 345 continue; 346 } 347 if (fs->ejected) { 348 swim3_end_request_cur(-EIO); 349 continue; 350 } 351 352 if (rq_data_dir(req) == WRITE) { 353 if (fs->write_prot < 0) 354 fs->write_prot = swim3_readbit(fs, WRITE_PROT); 355 if (fs->write_prot) { 356 swim3_end_request_cur(-EIO); 357 continue; 358 } 359 } 360 361 /* Do not remove the cast. blk_rq_pos(req) is now a 362 * sector_t and can be 64 bits, but it will never go 363 * past 32 bits for this driver anyway, so we can 364 * safely cast it down and not have to do a 64/32 365 * division 366 */ 367 fs->req_cyl = ((long)blk_rq_pos(req)) / fs->secpercyl; 368 x = ((long)blk_rq_pos(req)) % fs->secpercyl; 369 fs->head = x / fs->secpertrack; 370 fs->req_sector = x % fs->secpertrack + 1; 371 fd_req = req; 372 fs->state = do_transfer; 373 fs->retries = 0; 374 375 act(fs); 376 } 377 } 378 379 static void set_timeout(struct floppy_state *fs, int nticks, 380 void (*proc)(unsigned long)) 381 { 382 unsigned long flags; 383 384 spin_lock_irqsave(&fs->lock, flags); 385 if (fs->timeout_pending) 386 del_timer(&fs->timeout); 387 fs->timeout.expires = jiffies + nticks; 388 fs->timeout.function = proc; 389 fs->timeout.data = (unsigned long) fs; 390 add_timer(&fs->timeout); 391 fs->timeout_pending = 1; 392 spin_unlock_irqrestore(&fs->lock, flags); 393 } 394 395 static inline void scan_track(struct floppy_state *fs) 396 { 397 struct swim3 __iomem *sw = fs->swim3; 398 399 swim3_select(fs, READ_DATA_0); 400 in_8(&sw->intr); /* clear SEEN_SECTOR bit */ 401 in_8(&sw->error); 402 out_8(&sw->intr_enable, SEEN_SECTOR); 403 out_8(&sw->control_bis, DO_ACTION); 404 /* enable intr when track found */ 405 set_timeout(fs, HZ, scan_timeout); /* enable timeout */ 406 } 407 408 static inline void seek_track(struct floppy_state *fs, int n) 409 { 410 struct swim3 __iomem *sw = fs->swim3; 411 412 if (n >= 0) { 413 swim3_action(fs, SEEK_POSITIVE); 414 sw->nseek = n; 415 } else { 416 swim3_action(fs, SEEK_NEGATIVE); 417 sw->nseek = -n; 418 } 419 fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1; 420 swim3_select(fs, STEP); 421 in_8(&sw->error); 422 /* enable intr when seek finished */ 423 out_8(&sw->intr_enable, SEEK_DONE); 424 out_8(&sw->control_bis, DO_SEEK); 425 set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */ 426 fs->settle_time = 0; 427 } 428 429 static inline void init_dma(struct dbdma_cmd *cp, int cmd, 430 void *buf, int count) 431 { 432 st_le16(&cp->req_count, count); 433 st_le16(&cp->command, cmd); 434 st_le32(&cp->phy_addr, virt_to_bus(buf)); 435 cp->xfer_status = 0; 436 } 437 438 static inline void setup_transfer(struct floppy_state *fs) 439 { 440 int n; 441 struct swim3 __iomem *sw = fs->swim3; 442 struct dbdma_cmd *cp = fs->dma_cmd; 443 struct dbdma_regs __iomem *dr = fs->dma; 444 445 if (blk_rq_cur_sectors(fd_req) <= 0) { 446 printk(KERN_ERR "swim3: transfer 0 sectors?\n"); 447 return; 448 } 449 if (rq_data_dir(fd_req) == WRITE) 450 n = 1; 451 else { 452 n = fs->secpertrack - fs->req_sector + 1; 453 if (n > blk_rq_cur_sectors(fd_req)) 454 n = blk_rq_cur_sectors(fd_req); 455 } 456 fs->scount = n; 457 swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0); 458 out_8(&sw->sector, fs->req_sector); 459 out_8(&sw->nsect, n); 460 out_8(&sw->gap3, 0); 461 out_le32(&dr->cmdptr, virt_to_bus(cp)); 462 if (rq_data_dir(fd_req) == WRITE) { 463 /* Set up 3 dma commands: write preamble, data, postamble */ 464 init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble)); 465 ++cp; 466 init_dma(cp, OUTPUT_MORE, fd_req->buffer, 512); 467 ++cp; 468 init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble)); 469 } else { 470 init_dma(cp, INPUT_LAST, fd_req->buffer, n * 512); 471 } 472 ++cp; 473 out_le16(&cp->command, DBDMA_STOP); 474 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); 475 in_8(&sw->error); 476 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); 477 if (rq_data_dir(fd_req) == WRITE) 478 out_8(&sw->control_bis, WRITE_SECTORS); 479 in_8(&sw->intr); 480 out_le32(&dr->control, (RUN << 16) | RUN); 481 /* enable intr when transfer complete */ 482 out_8(&sw->intr_enable, TRANSFER_DONE); 483 out_8(&sw->control_bis, DO_ACTION); 484 set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */ 485 } 486 487 static void act(struct floppy_state *fs) 488 { 489 for (;;) { 490 switch (fs->state) { 491 case idle: 492 return; /* XXX shouldn't get here */ 493 494 case locating: 495 if (swim3_readbit(fs, TRACK_ZERO)) { 496 fs->cur_cyl = 0; 497 if (fs->req_cyl == 0) 498 fs->state = do_transfer; 499 else 500 fs->state = seeking; 501 break; 502 } 503 scan_track(fs); 504 return; 505 506 case seeking: 507 if (fs->cur_cyl < 0) { 508 fs->expect_cyl = -1; 509 fs->state = locating; 510 break; 511 } 512 if (fs->req_cyl == fs->cur_cyl) { 513 printk("whoops, seeking 0\n"); 514 fs->state = do_transfer; 515 break; 516 } 517 seek_track(fs, fs->req_cyl - fs->cur_cyl); 518 return; 519 520 case settling: 521 /* check for SEEK_COMPLETE after 30ms */ 522 fs->settle_time = (HZ + 32) / 33; 523 set_timeout(fs, fs->settle_time, settle_timeout); 524 return; 525 526 case do_transfer: 527 if (fs->cur_cyl != fs->req_cyl) { 528 if (fs->retries > 5) { 529 swim3_end_request_cur(-EIO); 530 fs->state = idle; 531 return; 532 } 533 fs->state = seeking; 534 break; 535 } 536 setup_transfer(fs); 537 return; 538 539 case jogging: 540 seek_track(fs, -5); 541 return; 542 543 default: 544 printk(KERN_ERR"swim3: unknown state %d\n", fs->state); 545 return; 546 } 547 } 548 } 549 550 static void scan_timeout(unsigned long data) 551 { 552 struct floppy_state *fs = (struct floppy_state *) data; 553 struct swim3 __iomem *sw = fs->swim3; 554 555 fs->timeout_pending = 0; 556 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); 557 out_8(&sw->select, RELAX); 558 out_8(&sw->intr_enable, 0); 559 fs->cur_cyl = -1; 560 if (fs->retries > 5) { 561 swim3_end_request_cur(-EIO); 562 fs->state = idle; 563 start_request(fs); 564 } else { 565 fs->state = jogging; 566 act(fs); 567 } 568 } 569 570 static void seek_timeout(unsigned long data) 571 { 572 struct floppy_state *fs = (struct floppy_state *) data; 573 struct swim3 __iomem *sw = fs->swim3; 574 575 fs->timeout_pending = 0; 576 out_8(&sw->control_bic, DO_SEEK); 577 out_8(&sw->select, RELAX); 578 out_8(&sw->intr_enable, 0); 579 printk(KERN_ERR "swim3: seek timeout\n"); 580 swim3_end_request_cur(-EIO); 581 fs->state = idle; 582 start_request(fs); 583 } 584 585 static void settle_timeout(unsigned long data) 586 { 587 struct floppy_state *fs = (struct floppy_state *) data; 588 struct swim3 __iomem *sw = fs->swim3; 589 590 fs->timeout_pending = 0; 591 if (swim3_readbit(fs, SEEK_COMPLETE)) { 592 out_8(&sw->select, RELAX); 593 fs->state = locating; 594 act(fs); 595 return; 596 } 597 out_8(&sw->select, RELAX); 598 if (fs->settle_time < 2*HZ) { 599 ++fs->settle_time; 600 set_timeout(fs, 1, settle_timeout); 601 return; 602 } 603 printk(KERN_ERR "swim3: seek settle timeout\n"); 604 swim3_end_request_cur(-EIO); 605 fs->state = idle; 606 start_request(fs); 607 } 608 609 static void xfer_timeout(unsigned long data) 610 { 611 struct floppy_state *fs = (struct floppy_state *) data; 612 struct swim3 __iomem *sw = fs->swim3; 613 struct dbdma_regs __iomem *dr = fs->dma; 614 int n; 615 616 fs->timeout_pending = 0; 617 out_le32(&dr->control, RUN << 16); 618 /* We must wait a bit for dbdma to stop */ 619 for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++) 620 udelay(1); 621 out_8(&sw->intr_enable, 0); 622 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION); 623 out_8(&sw->select, RELAX); 624 printk(KERN_ERR "swim3: timeout %sing sector %ld\n", 625 (rq_data_dir(fd_req)==WRITE? "writ": "read"), 626 (long)blk_rq_pos(fd_req)); 627 swim3_end_request_cur(-EIO); 628 fs->state = idle; 629 start_request(fs); 630 } 631 632 static irqreturn_t swim3_interrupt(int irq, void *dev_id) 633 { 634 struct floppy_state *fs = (struct floppy_state *) dev_id; 635 struct swim3 __iomem *sw = fs->swim3; 636 int intr, err, n; 637 int stat, resid; 638 struct dbdma_regs __iomem *dr; 639 struct dbdma_cmd *cp; 640 641 intr = in_8(&sw->intr); 642 err = (intr & ERROR_INTR)? in_8(&sw->error): 0; 643 if ((intr & ERROR_INTR) && fs->state != do_transfer) 644 printk(KERN_ERR "swim3_interrupt, state=%d, dir=%x, intr=%x, err=%x\n", 645 fs->state, rq_data_dir(fd_req), intr, err); 646 switch (fs->state) { 647 case locating: 648 if (intr & SEEN_SECTOR) { 649 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); 650 out_8(&sw->select, RELAX); 651 out_8(&sw->intr_enable, 0); 652 del_timer(&fs->timeout); 653 fs->timeout_pending = 0; 654 if (sw->ctrack == 0xff) { 655 printk(KERN_ERR "swim3: seen sector but cyl=ff?\n"); 656 fs->cur_cyl = -1; 657 if (fs->retries > 5) { 658 swim3_end_request_cur(-EIO); 659 fs->state = idle; 660 start_request(fs); 661 } else { 662 fs->state = jogging; 663 act(fs); 664 } 665 break; 666 } 667 fs->cur_cyl = sw->ctrack; 668 fs->cur_sector = sw->csect; 669 if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl) 670 printk(KERN_ERR "swim3: expected cyl %d, got %d\n", 671 fs->expect_cyl, fs->cur_cyl); 672 fs->state = do_transfer; 673 act(fs); 674 } 675 break; 676 case seeking: 677 case jogging: 678 if (sw->nseek == 0) { 679 out_8(&sw->control_bic, DO_SEEK); 680 out_8(&sw->select, RELAX); 681 out_8(&sw->intr_enable, 0); 682 del_timer(&fs->timeout); 683 fs->timeout_pending = 0; 684 if (fs->state == seeking) 685 ++fs->retries; 686 fs->state = settling; 687 act(fs); 688 } 689 break; 690 case settling: 691 out_8(&sw->intr_enable, 0); 692 del_timer(&fs->timeout); 693 fs->timeout_pending = 0; 694 act(fs); 695 break; 696 case do_transfer: 697 if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0) 698 break; 699 out_8(&sw->intr_enable, 0); 700 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION); 701 out_8(&sw->select, RELAX); 702 del_timer(&fs->timeout); 703 fs->timeout_pending = 0; 704 dr = fs->dma; 705 cp = fs->dma_cmd; 706 if (rq_data_dir(fd_req) == WRITE) 707 ++cp; 708 /* 709 * Check that the main data transfer has finished. 710 * On writing, the swim3 sometimes doesn't use 711 * up all the bytes of the postamble, so we can still 712 * see DMA active here. That doesn't matter as long 713 * as all the sector data has been transferred. 714 */ 715 if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) { 716 /* wait a little while for DMA to complete */ 717 for (n = 0; n < 100; ++n) { 718 if (cp->xfer_status != 0) 719 break; 720 udelay(1); 721 barrier(); 722 } 723 } 724 /* turn off DMA */ 725 out_le32(&dr->control, (RUN | PAUSE) << 16); 726 stat = ld_le16(&cp->xfer_status); 727 resid = ld_le16(&cp->res_count); 728 if (intr & ERROR_INTR) { 729 n = fs->scount - 1 - resid / 512; 730 if (n > 0) { 731 blk_update_request(fd_req, 0, n << 9); 732 fs->req_sector += n; 733 } 734 if (fs->retries < 5) { 735 ++fs->retries; 736 act(fs); 737 } else { 738 printk("swim3: error %sing block %ld (err=%x)\n", 739 rq_data_dir(fd_req) == WRITE? "writ": "read", 740 (long)blk_rq_pos(fd_req), err); 741 swim3_end_request_cur(-EIO); 742 fs->state = idle; 743 } 744 } else { 745 if ((stat & ACTIVE) == 0 || resid != 0) { 746 /* musta been an error */ 747 printk(KERN_ERR "swim3: fd dma: stat=%x resid=%d\n", stat, resid); 748 printk(KERN_ERR " state=%d, dir=%x, intr=%x, err=%x\n", 749 fs->state, rq_data_dir(fd_req), intr, err); 750 swim3_end_request_cur(-EIO); 751 fs->state = idle; 752 start_request(fs); 753 break; 754 } 755 if (swim3_end_request(0, fs->scount << 9)) { 756 fs->req_sector += fs->scount; 757 if (fs->req_sector > fs->secpertrack) { 758 fs->req_sector -= fs->secpertrack; 759 if (++fs->head > 1) { 760 fs->head = 0; 761 ++fs->req_cyl; 762 } 763 } 764 act(fs); 765 } else 766 fs->state = idle; 767 } 768 if (fs->state == idle) 769 start_request(fs); 770 break; 771 default: 772 printk(KERN_ERR "swim3: don't know what to do in state %d\n", fs->state); 773 } 774 return IRQ_HANDLED; 775 } 776 777 /* 778 static void fd_dma_interrupt(int irq, void *dev_id) 779 { 780 } 781 */ 782 783 static int grab_drive(struct floppy_state *fs, enum swim_state state, 784 int interruptible) 785 { 786 unsigned long flags; 787 788 spin_lock_irqsave(&fs->lock, flags); 789 if (fs->state != idle) { 790 ++fs->wanted; 791 while (fs->state != available) { 792 if (interruptible && signal_pending(current)) { 793 --fs->wanted; 794 spin_unlock_irqrestore(&fs->lock, flags); 795 return -EINTR; 796 } 797 interruptible_sleep_on(&fs->wait); 798 } 799 --fs->wanted; 800 } 801 fs->state = state; 802 spin_unlock_irqrestore(&fs->lock, flags); 803 return 0; 804 } 805 806 static void release_drive(struct floppy_state *fs) 807 { 808 unsigned long flags; 809 810 spin_lock_irqsave(&fs->lock, flags); 811 fs->state = idle; 812 start_request(fs); 813 spin_unlock_irqrestore(&fs->lock, flags); 814 } 815 816 static int fd_eject(struct floppy_state *fs) 817 { 818 int err, n; 819 820 err = grab_drive(fs, ejecting, 1); 821 if (err) 822 return err; 823 swim3_action(fs, EJECT); 824 for (n = 20; n > 0; --n) { 825 if (signal_pending(current)) { 826 err = -EINTR; 827 break; 828 } 829 swim3_select(fs, RELAX); 830 schedule_timeout_interruptible(1); 831 if (swim3_readbit(fs, DISK_IN) == 0) 832 break; 833 } 834 swim3_select(fs, RELAX); 835 udelay(150); 836 fs->ejected = 1; 837 release_drive(fs); 838 return err; 839 } 840 841 static struct floppy_struct floppy_type = 842 { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */ 843 844 static int floppy_locked_ioctl(struct block_device *bdev, fmode_t mode, 845 unsigned int cmd, unsigned long param) 846 { 847 struct floppy_state *fs = bdev->bd_disk->private_data; 848 int err; 849 850 if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN)) 851 return -EPERM; 852 853 if (fs->mdev->media_bay && 854 check_media_bay(fs->mdev->media_bay) != MB_FD) 855 return -ENXIO; 856 857 switch (cmd) { 858 case FDEJECT: 859 if (fs->ref_count != 1) 860 return -EBUSY; 861 err = fd_eject(fs); 862 return err; 863 case FDGETPRM: 864 if (copy_to_user((void __user *) param, &floppy_type, 865 sizeof(struct floppy_struct))) 866 return -EFAULT; 867 return 0; 868 } 869 return -ENOTTY; 870 } 871 872 static int floppy_ioctl(struct block_device *bdev, fmode_t mode, 873 unsigned int cmd, unsigned long param) 874 { 875 int ret; 876 877 mutex_lock(&swim3_mutex); 878 ret = floppy_locked_ioctl(bdev, mode, cmd, param); 879 mutex_unlock(&swim3_mutex); 880 881 return ret; 882 } 883 884 static int floppy_open(struct block_device *bdev, fmode_t mode) 885 { 886 struct floppy_state *fs = bdev->bd_disk->private_data; 887 struct swim3 __iomem *sw = fs->swim3; 888 int n, err = 0; 889 890 if (fs->ref_count == 0) { 891 if (fs->mdev->media_bay && 892 check_media_bay(fs->mdev->media_bay) != MB_FD) 893 return -ENXIO; 894 out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2); 895 out_8(&sw->control_bic, 0xff); 896 out_8(&sw->mode, 0x95); 897 udelay(10); 898 out_8(&sw->intr_enable, 0); 899 out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE); 900 swim3_action(fs, MOTOR_ON); 901 fs->write_prot = -1; 902 fs->cur_cyl = -1; 903 for (n = 0; n < 2 * HZ; ++n) { 904 if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE)) 905 break; 906 if (signal_pending(current)) { 907 err = -EINTR; 908 break; 909 } 910 swim3_select(fs, RELAX); 911 schedule_timeout_interruptible(1); 912 } 913 if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0 914 || swim3_readbit(fs, DISK_IN) == 0)) 915 err = -ENXIO; 916 swim3_action(fs, SETMFM); 917 swim3_select(fs, RELAX); 918 919 } else if (fs->ref_count == -1 || mode & FMODE_EXCL) 920 return -EBUSY; 921 922 if (err == 0 && (mode & FMODE_NDELAY) == 0 923 && (mode & (FMODE_READ|FMODE_WRITE))) { 924 check_disk_change(bdev); 925 if (fs->ejected) 926 err = -ENXIO; 927 } 928 929 if (err == 0 && (mode & FMODE_WRITE)) { 930 if (fs->write_prot < 0) 931 fs->write_prot = swim3_readbit(fs, WRITE_PROT); 932 if (fs->write_prot) 933 err = -EROFS; 934 } 935 936 if (err) { 937 if (fs->ref_count == 0) { 938 swim3_action(fs, MOTOR_OFF); 939 out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE); 940 swim3_select(fs, RELAX); 941 } 942 return err; 943 } 944 945 if (mode & FMODE_EXCL) 946 fs->ref_count = -1; 947 else 948 ++fs->ref_count; 949 950 return 0; 951 } 952 953 static int floppy_unlocked_open(struct block_device *bdev, fmode_t mode) 954 { 955 int ret; 956 957 mutex_lock(&swim3_mutex); 958 ret = floppy_open(bdev, mode); 959 mutex_unlock(&swim3_mutex); 960 961 return ret; 962 } 963 964 static int floppy_release(struct gendisk *disk, fmode_t mode) 965 { 966 struct floppy_state *fs = disk->private_data; 967 struct swim3 __iomem *sw = fs->swim3; 968 mutex_lock(&swim3_mutex); 969 if (fs->ref_count > 0 && --fs->ref_count == 0) { 970 swim3_action(fs, MOTOR_OFF); 971 out_8(&sw->control_bic, 0xff); 972 swim3_select(fs, RELAX); 973 } 974 mutex_unlock(&swim3_mutex); 975 return 0; 976 } 977 978 static int floppy_check_change(struct gendisk *disk) 979 { 980 struct floppy_state *fs = disk->private_data; 981 return fs->ejected; 982 } 983 984 static int floppy_revalidate(struct gendisk *disk) 985 { 986 struct floppy_state *fs = disk->private_data; 987 struct swim3 __iomem *sw; 988 int ret, n; 989 990 if (fs->mdev->media_bay && 991 check_media_bay(fs->mdev->media_bay) != MB_FD) 992 return -ENXIO; 993 994 sw = fs->swim3; 995 grab_drive(fs, revalidating, 0); 996 out_8(&sw->intr_enable, 0); 997 out_8(&sw->control_bis, DRIVE_ENABLE); 998 swim3_action(fs, MOTOR_ON); /* necessary? */ 999 fs->write_prot = -1; 1000 fs->cur_cyl = -1; 1001 mdelay(1); 1002 for (n = HZ; n > 0; --n) { 1003 if (swim3_readbit(fs, SEEK_COMPLETE)) 1004 break; 1005 if (signal_pending(current)) 1006 break; 1007 swim3_select(fs, RELAX); 1008 schedule_timeout_interruptible(1); 1009 } 1010 ret = swim3_readbit(fs, SEEK_COMPLETE) == 0 1011 || swim3_readbit(fs, DISK_IN) == 0; 1012 if (ret) 1013 swim3_action(fs, MOTOR_OFF); 1014 else { 1015 fs->ejected = 0; 1016 swim3_action(fs, SETMFM); 1017 } 1018 swim3_select(fs, RELAX); 1019 1020 release_drive(fs); 1021 return ret; 1022 } 1023 1024 static const struct block_device_operations floppy_fops = { 1025 .open = floppy_unlocked_open, 1026 .release = floppy_release, 1027 .ioctl = floppy_ioctl, 1028 .media_changed = floppy_check_change, 1029 .revalidate_disk= floppy_revalidate, 1030 }; 1031 1032 static int swim3_add_device(struct macio_dev *mdev, int index) 1033 { 1034 struct device_node *swim = mdev->ofdev.dev.of_node; 1035 struct floppy_state *fs = &floppy_states[index]; 1036 int rc = -EBUSY; 1037 1038 /* Check & Request resources */ 1039 if (macio_resource_count(mdev) < 2) { 1040 printk(KERN_WARNING "ifd%d: no address for %s\n", 1041 index, swim->full_name); 1042 return -ENXIO; 1043 } 1044 if (macio_irq_count(mdev) < 2) { 1045 printk(KERN_WARNING "fd%d: no intrs for device %s\n", 1046 index, swim->full_name); 1047 } 1048 if (macio_request_resource(mdev, 0, "swim3 (mmio)")) { 1049 printk(KERN_ERR "fd%d: can't request mmio resource for %s\n", 1050 index, swim->full_name); 1051 return -EBUSY; 1052 } 1053 if (macio_request_resource(mdev, 1, "swim3 (dma)")) { 1054 printk(KERN_ERR "fd%d: can't request dma resource for %s\n", 1055 index, swim->full_name); 1056 macio_release_resource(mdev, 0); 1057 return -EBUSY; 1058 } 1059 dev_set_drvdata(&mdev->ofdev.dev, fs); 1060 1061 if (mdev->media_bay == NULL) 1062 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1); 1063 1064 memset(fs, 0, sizeof(*fs)); 1065 spin_lock_init(&fs->lock); 1066 fs->state = idle; 1067 fs->swim3 = (struct swim3 __iomem *) 1068 ioremap(macio_resource_start(mdev, 0), 0x200); 1069 if (fs->swim3 == NULL) { 1070 printk("fd%d: couldn't map registers for %s\n", 1071 index, swim->full_name); 1072 rc = -ENOMEM; 1073 goto out_release; 1074 } 1075 fs->dma = (struct dbdma_regs __iomem *) 1076 ioremap(macio_resource_start(mdev, 1), 0x200); 1077 if (fs->dma == NULL) { 1078 printk("fd%d: couldn't map DMA for %s\n", 1079 index, swim->full_name); 1080 iounmap(fs->swim3); 1081 rc = -ENOMEM; 1082 goto out_release; 1083 } 1084 fs->swim3_intr = macio_irq(mdev, 0); 1085 fs->dma_intr = macio_irq(mdev, 1); 1086 fs->cur_cyl = -1; 1087 fs->cur_sector = -1; 1088 fs->secpercyl = 36; 1089 fs->secpertrack = 18; 1090 fs->total_secs = 2880; 1091 fs->mdev = mdev; 1092 init_waitqueue_head(&fs->wait); 1093 1094 fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space); 1095 memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd)); 1096 st_le16(&fs->dma_cmd[1].command, DBDMA_STOP); 1097 1098 if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) { 1099 printk(KERN_ERR "fd%d: couldn't request irq %d for %s\n", 1100 index, fs->swim3_intr, swim->full_name); 1101 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0); 1102 goto out_unmap; 1103 return -EBUSY; 1104 } 1105 /* 1106 if (request_irq(fs->dma_intr, fd_dma_interrupt, 0, "SWIM3-dma", fs)) { 1107 printk(KERN_ERR "Couldn't get irq %d for SWIM3 DMA", 1108 fs->dma_intr); 1109 return -EBUSY; 1110 } 1111 */ 1112 1113 init_timer(&fs->timeout); 1114 1115 printk(KERN_INFO "fd%d: SWIM3 floppy controller %s\n", floppy_count, 1116 mdev->media_bay ? "in media bay" : ""); 1117 1118 return 0; 1119 1120 out_unmap: 1121 iounmap(fs->dma); 1122 iounmap(fs->swim3); 1123 1124 out_release: 1125 macio_release_resource(mdev, 0); 1126 macio_release_resource(mdev, 1); 1127 1128 return rc; 1129 } 1130 1131 static int __devinit swim3_attach(struct macio_dev *mdev, const struct of_device_id *match) 1132 { 1133 int i, rc; 1134 struct gendisk *disk; 1135 1136 /* Add the drive */ 1137 rc = swim3_add_device(mdev, floppy_count); 1138 if (rc) 1139 return rc; 1140 1141 /* Now create the queue if not there yet */ 1142 if (swim3_queue == NULL) { 1143 /* If we failed, there isn't much we can do as the driver is still 1144 * too dumb to remove the device, just bail out 1145 */ 1146 if (register_blkdev(FLOPPY_MAJOR, "fd")) 1147 return 0; 1148 swim3_queue = blk_init_queue(do_fd_request, &swim3_lock); 1149 if (swim3_queue == NULL) { 1150 unregister_blkdev(FLOPPY_MAJOR, "fd"); 1151 return 0; 1152 } 1153 } 1154 1155 /* Now register that disk. Same comment about failure handling */ 1156 i = floppy_count++; 1157 disk = disks[i] = alloc_disk(1); 1158 if (disk == NULL) 1159 return 0; 1160 1161 disk->major = FLOPPY_MAJOR; 1162 disk->first_minor = i; 1163 disk->fops = &floppy_fops; 1164 disk->private_data = &floppy_states[i]; 1165 disk->queue = swim3_queue; 1166 disk->flags |= GENHD_FL_REMOVABLE; 1167 sprintf(disk->disk_name, "fd%d", i); 1168 set_capacity(disk, 2880); 1169 add_disk(disk); 1170 1171 return 0; 1172 } 1173 1174 static struct of_device_id swim3_match[] = 1175 { 1176 { 1177 .name = "swim3", 1178 }, 1179 { 1180 .compatible = "ohare-swim3" 1181 }, 1182 { 1183 .compatible = "swim3" 1184 }, 1185 }; 1186 1187 static struct macio_driver swim3_driver = 1188 { 1189 .driver = { 1190 .name = "swim3", 1191 .of_match_table = swim3_match, 1192 }, 1193 .probe = swim3_attach, 1194 #if 0 1195 .suspend = swim3_suspend, 1196 .resume = swim3_resume, 1197 #endif 1198 }; 1199 1200 1201 int swim3_init(void) 1202 { 1203 macio_register_driver(&swim3_driver); 1204 return 0; 1205 } 1206 1207 module_init(swim3_init) 1208 1209 MODULE_LICENSE("GPL"); 1210 MODULE_AUTHOR("Paul Mackerras"); 1211 MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR); 1212