1 /* 2 * Driver for the SWIM3 (Super Woz Integrated Machine 3) 3 * floppy controller found on Power Macintoshes. 4 * 5 * Copyright (C) 1996 Paul Mackerras. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 /* 14 * TODO: 15 * handle 2 drives 16 * handle GCR disks 17 */ 18 19 #include <linux/stddef.h> 20 #include <linux/kernel.h> 21 #include <linux/sched.h> 22 #include <linux/timer.h> 23 #include <linux/delay.h> 24 #include <linux/fd.h> 25 #include <linux/ioctl.h> 26 #include <linux/blkdev.h> 27 #include <linux/interrupt.h> 28 #include <linux/module.h> 29 #include <linux/spinlock.h> 30 #include <asm/io.h> 31 #include <asm/dbdma.h> 32 #include <asm/prom.h> 33 #include <asm/uaccess.h> 34 #include <asm/mediabay.h> 35 #include <asm/machdep.h> 36 #include <asm/pmac_feature.h> 37 38 static struct request_queue *swim3_queue; 39 static struct gendisk *disks[2]; 40 static struct request *fd_req; 41 42 #define MAX_FLOPPIES 2 43 44 enum swim_state { 45 idle, 46 locating, 47 seeking, 48 settling, 49 do_transfer, 50 jogging, 51 available, 52 revalidating, 53 ejecting 54 }; 55 56 #define REG(x) unsigned char x; char x ## _pad[15]; 57 58 /* 59 * The names for these registers mostly represent speculation on my part. 60 * It will be interesting to see how close they are to the names Apple uses. 61 */ 62 struct swim3 { 63 REG(data); 64 REG(timer); /* counts down at 1MHz */ 65 REG(error); 66 REG(mode); 67 REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */ 68 REG(setup); 69 REG(control); /* writing bits clears them */ 70 REG(status); /* writing bits sets them in control */ 71 REG(intr); 72 REG(nseek); /* # tracks to seek */ 73 REG(ctrack); /* current track number */ 74 REG(csect); /* current sector number */ 75 REG(gap3); /* size of gap 3 in track format */ 76 REG(sector); /* sector # to read or write */ 77 REG(nsect); /* # sectors to read or write */ 78 REG(intr_enable); 79 }; 80 81 #define control_bic control 82 #define control_bis status 83 84 /* Bits in select register */ 85 #define CA_MASK 7 86 #define LSTRB 8 87 88 /* Bits in control register */ 89 #define DO_SEEK 0x80 90 #define FORMAT 0x40 91 #define SELECT 0x20 92 #define WRITE_SECTORS 0x10 93 #define DO_ACTION 0x08 94 #define DRIVE2_ENABLE 0x04 95 #define DRIVE_ENABLE 0x02 96 #define INTR_ENABLE 0x01 97 98 /* Bits in status register */ 99 #define FIFO_1BYTE 0x80 100 #define FIFO_2BYTE 0x40 101 #define ERROR 0x20 102 #define DATA 0x08 103 #define RDDATA 0x04 104 #define INTR_PENDING 0x02 105 #define MARK_BYTE 0x01 106 107 /* Bits in intr and intr_enable registers */ 108 #define ERROR_INTR 0x20 109 #define DATA_CHANGED 0x10 110 #define TRANSFER_DONE 0x08 111 #define SEEN_SECTOR 0x04 112 #define SEEK_DONE 0x02 113 #define TIMER_DONE 0x01 114 115 /* Bits in error register */ 116 #define ERR_DATA_CRC 0x80 117 #define ERR_ADDR_CRC 0x40 118 #define ERR_OVERRUN 0x04 119 #define ERR_UNDERRUN 0x01 120 121 /* Bits in setup register */ 122 #define S_SW_RESET 0x80 123 #define S_GCR_WRITE 0x40 124 #define S_IBM_DRIVE 0x20 125 #define S_TEST_MODE 0x10 126 #define S_FCLK_DIV2 0x08 127 #define S_GCR 0x04 128 #define S_COPY_PROT 0x02 129 #define S_INV_WDATA 0x01 130 131 /* Select values for swim3_action */ 132 #define SEEK_POSITIVE 0 133 #define SEEK_NEGATIVE 4 134 #define STEP 1 135 #define MOTOR_ON 2 136 #define MOTOR_OFF 6 137 #define INDEX 3 138 #define EJECT 7 139 #define SETMFM 9 140 #define SETGCR 13 141 142 /* Select values for swim3_select and swim3_readbit */ 143 #define STEP_DIR 0 144 #define STEPPING 1 145 #define MOTOR_ON 2 146 #define RELAX 3 /* also eject in progress */ 147 #define READ_DATA_0 4 148 #define TWOMEG_DRIVE 5 149 #define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */ 150 #define DRIVE_PRESENT 7 151 #define DISK_IN 8 152 #define WRITE_PROT 9 153 #define TRACK_ZERO 10 154 #define TACHO 11 155 #define READ_DATA_1 12 156 #define MFM_MODE 13 157 #define SEEK_COMPLETE 14 158 #define ONEMEG_MEDIA 15 159 160 /* Definitions of values used in writing and formatting */ 161 #define DATA_ESCAPE 0x99 162 #define GCR_SYNC_EXC 0x3f 163 #define GCR_SYNC_CONV 0x80 164 #define GCR_FIRST_MARK 0xd5 165 #define GCR_SECOND_MARK 0xaa 166 #define GCR_ADDR_MARK "\xd5\xaa\x00" 167 #define GCR_DATA_MARK "\xd5\xaa\x0b" 168 #define GCR_SLIP_BYTE "\x27\xaa" 169 #define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f" 170 171 #define DATA_99 "\x99\x99" 172 #define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe" 173 #define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc" 174 #define MFM_GAP_LEN 12 175 176 struct floppy_state { 177 enum swim_state state; 178 spinlock_t lock; 179 struct swim3 __iomem *swim3; /* hardware registers */ 180 struct dbdma_regs __iomem *dma; /* DMA controller registers */ 181 int swim3_intr; /* interrupt number for SWIM3 */ 182 int dma_intr; /* interrupt number for DMA channel */ 183 int cur_cyl; /* cylinder head is on, or -1 */ 184 int cur_sector; /* last sector we saw go past */ 185 int req_cyl; /* the cylinder for the current r/w request */ 186 int head; /* head number ditto */ 187 int req_sector; /* sector number ditto */ 188 int scount; /* # sectors we're transferring at present */ 189 int retries; 190 int settle_time; 191 int secpercyl; /* disk geometry information */ 192 int secpertrack; 193 int total_secs; 194 int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */ 195 struct dbdma_cmd *dma_cmd; 196 int ref_count; 197 int expect_cyl; 198 struct timer_list timeout; 199 int timeout_pending; 200 int ejected; 201 wait_queue_head_t wait; 202 int wanted; 203 struct macio_dev *mdev; 204 char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)]; 205 }; 206 207 static struct floppy_state floppy_states[MAX_FLOPPIES]; 208 static int floppy_count = 0; 209 static DEFINE_SPINLOCK(swim3_lock); 210 211 static unsigned short write_preamble[] = { 212 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */ 213 0, 0, 0, 0, 0, 0, /* sync field */ 214 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */ 215 0x990f /* no escape for 512 bytes */ 216 }; 217 218 static unsigned short write_postamble[] = { 219 0x9904, /* insert CRC */ 220 0x4e4e, 0x4e4e, 221 0x9908, /* stop writing */ 222 0, 0, 0, 0, 0, 0 223 }; 224 225 static void swim3_select(struct floppy_state *fs, int sel); 226 static void swim3_action(struct floppy_state *fs, int action); 227 static int swim3_readbit(struct floppy_state *fs, int bit); 228 static void do_fd_request(struct request_queue * q); 229 static void start_request(struct floppy_state *fs); 230 static void set_timeout(struct floppy_state *fs, int nticks, 231 void (*proc)(unsigned long)); 232 static void scan_track(struct floppy_state *fs); 233 static void seek_track(struct floppy_state *fs, int n); 234 static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count); 235 static void setup_transfer(struct floppy_state *fs); 236 static void act(struct floppy_state *fs); 237 static void scan_timeout(unsigned long data); 238 static void seek_timeout(unsigned long data); 239 static void settle_timeout(unsigned long data); 240 static void xfer_timeout(unsigned long data); 241 static irqreturn_t swim3_interrupt(int irq, void *dev_id); 242 /*static void fd_dma_interrupt(int irq, void *dev_id);*/ 243 static int grab_drive(struct floppy_state *fs, enum swim_state state, 244 int interruptible); 245 static void release_drive(struct floppy_state *fs); 246 static int fd_eject(struct floppy_state *fs); 247 static int floppy_ioctl(struct block_device *bdev, fmode_t mode, 248 unsigned int cmd, unsigned long param); 249 static int floppy_open(struct block_device *bdev, fmode_t mode); 250 static int floppy_release(struct gendisk *disk, fmode_t mode); 251 static int floppy_check_change(struct gendisk *disk); 252 static int floppy_revalidate(struct gendisk *disk); 253 254 static bool swim3_end_request(int err, unsigned int nr_bytes) 255 { 256 if (__blk_end_request(fd_req, err, nr_bytes)) 257 return true; 258 259 fd_req = NULL; 260 return false; 261 } 262 263 static bool swim3_end_request_cur(int err) 264 { 265 return swim3_end_request(err, blk_rq_cur_bytes(fd_req)); 266 } 267 268 static void swim3_select(struct floppy_state *fs, int sel) 269 { 270 struct swim3 __iomem *sw = fs->swim3; 271 272 out_8(&sw->select, RELAX); 273 if (sel & 8) 274 out_8(&sw->control_bis, SELECT); 275 else 276 out_8(&sw->control_bic, SELECT); 277 out_8(&sw->select, sel & CA_MASK); 278 } 279 280 static void swim3_action(struct floppy_state *fs, int action) 281 { 282 struct swim3 __iomem *sw = fs->swim3; 283 284 swim3_select(fs, action); 285 udelay(1); 286 out_8(&sw->select, sw->select | LSTRB); 287 udelay(2); 288 out_8(&sw->select, sw->select & ~LSTRB); 289 udelay(1); 290 } 291 292 static int swim3_readbit(struct floppy_state *fs, int bit) 293 { 294 struct swim3 __iomem *sw = fs->swim3; 295 int stat; 296 297 swim3_select(fs, bit); 298 udelay(1); 299 stat = in_8(&sw->status); 300 return (stat & DATA) == 0; 301 } 302 303 static void do_fd_request(struct request_queue * q) 304 { 305 int i; 306 307 for(i=0; i<floppy_count; i++) { 308 struct floppy_state *fs = &floppy_states[i]; 309 if (fs->mdev->media_bay && 310 check_media_bay(fs->mdev->media_bay) != MB_FD) 311 continue; 312 start_request(fs); 313 } 314 } 315 316 static void start_request(struct floppy_state *fs) 317 { 318 struct request *req; 319 unsigned long x; 320 321 if (fs->state == idle && fs->wanted) { 322 fs->state = available; 323 wake_up(&fs->wait); 324 return; 325 } 326 while (fs->state == idle) { 327 if (!fd_req) { 328 fd_req = blk_fetch_request(swim3_queue); 329 if (!fd_req) 330 break; 331 } 332 req = fd_req; 333 #if 0 334 printk("do_fd_req: dev=%s cmd=%d sec=%ld nr_sec=%u buf=%p\n", 335 req->rq_disk->disk_name, req->cmd, 336 (long)blk_rq_pos(req), blk_rq_sectors(req), req->buffer); 337 printk(" errors=%d current_nr_sectors=%u\n", 338 req->errors, blk_rq_cur_sectors(req)); 339 #endif 340 341 if (blk_rq_pos(req) >= fs->total_secs) { 342 swim3_end_request_cur(-EIO); 343 continue; 344 } 345 if (fs->ejected) { 346 swim3_end_request_cur(-EIO); 347 continue; 348 } 349 350 if (rq_data_dir(req) == WRITE) { 351 if (fs->write_prot < 0) 352 fs->write_prot = swim3_readbit(fs, WRITE_PROT); 353 if (fs->write_prot) { 354 swim3_end_request_cur(-EIO); 355 continue; 356 } 357 } 358 359 /* Do not remove the cast. blk_rq_pos(req) is now a 360 * sector_t and can be 64 bits, but it will never go 361 * past 32 bits for this driver anyway, so we can 362 * safely cast it down and not have to do a 64/32 363 * division 364 */ 365 fs->req_cyl = ((long)blk_rq_pos(req)) / fs->secpercyl; 366 x = ((long)blk_rq_pos(req)) % fs->secpercyl; 367 fs->head = x / fs->secpertrack; 368 fs->req_sector = x % fs->secpertrack + 1; 369 fd_req = req; 370 fs->state = do_transfer; 371 fs->retries = 0; 372 373 act(fs); 374 } 375 } 376 377 static void set_timeout(struct floppy_state *fs, int nticks, 378 void (*proc)(unsigned long)) 379 { 380 unsigned long flags; 381 382 spin_lock_irqsave(&fs->lock, flags); 383 if (fs->timeout_pending) 384 del_timer(&fs->timeout); 385 fs->timeout.expires = jiffies + nticks; 386 fs->timeout.function = proc; 387 fs->timeout.data = (unsigned long) fs; 388 add_timer(&fs->timeout); 389 fs->timeout_pending = 1; 390 spin_unlock_irqrestore(&fs->lock, flags); 391 } 392 393 static inline void scan_track(struct floppy_state *fs) 394 { 395 struct swim3 __iomem *sw = fs->swim3; 396 397 swim3_select(fs, READ_DATA_0); 398 in_8(&sw->intr); /* clear SEEN_SECTOR bit */ 399 in_8(&sw->error); 400 out_8(&sw->intr_enable, SEEN_SECTOR); 401 out_8(&sw->control_bis, DO_ACTION); 402 /* enable intr when track found */ 403 set_timeout(fs, HZ, scan_timeout); /* enable timeout */ 404 } 405 406 static inline void seek_track(struct floppy_state *fs, int n) 407 { 408 struct swim3 __iomem *sw = fs->swim3; 409 410 if (n >= 0) { 411 swim3_action(fs, SEEK_POSITIVE); 412 sw->nseek = n; 413 } else { 414 swim3_action(fs, SEEK_NEGATIVE); 415 sw->nseek = -n; 416 } 417 fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1; 418 swim3_select(fs, STEP); 419 in_8(&sw->error); 420 /* enable intr when seek finished */ 421 out_8(&sw->intr_enable, SEEK_DONE); 422 out_8(&sw->control_bis, DO_SEEK); 423 set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */ 424 fs->settle_time = 0; 425 } 426 427 static inline void init_dma(struct dbdma_cmd *cp, int cmd, 428 void *buf, int count) 429 { 430 st_le16(&cp->req_count, count); 431 st_le16(&cp->command, cmd); 432 st_le32(&cp->phy_addr, virt_to_bus(buf)); 433 cp->xfer_status = 0; 434 } 435 436 static inline void setup_transfer(struct floppy_state *fs) 437 { 438 int n; 439 struct swim3 __iomem *sw = fs->swim3; 440 struct dbdma_cmd *cp = fs->dma_cmd; 441 struct dbdma_regs __iomem *dr = fs->dma; 442 443 if (blk_rq_cur_sectors(fd_req) <= 0) { 444 printk(KERN_ERR "swim3: transfer 0 sectors?\n"); 445 return; 446 } 447 if (rq_data_dir(fd_req) == WRITE) 448 n = 1; 449 else { 450 n = fs->secpertrack - fs->req_sector + 1; 451 if (n > blk_rq_cur_sectors(fd_req)) 452 n = blk_rq_cur_sectors(fd_req); 453 } 454 fs->scount = n; 455 swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0); 456 out_8(&sw->sector, fs->req_sector); 457 out_8(&sw->nsect, n); 458 out_8(&sw->gap3, 0); 459 out_le32(&dr->cmdptr, virt_to_bus(cp)); 460 if (rq_data_dir(fd_req) == WRITE) { 461 /* Set up 3 dma commands: write preamble, data, postamble */ 462 init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble)); 463 ++cp; 464 init_dma(cp, OUTPUT_MORE, fd_req->buffer, 512); 465 ++cp; 466 init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble)); 467 } else { 468 init_dma(cp, INPUT_LAST, fd_req->buffer, n * 512); 469 } 470 ++cp; 471 out_le16(&cp->command, DBDMA_STOP); 472 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); 473 in_8(&sw->error); 474 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); 475 if (rq_data_dir(fd_req) == WRITE) 476 out_8(&sw->control_bis, WRITE_SECTORS); 477 in_8(&sw->intr); 478 out_le32(&dr->control, (RUN << 16) | RUN); 479 /* enable intr when transfer complete */ 480 out_8(&sw->intr_enable, TRANSFER_DONE); 481 out_8(&sw->control_bis, DO_ACTION); 482 set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */ 483 } 484 485 static void act(struct floppy_state *fs) 486 { 487 for (;;) { 488 switch (fs->state) { 489 case idle: 490 return; /* XXX shouldn't get here */ 491 492 case locating: 493 if (swim3_readbit(fs, TRACK_ZERO)) { 494 fs->cur_cyl = 0; 495 if (fs->req_cyl == 0) 496 fs->state = do_transfer; 497 else 498 fs->state = seeking; 499 break; 500 } 501 scan_track(fs); 502 return; 503 504 case seeking: 505 if (fs->cur_cyl < 0) { 506 fs->expect_cyl = -1; 507 fs->state = locating; 508 break; 509 } 510 if (fs->req_cyl == fs->cur_cyl) { 511 printk("whoops, seeking 0\n"); 512 fs->state = do_transfer; 513 break; 514 } 515 seek_track(fs, fs->req_cyl - fs->cur_cyl); 516 return; 517 518 case settling: 519 /* check for SEEK_COMPLETE after 30ms */ 520 fs->settle_time = (HZ + 32) / 33; 521 set_timeout(fs, fs->settle_time, settle_timeout); 522 return; 523 524 case do_transfer: 525 if (fs->cur_cyl != fs->req_cyl) { 526 if (fs->retries > 5) { 527 swim3_end_request_cur(-EIO); 528 fs->state = idle; 529 return; 530 } 531 fs->state = seeking; 532 break; 533 } 534 setup_transfer(fs); 535 return; 536 537 case jogging: 538 seek_track(fs, -5); 539 return; 540 541 default: 542 printk(KERN_ERR"swim3: unknown state %d\n", fs->state); 543 return; 544 } 545 } 546 } 547 548 static void scan_timeout(unsigned long data) 549 { 550 struct floppy_state *fs = (struct floppy_state *) data; 551 struct swim3 __iomem *sw = fs->swim3; 552 553 fs->timeout_pending = 0; 554 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); 555 out_8(&sw->select, RELAX); 556 out_8(&sw->intr_enable, 0); 557 fs->cur_cyl = -1; 558 if (fs->retries > 5) { 559 swim3_end_request_cur(-EIO); 560 fs->state = idle; 561 start_request(fs); 562 } else { 563 fs->state = jogging; 564 act(fs); 565 } 566 } 567 568 static void seek_timeout(unsigned long data) 569 { 570 struct floppy_state *fs = (struct floppy_state *) data; 571 struct swim3 __iomem *sw = fs->swim3; 572 573 fs->timeout_pending = 0; 574 out_8(&sw->control_bic, DO_SEEK); 575 out_8(&sw->select, RELAX); 576 out_8(&sw->intr_enable, 0); 577 printk(KERN_ERR "swim3: seek timeout\n"); 578 swim3_end_request_cur(-EIO); 579 fs->state = idle; 580 start_request(fs); 581 } 582 583 static void settle_timeout(unsigned long data) 584 { 585 struct floppy_state *fs = (struct floppy_state *) data; 586 struct swim3 __iomem *sw = fs->swim3; 587 588 fs->timeout_pending = 0; 589 if (swim3_readbit(fs, SEEK_COMPLETE)) { 590 out_8(&sw->select, RELAX); 591 fs->state = locating; 592 act(fs); 593 return; 594 } 595 out_8(&sw->select, RELAX); 596 if (fs->settle_time < 2*HZ) { 597 ++fs->settle_time; 598 set_timeout(fs, 1, settle_timeout); 599 return; 600 } 601 printk(KERN_ERR "swim3: seek settle timeout\n"); 602 swim3_end_request_cur(-EIO); 603 fs->state = idle; 604 start_request(fs); 605 } 606 607 static void xfer_timeout(unsigned long data) 608 { 609 struct floppy_state *fs = (struct floppy_state *) data; 610 struct swim3 __iomem *sw = fs->swim3; 611 struct dbdma_regs __iomem *dr = fs->dma; 612 int n; 613 614 fs->timeout_pending = 0; 615 out_le32(&dr->control, RUN << 16); 616 /* We must wait a bit for dbdma to stop */ 617 for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++) 618 udelay(1); 619 out_8(&sw->intr_enable, 0); 620 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION); 621 out_8(&sw->select, RELAX); 622 printk(KERN_ERR "swim3: timeout %sing sector %ld\n", 623 (rq_data_dir(fd_req)==WRITE? "writ": "read"), 624 (long)blk_rq_pos(fd_req)); 625 swim3_end_request_cur(-EIO); 626 fs->state = idle; 627 start_request(fs); 628 } 629 630 static irqreturn_t swim3_interrupt(int irq, void *dev_id) 631 { 632 struct floppy_state *fs = (struct floppy_state *) dev_id; 633 struct swim3 __iomem *sw = fs->swim3; 634 int intr, err, n; 635 int stat, resid; 636 struct dbdma_regs __iomem *dr; 637 struct dbdma_cmd *cp; 638 639 intr = in_8(&sw->intr); 640 err = (intr & ERROR_INTR)? in_8(&sw->error): 0; 641 if ((intr & ERROR_INTR) && fs->state != do_transfer) 642 printk(KERN_ERR "swim3_interrupt, state=%d, dir=%x, intr=%x, err=%x\n", 643 fs->state, rq_data_dir(fd_req), intr, err); 644 switch (fs->state) { 645 case locating: 646 if (intr & SEEN_SECTOR) { 647 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); 648 out_8(&sw->select, RELAX); 649 out_8(&sw->intr_enable, 0); 650 del_timer(&fs->timeout); 651 fs->timeout_pending = 0; 652 if (sw->ctrack == 0xff) { 653 printk(KERN_ERR "swim3: seen sector but cyl=ff?\n"); 654 fs->cur_cyl = -1; 655 if (fs->retries > 5) { 656 swim3_end_request_cur(-EIO); 657 fs->state = idle; 658 start_request(fs); 659 } else { 660 fs->state = jogging; 661 act(fs); 662 } 663 break; 664 } 665 fs->cur_cyl = sw->ctrack; 666 fs->cur_sector = sw->csect; 667 if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl) 668 printk(KERN_ERR "swim3: expected cyl %d, got %d\n", 669 fs->expect_cyl, fs->cur_cyl); 670 fs->state = do_transfer; 671 act(fs); 672 } 673 break; 674 case seeking: 675 case jogging: 676 if (sw->nseek == 0) { 677 out_8(&sw->control_bic, DO_SEEK); 678 out_8(&sw->select, RELAX); 679 out_8(&sw->intr_enable, 0); 680 del_timer(&fs->timeout); 681 fs->timeout_pending = 0; 682 if (fs->state == seeking) 683 ++fs->retries; 684 fs->state = settling; 685 act(fs); 686 } 687 break; 688 case settling: 689 out_8(&sw->intr_enable, 0); 690 del_timer(&fs->timeout); 691 fs->timeout_pending = 0; 692 act(fs); 693 break; 694 case do_transfer: 695 if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0) 696 break; 697 out_8(&sw->intr_enable, 0); 698 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION); 699 out_8(&sw->select, RELAX); 700 del_timer(&fs->timeout); 701 fs->timeout_pending = 0; 702 dr = fs->dma; 703 cp = fs->dma_cmd; 704 if (rq_data_dir(fd_req) == WRITE) 705 ++cp; 706 /* 707 * Check that the main data transfer has finished. 708 * On writing, the swim3 sometimes doesn't use 709 * up all the bytes of the postamble, so we can still 710 * see DMA active here. That doesn't matter as long 711 * as all the sector data has been transferred. 712 */ 713 if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) { 714 /* wait a little while for DMA to complete */ 715 for (n = 0; n < 100; ++n) { 716 if (cp->xfer_status != 0) 717 break; 718 udelay(1); 719 barrier(); 720 } 721 } 722 /* turn off DMA */ 723 out_le32(&dr->control, (RUN | PAUSE) << 16); 724 stat = ld_le16(&cp->xfer_status); 725 resid = ld_le16(&cp->res_count); 726 if (intr & ERROR_INTR) { 727 n = fs->scount - 1 - resid / 512; 728 if (n > 0) { 729 blk_update_request(fd_req, 0, n << 9); 730 fs->req_sector += n; 731 } 732 if (fs->retries < 5) { 733 ++fs->retries; 734 act(fs); 735 } else { 736 printk("swim3: error %sing block %ld (err=%x)\n", 737 rq_data_dir(fd_req) == WRITE? "writ": "read", 738 (long)blk_rq_pos(fd_req), err); 739 swim3_end_request_cur(-EIO); 740 fs->state = idle; 741 } 742 } else { 743 if ((stat & ACTIVE) == 0 || resid != 0) { 744 /* musta been an error */ 745 printk(KERN_ERR "swim3: fd dma: stat=%x resid=%d\n", stat, resid); 746 printk(KERN_ERR " state=%d, dir=%x, intr=%x, err=%x\n", 747 fs->state, rq_data_dir(fd_req), intr, err); 748 swim3_end_request_cur(-EIO); 749 fs->state = idle; 750 start_request(fs); 751 break; 752 } 753 if (swim3_end_request(0, fs->scount << 9)) { 754 fs->req_sector += fs->scount; 755 if (fs->req_sector > fs->secpertrack) { 756 fs->req_sector -= fs->secpertrack; 757 if (++fs->head > 1) { 758 fs->head = 0; 759 ++fs->req_cyl; 760 } 761 } 762 act(fs); 763 } else 764 fs->state = idle; 765 } 766 if (fs->state == idle) 767 start_request(fs); 768 break; 769 default: 770 printk(KERN_ERR "swim3: don't know what to do in state %d\n", fs->state); 771 } 772 return IRQ_HANDLED; 773 } 774 775 /* 776 static void fd_dma_interrupt(int irq, void *dev_id) 777 { 778 } 779 */ 780 781 static int grab_drive(struct floppy_state *fs, enum swim_state state, 782 int interruptible) 783 { 784 unsigned long flags; 785 786 spin_lock_irqsave(&fs->lock, flags); 787 if (fs->state != idle) { 788 ++fs->wanted; 789 while (fs->state != available) { 790 if (interruptible && signal_pending(current)) { 791 --fs->wanted; 792 spin_unlock_irqrestore(&fs->lock, flags); 793 return -EINTR; 794 } 795 interruptible_sleep_on(&fs->wait); 796 } 797 --fs->wanted; 798 } 799 fs->state = state; 800 spin_unlock_irqrestore(&fs->lock, flags); 801 return 0; 802 } 803 804 static void release_drive(struct floppy_state *fs) 805 { 806 unsigned long flags; 807 808 spin_lock_irqsave(&fs->lock, flags); 809 fs->state = idle; 810 start_request(fs); 811 spin_unlock_irqrestore(&fs->lock, flags); 812 } 813 814 static int fd_eject(struct floppy_state *fs) 815 { 816 int err, n; 817 818 err = grab_drive(fs, ejecting, 1); 819 if (err) 820 return err; 821 swim3_action(fs, EJECT); 822 for (n = 20; n > 0; --n) { 823 if (signal_pending(current)) { 824 err = -EINTR; 825 break; 826 } 827 swim3_select(fs, RELAX); 828 schedule_timeout_interruptible(1); 829 if (swim3_readbit(fs, DISK_IN) == 0) 830 break; 831 } 832 swim3_select(fs, RELAX); 833 udelay(150); 834 fs->ejected = 1; 835 release_drive(fs); 836 return err; 837 } 838 839 static struct floppy_struct floppy_type = 840 { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */ 841 842 static int floppy_ioctl(struct block_device *bdev, fmode_t mode, 843 unsigned int cmd, unsigned long param) 844 { 845 struct floppy_state *fs = bdev->bd_disk->private_data; 846 int err; 847 848 if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN)) 849 return -EPERM; 850 851 if (fs->mdev->media_bay && 852 check_media_bay(fs->mdev->media_bay) != MB_FD) 853 return -ENXIO; 854 855 switch (cmd) { 856 case FDEJECT: 857 if (fs->ref_count != 1) 858 return -EBUSY; 859 err = fd_eject(fs); 860 return err; 861 case FDGETPRM: 862 if (copy_to_user((void __user *) param, &floppy_type, 863 sizeof(struct floppy_struct))) 864 return -EFAULT; 865 return 0; 866 } 867 return -ENOTTY; 868 } 869 870 static int floppy_open(struct block_device *bdev, fmode_t mode) 871 { 872 struct floppy_state *fs = bdev->bd_disk->private_data; 873 struct swim3 __iomem *sw = fs->swim3; 874 int n, err = 0; 875 876 if (fs->ref_count == 0) { 877 if (fs->mdev->media_bay && 878 check_media_bay(fs->mdev->media_bay) != MB_FD) 879 return -ENXIO; 880 out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2); 881 out_8(&sw->control_bic, 0xff); 882 out_8(&sw->mode, 0x95); 883 udelay(10); 884 out_8(&sw->intr_enable, 0); 885 out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE); 886 swim3_action(fs, MOTOR_ON); 887 fs->write_prot = -1; 888 fs->cur_cyl = -1; 889 for (n = 0; n < 2 * HZ; ++n) { 890 if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE)) 891 break; 892 if (signal_pending(current)) { 893 err = -EINTR; 894 break; 895 } 896 swim3_select(fs, RELAX); 897 schedule_timeout_interruptible(1); 898 } 899 if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0 900 || swim3_readbit(fs, DISK_IN) == 0)) 901 err = -ENXIO; 902 swim3_action(fs, SETMFM); 903 swim3_select(fs, RELAX); 904 905 } else if (fs->ref_count == -1 || mode & FMODE_EXCL) 906 return -EBUSY; 907 908 if (err == 0 && (mode & FMODE_NDELAY) == 0 909 && (mode & (FMODE_READ|FMODE_WRITE))) { 910 check_disk_change(bdev); 911 if (fs->ejected) 912 err = -ENXIO; 913 } 914 915 if (err == 0 && (mode & FMODE_WRITE)) { 916 if (fs->write_prot < 0) 917 fs->write_prot = swim3_readbit(fs, WRITE_PROT); 918 if (fs->write_prot) 919 err = -EROFS; 920 } 921 922 if (err) { 923 if (fs->ref_count == 0) { 924 swim3_action(fs, MOTOR_OFF); 925 out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE); 926 swim3_select(fs, RELAX); 927 } 928 return err; 929 } 930 931 if (mode & FMODE_EXCL) 932 fs->ref_count = -1; 933 else 934 ++fs->ref_count; 935 936 return 0; 937 } 938 939 static int floppy_release(struct gendisk *disk, fmode_t mode) 940 { 941 struct floppy_state *fs = disk->private_data; 942 struct swim3 __iomem *sw = fs->swim3; 943 if (fs->ref_count > 0 && --fs->ref_count == 0) { 944 swim3_action(fs, MOTOR_OFF); 945 out_8(&sw->control_bic, 0xff); 946 swim3_select(fs, RELAX); 947 } 948 return 0; 949 } 950 951 static int floppy_check_change(struct gendisk *disk) 952 { 953 struct floppy_state *fs = disk->private_data; 954 return fs->ejected; 955 } 956 957 static int floppy_revalidate(struct gendisk *disk) 958 { 959 struct floppy_state *fs = disk->private_data; 960 struct swim3 __iomem *sw; 961 int ret, n; 962 963 if (fs->mdev->media_bay && 964 check_media_bay(fs->mdev->media_bay) != MB_FD) 965 return -ENXIO; 966 967 sw = fs->swim3; 968 grab_drive(fs, revalidating, 0); 969 out_8(&sw->intr_enable, 0); 970 out_8(&sw->control_bis, DRIVE_ENABLE); 971 swim3_action(fs, MOTOR_ON); /* necessary? */ 972 fs->write_prot = -1; 973 fs->cur_cyl = -1; 974 mdelay(1); 975 for (n = HZ; n > 0; --n) { 976 if (swim3_readbit(fs, SEEK_COMPLETE)) 977 break; 978 if (signal_pending(current)) 979 break; 980 swim3_select(fs, RELAX); 981 schedule_timeout_interruptible(1); 982 } 983 ret = swim3_readbit(fs, SEEK_COMPLETE) == 0 984 || swim3_readbit(fs, DISK_IN) == 0; 985 if (ret) 986 swim3_action(fs, MOTOR_OFF); 987 else { 988 fs->ejected = 0; 989 swim3_action(fs, SETMFM); 990 } 991 swim3_select(fs, RELAX); 992 993 release_drive(fs); 994 return ret; 995 } 996 997 static const struct block_device_operations floppy_fops = { 998 .open = floppy_open, 999 .release = floppy_release, 1000 .locked_ioctl = floppy_ioctl, 1001 .media_changed = floppy_check_change, 1002 .revalidate_disk= floppy_revalidate, 1003 }; 1004 1005 static int swim3_add_device(struct macio_dev *mdev, int index) 1006 { 1007 struct device_node *swim = mdev->ofdev.dev.of_node; 1008 struct floppy_state *fs = &floppy_states[index]; 1009 int rc = -EBUSY; 1010 1011 /* Check & Request resources */ 1012 if (macio_resource_count(mdev) < 2) { 1013 printk(KERN_WARNING "ifd%d: no address for %s\n", 1014 index, swim->full_name); 1015 return -ENXIO; 1016 } 1017 if (macio_irq_count(mdev) < 2) { 1018 printk(KERN_WARNING "fd%d: no intrs for device %s\n", 1019 index, swim->full_name); 1020 } 1021 if (macio_request_resource(mdev, 0, "swim3 (mmio)")) { 1022 printk(KERN_ERR "fd%d: can't request mmio resource for %s\n", 1023 index, swim->full_name); 1024 return -EBUSY; 1025 } 1026 if (macio_request_resource(mdev, 1, "swim3 (dma)")) { 1027 printk(KERN_ERR "fd%d: can't request dma resource for %s\n", 1028 index, swim->full_name); 1029 macio_release_resource(mdev, 0); 1030 return -EBUSY; 1031 } 1032 dev_set_drvdata(&mdev->ofdev.dev, fs); 1033 1034 if (mdev->media_bay == NULL) 1035 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1); 1036 1037 memset(fs, 0, sizeof(*fs)); 1038 spin_lock_init(&fs->lock); 1039 fs->state = idle; 1040 fs->swim3 = (struct swim3 __iomem *) 1041 ioremap(macio_resource_start(mdev, 0), 0x200); 1042 if (fs->swim3 == NULL) { 1043 printk("fd%d: couldn't map registers for %s\n", 1044 index, swim->full_name); 1045 rc = -ENOMEM; 1046 goto out_release; 1047 } 1048 fs->dma = (struct dbdma_regs __iomem *) 1049 ioremap(macio_resource_start(mdev, 1), 0x200); 1050 if (fs->dma == NULL) { 1051 printk("fd%d: couldn't map DMA for %s\n", 1052 index, swim->full_name); 1053 iounmap(fs->swim3); 1054 rc = -ENOMEM; 1055 goto out_release; 1056 } 1057 fs->swim3_intr = macio_irq(mdev, 0); 1058 fs->dma_intr = macio_irq(mdev, 1); 1059 fs->cur_cyl = -1; 1060 fs->cur_sector = -1; 1061 fs->secpercyl = 36; 1062 fs->secpertrack = 18; 1063 fs->total_secs = 2880; 1064 fs->mdev = mdev; 1065 init_waitqueue_head(&fs->wait); 1066 1067 fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space); 1068 memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd)); 1069 st_le16(&fs->dma_cmd[1].command, DBDMA_STOP); 1070 1071 if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) { 1072 printk(KERN_ERR "fd%d: couldn't request irq %d for %s\n", 1073 index, fs->swim3_intr, swim->full_name); 1074 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0); 1075 goto out_unmap; 1076 return -EBUSY; 1077 } 1078 /* 1079 if (request_irq(fs->dma_intr, fd_dma_interrupt, 0, "SWIM3-dma", fs)) { 1080 printk(KERN_ERR "Couldn't get irq %d for SWIM3 DMA", 1081 fs->dma_intr); 1082 return -EBUSY; 1083 } 1084 */ 1085 1086 init_timer(&fs->timeout); 1087 1088 printk(KERN_INFO "fd%d: SWIM3 floppy controller %s\n", floppy_count, 1089 mdev->media_bay ? "in media bay" : ""); 1090 1091 return 0; 1092 1093 out_unmap: 1094 iounmap(fs->dma); 1095 iounmap(fs->swim3); 1096 1097 out_release: 1098 macio_release_resource(mdev, 0); 1099 macio_release_resource(mdev, 1); 1100 1101 return rc; 1102 } 1103 1104 static int __devinit swim3_attach(struct macio_dev *mdev, const struct of_device_id *match) 1105 { 1106 int i, rc; 1107 struct gendisk *disk; 1108 1109 /* Add the drive */ 1110 rc = swim3_add_device(mdev, floppy_count); 1111 if (rc) 1112 return rc; 1113 1114 /* Now create the queue if not there yet */ 1115 if (swim3_queue == NULL) { 1116 /* If we failed, there isn't much we can do as the driver is still 1117 * too dumb to remove the device, just bail out 1118 */ 1119 if (register_blkdev(FLOPPY_MAJOR, "fd")) 1120 return 0; 1121 swim3_queue = blk_init_queue(do_fd_request, &swim3_lock); 1122 if (swim3_queue == NULL) { 1123 unregister_blkdev(FLOPPY_MAJOR, "fd"); 1124 return 0; 1125 } 1126 } 1127 1128 /* Now register that disk. Same comment about failure handling */ 1129 i = floppy_count++; 1130 disk = disks[i] = alloc_disk(1); 1131 if (disk == NULL) 1132 return 0; 1133 1134 disk->major = FLOPPY_MAJOR; 1135 disk->first_minor = i; 1136 disk->fops = &floppy_fops; 1137 disk->private_data = &floppy_states[i]; 1138 disk->queue = swim3_queue; 1139 disk->flags |= GENHD_FL_REMOVABLE; 1140 sprintf(disk->disk_name, "fd%d", i); 1141 set_capacity(disk, 2880); 1142 add_disk(disk); 1143 1144 return 0; 1145 } 1146 1147 static struct of_device_id swim3_match[] = 1148 { 1149 { 1150 .name = "swim3", 1151 }, 1152 { 1153 .compatible = "ohare-swim3" 1154 }, 1155 { 1156 .compatible = "swim3" 1157 }, 1158 }; 1159 1160 static struct macio_driver swim3_driver = 1161 { 1162 .driver = { 1163 .name = "swim3", 1164 .of_match_table = swim3_match, 1165 }, 1166 .probe = swim3_attach, 1167 #if 0 1168 .suspend = swim3_suspend, 1169 .resume = swim3_resume, 1170 #endif 1171 }; 1172 1173 1174 int swim3_init(void) 1175 { 1176 macio_register_driver(&swim3_driver); 1177 return 0; 1178 } 1179 1180 module_init(swim3_init) 1181 1182 MODULE_LICENSE("GPL"); 1183 MODULE_AUTHOR("Paul Mackerras"); 1184 MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR); 1185