1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * ps3vram - Use extra PS3 video ram as block device. 4 * 5 * Copyright 2009 Sony Corporation 6 * 7 * Based on the MTD ps3vram driver, which is 8 * Copyright (c) 2007-2008 Jim Paris <jim@jtan.com> 9 * Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr> 10 */ 11 12 #include <linux/blkdev.h> 13 #include <linux/delay.h> 14 #include <linux/module.h> 15 #include <linux/proc_fs.h> 16 #include <linux/seq_file.h> 17 #include <linux/slab.h> 18 19 #include <asm/cell-regs.h> 20 #include <asm/firmware.h> 21 #include <asm/lv1call.h> 22 #include <asm/ps3.h> 23 #include <asm/ps3gpu.h> 24 25 26 #define DEVICE_NAME "ps3vram" 27 28 29 #define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */ 30 #define XDR_IOIF 0x0c000000 31 32 #define FIFO_BASE XDR_IOIF 33 #define FIFO_SIZE (64 * 1024) 34 35 #define DMA_PAGE_SIZE (4 * 1024) 36 37 #define CACHE_PAGE_SIZE (256 * 1024) 38 #define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE) 39 40 #define CACHE_OFFSET CACHE_PAGE_SIZE 41 #define FIFO_OFFSET 0 42 43 #define CTRL_PUT 0x10 44 #define CTRL_GET 0x11 45 #define CTRL_TOP 0x15 46 47 #define UPLOAD_SUBCH 1 48 #define DOWNLOAD_SUBCH 2 49 50 #define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c 51 #define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104 52 53 #define CACHE_PAGE_PRESENT 1 54 #define CACHE_PAGE_DIRTY 2 55 56 struct ps3vram_tag { 57 unsigned int address; 58 unsigned int flags; 59 }; 60 61 struct ps3vram_cache { 62 unsigned int page_count; 63 unsigned int page_size; 64 struct ps3vram_tag *tags; 65 unsigned int hit; 66 unsigned int miss; 67 }; 68 69 struct ps3vram_priv { 70 struct request_queue *queue; 71 struct gendisk *gendisk; 72 73 u64 size; 74 75 u64 memory_handle; 76 u64 context_handle; 77 u32 __iomem *ctrl; 78 void __iomem *reports; 79 u8 *xdr_buf; 80 81 u32 *fifo_base; 82 u32 *fifo_ptr; 83 84 struct ps3vram_cache cache; 85 86 spinlock_t lock; /* protecting list of bios */ 87 struct bio_list list; 88 }; 89 90 91 static int ps3vram_major; 92 93 #define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */ 94 #define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */ 95 #define DMA_NOTIFIER_SIZE 0x40 96 #define NOTIFIER 7 /* notifier used for completion report */ 97 98 static char *size = "256M"; 99 module_param(size, charp, 0); 100 MODULE_PARM_DESC(size, "memory size"); 101 102 static u32 __iomem *ps3vram_get_notifier(void __iomem *reports, int notifier) 103 { 104 return reports + DMA_NOTIFIER_OFFSET_BASE + 105 DMA_NOTIFIER_SIZE * notifier; 106 } 107 108 static void ps3vram_notifier_reset(struct ps3_system_bus_device *dev) 109 { 110 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 111 u32 __iomem *notify = ps3vram_get_notifier(priv->reports, NOTIFIER); 112 int i; 113 114 for (i = 0; i < 4; i++) 115 iowrite32be(0xffffffff, notify + i); 116 } 117 118 static int ps3vram_notifier_wait(struct ps3_system_bus_device *dev, 119 unsigned int timeout_ms) 120 { 121 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 122 u32 __iomem *notify = ps3vram_get_notifier(priv->reports, NOTIFIER); 123 unsigned long timeout; 124 125 for (timeout = 20; timeout; timeout--) { 126 if (!ioread32be(notify + 3)) 127 return 0; 128 udelay(10); 129 } 130 131 timeout = jiffies + msecs_to_jiffies(timeout_ms); 132 133 do { 134 if (!ioread32be(notify + 3)) 135 return 0; 136 msleep(1); 137 } while (time_before(jiffies, timeout)); 138 139 return -ETIMEDOUT; 140 } 141 142 static void ps3vram_init_ring(struct ps3_system_bus_device *dev) 143 { 144 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 145 146 iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_PUT); 147 iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_GET); 148 } 149 150 static int ps3vram_wait_ring(struct ps3_system_bus_device *dev, 151 unsigned int timeout_ms) 152 { 153 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 154 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms); 155 156 do { 157 if (ioread32be(priv->ctrl + CTRL_PUT) == ioread32be(priv->ctrl + CTRL_GET)) 158 return 0; 159 msleep(1); 160 } while (time_before(jiffies, timeout)); 161 162 dev_warn(&dev->core, "FIFO timeout (%08x/%08x/%08x)\n", 163 ioread32be(priv->ctrl + CTRL_PUT), ioread32be(priv->ctrl + CTRL_GET), 164 ioread32be(priv->ctrl + CTRL_TOP)); 165 166 return -ETIMEDOUT; 167 } 168 169 static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data) 170 { 171 *(priv->fifo_ptr)++ = data; 172 } 173 174 static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan, u32 tag, 175 u32 size) 176 { 177 ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag); 178 } 179 180 static void ps3vram_rewind_ring(struct ps3_system_bus_device *dev) 181 { 182 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 183 int status; 184 185 ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET)); 186 187 iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_PUT); 188 189 /* asking the HV for a blit will kick the FIFO */ 190 status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0); 191 if (status) 192 dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n", 193 __func__, status); 194 195 priv->fifo_ptr = priv->fifo_base; 196 } 197 198 static void ps3vram_fire_ring(struct ps3_system_bus_device *dev) 199 { 200 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 201 int status; 202 203 mutex_lock(&ps3_gpu_mutex); 204 205 iowrite32be(FIFO_BASE + FIFO_OFFSET + (priv->fifo_ptr - priv->fifo_base) 206 * sizeof(u32), priv->ctrl + CTRL_PUT); 207 208 /* asking the HV for a blit will kick the FIFO */ 209 status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0); 210 if (status) 211 dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n", 212 __func__, status); 213 214 if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) > 215 FIFO_SIZE - 1024) { 216 dev_dbg(&dev->core, "FIFO full, rewinding\n"); 217 ps3vram_wait_ring(dev, 200); 218 ps3vram_rewind_ring(dev); 219 } 220 221 mutex_unlock(&ps3_gpu_mutex); 222 } 223 224 static void ps3vram_bind(struct ps3_system_bus_device *dev) 225 { 226 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 227 228 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1); 229 ps3vram_out_ring(priv, 0x31337303); 230 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3); 231 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER); 232 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */ 233 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */ 234 235 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1); 236 ps3vram_out_ring(priv, 0x3137c0de); 237 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3); 238 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER); 239 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */ 240 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */ 241 242 ps3vram_fire_ring(dev); 243 } 244 245 static int ps3vram_upload(struct ps3_system_bus_device *dev, 246 unsigned int src_offset, unsigned int dst_offset, 247 int len, int count) 248 { 249 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 250 251 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 252 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); 253 ps3vram_out_ring(priv, XDR_IOIF + src_offset); 254 ps3vram_out_ring(priv, dst_offset); 255 ps3vram_out_ring(priv, len); 256 ps3vram_out_ring(priv, len); 257 ps3vram_out_ring(priv, len); 258 ps3vram_out_ring(priv, count); 259 ps3vram_out_ring(priv, (1 << 8) | 1); 260 ps3vram_out_ring(priv, 0); 261 262 ps3vram_notifier_reset(dev); 263 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 264 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1); 265 ps3vram_out_ring(priv, 0); 266 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1); 267 ps3vram_out_ring(priv, 0); 268 ps3vram_fire_ring(dev); 269 if (ps3vram_notifier_wait(dev, 200) < 0) { 270 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__); 271 return -1; 272 } 273 274 return 0; 275 } 276 277 static int ps3vram_download(struct ps3_system_bus_device *dev, 278 unsigned int src_offset, unsigned int dst_offset, 279 int len, int count) 280 { 281 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 282 283 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 284 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); 285 ps3vram_out_ring(priv, src_offset); 286 ps3vram_out_ring(priv, XDR_IOIF + dst_offset); 287 ps3vram_out_ring(priv, len); 288 ps3vram_out_ring(priv, len); 289 ps3vram_out_ring(priv, len); 290 ps3vram_out_ring(priv, count); 291 ps3vram_out_ring(priv, (1 << 8) | 1); 292 ps3vram_out_ring(priv, 0); 293 294 ps3vram_notifier_reset(dev); 295 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 296 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1); 297 ps3vram_out_ring(priv, 0); 298 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1); 299 ps3vram_out_ring(priv, 0); 300 ps3vram_fire_ring(dev); 301 if (ps3vram_notifier_wait(dev, 200) < 0) { 302 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__); 303 return -1; 304 } 305 306 return 0; 307 } 308 309 static void ps3vram_cache_evict(struct ps3_system_bus_device *dev, int entry) 310 { 311 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 312 struct ps3vram_cache *cache = &priv->cache; 313 314 if (!(cache->tags[entry].flags & CACHE_PAGE_DIRTY)) 315 return; 316 317 dev_dbg(&dev->core, "Flushing %d: 0x%08x\n", entry, 318 cache->tags[entry].address); 319 if (ps3vram_upload(dev, CACHE_OFFSET + entry * cache->page_size, 320 cache->tags[entry].address, DMA_PAGE_SIZE, 321 cache->page_size / DMA_PAGE_SIZE) < 0) { 322 dev_err(&dev->core, 323 "Failed to upload from 0x%x to " "0x%x size 0x%x\n", 324 entry * cache->page_size, cache->tags[entry].address, 325 cache->page_size); 326 } 327 cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY; 328 } 329 330 static void ps3vram_cache_load(struct ps3_system_bus_device *dev, int entry, 331 unsigned int address) 332 { 333 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 334 struct ps3vram_cache *cache = &priv->cache; 335 336 dev_dbg(&dev->core, "Fetching %d: 0x%08x\n", entry, address); 337 if (ps3vram_download(dev, address, 338 CACHE_OFFSET + entry * cache->page_size, 339 DMA_PAGE_SIZE, 340 cache->page_size / DMA_PAGE_SIZE) < 0) { 341 dev_err(&dev->core, 342 "Failed to download from 0x%x to 0x%x size 0x%x\n", 343 address, entry * cache->page_size, cache->page_size); 344 } 345 346 cache->tags[entry].address = address; 347 cache->tags[entry].flags |= CACHE_PAGE_PRESENT; 348 } 349 350 351 static void ps3vram_cache_flush(struct ps3_system_bus_device *dev) 352 { 353 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 354 struct ps3vram_cache *cache = &priv->cache; 355 int i; 356 357 dev_dbg(&dev->core, "FLUSH\n"); 358 for (i = 0; i < cache->page_count; i++) { 359 ps3vram_cache_evict(dev, i); 360 cache->tags[i].flags = 0; 361 } 362 } 363 364 static unsigned int ps3vram_cache_match(struct ps3_system_bus_device *dev, 365 loff_t address) 366 { 367 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 368 struct ps3vram_cache *cache = &priv->cache; 369 unsigned int base; 370 unsigned int offset; 371 int i; 372 static int counter; 373 374 offset = (unsigned int) (address & (cache->page_size - 1)); 375 base = (unsigned int) (address - offset); 376 377 /* fully associative check */ 378 for (i = 0; i < cache->page_count; i++) { 379 if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) && 380 cache->tags[i].address == base) { 381 cache->hit++; 382 dev_dbg(&dev->core, "Found entry %d: 0x%08x\n", i, 383 cache->tags[i].address); 384 return i; 385 } 386 } 387 388 /* choose a random entry */ 389 i = (jiffies + (counter++)) % cache->page_count; 390 dev_dbg(&dev->core, "Using entry %d\n", i); 391 392 ps3vram_cache_evict(dev, i); 393 ps3vram_cache_load(dev, i, base); 394 395 cache->miss++; 396 return i; 397 } 398 399 static int ps3vram_cache_init(struct ps3_system_bus_device *dev) 400 { 401 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 402 403 priv->cache.page_count = CACHE_PAGE_COUNT; 404 priv->cache.page_size = CACHE_PAGE_SIZE; 405 priv->cache.tags = kcalloc(CACHE_PAGE_COUNT, 406 sizeof(struct ps3vram_tag), 407 GFP_KERNEL); 408 if (!priv->cache.tags) 409 return -ENOMEM; 410 411 dev_info(&dev->core, "Created ram cache: %d entries, %d KiB each\n", 412 CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024); 413 414 return 0; 415 } 416 417 static void ps3vram_cache_cleanup(struct ps3_system_bus_device *dev) 418 { 419 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 420 421 ps3vram_cache_flush(dev); 422 kfree(priv->cache.tags); 423 } 424 425 static blk_status_t ps3vram_read(struct ps3_system_bus_device *dev, loff_t from, 426 size_t len, size_t *retlen, u_char *buf) 427 { 428 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 429 unsigned int cached, count; 430 431 dev_dbg(&dev->core, "%s: from=0x%08x len=0x%zx\n", __func__, 432 (unsigned int)from, len); 433 434 if (from >= priv->size) 435 return BLK_STS_IOERR; 436 437 if (len > priv->size - from) 438 len = priv->size - from; 439 440 /* Copy from vram to buf */ 441 count = len; 442 while (count) { 443 unsigned int offset, avail; 444 unsigned int entry; 445 446 offset = (unsigned int) (from & (priv->cache.page_size - 1)); 447 avail = priv->cache.page_size - offset; 448 449 entry = ps3vram_cache_match(dev, from); 450 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset; 451 452 dev_dbg(&dev->core, "%s: from=%08x cached=%08x offset=%08x " 453 "avail=%08x count=%08x\n", __func__, 454 (unsigned int)from, cached, offset, avail, count); 455 456 if (avail > count) 457 avail = count; 458 memcpy(buf, priv->xdr_buf + cached, avail); 459 460 buf += avail; 461 count -= avail; 462 from += avail; 463 } 464 465 *retlen = len; 466 return 0; 467 } 468 469 static blk_status_t ps3vram_write(struct ps3_system_bus_device *dev, loff_t to, 470 size_t len, size_t *retlen, const u_char *buf) 471 { 472 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 473 unsigned int cached, count; 474 475 if (to >= priv->size) 476 return BLK_STS_IOERR; 477 478 if (len > priv->size - to) 479 len = priv->size - to; 480 481 /* Copy from buf to vram */ 482 count = len; 483 while (count) { 484 unsigned int offset, avail; 485 unsigned int entry; 486 487 offset = (unsigned int) (to & (priv->cache.page_size - 1)); 488 avail = priv->cache.page_size - offset; 489 490 entry = ps3vram_cache_match(dev, to); 491 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset; 492 493 dev_dbg(&dev->core, "%s: to=%08x cached=%08x offset=%08x " 494 "avail=%08x count=%08x\n", __func__, (unsigned int)to, 495 cached, offset, avail, count); 496 497 if (avail > count) 498 avail = count; 499 memcpy(priv->xdr_buf + cached, buf, avail); 500 501 priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY; 502 503 buf += avail; 504 count -= avail; 505 to += avail; 506 } 507 508 *retlen = len; 509 return 0; 510 } 511 512 static int ps3vram_proc_show(struct seq_file *m, void *v) 513 { 514 struct ps3vram_priv *priv = m->private; 515 516 seq_printf(m, "hit:%u\nmiss:%u\n", priv->cache.hit, priv->cache.miss); 517 return 0; 518 } 519 520 static void ps3vram_proc_init(struct ps3_system_bus_device *dev) 521 { 522 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 523 struct proc_dir_entry *pde; 524 525 pde = proc_create_single_data(DEVICE_NAME, 0444, NULL, 526 ps3vram_proc_show, priv); 527 if (!pde) 528 dev_warn(&dev->core, "failed to create /proc entry\n"); 529 } 530 531 static struct bio *ps3vram_do_bio(struct ps3_system_bus_device *dev, 532 struct bio *bio) 533 { 534 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 535 int write = bio_data_dir(bio) == WRITE; 536 const char *op = write ? "write" : "read"; 537 loff_t offset = bio->bi_iter.bi_sector << 9; 538 blk_status_t error = 0; 539 struct bio_vec bvec; 540 struct bvec_iter iter; 541 struct bio *next; 542 543 bio_for_each_segment(bvec, bio, iter) { 544 /* PS3 is ppc64, so we don't handle highmem */ 545 char *ptr = page_address(bvec.bv_page) + bvec.bv_offset; 546 size_t len = bvec.bv_len, retlen; 547 548 dev_dbg(&dev->core, " %s %zu bytes at offset %llu\n", op, 549 len, offset); 550 if (write) 551 error = ps3vram_write(dev, offset, len, &retlen, ptr); 552 else 553 error = ps3vram_read(dev, offset, len, &retlen, ptr); 554 555 if (error) { 556 dev_err(&dev->core, "%s failed\n", op); 557 goto out; 558 } 559 560 if (retlen != len) { 561 dev_err(&dev->core, "Short %s\n", op); 562 error = BLK_STS_IOERR; 563 goto out; 564 } 565 566 offset += len; 567 } 568 569 dev_dbg(&dev->core, "%s completed\n", op); 570 571 out: 572 spin_lock_irq(&priv->lock); 573 bio_list_pop(&priv->list); 574 next = bio_list_peek(&priv->list); 575 spin_unlock_irq(&priv->lock); 576 577 bio->bi_status = error; 578 bio_endio(bio); 579 return next; 580 } 581 582 static blk_qc_t ps3vram_submit_bio(struct bio *bio) 583 { 584 struct ps3_system_bus_device *dev = bio->bi_bdev->bd_disk->private_data; 585 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 586 int busy; 587 588 dev_dbg(&dev->core, "%s\n", __func__); 589 590 blk_queue_split(&bio); 591 592 spin_lock_irq(&priv->lock); 593 busy = !bio_list_empty(&priv->list); 594 bio_list_add(&priv->list, bio); 595 spin_unlock_irq(&priv->lock); 596 597 if (busy) 598 return BLK_QC_T_NONE; 599 600 do { 601 bio = ps3vram_do_bio(dev, bio); 602 } while (bio); 603 604 return BLK_QC_T_NONE; 605 } 606 607 static const struct block_device_operations ps3vram_fops = { 608 .owner = THIS_MODULE, 609 .submit_bio = ps3vram_submit_bio, 610 }; 611 612 static int ps3vram_probe(struct ps3_system_bus_device *dev) 613 { 614 struct ps3vram_priv *priv; 615 int error, status; 616 struct request_queue *queue; 617 struct gendisk *gendisk; 618 u64 ddr_size, ddr_lpar, ctrl_lpar, info_lpar, reports_lpar, 619 reports_size, xdr_lpar; 620 char *rest; 621 622 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 623 if (!priv) { 624 error = -ENOMEM; 625 goto fail; 626 } 627 628 spin_lock_init(&priv->lock); 629 bio_list_init(&priv->list); 630 ps3_system_bus_set_drvdata(dev, priv); 631 632 /* Allocate XDR buffer (1MiB aligned) */ 633 priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL, 634 get_order(XDR_BUF_SIZE)); 635 if (priv->xdr_buf == NULL) { 636 dev_err(&dev->core, "Could not allocate XDR buffer\n"); 637 error = -ENOMEM; 638 goto fail_free_priv; 639 } 640 641 /* Put FIFO at begginning of XDR buffer */ 642 priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET); 643 priv->fifo_ptr = priv->fifo_base; 644 645 /* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */ 646 if (ps3_open_hv_device(dev)) { 647 dev_err(&dev->core, "ps3_open_hv_device failed\n"); 648 error = -EAGAIN; 649 goto out_free_xdr_buf; 650 } 651 652 /* Request memory */ 653 status = -1; 654 ddr_size = ALIGN(memparse(size, &rest), 1024*1024); 655 if (!ddr_size) { 656 dev_err(&dev->core, "Specified size is too small\n"); 657 error = -EINVAL; 658 goto out_close_gpu; 659 } 660 661 while (ddr_size > 0) { 662 status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0, 663 &priv->memory_handle, 664 &ddr_lpar); 665 if (!status) 666 break; 667 ddr_size -= 1024*1024; 668 } 669 if (status) { 670 dev_err(&dev->core, "lv1_gpu_memory_allocate failed %d\n", 671 status); 672 error = -ENOMEM; 673 goto out_close_gpu; 674 } 675 676 /* Request context */ 677 status = lv1_gpu_context_allocate(priv->memory_handle, 0, 678 &priv->context_handle, &ctrl_lpar, 679 &info_lpar, &reports_lpar, 680 &reports_size); 681 if (status) { 682 dev_err(&dev->core, "lv1_gpu_context_allocate failed %d\n", 683 status); 684 error = -ENOMEM; 685 goto out_free_memory; 686 } 687 688 /* Map XDR buffer to RSX */ 689 xdr_lpar = ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)); 690 status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, 691 xdr_lpar, XDR_BUF_SIZE, 692 CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | 693 CBE_IOPTE_M); 694 if (status) { 695 dev_err(&dev->core, "lv1_gpu_context_iomap failed %d\n", 696 status); 697 error = -ENOMEM; 698 goto out_free_context; 699 } 700 701 priv->ctrl = ioremap(ctrl_lpar, 64 * 1024); 702 if (!priv->ctrl) { 703 dev_err(&dev->core, "ioremap CTRL failed\n"); 704 error = -ENOMEM; 705 goto out_unmap_context; 706 } 707 708 priv->reports = ioremap(reports_lpar, reports_size); 709 if (!priv->reports) { 710 dev_err(&dev->core, "ioremap REPORTS failed\n"); 711 error = -ENOMEM; 712 goto out_unmap_ctrl; 713 } 714 715 mutex_lock(&ps3_gpu_mutex); 716 ps3vram_init_ring(dev); 717 mutex_unlock(&ps3_gpu_mutex); 718 719 priv->size = ddr_size; 720 721 ps3vram_bind(dev); 722 723 mutex_lock(&ps3_gpu_mutex); 724 error = ps3vram_wait_ring(dev, 100); 725 mutex_unlock(&ps3_gpu_mutex); 726 if (error < 0) { 727 dev_err(&dev->core, "Failed to initialize channels\n"); 728 error = -ETIMEDOUT; 729 goto out_unmap_reports; 730 } 731 732 error = ps3vram_cache_init(dev); 733 if (error < 0) { 734 goto out_unmap_reports; 735 } 736 737 ps3vram_proc_init(dev); 738 739 queue = blk_alloc_queue(NUMA_NO_NODE); 740 if (!queue) { 741 dev_err(&dev->core, "blk_alloc_queue failed\n"); 742 error = -ENOMEM; 743 goto out_cache_cleanup; 744 } 745 746 priv->queue = queue; 747 blk_queue_max_segments(queue, BLK_MAX_SEGMENTS); 748 blk_queue_max_segment_size(queue, BLK_MAX_SEGMENT_SIZE); 749 blk_queue_max_hw_sectors(queue, BLK_SAFE_MAX_SECTORS); 750 751 gendisk = alloc_disk(1); 752 if (!gendisk) { 753 dev_err(&dev->core, "alloc_disk failed\n"); 754 error = -ENOMEM; 755 goto fail_cleanup_queue; 756 } 757 758 priv->gendisk = gendisk; 759 gendisk->major = ps3vram_major; 760 gendisk->first_minor = 0; 761 gendisk->fops = &ps3vram_fops; 762 gendisk->queue = queue; 763 gendisk->private_data = dev; 764 strlcpy(gendisk->disk_name, DEVICE_NAME, sizeof(gendisk->disk_name)); 765 set_capacity(gendisk, priv->size >> 9); 766 767 dev_info(&dev->core, "%s: Using %llu MiB of GPU memory\n", 768 gendisk->disk_name, get_capacity(gendisk) >> 11); 769 770 device_add_disk(&dev->core, gendisk, NULL); 771 return 0; 772 773 fail_cleanup_queue: 774 blk_cleanup_queue(queue); 775 out_cache_cleanup: 776 remove_proc_entry(DEVICE_NAME, NULL); 777 ps3vram_cache_cleanup(dev); 778 out_unmap_reports: 779 iounmap(priv->reports); 780 out_unmap_ctrl: 781 iounmap(priv->ctrl); 782 out_unmap_context: 783 lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, xdr_lpar, 784 XDR_BUF_SIZE, CBE_IOPTE_M); 785 out_free_context: 786 lv1_gpu_context_free(priv->context_handle); 787 out_free_memory: 788 lv1_gpu_memory_free(priv->memory_handle); 789 out_close_gpu: 790 ps3_close_hv_device(dev); 791 out_free_xdr_buf: 792 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE)); 793 fail_free_priv: 794 kfree(priv); 795 ps3_system_bus_set_drvdata(dev, NULL); 796 fail: 797 return error; 798 } 799 800 static void ps3vram_remove(struct ps3_system_bus_device *dev) 801 { 802 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 803 804 del_gendisk(priv->gendisk); 805 put_disk(priv->gendisk); 806 blk_cleanup_queue(priv->queue); 807 remove_proc_entry(DEVICE_NAME, NULL); 808 ps3vram_cache_cleanup(dev); 809 iounmap(priv->reports); 810 iounmap(priv->ctrl); 811 lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, 812 ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)), 813 XDR_BUF_SIZE, CBE_IOPTE_M); 814 lv1_gpu_context_free(priv->context_handle); 815 lv1_gpu_memory_free(priv->memory_handle); 816 ps3_close_hv_device(dev); 817 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE)); 818 kfree(priv); 819 ps3_system_bus_set_drvdata(dev, NULL); 820 } 821 822 static struct ps3_system_bus_driver ps3vram = { 823 .match_id = PS3_MATCH_ID_GPU, 824 .match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK, 825 .core.name = DEVICE_NAME, 826 .core.owner = THIS_MODULE, 827 .probe = ps3vram_probe, 828 .remove = ps3vram_remove, 829 .shutdown = ps3vram_remove, 830 }; 831 832 833 static int __init ps3vram_init(void) 834 { 835 int error; 836 837 if (!firmware_has_feature(FW_FEATURE_PS3_LV1)) 838 return -ENODEV; 839 840 error = register_blkdev(0, DEVICE_NAME); 841 if (error <= 0) { 842 pr_err("%s: register_blkdev failed %d\n", DEVICE_NAME, error); 843 return error; 844 } 845 ps3vram_major = error; 846 847 pr_info("%s: registered block device major %d\n", DEVICE_NAME, 848 ps3vram_major); 849 850 error = ps3_system_bus_driver_register(&ps3vram); 851 if (error) 852 unregister_blkdev(ps3vram_major, DEVICE_NAME); 853 854 return error; 855 } 856 857 static void __exit ps3vram_exit(void) 858 { 859 ps3_system_bus_driver_unregister(&ps3vram); 860 unregister_blkdev(ps3vram_major, DEVICE_NAME); 861 } 862 863 module_init(ps3vram_init); 864 module_exit(ps3vram_exit); 865 866 MODULE_LICENSE("GPL"); 867 MODULE_DESCRIPTION("PS3 Video RAM Storage Driver"); 868 MODULE_AUTHOR("Sony Corporation"); 869 MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK); 870