1 /* 2 * ps3vram - Use extra PS3 video ram as block device. 3 * 4 * Copyright 2009 Sony Corporation 5 * 6 * Based on the MTD ps3vram driver, which is 7 * Copyright (c) 2007-2008 Jim Paris <jim@jtan.com> 8 * Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr> 9 */ 10 11 #include <linux/blkdev.h> 12 #include <linux/delay.h> 13 #include <linux/module.h> 14 #include <linux/proc_fs.h> 15 #include <linux/seq_file.h> 16 #include <linux/slab.h> 17 18 #include <asm/cell-regs.h> 19 #include <asm/firmware.h> 20 #include <asm/lv1call.h> 21 #include <asm/ps3.h> 22 #include <asm/ps3gpu.h> 23 24 25 #define DEVICE_NAME "ps3vram" 26 27 28 #define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */ 29 #define XDR_IOIF 0x0c000000 30 31 #define FIFO_BASE XDR_IOIF 32 #define FIFO_SIZE (64 * 1024) 33 34 #define DMA_PAGE_SIZE (4 * 1024) 35 36 #define CACHE_PAGE_SIZE (256 * 1024) 37 #define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE) 38 39 #define CACHE_OFFSET CACHE_PAGE_SIZE 40 #define FIFO_OFFSET 0 41 42 #define CTRL_PUT 0x10 43 #define CTRL_GET 0x11 44 #define CTRL_TOP 0x15 45 46 #define UPLOAD_SUBCH 1 47 #define DOWNLOAD_SUBCH 2 48 49 #define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c 50 #define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104 51 52 #define CACHE_PAGE_PRESENT 1 53 #define CACHE_PAGE_DIRTY 2 54 55 struct ps3vram_tag { 56 unsigned int address; 57 unsigned int flags; 58 }; 59 60 struct ps3vram_cache { 61 unsigned int page_count; 62 unsigned int page_size; 63 struct ps3vram_tag *tags; 64 unsigned int hit; 65 unsigned int miss; 66 }; 67 68 struct ps3vram_priv { 69 struct request_queue *queue; 70 struct gendisk *gendisk; 71 72 u64 size; 73 74 u64 memory_handle; 75 u64 context_handle; 76 u32 __iomem *ctrl; 77 void __iomem *reports; 78 u8 *xdr_buf; 79 80 u32 *fifo_base; 81 u32 *fifo_ptr; 82 83 struct ps3vram_cache cache; 84 85 spinlock_t lock; /* protecting list of bios */ 86 struct bio_list list; 87 }; 88 89 90 static int ps3vram_major; 91 92 93 static const struct block_device_operations ps3vram_fops = { 94 .owner = THIS_MODULE, 95 }; 96 97 98 #define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */ 99 #define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */ 100 #define DMA_NOTIFIER_SIZE 0x40 101 #define NOTIFIER 7 /* notifier used for completion report */ 102 103 static char *size = "256M"; 104 module_param(size, charp, 0); 105 MODULE_PARM_DESC(size, "memory size"); 106 107 static u32 __iomem *ps3vram_get_notifier(void __iomem *reports, int notifier) 108 { 109 return reports + DMA_NOTIFIER_OFFSET_BASE + 110 DMA_NOTIFIER_SIZE * notifier; 111 } 112 113 static void ps3vram_notifier_reset(struct ps3_system_bus_device *dev) 114 { 115 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 116 u32 __iomem *notify = ps3vram_get_notifier(priv->reports, NOTIFIER); 117 int i; 118 119 for (i = 0; i < 4; i++) 120 iowrite32be(0xffffffff, notify + i); 121 } 122 123 static int ps3vram_notifier_wait(struct ps3_system_bus_device *dev, 124 unsigned int timeout_ms) 125 { 126 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 127 u32 __iomem *notify = ps3vram_get_notifier(priv->reports, NOTIFIER); 128 unsigned long timeout; 129 130 for (timeout = 20; timeout; timeout--) { 131 if (!ioread32be(notify + 3)) 132 return 0; 133 udelay(10); 134 } 135 136 timeout = jiffies + msecs_to_jiffies(timeout_ms); 137 138 do { 139 if (!ioread32be(notify + 3)) 140 return 0; 141 msleep(1); 142 } while (time_before(jiffies, timeout)); 143 144 return -ETIMEDOUT; 145 } 146 147 static void ps3vram_init_ring(struct ps3_system_bus_device *dev) 148 { 149 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 150 151 iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_PUT); 152 iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_GET); 153 } 154 155 static int ps3vram_wait_ring(struct ps3_system_bus_device *dev, 156 unsigned int timeout_ms) 157 { 158 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 159 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms); 160 161 do { 162 if (ioread32be(priv->ctrl + CTRL_PUT) == ioread32be(priv->ctrl + CTRL_GET)) 163 return 0; 164 msleep(1); 165 } while (time_before(jiffies, timeout)); 166 167 dev_warn(&dev->core, "FIFO timeout (%08x/%08x/%08x)\n", 168 ioread32be(priv->ctrl + CTRL_PUT), ioread32be(priv->ctrl + CTRL_GET), 169 ioread32be(priv->ctrl + CTRL_TOP)); 170 171 return -ETIMEDOUT; 172 } 173 174 static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data) 175 { 176 *(priv->fifo_ptr)++ = data; 177 } 178 179 static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan, u32 tag, 180 u32 size) 181 { 182 ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag); 183 } 184 185 static void ps3vram_rewind_ring(struct ps3_system_bus_device *dev) 186 { 187 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 188 int status; 189 190 ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET)); 191 192 iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_PUT); 193 194 /* asking the HV for a blit will kick the FIFO */ 195 status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0); 196 if (status) 197 dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n", 198 __func__, status); 199 200 priv->fifo_ptr = priv->fifo_base; 201 } 202 203 static void ps3vram_fire_ring(struct ps3_system_bus_device *dev) 204 { 205 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 206 int status; 207 208 mutex_lock(&ps3_gpu_mutex); 209 210 iowrite32be(FIFO_BASE + FIFO_OFFSET + (priv->fifo_ptr - priv->fifo_base) 211 * sizeof(u32), priv->ctrl + CTRL_PUT); 212 213 /* asking the HV for a blit will kick the FIFO */ 214 status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0); 215 if (status) 216 dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n", 217 __func__, status); 218 219 if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) > 220 FIFO_SIZE - 1024) { 221 dev_dbg(&dev->core, "FIFO full, rewinding\n"); 222 ps3vram_wait_ring(dev, 200); 223 ps3vram_rewind_ring(dev); 224 } 225 226 mutex_unlock(&ps3_gpu_mutex); 227 } 228 229 static void ps3vram_bind(struct ps3_system_bus_device *dev) 230 { 231 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 232 233 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1); 234 ps3vram_out_ring(priv, 0x31337303); 235 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3); 236 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER); 237 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */ 238 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */ 239 240 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1); 241 ps3vram_out_ring(priv, 0x3137c0de); 242 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3); 243 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER); 244 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */ 245 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */ 246 247 ps3vram_fire_ring(dev); 248 } 249 250 static int ps3vram_upload(struct ps3_system_bus_device *dev, 251 unsigned int src_offset, unsigned int dst_offset, 252 int len, int count) 253 { 254 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 255 256 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 257 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); 258 ps3vram_out_ring(priv, XDR_IOIF + src_offset); 259 ps3vram_out_ring(priv, dst_offset); 260 ps3vram_out_ring(priv, len); 261 ps3vram_out_ring(priv, len); 262 ps3vram_out_ring(priv, len); 263 ps3vram_out_ring(priv, count); 264 ps3vram_out_ring(priv, (1 << 8) | 1); 265 ps3vram_out_ring(priv, 0); 266 267 ps3vram_notifier_reset(dev); 268 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 269 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1); 270 ps3vram_out_ring(priv, 0); 271 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1); 272 ps3vram_out_ring(priv, 0); 273 ps3vram_fire_ring(dev); 274 if (ps3vram_notifier_wait(dev, 200) < 0) { 275 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__); 276 return -1; 277 } 278 279 return 0; 280 } 281 282 static int ps3vram_download(struct ps3_system_bus_device *dev, 283 unsigned int src_offset, unsigned int dst_offset, 284 int len, int count) 285 { 286 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 287 288 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 289 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); 290 ps3vram_out_ring(priv, src_offset); 291 ps3vram_out_ring(priv, XDR_IOIF + dst_offset); 292 ps3vram_out_ring(priv, len); 293 ps3vram_out_ring(priv, len); 294 ps3vram_out_ring(priv, len); 295 ps3vram_out_ring(priv, count); 296 ps3vram_out_ring(priv, (1 << 8) | 1); 297 ps3vram_out_ring(priv, 0); 298 299 ps3vram_notifier_reset(dev); 300 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 301 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1); 302 ps3vram_out_ring(priv, 0); 303 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1); 304 ps3vram_out_ring(priv, 0); 305 ps3vram_fire_ring(dev); 306 if (ps3vram_notifier_wait(dev, 200) < 0) { 307 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__); 308 return -1; 309 } 310 311 return 0; 312 } 313 314 static void ps3vram_cache_evict(struct ps3_system_bus_device *dev, int entry) 315 { 316 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 317 struct ps3vram_cache *cache = &priv->cache; 318 319 if (!(cache->tags[entry].flags & CACHE_PAGE_DIRTY)) 320 return; 321 322 dev_dbg(&dev->core, "Flushing %d: 0x%08x\n", entry, 323 cache->tags[entry].address); 324 if (ps3vram_upload(dev, CACHE_OFFSET + entry * cache->page_size, 325 cache->tags[entry].address, DMA_PAGE_SIZE, 326 cache->page_size / DMA_PAGE_SIZE) < 0) { 327 dev_err(&dev->core, 328 "Failed to upload from 0x%x to " "0x%x size 0x%x\n", 329 entry * cache->page_size, cache->tags[entry].address, 330 cache->page_size); 331 } 332 cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY; 333 } 334 335 static void ps3vram_cache_load(struct ps3_system_bus_device *dev, int entry, 336 unsigned int address) 337 { 338 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 339 struct ps3vram_cache *cache = &priv->cache; 340 341 dev_dbg(&dev->core, "Fetching %d: 0x%08x\n", entry, address); 342 if (ps3vram_download(dev, address, 343 CACHE_OFFSET + entry * cache->page_size, 344 DMA_PAGE_SIZE, 345 cache->page_size / DMA_PAGE_SIZE) < 0) { 346 dev_err(&dev->core, 347 "Failed to download from 0x%x to 0x%x size 0x%x\n", 348 address, entry * cache->page_size, cache->page_size); 349 } 350 351 cache->tags[entry].address = address; 352 cache->tags[entry].flags |= CACHE_PAGE_PRESENT; 353 } 354 355 356 static void ps3vram_cache_flush(struct ps3_system_bus_device *dev) 357 { 358 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 359 struct ps3vram_cache *cache = &priv->cache; 360 int i; 361 362 dev_dbg(&dev->core, "FLUSH\n"); 363 for (i = 0; i < cache->page_count; i++) { 364 ps3vram_cache_evict(dev, i); 365 cache->tags[i].flags = 0; 366 } 367 } 368 369 static unsigned int ps3vram_cache_match(struct ps3_system_bus_device *dev, 370 loff_t address) 371 { 372 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 373 struct ps3vram_cache *cache = &priv->cache; 374 unsigned int base; 375 unsigned int offset; 376 int i; 377 static int counter; 378 379 offset = (unsigned int) (address & (cache->page_size - 1)); 380 base = (unsigned int) (address - offset); 381 382 /* fully associative check */ 383 for (i = 0; i < cache->page_count; i++) { 384 if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) && 385 cache->tags[i].address == base) { 386 cache->hit++; 387 dev_dbg(&dev->core, "Found entry %d: 0x%08x\n", i, 388 cache->tags[i].address); 389 return i; 390 } 391 } 392 393 /* choose a random entry */ 394 i = (jiffies + (counter++)) % cache->page_count; 395 dev_dbg(&dev->core, "Using entry %d\n", i); 396 397 ps3vram_cache_evict(dev, i); 398 ps3vram_cache_load(dev, i, base); 399 400 cache->miss++; 401 return i; 402 } 403 404 static int ps3vram_cache_init(struct ps3_system_bus_device *dev) 405 { 406 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 407 408 priv->cache.page_count = CACHE_PAGE_COUNT; 409 priv->cache.page_size = CACHE_PAGE_SIZE; 410 priv->cache.tags = kzalloc(sizeof(struct ps3vram_tag) * 411 CACHE_PAGE_COUNT, GFP_KERNEL); 412 if (!priv->cache.tags) 413 return -ENOMEM; 414 415 dev_info(&dev->core, "Created ram cache: %d entries, %d KiB each\n", 416 CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024); 417 418 return 0; 419 } 420 421 static void ps3vram_cache_cleanup(struct ps3_system_bus_device *dev) 422 { 423 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 424 425 ps3vram_cache_flush(dev); 426 kfree(priv->cache.tags); 427 } 428 429 static blk_status_t ps3vram_read(struct ps3_system_bus_device *dev, loff_t from, 430 size_t len, size_t *retlen, u_char *buf) 431 { 432 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 433 unsigned int cached, count; 434 435 dev_dbg(&dev->core, "%s: from=0x%08x len=0x%zx\n", __func__, 436 (unsigned int)from, len); 437 438 if (from >= priv->size) 439 return BLK_STS_IOERR; 440 441 if (len > priv->size - from) 442 len = priv->size - from; 443 444 /* Copy from vram to buf */ 445 count = len; 446 while (count) { 447 unsigned int offset, avail; 448 unsigned int entry; 449 450 offset = (unsigned int) (from & (priv->cache.page_size - 1)); 451 avail = priv->cache.page_size - offset; 452 453 entry = ps3vram_cache_match(dev, from); 454 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset; 455 456 dev_dbg(&dev->core, "%s: from=%08x cached=%08x offset=%08x " 457 "avail=%08x count=%08x\n", __func__, 458 (unsigned int)from, cached, offset, avail, count); 459 460 if (avail > count) 461 avail = count; 462 memcpy(buf, priv->xdr_buf + cached, avail); 463 464 buf += avail; 465 count -= avail; 466 from += avail; 467 } 468 469 *retlen = len; 470 return 0; 471 } 472 473 static blk_status_t ps3vram_write(struct ps3_system_bus_device *dev, loff_t to, 474 size_t len, size_t *retlen, const u_char *buf) 475 { 476 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 477 unsigned int cached, count; 478 479 if (to >= priv->size) 480 return BLK_STS_IOERR; 481 482 if (len > priv->size - to) 483 len = priv->size - to; 484 485 /* Copy from buf to vram */ 486 count = len; 487 while (count) { 488 unsigned int offset, avail; 489 unsigned int entry; 490 491 offset = (unsigned int) (to & (priv->cache.page_size - 1)); 492 avail = priv->cache.page_size - offset; 493 494 entry = ps3vram_cache_match(dev, to); 495 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset; 496 497 dev_dbg(&dev->core, "%s: to=%08x cached=%08x offset=%08x " 498 "avail=%08x count=%08x\n", __func__, (unsigned int)to, 499 cached, offset, avail, count); 500 501 if (avail > count) 502 avail = count; 503 memcpy(priv->xdr_buf + cached, buf, avail); 504 505 priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY; 506 507 buf += avail; 508 count -= avail; 509 to += avail; 510 } 511 512 *retlen = len; 513 return 0; 514 } 515 516 static int ps3vram_proc_show(struct seq_file *m, void *v) 517 { 518 struct ps3vram_priv *priv = m->private; 519 520 seq_printf(m, "hit:%u\nmiss:%u\n", priv->cache.hit, priv->cache.miss); 521 return 0; 522 } 523 524 static int ps3vram_proc_open(struct inode *inode, struct file *file) 525 { 526 return single_open(file, ps3vram_proc_show, PDE_DATA(inode)); 527 } 528 529 static const struct file_operations ps3vram_proc_fops = { 530 .owner = THIS_MODULE, 531 .open = ps3vram_proc_open, 532 .read = seq_read, 533 .llseek = seq_lseek, 534 .release = single_release, 535 }; 536 537 static void ps3vram_proc_init(struct ps3_system_bus_device *dev) 538 { 539 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 540 struct proc_dir_entry *pde; 541 542 pde = proc_create_data(DEVICE_NAME, 0444, NULL, &ps3vram_proc_fops, 543 priv); 544 if (!pde) 545 dev_warn(&dev->core, "failed to create /proc entry\n"); 546 } 547 548 static struct bio *ps3vram_do_bio(struct ps3_system_bus_device *dev, 549 struct bio *bio) 550 { 551 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 552 int write = bio_data_dir(bio) == WRITE; 553 const char *op = write ? "write" : "read"; 554 loff_t offset = bio->bi_iter.bi_sector << 9; 555 blk_status_t error = 0; 556 struct bio_vec bvec; 557 struct bvec_iter iter; 558 struct bio *next; 559 560 bio_for_each_segment(bvec, bio, iter) { 561 /* PS3 is ppc64, so we don't handle highmem */ 562 char *ptr = page_address(bvec.bv_page) + bvec.bv_offset; 563 size_t len = bvec.bv_len, retlen; 564 565 dev_dbg(&dev->core, " %s %zu bytes at offset %llu\n", op, 566 len, offset); 567 if (write) 568 error = ps3vram_write(dev, offset, len, &retlen, ptr); 569 else 570 error = ps3vram_read(dev, offset, len, &retlen, ptr); 571 572 if (error) { 573 dev_err(&dev->core, "%s failed\n", op); 574 goto out; 575 } 576 577 if (retlen != len) { 578 dev_err(&dev->core, "Short %s\n", op); 579 error = BLK_STS_IOERR; 580 goto out; 581 } 582 583 offset += len; 584 } 585 586 dev_dbg(&dev->core, "%s completed\n", op); 587 588 out: 589 spin_lock_irq(&priv->lock); 590 bio_list_pop(&priv->list); 591 next = bio_list_peek(&priv->list); 592 spin_unlock_irq(&priv->lock); 593 594 bio->bi_status = error; 595 bio_endio(bio); 596 return next; 597 } 598 599 static blk_qc_t ps3vram_make_request(struct request_queue *q, struct bio *bio) 600 { 601 struct ps3_system_bus_device *dev = q->queuedata; 602 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 603 int busy; 604 605 dev_dbg(&dev->core, "%s\n", __func__); 606 607 blk_queue_split(q, &bio); 608 609 spin_lock_irq(&priv->lock); 610 busy = !bio_list_empty(&priv->list); 611 bio_list_add(&priv->list, bio); 612 spin_unlock_irq(&priv->lock); 613 614 if (busy) 615 return BLK_QC_T_NONE; 616 617 do { 618 bio = ps3vram_do_bio(dev, bio); 619 } while (bio); 620 621 return BLK_QC_T_NONE; 622 } 623 624 static int ps3vram_probe(struct ps3_system_bus_device *dev) 625 { 626 struct ps3vram_priv *priv; 627 int error, status; 628 struct request_queue *queue; 629 struct gendisk *gendisk; 630 u64 ddr_size, ddr_lpar, ctrl_lpar, info_lpar, reports_lpar, 631 reports_size, xdr_lpar; 632 char *rest; 633 634 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 635 if (!priv) { 636 error = -ENOMEM; 637 goto fail; 638 } 639 640 spin_lock_init(&priv->lock); 641 bio_list_init(&priv->list); 642 ps3_system_bus_set_drvdata(dev, priv); 643 644 /* Allocate XDR buffer (1MiB aligned) */ 645 priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL, 646 get_order(XDR_BUF_SIZE)); 647 if (priv->xdr_buf == NULL) { 648 dev_err(&dev->core, "Could not allocate XDR buffer\n"); 649 error = -ENOMEM; 650 goto fail_free_priv; 651 } 652 653 /* Put FIFO at begginning of XDR buffer */ 654 priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET); 655 priv->fifo_ptr = priv->fifo_base; 656 657 /* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */ 658 if (ps3_open_hv_device(dev)) { 659 dev_err(&dev->core, "ps3_open_hv_device failed\n"); 660 error = -EAGAIN; 661 goto out_free_xdr_buf; 662 } 663 664 /* Request memory */ 665 status = -1; 666 ddr_size = ALIGN(memparse(size, &rest), 1024*1024); 667 if (!ddr_size) { 668 dev_err(&dev->core, "Specified size is too small\n"); 669 error = -EINVAL; 670 goto out_close_gpu; 671 } 672 673 while (ddr_size > 0) { 674 status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0, 675 &priv->memory_handle, 676 &ddr_lpar); 677 if (!status) 678 break; 679 ddr_size -= 1024*1024; 680 } 681 if (status) { 682 dev_err(&dev->core, "lv1_gpu_memory_allocate failed %d\n", 683 status); 684 error = -ENOMEM; 685 goto out_close_gpu; 686 } 687 688 /* Request context */ 689 status = lv1_gpu_context_allocate(priv->memory_handle, 0, 690 &priv->context_handle, &ctrl_lpar, 691 &info_lpar, &reports_lpar, 692 &reports_size); 693 if (status) { 694 dev_err(&dev->core, "lv1_gpu_context_allocate failed %d\n", 695 status); 696 error = -ENOMEM; 697 goto out_free_memory; 698 } 699 700 /* Map XDR buffer to RSX */ 701 xdr_lpar = ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)); 702 status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, 703 xdr_lpar, XDR_BUF_SIZE, 704 CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | 705 CBE_IOPTE_M); 706 if (status) { 707 dev_err(&dev->core, "lv1_gpu_context_iomap failed %d\n", 708 status); 709 error = -ENOMEM; 710 goto out_free_context; 711 } 712 713 priv->ctrl = ioremap(ctrl_lpar, 64 * 1024); 714 if (!priv->ctrl) { 715 dev_err(&dev->core, "ioremap CTRL failed\n"); 716 error = -ENOMEM; 717 goto out_unmap_context; 718 } 719 720 priv->reports = ioremap(reports_lpar, reports_size); 721 if (!priv->reports) { 722 dev_err(&dev->core, "ioremap REPORTS failed\n"); 723 error = -ENOMEM; 724 goto out_unmap_ctrl; 725 } 726 727 mutex_lock(&ps3_gpu_mutex); 728 ps3vram_init_ring(dev); 729 mutex_unlock(&ps3_gpu_mutex); 730 731 priv->size = ddr_size; 732 733 ps3vram_bind(dev); 734 735 mutex_lock(&ps3_gpu_mutex); 736 error = ps3vram_wait_ring(dev, 100); 737 mutex_unlock(&ps3_gpu_mutex); 738 if (error < 0) { 739 dev_err(&dev->core, "Failed to initialize channels\n"); 740 error = -ETIMEDOUT; 741 goto out_unmap_reports; 742 } 743 744 error = ps3vram_cache_init(dev); 745 if (error < 0) { 746 goto out_unmap_reports; 747 } 748 749 ps3vram_proc_init(dev); 750 751 queue = blk_alloc_queue(GFP_KERNEL); 752 if (!queue) { 753 dev_err(&dev->core, "blk_alloc_queue failed\n"); 754 error = -ENOMEM; 755 goto out_cache_cleanup; 756 } 757 758 priv->queue = queue; 759 queue->queuedata = dev; 760 blk_queue_make_request(queue, ps3vram_make_request); 761 blk_queue_max_segments(queue, BLK_MAX_SEGMENTS); 762 blk_queue_max_segment_size(queue, BLK_MAX_SEGMENT_SIZE); 763 blk_queue_max_hw_sectors(queue, BLK_SAFE_MAX_SECTORS); 764 765 gendisk = alloc_disk(1); 766 if (!gendisk) { 767 dev_err(&dev->core, "alloc_disk failed\n"); 768 error = -ENOMEM; 769 goto fail_cleanup_queue; 770 } 771 772 priv->gendisk = gendisk; 773 gendisk->major = ps3vram_major; 774 gendisk->first_minor = 0; 775 gendisk->fops = &ps3vram_fops; 776 gendisk->queue = queue; 777 gendisk->private_data = dev; 778 strlcpy(gendisk->disk_name, DEVICE_NAME, sizeof(gendisk->disk_name)); 779 set_capacity(gendisk, priv->size >> 9); 780 781 dev_info(&dev->core, "%s: Using %lu MiB of GPU memory\n", 782 gendisk->disk_name, get_capacity(gendisk) >> 11); 783 784 device_add_disk(&dev->core, gendisk); 785 return 0; 786 787 fail_cleanup_queue: 788 blk_cleanup_queue(queue); 789 out_cache_cleanup: 790 remove_proc_entry(DEVICE_NAME, NULL); 791 ps3vram_cache_cleanup(dev); 792 out_unmap_reports: 793 iounmap(priv->reports); 794 out_unmap_ctrl: 795 iounmap(priv->ctrl); 796 out_unmap_context: 797 lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, xdr_lpar, 798 XDR_BUF_SIZE, CBE_IOPTE_M); 799 out_free_context: 800 lv1_gpu_context_free(priv->context_handle); 801 out_free_memory: 802 lv1_gpu_memory_free(priv->memory_handle); 803 out_close_gpu: 804 ps3_close_hv_device(dev); 805 out_free_xdr_buf: 806 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE)); 807 fail_free_priv: 808 kfree(priv); 809 ps3_system_bus_set_drvdata(dev, NULL); 810 fail: 811 return error; 812 } 813 814 static int ps3vram_remove(struct ps3_system_bus_device *dev) 815 { 816 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 817 818 del_gendisk(priv->gendisk); 819 put_disk(priv->gendisk); 820 blk_cleanup_queue(priv->queue); 821 remove_proc_entry(DEVICE_NAME, NULL); 822 ps3vram_cache_cleanup(dev); 823 iounmap(priv->reports); 824 iounmap(priv->ctrl); 825 lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, 826 ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)), 827 XDR_BUF_SIZE, CBE_IOPTE_M); 828 lv1_gpu_context_free(priv->context_handle); 829 lv1_gpu_memory_free(priv->memory_handle); 830 ps3_close_hv_device(dev); 831 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE)); 832 kfree(priv); 833 ps3_system_bus_set_drvdata(dev, NULL); 834 return 0; 835 } 836 837 static struct ps3_system_bus_driver ps3vram = { 838 .match_id = PS3_MATCH_ID_GPU, 839 .match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK, 840 .core.name = DEVICE_NAME, 841 .core.owner = THIS_MODULE, 842 .probe = ps3vram_probe, 843 .remove = ps3vram_remove, 844 .shutdown = ps3vram_remove, 845 }; 846 847 848 static int __init ps3vram_init(void) 849 { 850 int error; 851 852 if (!firmware_has_feature(FW_FEATURE_PS3_LV1)) 853 return -ENODEV; 854 855 error = register_blkdev(0, DEVICE_NAME); 856 if (error <= 0) { 857 pr_err("%s: register_blkdev failed %d\n", DEVICE_NAME, error); 858 return error; 859 } 860 ps3vram_major = error; 861 862 pr_info("%s: registered block device major %d\n", DEVICE_NAME, 863 ps3vram_major); 864 865 error = ps3_system_bus_driver_register(&ps3vram); 866 if (error) 867 unregister_blkdev(ps3vram_major, DEVICE_NAME); 868 869 return error; 870 } 871 872 static void __exit ps3vram_exit(void) 873 { 874 ps3_system_bus_driver_unregister(&ps3vram); 875 unregister_blkdev(ps3vram_major, DEVICE_NAME); 876 } 877 878 module_init(ps3vram_init); 879 module_exit(ps3vram_exit); 880 881 MODULE_LICENSE("GPL"); 882 MODULE_DESCRIPTION("PS3 Video RAM Storage Driver"); 883 MODULE_AUTHOR("Sony Corporation"); 884 MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK); 885