xref: /openbmc/linux/drivers/block/ps3vram.c (revision 8bd1369b)
1 /*
2  * ps3vram - Use extra PS3 video ram as block device.
3  *
4  * Copyright 2009 Sony Corporation
5  *
6  * Based on the MTD ps3vram driver, which is
7  * Copyright (c) 2007-2008 Jim Paris <jim@jtan.com>
8  * Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr>
9  */
10 
11 #include <linux/blkdev.h>
12 #include <linux/delay.h>
13 #include <linux/module.h>
14 #include <linux/proc_fs.h>
15 #include <linux/seq_file.h>
16 #include <linux/slab.h>
17 
18 #include <asm/cell-regs.h>
19 #include <asm/firmware.h>
20 #include <asm/lv1call.h>
21 #include <asm/ps3.h>
22 #include <asm/ps3gpu.h>
23 
24 
25 #define DEVICE_NAME		"ps3vram"
26 
27 
28 #define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */
29 #define XDR_IOIF 0x0c000000
30 
31 #define FIFO_BASE XDR_IOIF
32 #define FIFO_SIZE (64 * 1024)
33 
34 #define DMA_PAGE_SIZE (4 * 1024)
35 
36 #define CACHE_PAGE_SIZE (256 * 1024)
37 #define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE)
38 
39 #define CACHE_OFFSET CACHE_PAGE_SIZE
40 #define FIFO_OFFSET 0
41 
42 #define CTRL_PUT 0x10
43 #define CTRL_GET 0x11
44 #define CTRL_TOP 0x15
45 
46 #define UPLOAD_SUBCH	1
47 #define DOWNLOAD_SUBCH	2
48 
49 #define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN	0x0000030c
50 #define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY	0x00000104
51 
52 #define CACHE_PAGE_PRESENT 1
53 #define CACHE_PAGE_DIRTY   2
54 
55 struct ps3vram_tag {
56 	unsigned int address;
57 	unsigned int flags;
58 };
59 
60 struct ps3vram_cache {
61 	unsigned int page_count;
62 	unsigned int page_size;
63 	struct ps3vram_tag *tags;
64 	unsigned int hit;
65 	unsigned int miss;
66 };
67 
68 struct ps3vram_priv {
69 	struct request_queue *queue;
70 	struct gendisk *gendisk;
71 
72 	u64 size;
73 
74 	u64 memory_handle;
75 	u64 context_handle;
76 	u32 __iomem *ctrl;
77 	void __iomem *reports;
78 	u8 *xdr_buf;
79 
80 	u32 *fifo_base;
81 	u32 *fifo_ptr;
82 
83 	struct ps3vram_cache cache;
84 
85 	spinlock_t lock;	/* protecting list of bios */
86 	struct bio_list list;
87 };
88 
89 
90 static int ps3vram_major;
91 
92 
93 static const struct block_device_operations ps3vram_fops = {
94 	.owner		= THIS_MODULE,
95 };
96 
97 
98 #define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */
99 #define DMA_NOTIFIER_OFFSET_BASE 0x1000     /* first DMA notifier offset */
100 #define DMA_NOTIFIER_SIZE        0x40
101 #define NOTIFIER 7	/* notifier used for completion report */
102 
103 static char *size = "256M";
104 module_param(size, charp, 0);
105 MODULE_PARM_DESC(size, "memory size");
106 
107 static u32 __iomem *ps3vram_get_notifier(void __iomem *reports, int notifier)
108 {
109 	return reports + DMA_NOTIFIER_OFFSET_BASE +
110 	       DMA_NOTIFIER_SIZE * notifier;
111 }
112 
113 static void ps3vram_notifier_reset(struct ps3_system_bus_device *dev)
114 {
115 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
116 	u32 __iomem *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
117 	int i;
118 
119 	for (i = 0; i < 4; i++)
120 		iowrite32be(0xffffffff, notify + i);
121 }
122 
123 static int ps3vram_notifier_wait(struct ps3_system_bus_device *dev,
124 				 unsigned int timeout_ms)
125 {
126 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
127 	u32 __iomem *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
128 	unsigned long timeout;
129 
130 	for (timeout = 20; timeout; timeout--) {
131 		if (!ioread32be(notify + 3))
132 			return 0;
133 		udelay(10);
134 	}
135 
136 	timeout = jiffies + msecs_to_jiffies(timeout_ms);
137 
138 	do {
139 		if (!ioread32be(notify + 3))
140 			return 0;
141 		msleep(1);
142 	} while (time_before(jiffies, timeout));
143 
144 	return -ETIMEDOUT;
145 }
146 
147 static void ps3vram_init_ring(struct ps3_system_bus_device *dev)
148 {
149 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
150 
151 	iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_PUT);
152 	iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_GET);
153 }
154 
155 static int ps3vram_wait_ring(struct ps3_system_bus_device *dev,
156 			     unsigned int timeout_ms)
157 {
158 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
159 	unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
160 
161 	do {
162 		if (ioread32be(priv->ctrl + CTRL_PUT) == ioread32be(priv->ctrl + CTRL_GET))
163 			return 0;
164 		msleep(1);
165 	} while (time_before(jiffies, timeout));
166 
167 	dev_warn(&dev->core, "FIFO timeout (%08x/%08x/%08x)\n",
168 		 ioread32be(priv->ctrl + CTRL_PUT), ioread32be(priv->ctrl + CTRL_GET),
169 		 ioread32be(priv->ctrl + CTRL_TOP));
170 
171 	return -ETIMEDOUT;
172 }
173 
174 static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data)
175 {
176 	*(priv->fifo_ptr)++ = data;
177 }
178 
179 static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan, u32 tag,
180 			       u32 size)
181 {
182 	ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag);
183 }
184 
185 static void ps3vram_rewind_ring(struct ps3_system_bus_device *dev)
186 {
187 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
188 	int status;
189 
190 	ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET));
191 
192 	iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_PUT);
193 
194 	/* asking the HV for a blit will kick the FIFO */
195 	status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0);
196 	if (status)
197 		dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n",
198 			__func__, status);
199 
200 	priv->fifo_ptr = priv->fifo_base;
201 }
202 
203 static void ps3vram_fire_ring(struct ps3_system_bus_device *dev)
204 {
205 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
206 	int status;
207 
208 	mutex_lock(&ps3_gpu_mutex);
209 
210 	iowrite32be(FIFO_BASE + FIFO_OFFSET + (priv->fifo_ptr - priv->fifo_base)
211 		* sizeof(u32), priv->ctrl + CTRL_PUT);
212 
213 	/* asking the HV for a blit will kick the FIFO */
214 	status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0);
215 	if (status)
216 		dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n",
217 			__func__, status);
218 
219 	if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) >
220 	    FIFO_SIZE - 1024) {
221 		dev_dbg(&dev->core, "FIFO full, rewinding\n");
222 		ps3vram_wait_ring(dev, 200);
223 		ps3vram_rewind_ring(dev);
224 	}
225 
226 	mutex_unlock(&ps3_gpu_mutex);
227 }
228 
229 static void ps3vram_bind(struct ps3_system_bus_device *dev)
230 {
231 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
232 
233 	ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1);
234 	ps3vram_out_ring(priv, 0x31337303);
235 	ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3);
236 	ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
237 	ps3vram_out_ring(priv, 0xfeed0001);	/* DMA system RAM instance */
238 	ps3vram_out_ring(priv, 0xfeed0000);     /* DMA video RAM instance */
239 
240 	ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1);
241 	ps3vram_out_ring(priv, 0x3137c0de);
242 	ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3);
243 	ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
244 	ps3vram_out_ring(priv, 0xfeed0000);	/* DMA video RAM instance */
245 	ps3vram_out_ring(priv, 0xfeed0001);	/* DMA system RAM instance */
246 
247 	ps3vram_fire_ring(dev);
248 }
249 
250 static int ps3vram_upload(struct ps3_system_bus_device *dev,
251 			  unsigned int src_offset, unsigned int dst_offset,
252 			  int len, int count)
253 {
254 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
255 
256 	ps3vram_begin_ring(priv, UPLOAD_SUBCH,
257 			   NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
258 	ps3vram_out_ring(priv, XDR_IOIF + src_offset);
259 	ps3vram_out_ring(priv, dst_offset);
260 	ps3vram_out_ring(priv, len);
261 	ps3vram_out_ring(priv, len);
262 	ps3vram_out_ring(priv, len);
263 	ps3vram_out_ring(priv, count);
264 	ps3vram_out_ring(priv, (1 << 8) | 1);
265 	ps3vram_out_ring(priv, 0);
266 
267 	ps3vram_notifier_reset(dev);
268 	ps3vram_begin_ring(priv, UPLOAD_SUBCH,
269 			   NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
270 	ps3vram_out_ring(priv, 0);
271 	ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1);
272 	ps3vram_out_ring(priv, 0);
273 	ps3vram_fire_ring(dev);
274 	if (ps3vram_notifier_wait(dev, 200) < 0) {
275 		dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
276 		return -1;
277 	}
278 
279 	return 0;
280 }
281 
282 static int ps3vram_download(struct ps3_system_bus_device *dev,
283 			    unsigned int src_offset, unsigned int dst_offset,
284 			    int len, int count)
285 {
286 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
287 
288 	ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
289 			   NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
290 	ps3vram_out_ring(priv, src_offset);
291 	ps3vram_out_ring(priv, XDR_IOIF + dst_offset);
292 	ps3vram_out_ring(priv, len);
293 	ps3vram_out_ring(priv, len);
294 	ps3vram_out_ring(priv, len);
295 	ps3vram_out_ring(priv, count);
296 	ps3vram_out_ring(priv, (1 << 8) | 1);
297 	ps3vram_out_ring(priv, 0);
298 
299 	ps3vram_notifier_reset(dev);
300 	ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
301 			   NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
302 	ps3vram_out_ring(priv, 0);
303 	ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1);
304 	ps3vram_out_ring(priv, 0);
305 	ps3vram_fire_ring(dev);
306 	if (ps3vram_notifier_wait(dev, 200) < 0) {
307 		dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
308 		return -1;
309 	}
310 
311 	return 0;
312 }
313 
314 static void ps3vram_cache_evict(struct ps3_system_bus_device *dev, int entry)
315 {
316 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
317 	struct ps3vram_cache *cache = &priv->cache;
318 
319 	if (!(cache->tags[entry].flags & CACHE_PAGE_DIRTY))
320 		return;
321 
322 	dev_dbg(&dev->core, "Flushing %d: 0x%08x\n", entry,
323 		cache->tags[entry].address);
324 	if (ps3vram_upload(dev, CACHE_OFFSET + entry * cache->page_size,
325 			   cache->tags[entry].address, DMA_PAGE_SIZE,
326 			   cache->page_size / DMA_PAGE_SIZE) < 0) {
327 		dev_err(&dev->core,
328 			"Failed to upload from 0x%x to " "0x%x size 0x%x\n",
329 			entry * cache->page_size, cache->tags[entry].address,
330 			cache->page_size);
331 	}
332 	cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY;
333 }
334 
335 static void ps3vram_cache_load(struct ps3_system_bus_device *dev, int entry,
336 			       unsigned int address)
337 {
338 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
339 	struct ps3vram_cache *cache = &priv->cache;
340 
341 	dev_dbg(&dev->core, "Fetching %d: 0x%08x\n", entry, address);
342 	if (ps3vram_download(dev, address,
343 			     CACHE_OFFSET + entry * cache->page_size,
344 			     DMA_PAGE_SIZE,
345 			     cache->page_size / DMA_PAGE_SIZE) < 0) {
346 		dev_err(&dev->core,
347 			"Failed to download from 0x%x to 0x%x size 0x%x\n",
348 			address, entry * cache->page_size, cache->page_size);
349 	}
350 
351 	cache->tags[entry].address = address;
352 	cache->tags[entry].flags |= CACHE_PAGE_PRESENT;
353 }
354 
355 
356 static void ps3vram_cache_flush(struct ps3_system_bus_device *dev)
357 {
358 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
359 	struct ps3vram_cache *cache = &priv->cache;
360 	int i;
361 
362 	dev_dbg(&dev->core, "FLUSH\n");
363 	for (i = 0; i < cache->page_count; i++) {
364 		ps3vram_cache_evict(dev, i);
365 		cache->tags[i].flags = 0;
366 	}
367 }
368 
369 static unsigned int ps3vram_cache_match(struct ps3_system_bus_device *dev,
370 					loff_t address)
371 {
372 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
373 	struct ps3vram_cache *cache = &priv->cache;
374 	unsigned int base;
375 	unsigned int offset;
376 	int i;
377 	static int counter;
378 
379 	offset = (unsigned int) (address & (cache->page_size - 1));
380 	base = (unsigned int) (address - offset);
381 
382 	/* fully associative check */
383 	for (i = 0; i < cache->page_count; i++) {
384 		if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) &&
385 		    cache->tags[i].address == base) {
386 			cache->hit++;
387 			dev_dbg(&dev->core, "Found entry %d: 0x%08x\n", i,
388 				cache->tags[i].address);
389 			return i;
390 		}
391 	}
392 
393 	/* choose a random entry */
394 	i = (jiffies + (counter++)) % cache->page_count;
395 	dev_dbg(&dev->core, "Using entry %d\n", i);
396 
397 	ps3vram_cache_evict(dev, i);
398 	ps3vram_cache_load(dev, i, base);
399 
400 	cache->miss++;
401 	return i;
402 }
403 
404 static int ps3vram_cache_init(struct ps3_system_bus_device *dev)
405 {
406 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
407 
408 	priv->cache.page_count = CACHE_PAGE_COUNT;
409 	priv->cache.page_size = CACHE_PAGE_SIZE;
410 	priv->cache.tags = kcalloc(CACHE_PAGE_COUNT,
411 				   sizeof(struct ps3vram_tag),
412 				   GFP_KERNEL);
413 	if (!priv->cache.tags)
414 		return -ENOMEM;
415 
416 	dev_info(&dev->core, "Created ram cache: %d entries, %d KiB each\n",
417 		CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024);
418 
419 	return 0;
420 }
421 
422 static void ps3vram_cache_cleanup(struct ps3_system_bus_device *dev)
423 {
424 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
425 
426 	ps3vram_cache_flush(dev);
427 	kfree(priv->cache.tags);
428 }
429 
430 static blk_status_t ps3vram_read(struct ps3_system_bus_device *dev, loff_t from,
431 			size_t len, size_t *retlen, u_char *buf)
432 {
433 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
434 	unsigned int cached, count;
435 
436 	dev_dbg(&dev->core, "%s: from=0x%08x len=0x%zx\n", __func__,
437 		(unsigned int)from, len);
438 
439 	if (from >= priv->size)
440 		return BLK_STS_IOERR;
441 
442 	if (len > priv->size - from)
443 		len = priv->size - from;
444 
445 	/* Copy from vram to buf */
446 	count = len;
447 	while (count) {
448 		unsigned int offset, avail;
449 		unsigned int entry;
450 
451 		offset = (unsigned int) (from & (priv->cache.page_size - 1));
452 		avail  = priv->cache.page_size - offset;
453 
454 		entry = ps3vram_cache_match(dev, from);
455 		cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
456 
457 		dev_dbg(&dev->core, "%s: from=%08x cached=%08x offset=%08x "
458 			"avail=%08x count=%08x\n", __func__,
459 			(unsigned int)from, cached, offset, avail, count);
460 
461 		if (avail > count)
462 			avail = count;
463 		memcpy(buf, priv->xdr_buf + cached, avail);
464 
465 		buf += avail;
466 		count -= avail;
467 		from += avail;
468 	}
469 
470 	*retlen = len;
471 	return 0;
472 }
473 
474 static blk_status_t ps3vram_write(struct ps3_system_bus_device *dev, loff_t to,
475 			 size_t len, size_t *retlen, const u_char *buf)
476 {
477 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
478 	unsigned int cached, count;
479 
480 	if (to >= priv->size)
481 		return BLK_STS_IOERR;
482 
483 	if (len > priv->size - to)
484 		len = priv->size - to;
485 
486 	/* Copy from buf to vram */
487 	count = len;
488 	while (count) {
489 		unsigned int offset, avail;
490 		unsigned int entry;
491 
492 		offset = (unsigned int) (to & (priv->cache.page_size - 1));
493 		avail  = priv->cache.page_size - offset;
494 
495 		entry = ps3vram_cache_match(dev, to);
496 		cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
497 
498 		dev_dbg(&dev->core, "%s: to=%08x cached=%08x offset=%08x "
499 			"avail=%08x count=%08x\n", __func__, (unsigned int)to,
500 			cached, offset, avail, count);
501 
502 		if (avail > count)
503 			avail = count;
504 		memcpy(priv->xdr_buf + cached, buf, avail);
505 
506 		priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY;
507 
508 		buf += avail;
509 		count -= avail;
510 		to += avail;
511 	}
512 
513 	*retlen = len;
514 	return 0;
515 }
516 
517 static int ps3vram_proc_show(struct seq_file *m, void *v)
518 {
519 	struct ps3vram_priv *priv = m->private;
520 
521 	seq_printf(m, "hit:%u\nmiss:%u\n", priv->cache.hit, priv->cache.miss);
522 	return 0;
523 }
524 
525 static void ps3vram_proc_init(struct ps3_system_bus_device *dev)
526 {
527 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
528 	struct proc_dir_entry *pde;
529 
530 	pde = proc_create_single_data(DEVICE_NAME, 0444, NULL,
531 			ps3vram_proc_show, priv);
532 	if (!pde)
533 		dev_warn(&dev->core, "failed to create /proc entry\n");
534 }
535 
536 static struct bio *ps3vram_do_bio(struct ps3_system_bus_device *dev,
537 				  struct bio *bio)
538 {
539 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
540 	int write = bio_data_dir(bio) == WRITE;
541 	const char *op = write ? "write" : "read";
542 	loff_t offset = bio->bi_iter.bi_sector << 9;
543 	blk_status_t error = 0;
544 	struct bio_vec bvec;
545 	struct bvec_iter iter;
546 	struct bio *next;
547 
548 	bio_for_each_segment(bvec, bio, iter) {
549 		/* PS3 is ppc64, so we don't handle highmem */
550 		char *ptr = page_address(bvec.bv_page) + bvec.bv_offset;
551 		size_t len = bvec.bv_len, retlen;
552 
553 		dev_dbg(&dev->core, "    %s %zu bytes at offset %llu\n", op,
554 			len, offset);
555 		if (write)
556 			error = ps3vram_write(dev, offset, len, &retlen, ptr);
557 		else
558 			error = ps3vram_read(dev, offset, len, &retlen, ptr);
559 
560 		if (error) {
561 			dev_err(&dev->core, "%s failed\n", op);
562 			goto out;
563 		}
564 
565 		if (retlen != len) {
566 			dev_err(&dev->core, "Short %s\n", op);
567 			error = BLK_STS_IOERR;
568 			goto out;
569 		}
570 
571 		offset += len;
572 	}
573 
574 	dev_dbg(&dev->core, "%s completed\n", op);
575 
576 out:
577 	spin_lock_irq(&priv->lock);
578 	bio_list_pop(&priv->list);
579 	next = bio_list_peek(&priv->list);
580 	spin_unlock_irq(&priv->lock);
581 
582 	bio->bi_status = error;
583 	bio_endio(bio);
584 	return next;
585 }
586 
587 static blk_qc_t ps3vram_make_request(struct request_queue *q, struct bio *bio)
588 {
589 	struct ps3_system_bus_device *dev = q->queuedata;
590 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
591 	int busy;
592 
593 	dev_dbg(&dev->core, "%s\n", __func__);
594 
595 	blk_queue_split(q, &bio);
596 
597 	spin_lock_irq(&priv->lock);
598 	busy = !bio_list_empty(&priv->list);
599 	bio_list_add(&priv->list, bio);
600 	spin_unlock_irq(&priv->lock);
601 
602 	if (busy)
603 		return BLK_QC_T_NONE;
604 
605 	do {
606 		bio = ps3vram_do_bio(dev, bio);
607 	} while (bio);
608 
609 	return BLK_QC_T_NONE;
610 }
611 
612 static int ps3vram_probe(struct ps3_system_bus_device *dev)
613 {
614 	struct ps3vram_priv *priv;
615 	int error, status;
616 	struct request_queue *queue;
617 	struct gendisk *gendisk;
618 	u64 ddr_size, ddr_lpar, ctrl_lpar, info_lpar, reports_lpar,
619 	    reports_size, xdr_lpar;
620 	char *rest;
621 
622 	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
623 	if (!priv) {
624 		error = -ENOMEM;
625 		goto fail;
626 	}
627 
628 	spin_lock_init(&priv->lock);
629 	bio_list_init(&priv->list);
630 	ps3_system_bus_set_drvdata(dev, priv);
631 
632 	/* Allocate XDR buffer (1MiB aligned) */
633 	priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL,
634 		get_order(XDR_BUF_SIZE));
635 	if (priv->xdr_buf == NULL) {
636 		dev_err(&dev->core, "Could not allocate XDR buffer\n");
637 		error = -ENOMEM;
638 		goto fail_free_priv;
639 	}
640 
641 	/* Put FIFO at begginning of XDR buffer */
642 	priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET);
643 	priv->fifo_ptr = priv->fifo_base;
644 
645 	/* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */
646 	if (ps3_open_hv_device(dev)) {
647 		dev_err(&dev->core, "ps3_open_hv_device failed\n");
648 		error = -EAGAIN;
649 		goto out_free_xdr_buf;
650 	}
651 
652 	/* Request memory */
653 	status = -1;
654 	ddr_size = ALIGN(memparse(size, &rest), 1024*1024);
655 	if (!ddr_size) {
656 		dev_err(&dev->core, "Specified size is too small\n");
657 		error = -EINVAL;
658 		goto out_close_gpu;
659 	}
660 
661 	while (ddr_size > 0) {
662 		status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0,
663 						 &priv->memory_handle,
664 						 &ddr_lpar);
665 		if (!status)
666 			break;
667 		ddr_size -= 1024*1024;
668 	}
669 	if (status) {
670 		dev_err(&dev->core, "lv1_gpu_memory_allocate failed %d\n",
671 			status);
672 		error = -ENOMEM;
673 		goto out_close_gpu;
674 	}
675 
676 	/* Request context */
677 	status = lv1_gpu_context_allocate(priv->memory_handle, 0,
678 					  &priv->context_handle, &ctrl_lpar,
679 					  &info_lpar, &reports_lpar,
680 					  &reports_size);
681 	if (status) {
682 		dev_err(&dev->core, "lv1_gpu_context_allocate failed %d\n",
683 			status);
684 		error = -ENOMEM;
685 		goto out_free_memory;
686 	}
687 
688 	/* Map XDR buffer to RSX */
689 	xdr_lpar = ps3_mm_phys_to_lpar(__pa(priv->xdr_buf));
690 	status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
691 				       xdr_lpar, XDR_BUF_SIZE,
692 				       CBE_IOPTE_PP_W | CBE_IOPTE_PP_R |
693 				       CBE_IOPTE_M);
694 	if (status) {
695 		dev_err(&dev->core, "lv1_gpu_context_iomap failed %d\n",
696 			status);
697 		error = -ENOMEM;
698 		goto out_free_context;
699 	}
700 
701 	priv->ctrl = ioremap(ctrl_lpar, 64 * 1024);
702 	if (!priv->ctrl) {
703 		dev_err(&dev->core, "ioremap CTRL failed\n");
704 		error = -ENOMEM;
705 		goto out_unmap_context;
706 	}
707 
708 	priv->reports = ioremap(reports_lpar, reports_size);
709 	if (!priv->reports) {
710 		dev_err(&dev->core, "ioremap REPORTS failed\n");
711 		error = -ENOMEM;
712 		goto out_unmap_ctrl;
713 	}
714 
715 	mutex_lock(&ps3_gpu_mutex);
716 	ps3vram_init_ring(dev);
717 	mutex_unlock(&ps3_gpu_mutex);
718 
719 	priv->size = ddr_size;
720 
721 	ps3vram_bind(dev);
722 
723 	mutex_lock(&ps3_gpu_mutex);
724 	error = ps3vram_wait_ring(dev, 100);
725 	mutex_unlock(&ps3_gpu_mutex);
726 	if (error < 0) {
727 		dev_err(&dev->core, "Failed to initialize channels\n");
728 		error = -ETIMEDOUT;
729 		goto out_unmap_reports;
730 	}
731 
732 	error = ps3vram_cache_init(dev);
733 	if (error < 0) {
734 		goto out_unmap_reports;
735 	}
736 
737 	ps3vram_proc_init(dev);
738 
739 	queue = blk_alloc_queue(GFP_KERNEL);
740 	if (!queue) {
741 		dev_err(&dev->core, "blk_alloc_queue failed\n");
742 		error = -ENOMEM;
743 		goto out_cache_cleanup;
744 	}
745 
746 	priv->queue = queue;
747 	queue->queuedata = dev;
748 	blk_queue_make_request(queue, ps3vram_make_request);
749 	blk_queue_max_segments(queue, BLK_MAX_SEGMENTS);
750 	blk_queue_max_segment_size(queue, BLK_MAX_SEGMENT_SIZE);
751 	blk_queue_max_hw_sectors(queue, BLK_SAFE_MAX_SECTORS);
752 
753 	gendisk = alloc_disk(1);
754 	if (!gendisk) {
755 		dev_err(&dev->core, "alloc_disk failed\n");
756 		error = -ENOMEM;
757 		goto fail_cleanup_queue;
758 	}
759 
760 	priv->gendisk = gendisk;
761 	gendisk->major = ps3vram_major;
762 	gendisk->first_minor = 0;
763 	gendisk->fops = &ps3vram_fops;
764 	gendisk->queue = queue;
765 	gendisk->private_data = dev;
766 	strlcpy(gendisk->disk_name, DEVICE_NAME, sizeof(gendisk->disk_name));
767 	set_capacity(gendisk, priv->size >> 9);
768 
769 	dev_info(&dev->core, "%s: Using %lu MiB of GPU memory\n",
770 		 gendisk->disk_name, get_capacity(gendisk) >> 11);
771 
772 	device_add_disk(&dev->core, gendisk);
773 	return 0;
774 
775 fail_cleanup_queue:
776 	blk_cleanup_queue(queue);
777 out_cache_cleanup:
778 	remove_proc_entry(DEVICE_NAME, NULL);
779 	ps3vram_cache_cleanup(dev);
780 out_unmap_reports:
781 	iounmap(priv->reports);
782 out_unmap_ctrl:
783 	iounmap(priv->ctrl);
784 out_unmap_context:
785 	lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, xdr_lpar,
786 			      XDR_BUF_SIZE, CBE_IOPTE_M);
787 out_free_context:
788 	lv1_gpu_context_free(priv->context_handle);
789 out_free_memory:
790 	lv1_gpu_memory_free(priv->memory_handle);
791 out_close_gpu:
792 	ps3_close_hv_device(dev);
793 out_free_xdr_buf:
794 	free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
795 fail_free_priv:
796 	kfree(priv);
797 	ps3_system_bus_set_drvdata(dev, NULL);
798 fail:
799 	return error;
800 }
801 
802 static int ps3vram_remove(struct ps3_system_bus_device *dev)
803 {
804 	struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
805 
806 	del_gendisk(priv->gendisk);
807 	put_disk(priv->gendisk);
808 	blk_cleanup_queue(priv->queue);
809 	remove_proc_entry(DEVICE_NAME, NULL);
810 	ps3vram_cache_cleanup(dev);
811 	iounmap(priv->reports);
812 	iounmap(priv->ctrl);
813 	lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
814 			      ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)),
815 			      XDR_BUF_SIZE, CBE_IOPTE_M);
816 	lv1_gpu_context_free(priv->context_handle);
817 	lv1_gpu_memory_free(priv->memory_handle);
818 	ps3_close_hv_device(dev);
819 	free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
820 	kfree(priv);
821 	ps3_system_bus_set_drvdata(dev, NULL);
822 	return 0;
823 }
824 
825 static struct ps3_system_bus_driver ps3vram = {
826 	.match_id	= PS3_MATCH_ID_GPU,
827 	.match_sub_id	= PS3_MATCH_SUB_ID_GPU_RAMDISK,
828 	.core.name	= DEVICE_NAME,
829 	.core.owner	= THIS_MODULE,
830 	.probe		= ps3vram_probe,
831 	.remove		= ps3vram_remove,
832 	.shutdown	= ps3vram_remove,
833 };
834 
835 
836 static int __init ps3vram_init(void)
837 {
838 	int error;
839 
840 	if (!firmware_has_feature(FW_FEATURE_PS3_LV1))
841 		return -ENODEV;
842 
843 	error = register_blkdev(0, DEVICE_NAME);
844 	if (error <= 0) {
845 		pr_err("%s: register_blkdev failed %d\n", DEVICE_NAME, error);
846 		return error;
847 	}
848 	ps3vram_major = error;
849 
850 	pr_info("%s: registered block device major %d\n", DEVICE_NAME,
851 		ps3vram_major);
852 
853 	error = ps3_system_bus_driver_register(&ps3vram);
854 	if (error)
855 		unregister_blkdev(ps3vram_major, DEVICE_NAME);
856 
857 	return error;
858 }
859 
860 static void __exit ps3vram_exit(void)
861 {
862 	ps3_system_bus_driver_unregister(&ps3vram);
863 	unregister_blkdev(ps3vram_major, DEVICE_NAME);
864 }
865 
866 module_init(ps3vram_init);
867 module_exit(ps3vram_exit);
868 
869 MODULE_LICENSE("GPL");
870 MODULE_DESCRIPTION("PS3 Video RAM Storage Driver");
871 MODULE_AUTHOR("Sony Corporation");
872 MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK);
873