1d9b2a2bbSLauri Kasanen // SPDX-License-Identifier: GPL-2.0 2d9b2a2bbSLauri Kasanen /* 3d9b2a2bbSLauri Kasanen * Support for the N64 cart. 4d9b2a2bbSLauri Kasanen * 5d9b2a2bbSLauri Kasanen * Copyright (c) 2021 Lauri Kasanen 6d9b2a2bbSLauri Kasanen */ 7d9b2a2bbSLauri Kasanen 8f1e19224SChaitanya Kulkarni #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 9d9b2a2bbSLauri Kasanen #include <linux/bitops.h> 10d9b2a2bbSLauri Kasanen #include <linux/blkdev.h> 11d9b2a2bbSLauri Kasanen #include <linux/dma-mapping.h> 12d9b2a2bbSLauri Kasanen #include <linux/init.h> 13d9b2a2bbSLauri Kasanen #include <linux/module.h> 14d9b2a2bbSLauri Kasanen #include <linux/platform_device.h> 15d9b2a2bbSLauri Kasanen 16d9b2a2bbSLauri Kasanen static unsigned int start, size; 17d9b2a2bbSLauri Kasanen static u32 __iomem *reg_base; 18d9b2a2bbSLauri Kasanen static struct device *dev; 19d9b2a2bbSLauri Kasanen 20d9b2a2bbSLauri Kasanen #define PI_DRAM_REG 0 21d9b2a2bbSLauri Kasanen #define PI_CART_REG 1 22d9b2a2bbSLauri Kasanen #define PI_READ_REG 2 23d9b2a2bbSLauri Kasanen #define PI_WRITE_REG 3 24d9b2a2bbSLauri Kasanen #define PI_STATUS_REG 4 25d9b2a2bbSLauri Kasanen 26d9b2a2bbSLauri Kasanen #define PI_STATUS_DMA_BUSY (1 << 0) 27d9b2a2bbSLauri Kasanen #define PI_STATUS_IO_BUSY (1 << 1) 28d9b2a2bbSLauri Kasanen 29d9b2a2bbSLauri Kasanen #define CART_DOMAIN 0x10000000 30d9b2a2bbSLauri Kasanen #define CART_MAX 0x1FFFFFFF 31d9b2a2bbSLauri Kasanen 32d9b2a2bbSLauri Kasanen #define MIN_ALIGNMENT 8 33d9b2a2bbSLauri Kasanen 34d9b2a2bbSLauri Kasanen static void n64cart_write_reg(const u8 reg, const u32 value) 35d9b2a2bbSLauri Kasanen { 36d9b2a2bbSLauri Kasanen writel(value, reg_base + reg); 37d9b2a2bbSLauri Kasanen } 38d9b2a2bbSLauri Kasanen 39d9b2a2bbSLauri Kasanen static u32 n64cart_read_reg(const u8 reg) 40d9b2a2bbSLauri Kasanen { 41d9b2a2bbSLauri Kasanen return readl(reg_base + reg); 42d9b2a2bbSLauri Kasanen } 43d9b2a2bbSLauri Kasanen 44d9b2a2bbSLauri Kasanen static void n64cart_wait_dma(void) 45d9b2a2bbSLauri Kasanen { 46d9b2a2bbSLauri Kasanen while (n64cart_read_reg(PI_STATUS_REG) & 47d9b2a2bbSLauri Kasanen (PI_STATUS_DMA_BUSY | PI_STATUS_IO_BUSY)) 48d9b2a2bbSLauri Kasanen cpu_relax(); 49d9b2a2bbSLauri Kasanen } 50d9b2a2bbSLauri Kasanen 51d9b2a2bbSLauri Kasanen /* 52d9b2a2bbSLauri Kasanen * Process a single bvec of a bio. 53d9b2a2bbSLauri Kasanen */ 54d9b2a2bbSLauri Kasanen static bool n64cart_do_bvec(struct device *dev, struct bio_vec *bv, u32 pos) 55d9b2a2bbSLauri Kasanen { 56d9b2a2bbSLauri Kasanen dma_addr_t dma_addr; 57d9b2a2bbSLauri Kasanen const u32 bstart = pos + start; 58d9b2a2bbSLauri Kasanen 59d9b2a2bbSLauri Kasanen /* Alignment check */ 60d9b2a2bbSLauri Kasanen WARN_ON_ONCE((bv->bv_offset & (MIN_ALIGNMENT - 1)) || 61d9b2a2bbSLauri Kasanen (bv->bv_len & (MIN_ALIGNMENT - 1))); 62d9b2a2bbSLauri Kasanen 63d9b2a2bbSLauri Kasanen dma_addr = dma_map_bvec(dev, bv, DMA_FROM_DEVICE, 0); 64d9b2a2bbSLauri Kasanen if (dma_mapping_error(dev, dma_addr)) 65d9b2a2bbSLauri Kasanen return false; 66d9b2a2bbSLauri Kasanen 67d9b2a2bbSLauri Kasanen n64cart_wait_dma(); 68d9b2a2bbSLauri Kasanen 69d9b2a2bbSLauri Kasanen n64cart_write_reg(PI_DRAM_REG, dma_addr + bv->bv_offset); 70d9b2a2bbSLauri Kasanen n64cart_write_reg(PI_CART_REG, (bstart | CART_DOMAIN) & CART_MAX); 71d9b2a2bbSLauri Kasanen n64cart_write_reg(PI_WRITE_REG, bv->bv_len - 1); 72d9b2a2bbSLauri Kasanen 73d9b2a2bbSLauri Kasanen n64cart_wait_dma(); 74d9b2a2bbSLauri Kasanen 75d9b2a2bbSLauri Kasanen dma_unmap_page(dev, dma_addr, bv->bv_len, DMA_FROM_DEVICE); 76d9b2a2bbSLauri Kasanen return true; 77d9b2a2bbSLauri Kasanen } 78d9b2a2bbSLauri Kasanen 79d9b2a2bbSLauri Kasanen static blk_qc_t n64cart_submit_bio(struct bio *bio) 80d9b2a2bbSLauri Kasanen { 81d9b2a2bbSLauri Kasanen struct bio_vec bvec; 82d9b2a2bbSLauri Kasanen u32 pos; 83d9b2a2bbSLauri Kasanen struct bvec_iter iter; 84d9b2a2bbSLauri Kasanen 85d9b2a2bbSLauri Kasanen pos = bio->bi_iter.bi_sector << SECTOR_SHIFT; 86d9b2a2bbSLauri Kasanen 87d9b2a2bbSLauri Kasanen bio_for_each_segment(bvec, bio, iter) { 88d9b2a2bbSLauri Kasanen if (!n64cart_do_bvec(dev, &bvec, pos)) 89d9b2a2bbSLauri Kasanen goto io_error; 90d9b2a2bbSLauri Kasanen pos += bvec.bv_len; 91d9b2a2bbSLauri Kasanen } 92d9b2a2bbSLauri Kasanen 93d9b2a2bbSLauri Kasanen bio_endio(bio); 94d9b2a2bbSLauri Kasanen return BLK_QC_T_NONE; 95d9b2a2bbSLauri Kasanen io_error: 96d9b2a2bbSLauri Kasanen bio_io_error(bio); 97d9b2a2bbSLauri Kasanen return BLK_QC_T_NONE; 98d9b2a2bbSLauri Kasanen } 99d9b2a2bbSLauri Kasanen 100d9b2a2bbSLauri Kasanen static const struct block_device_operations n64cart_fops = { 101d9b2a2bbSLauri Kasanen .owner = THIS_MODULE, 102d9b2a2bbSLauri Kasanen .submit_bio = n64cart_submit_bio, 103d9b2a2bbSLauri Kasanen }; 104d9b2a2bbSLauri Kasanen 105d9b2a2bbSLauri Kasanen /* 106d9b2a2bbSLauri Kasanen * The target device is embedded and RAM-constrained. We save RAM 107d9b2a2bbSLauri Kasanen * by initializing in __init code that gets dropped late in boot. 108d9b2a2bbSLauri Kasanen * For the same reason there is no module or unloading support. 109d9b2a2bbSLauri Kasanen */ 110d9b2a2bbSLauri Kasanen static int __init n64cart_probe(struct platform_device *pdev) 111d9b2a2bbSLauri Kasanen { 112d9b2a2bbSLauri Kasanen int err; 113d9b2a2bbSLauri Kasanen struct request_queue *queue; 114d9b2a2bbSLauri Kasanen struct gendisk *disk; 115d9b2a2bbSLauri Kasanen 116d9b2a2bbSLauri Kasanen if (!start || !size) { 117f1e19224SChaitanya Kulkarni pr_err("start or size not specified\n"); 118d9b2a2bbSLauri Kasanen return -ENODEV; 119d9b2a2bbSLauri Kasanen } 120d9b2a2bbSLauri Kasanen 121d9b2a2bbSLauri Kasanen if (size & 4095) { 122f1e19224SChaitanya Kulkarni pr_err("size must be a multiple of 4K\n"); 123d9b2a2bbSLauri Kasanen return -ENODEV; 124d9b2a2bbSLauri Kasanen } 125d9b2a2bbSLauri Kasanen 126d9b2a2bbSLauri Kasanen queue = blk_alloc_queue(NUMA_NO_NODE); 127d9b2a2bbSLauri Kasanen if (!queue) { 128d9b2a2bbSLauri Kasanen return -ENOMEM; 129d9b2a2bbSLauri Kasanen } 130d9b2a2bbSLauri Kasanen 131d9b2a2bbSLauri Kasanen reg_base = devm_platform_ioremap_resource(pdev, 0); 132d9b2a2bbSLauri Kasanen if (!reg_base) { 133d9b2a2bbSLauri Kasanen err = -EINVAL; 134d9b2a2bbSLauri Kasanen goto fail_queue; 135d9b2a2bbSLauri Kasanen } 136d9b2a2bbSLauri Kasanen 137d9b2a2bbSLauri Kasanen disk = alloc_disk(0); 138d9b2a2bbSLauri Kasanen if (!disk) { 139d9b2a2bbSLauri Kasanen err = -ENOMEM; 140d9b2a2bbSLauri Kasanen goto fail_queue; 141d9b2a2bbSLauri Kasanen } 142d9b2a2bbSLauri Kasanen 143d9b2a2bbSLauri Kasanen dev = &pdev->dev; 144d9b2a2bbSLauri Kasanen 145d9b2a2bbSLauri Kasanen disk->first_minor = 0; 146d9b2a2bbSLauri Kasanen disk->queue = queue; 147d9b2a2bbSLauri Kasanen disk->flags = GENHD_FL_NO_PART_SCAN | GENHD_FL_EXT_DEVT; 148d9b2a2bbSLauri Kasanen disk->fops = &n64cart_fops; 149d9b2a2bbSLauri Kasanen strcpy(disk->disk_name, "n64cart"); 150d9b2a2bbSLauri Kasanen 151d9b2a2bbSLauri Kasanen set_capacity(disk, size / 512); 152d9b2a2bbSLauri Kasanen set_disk_ro(disk, 1); 153d9b2a2bbSLauri Kasanen 154d9b2a2bbSLauri Kasanen blk_queue_flag_set(QUEUE_FLAG_NONROT, queue); 155d9b2a2bbSLauri Kasanen blk_queue_physical_block_size(queue, 4096); 156d9b2a2bbSLauri Kasanen blk_queue_logical_block_size(queue, 4096); 157d9b2a2bbSLauri Kasanen 158d9b2a2bbSLauri Kasanen add_disk(disk); 159d9b2a2bbSLauri Kasanen 160d9b2a2bbSLauri Kasanen pr_info("n64cart: %u kb disk\n", size / 1024); 161d9b2a2bbSLauri Kasanen 162d9b2a2bbSLauri Kasanen return 0; 163d9b2a2bbSLauri Kasanen fail_queue: 164d9b2a2bbSLauri Kasanen blk_cleanup_queue(queue); 165d9b2a2bbSLauri Kasanen 166d9b2a2bbSLauri Kasanen return err; 167d9b2a2bbSLauri Kasanen } 168d9b2a2bbSLauri Kasanen 169d9b2a2bbSLauri Kasanen static struct platform_driver n64cart_driver = { 170d9b2a2bbSLauri Kasanen .driver = { 171d9b2a2bbSLauri Kasanen .name = "n64cart", 172d9b2a2bbSLauri Kasanen }, 173d9b2a2bbSLauri Kasanen }; 174d9b2a2bbSLauri Kasanen 175d9b2a2bbSLauri Kasanen static int __init n64cart_init(void) 176d9b2a2bbSLauri Kasanen { 177d9b2a2bbSLauri Kasanen return platform_driver_probe(&n64cart_driver, n64cart_probe); 178d9b2a2bbSLauri Kasanen } 179d9b2a2bbSLauri Kasanen 180d9b2a2bbSLauri Kasanen module_param(start, uint, 0); 181d9b2a2bbSLauri Kasanen MODULE_PARM_DESC(start, "Start address of the cart block data"); 182d9b2a2bbSLauri Kasanen 183d9b2a2bbSLauri Kasanen module_param(size, uint, 0); 184d9b2a2bbSLauri Kasanen MODULE_PARM_DESC(size, "Size of the cart block data, in bytes"); 185d9b2a2bbSLauri Kasanen 186d9b2a2bbSLauri Kasanen module_init(n64cart_init); 187*9ee8c9a1SChaitanya Kulkarni 188*9ee8c9a1SChaitanya Kulkarni MODULE_AUTHOR("Lauri Kasanen <cand@gmx.com>"); 189*9ee8c9a1SChaitanya Kulkarni MODULE_DESCRIPTION("Driver for the N64 cart"); 190*9ee8c9a1SChaitanya Kulkarni MODULE_LICENSE("GPL"); 191