1 /* 2 * mtip32xx.h - Header file for the P320 SSD Block Driver 3 * Copyright (C) 2011 Micron Technology, Inc. 4 * 5 * Portions of this code were derived from works subjected to the 6 * following copyright: 7 * Copyright (C) 2009 Integrated Device Technology, Inc. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 */ 20 21 #ifndef __MTIP32XX_H__ 22 #define __MTIP32XX_H__ 23 24 #include <linux/spinlock.h> 25 #include <linux/rwsem.h> 26 #include <linux/ata.h> 27 #include <linux/interrupt.h> 28 #include <linux/genhd.h> 29 30 /* Offset of Subsystem Device ID in pci confoguration space */ 31 #define PCI_SUBSYSTEM_DEVICEID 0x2E 32 33 /* offset of Device Control register in PCIe extended capabilites space */ 34 #define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET 0x48 35 36 /* check for erase mode support during secure erase */ 37 #define MTIP_SEC_ERASE_MODE 0x2 38 39 /* # of times to retry timed out/failed IOs */ 40 #define MTIP_MAX_RETRIES 2 41 42 /* Various timeout values in ms */ 43 #define MTIP_NCQ_CMD_TIMEOUT_MS 15000 44 #define MTIP_IOCTL_CMD_TIMEOUT_MS 5000 45 #define MTIP_INT_CMD_TIMEOUT_MS 5000 46 #define MTIP_QUIESCE_IO_TIMEOUT_MS (MTIP_NCQ_CMD_TIMEOUT_MS * \ 47 (MTIP_MAX_RETRIES + 1)) 48 49 /* check for timeouts every 500ms */ 50 #define MTIP_TIMEOUT_CHECK_PERIOD 500 51 52 /* ftl rebuild */ 53 #define MTIP_FTL_REBUILD_OFFSET 142 54 #define MTIP_FTL_REBUILD_MAGIC 0xED51 55 #define MTIP_FTL_REBUILD_TIMEOUT_MS 2400000 56 57 /* unaligned IO handling */ 58 #define MTIP_MAX_UNALIGNED_SLOTS 2 59 60 /* Macro to extract the tag bit number from a tag value. */ 61 #define MTIP_TAG_BIT(tag) (tag & 0x1F) 62 63 /* 64 * Macro to extract the tag index from a tag value. The index 65 * is used to access the correct s_active/Command Issue register based 66 * on the tag value. 67 */ 68 #define MTIP_TAG_INDEX(tag) (tag >> 5) 69 70 /* 71 * Maximum number of scatter gather entries 72 * a single command may have. 73 */ 74 #define MTIP_MAX_SG 504 75 76 /* 77 * Maximum number of slot groups (Command Issue & s_active registers) 78 * NOTE: This is the driver maximum; check dd->slot_groups for actual value. 79 */ 80 #define MTIP_MAX_SLOT_GROUPS 8 81 82 /* Internal command tag. */ 83 #define MTIP_TAG_INTERNAL 0 84 85 /* Micron Vendor ID & P320x SSD Device ID */ 86 #define PCI_VENDOR_ID_MICRON 0x1344 87 #define P320H_DEVICE_ID 0x5150 88 #define P320M_DEVICE_ID 0x5151 89 #define P320S_DEVICE_ID 0x5152 90 #define P325M_DEVICE_ID 0x5153 91 #define P420H_DEVICE_ID 0x5160 92 #define P420M_DEVICE_ID 0x5161 93 #define P425M_DEVICE_ID 0x5163 94 95 /* Driver name and version strings */ 96 #define MTIP_DRV_NAME "mtip32xx" 97 #define MTIP_DRV_VERSION "1.3.1" 98 99 /* Maximum number of minor device numbers per device. */ 100 #define MTIP_MAX_MINORS 16 101 102 /* Maximum number of supported command slots. */ 103 #define MTIP_MAX_COMMAND_SLOTS (MTIP_MAX_SLOT_GROUPS * 32) 104 105 /* 106 * Per-tag bitfield size in longs. 107 * Linux bit manipulation functions 108 * (i.e. test_and_set_bit, find_next_zero_bit) 109 * manipulate memory in longs, so we try to make the math work. 110 * take the slot groups and find the number of longs, rounding up. 111 * Careful! i386 and x86_64 use different size longs! 112 */ 113 #define U32_PER_LONG (sizeof(long) / sizeof(u32)) 114 #define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \ 115 (U32_PER_LONG-1))/U32_PER_LONG) 116 117 /* BAR number used to access the HBA registers. */ 118 #define MTIP_ABAR 5 119 120 #ifdef DEBUG 121 #define dbg_printk(format, arg...) \ 122 printk(pr_fmt(format), ##arg); 123 #else 124 #define dbg_printk(format, arg...) 125 #endif 126 127 #define MTIP_DFS_MAX_BUF_SIZE 1024 128 129 #define __force_bit2int (unsigned int __force) 130 131 enum { 132 /* below are bit numbers in 'flags' defined in mtip_port */ 133 MTIP_PF_IC_ACTIVE_BIT = 0, /* pio/ioctl */ 134 MTIP_PF_EH_ACTIVE_BIT = 1, /* error handling */ 135 MTIP_PF_SE_ACTIVE_BIT = 2, /* secure erase */ 136 MTIP_PF_DM_ACTIVE_BIT = 3, /* download microcde */ 137 MTIP_PF_TO_ACTIVE_BIT = 9, /* timeout handling */ 138 MTIP_PF_PAUSE_IO = ((1 << MTIP_PF_IC_ACTIVE_BIT) | 139 (1 << MTIP_PF_EH_ACTIVE_BIT) | 140 (1 << MTIP_PF_SE_ACTIVE_BIT) | 141 (1 << MTIP_PF_DM_ACTIVE_BIT) | 142 (1 << MTIP_PF_TO_ACTIVE_BIT)), 143 MTIP_PF_HOST_CAP_64 = 10, /* cache HOST_CAP_64 */ 144 145 MTIP_PF_SVC_THD_ACTIVE_BIT = 4, 146 MTIP_PF_ISSUE_CMDS_BIT = 5, 147 MTIP_PF_REBUILD_BIT = 6, 148 MTIP_PF_SVC_THD_STOP_BIT = 8, 149 150 MTIP_PF_SVC_THD_WORK = ((1 << MTIP_PF_EH_ACTIVE_BIT) | 151 (1 << MTIP_PF_ISSUE_CMDS_BIT) | 152 (1 << MTIP_PF_REBUILD_BIT) | 153 (1 << MTIP_PF_SVC_THD_STOP_BIT) | 154 (1 << MTIP_PF_TO_ACTIVE_BIT)), 155 156 /* below are bit numbers in 'dd_flag' defined in driver_data */ 157 MTIP_DDF_SEC_LOCK_BIT = 0, 158 MTIP_DDF_REMOVE_PENDING_BIT = 1, 159 MTIP_DDF_OVER_TEMP_BIT = 2, 160 MTIP_DDF_WRITE_PROTECT_BIT = 3, 161 MTIP_DDF_CLEANUP_BIT = 5, 162 MTIP_DDF_RESUME_BIT = 6, 163 MTIP_DDF_INIT_DONE_BIT = 7, 164 MTIP_DDF_REBUILD_FAILED_BIT = 8, 165 MTIP_DDF_REMOVAL_BIT = 9, 166 167 MTIP_DDF_STOP_IO = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) | 168 (1 << MTIP_DDF_SEC_LOCK_BIT) | 169 (1 << MTIP_DDF_OVER_TEMP_BIT) | 170 (1 << MTIP_DDF_WRITE_PROTECT_BIT) | 171 (1 << MTIP_DDF_REBUILD_FAILED_BIT)), 172 173 }; 174 175 struct smart_attr { 176 u8 attr_id; 177 u16 flags; 178 u8 cur; 179 u8 worst; 180 u32 data; 181 u8 res[3]; 182 } __packed; 183 184 struct mtip_work { 185 struct work_struct work; 186 void *port; 187 int cpu_binding; 188 u32 completed; 189 } ____cacheline_aligned_in_smp; 190 191 #define DEFINE_HANDLER(group) \ 192 void mtip_workq_sdbf##group(struct work_struct *work) \ 193 { \ 194 struct mtip_work *w = (struct mtip_work *) work; \ 195 mtip_workq_sdbfx(w->port, group, w->completed); \ 196 } 197 198 #define MTIP_TRIM_TIMEOUT_MS 240000 199 #define MTIP_MAX_TRIM_ENTRIES 8 200 #define MTIP_MAX_TRIM_ENTRY_LEN 0xfff8 201 202 struct mtip_trim_entry { 203 u32 lba; /* starting lba of region */ 204 u16 rsvd; /* unused */ 205 u16 range; /* # of 512b blocks to trim */ 206 } __packed; 207 208 struct mtip_trim { 209 /* Array of regions to trim */ 210 struct mtip_trim_entry entry[MTIP_MAX_TRIM_ENTRIES]; 211 } __packed; 212 213 /* Register Frame Information Structure (FIS), host to device. */ 214 struct host_to_dev_fis { 215 /* 216 * FIS type. 217 * - 27h Register FIS, host to device. 218 * - 34h Register FIS, device to host. 219 * - 39h DMA Activate FIS, device to host. 220 * - 41h DMA Setup FIS, bi-directional. 221 * - 46h Data FIS, bi-directional. 222 * - 58h BIST Activate FIS, bi-directional. 223 * - 5Fh PIO Setup FIS, device to host. 224 * - A1h Set Device Bits FIS, device to host. 225 */ 226 unsigned char type; 227 unsigned char opts; 228 unsigned char command; 229 unsigned char features; 230 231 union { 232 unsigned char lba_low; 233 unsigned char sector; 234 }; 235 union { 236 unsigned char lba_mid; 237 unsigned char cyl_low; 238 }; 239 union { 240 unsigned char lba_hi; 241 unsigned char cyl_hi; 242 }; 243 union { 244 unsigned char device; 245 unsigned char head; 246 }; 247 248 union { 249 unsigned char lba_low_ex; 250 unsigned char sector_ex; 251 }; 252 union { 253 unsigned char lba_mid_ex; 254 unsigned char cyl_low_ex; 255 }; 256 union { 257 unsigned char lba_hi_ex; 258 unsigned char cyl_hi_ex; 259 }; 260 unsigned char features_ex; 261 262 unsigned char sect_count; 263 unsigned char sect_cnt_ex; 264 unsigned char res2; 265 unsigned char control; 266 267 unsigned int res3; 268 }; 269 270 /* Command header structure. */ 271 struct mtip_cmd_hdr { 272 /* 273 * Command options. 274 * - Bits 31:16 Number of PRD entries. 275 * - Bits 15:8 Unused in this implementation. 276 * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries. 277 * - Bit 6 Write bit, should be set when writing data to the device. 278 * - Bit 5 Unused in this implementation. 279 * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes). 280 */ 281 unsigned int opts; 282 /* This field is unsed when using NCQ. */ 283 union { 284 unsigned int byte_count; 285 unsigned int status; 286 }; 287 /* 288 * Lower 32 bits of the command table address associated with this 289 * header. The command table addresses must be 128 byte aligned. 290 */ 291 unsigned int ctba; 292 /* 293 * If 64 bit addressing is used this field is the upper 32 bits 294 * of the command table address associated with this command. 295 */ 296 unsigned int ctbau; 297 /* Reserved and unused. */ 298 unsigned int res[4]; 299 }; 300 301 /* Command scatter gather structure (PRD). */ 302 struct mtip_cmd_sg { 303 /* 304 * Low 32 bits of the data buffer address. For P320 this 305 * address must be 8 byte aligned signified by bits 2:0 being 306 * set to 0. 307 */ 308 unsigned int dba; 309 /* 310 * When 64 bit addressing is used this field is the upper 311 * 32 bits of the data buffer address. 312 */ 313 unsigned int dba_upper; 314 /* Unused. */ 315 unsigned int reserved; 316 /* 317 * Bit 31: interrupt when this data block has been transferred. 318 * Bits 30..22: reserved 319 * Bits 21..0: byte count (minus 1). For P320 the byte count must be 320 * 8 byte aligned signified by bits 2:0 being set to 1. 321 */ 322 unsigned int info; 323 }; 324 struct mtip_port; 325 326 /* Structure used to describe a command. */ 327 struct mtip_cmd { 328 329 struct mtip_cmd_hdr *command_header; /* ptr to command header entry */ 330 331 dma_addr_t command_header_dma; /* corresponding physical address */ 332 333 void *command; /* ptr to command table entry */ 334 335 dma_addr_t command_dma; /* corresponding physical address */ 336 337 int scatter_ents; /* Number of scatter list entries used */ 338 339 int unaligned; /* command is unaligned on 4k boundary */ 340 341 struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */ 342 343 int retries; /* The number of retries left for this command. */ 344 345 int direction; /* Data transfer direction */ 346 blk_status_t status; 347 }; 348 349 /* Structure used to describe a port. */ 350 struct mtip_port { 351 /* Pointer back to the driver data for this port. */ 352 struct driver_data *dd; 353 /* 354 * Used to determine if the data pointed to by the 355 * identify field is valid. 356 */ 357 unsigned long identify_valid; 358 /* Base address of the memory mapped IO for the port. */ 359 void __iomem *mmio; 360 /* Array of pointers to the memory mapped s_active registers. */ 361 void __iomem *s_active[MTIP_MAX_SLOT_GROUPS]; 362 /* Array of pointers to the memory mapped completed registers. */ 363 void __iomem *completed[MTIP_MAX_SLOT_GROUPS]; 364 /* Array of pointers to the memory mapped Command Issue registers. */ 365 void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS]; 366 /* 367 * Pointer to the beginning of the command header memory as used 368 * by the driver. 369 */ 370 void *command_list; 371 /* 372 * Pointer to the beginning of the command header memory as used 373 * by the DMA. 374 */ 375 dma_addr_t command_list_dma; 376 /* 377 * Pointer to the beginning of the RX FIS memory as used 378 * by the driver. 379 */ 380 void *rxfis; 381 /* 382 * Pointer to the beginning of the RX FIS memory as used 383 * by the DMA. 384 */ 385 dma_addr_t rxfis_dma; 386 /* 387 * Pointer to the DMA region for RX Fis, Identify, RLE10, and SMART 388 */ 389 void *block1; 390 /* 391 * DMA address of region for RX Fis, Identify, RLE10, and SMART 392 */ 393 dma_addr_t block1_dma; 394 /* 395 * Pointer to the beginning of the identify data memory as used 396 * by the driver. 397 */ 398 u16 *identify; 399 /* 400 * Pointer to the beginning of the identify data memory as used 401 * by the DMA. 402 */ 403 dma_addr_t identify_dma; 404 /* 405 * Pointer to the beginning of a sector buffer that is used 406 * by the driver when issuing internal commands. 407 */ 408 u16 *sector_buffer; 409 /* 410 * Pointer to the beginning of a sector buffer that is used 411 * by the DMA when the driver issues internal commands. 412 */ 413 dma_addr_t sector_buffer_dma; 414 415 u16 *log_buf; 416 dma_addr_t log_buf_dma; 417 418 u8 *smart_buf; 419 dma_addr_t smart_buf_dma; 420 421 /* 422 * used to queue commands when an internal command is in progress 423 * or error handling is active 424 */ 425 unsigned long cmds_to_issue[SLOTBITS_IN_LONGS]; 426 /* Used by mtip_service_thread to wait for an event */ 427 wait_queue_head_t svc_wait; 428 /* 429 * indicates the state of the port. Also, helps the service thread 430 * to determine its action on wake up. 431 */ 432 unsigned long flags; 433 /* 434 * Timer used to complete commands that have been active for too long. 435 */ 436 unsigned long ic_pause_timer; 437 438 /* Semaphore to control queue depth of unaligned IOs */ 439 struct semaphore cmd_slot_unal; 440 441 /* Spinlock for working around command-issue bug. */ 442 spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS]; 443 }; 444 445 /* 446 * Driver private data structure. 447 * 448 * One structure is allocated per probed device. 449 */ 450 struct driver_data { 451 void __iomem *mmio; /* Base address of the HBA registers. */ 452 453 int major; /* Major device number. */ 454 455 int instance; /* Instance number. First device probed is 0, ... */ 456 457 struct gendisk *disk; /* Pointer to our gendisk structure. */ 458 459 struct pci_dev *pdev; /* Pointer to the PCI device structure. */ 460 461 struct request_queue *queue; /* Our request queue. */ 462 463 struct blk_mq_tag_set tags; /* blk_mq tags */ 464 465 struct mtip_port *port; /* Pointer to the port data structure. */ 466 467 unsigned product_type; /* magic value declaring the product type */ 468 469 unsigned slot_groups; /* number of slot groups the product supports */ 470 471 unsigned long index; /* Index to determine the disk name */ 472 473 unsigned long dd_flag; /* NOTE: use atomic bit operations on this */ 474 475 struct task_struct *mtip_svc_handler; /* task_struct of svc thd */ 476 477 struct dentry *dfs_node; 478 479 bool trim_supp; /* flag indicating trim support */ 480 481 bool sr; 482 483 int numa_node; /* NUMA support */ 484 485 char workq_name[32]; 486 487 struct workqueue_struct *isr_workq; 488 489 atomic_t irq_workers_active; 490 491 struct mtip_work work[MTIP_MAX_SLOT_GROUPS]; 492 493 int isr_binding; 494 495 struct block_device *bdev; 496 497 struct list_head online_list; /* linkage for online list */ 498 499 struct list_head remove_list; /* linkage for removing list */ 500 501 int unal_qdepth; /* qdepth of unaligned IO queue */ 502 }; 503 504 #endif 505