1 /* 2 * Driver for the Micron P320 SSD 3 * Copyright (C) 2011 Micron Technology, Inc. 4 * 5 * Portions of this code were derived from works subjected to the 6 * following copyright: 7 * Copyright (C) 2009 Integrated Device Technology, Inc. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 */ 20 21 #include <linux/pci.h> 22 #include <linux/interrupt.h> 23 #include <linux/ata.h> 24 #include <linux/delay.h> 25 #include <linux/hdreg.h> 26 #include <linux/uaccess.h> 27 #include <linux/random.h> 28 #include <linux/smp.h> 29 #include <linux/compat.h> 30 #include <linux/fs.h> 31 #include <linux/module.h> 32 #include <linux/genhd.h> 33 #include <linux/blkdev.h> 34 #include <linux/blk-mq.h> 35 #include <linux/bio.h> 36 #include <linux/dma-mapping.h> 37 #include <linux/idr.h> 38 #include <linux/kthread.h> 39 #include <../drivers/ata/ahci.h> 40 #include <linux/export.h> 41 #include <linux/debugfs.h> 42 #include <linux/prefetch.h> 43 #include "mtip32xx.h" 44 45 #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32) 46 47 /* DMA region containing RX Fis, Identify, RLE10, and SMART buffers */ 48 #define AHCI_RX_FIS_SZ 0x100 49 #define AHCI_RX_FIS_OFFSET 0x0 50 #define AHCI_IDFY_SZ ATA_SECT_SIZE 51 #define AHCI_IDFY_OFFSET 0x400 52 #define AHCI_SECTBUF_SZ ATA_SECT_SIZE 53 #define AHCI_SECTBUF_OFFSET 0x800 54 #define AHCI_SMARTBUF_SZ ATA_SECT_SIZE 55 #define AHCI_SMARTBUF_OFFSET 0xC00 56 /* 0x100 + 0x200 + 0x200 + 0x200 is smaller than 4k but we pad it out */ 57 #define BLOCK_DMA_ALLOC_SZ 4096 58 59 /* DMA region containing command table (should be 8192 bytes) */ 60 #define AHCI_CMD_SLOT_SZ sizeof(struct mtip_cmd_hdr) 61 #define AHCI_CMD_TBL_SZ (MTIP_MAX_COMMAND_SLOTS * AHCI_CMD_SLOT_SZ) 62 #define AHCI_CMD_TBL_OFFSET 0x0 63 64 /* DMA region per command (contains header and SGL) */ 65 #define AHCI_CMD_TBL_HDR_SZ 0x80 66 #define AHCI_CMD_TBL_HDR_OFFSET 0x0 67 #define AHCI_CMD_TBL_SGL_SZ (MTIP_MAX_SG * sizeof(struct mtip_cmd_sg)) 68 #define AHCI_CMD_TBL_SGL_OFFSET AHCI_CMD_TBL_HDR_SZ 69 #define CMD_DMA_ALLOC_SZ (AHCI_CMD_TBL_SGL_SZ + AHCI_CMD_TBL_HDR_SZ) 70 71 72 #define HOST_CAP_NZDMA (1 << 19) 73 #define HOST_HSORG 0xFC 74 #define HSORG_DISABLE_SLOTGRP_INTR (1<<24) 75 #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16) 76 #define HSORG_HWREV 0xFF00 77 #define HSORG_STYLE 0x8 78 #define HSORG_SLOTGROUPS 0x7 79 80 #define PORT_COMMAND_ISSUE 0x38 81 #define PORT_SDBV 0x7C 82 83 #define PORT_OFFSET 0x100 84 #define PORT_MEM_SIZE 0x80 85 86 #define PORT_IRQ_ERR \ 87 (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \ 88 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \ 89 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \ 90 PORT_IRQ_OVERFLOW) 91 #define PORT_IRQ_LEGACY \ 92 (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS) 93 #define PORT_IRQ_HANDLED \ 94 (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \ 95 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \ 96 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY) 97 #define DEF_PORT_IRQ \ 98 (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS) 99 100 /* product numbers */ 101 #define MTIP_PRODUCT_UNKNOWN 0x00 102 #define MTIP_PRODUCT_ASICFPGA 0x11 103 104 /* Device instance number, incremented each time a device is probed. */ 105 static int instance; 106 107 static struct list_head online_list; 108 static struct list_head removing_list; 109 static spinlock_t dev_lock; 110 111 /* 112 * Global variable used to hold the major block device number 113 * allocated in mtip_init(). 114 */ 115 static int mtip_major; 116 static struct dentry *dfs_parent; 117 static struct dentry *dfs_device_status; 118 119 static u32 cpu_use[NR_CPUS]; 120 121 static DEFINE_SPINLOCK(rssd_index_lock); 122 static DEFINE_IDA(rssd_index_ida); 123 124 static int mtip_block_initialize(struct driver_data *dd); 125 126 #ifdef CONFIG_COMPAT 127 struct mtip_compat_ide_task_request_s { 128 __u8 io_ports[8]; 129 __u8 hob_ports[8]; 130 ide_reg_valid_t out_flags; 131 ide_reg_valid_t in_flags; 132 int data_phase; 133 int req_cmd; 134 compat_ulong_t out_size; 135 compat_ulong_t in_size; 136 }; 137 #endif 138 139 /* 140 * This function check_for_surprise_removal is called 141 * while card is removed from the system and it will 142 * read the vendor id from the configration space 143 * 144 * @pdev Pointer to the pci_dev structure. 145 * 146 * return value 147 * true if device removed, else false 148 */ 149 static bool mtip_check_surprise_removal(struct pci_dev *pdev) 150 { 151 u16 vendor_id = 0; 152 struct driver_data *dd = pci_get_drvdata(pdev); 153 154 if (dd->sr) 155 return true; 156 157 /* Read the vendorID from the configuration space */ 158 pci_read_config_word(pdev, 0x00, &vendor_id); 159 if (vendor_id == 0xFFFF) { 160 dd->sr = true; 161 if (dd->queue) 162 set_bit(QUEUE_FLAG_DEAD, &dd->queue->queue_flags); 163 else 164 dev_warn(&dd->pdev->dev, 165 "%s: dd->queue is NULL\n", __func__); 166 return true; /* device removed */ 167 } 168 169 return false; /* device present */ 170 } 171 172 /* we have to use runtime tag to setup command header */ 173 static void mtip_init_cmd_header(struct request *rq) 174 { 175 struct driver_data *dd = rq->q->queuedata; 176 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); 177 u32 host_cap_64 = readl(dd->mmio + HOST_CAP) & HOST_CAP_64; 178 179 /* Point the command headers at the command tables. */ 180 cmd->command_header = dd->port->command_list + 181 (sizeof(struct mtip_cmd_hdr) * rq->tag); 182 cmd->command_header_dma = dd->port->command_list_dma + 183 (sizeof(struct mtip_cmd_hdr) * rq->tag); 184 185 if (host_cap_64) 186 cmd->command_header->ctbau = __force_bit2int cpu_to_le32((cmd->command_dma >> 16) >> 16); 187 188 cmd->command_header->ctba = __force_bit2int cpu_to_le32(cmd->command_dma & 0xFFFFFFFF); 189 } 190 191 static struct mtip_cmd *mtip_get_int_command(struct driver_data *dd) 192 { 193 struct request *rq; 194 195 if (mtip_check_surprise_removal(dd->pdev)) 196 return NULL; 197 198 rq = blk_mq_alloc_request(dd->queue, REQ_OP_DRV_IN, BLK_MQ_REQ_RESERVED); 199 if (IS_ERR(rq)) 200 return NULL; 201 202 /* Internal cmd isn't submitted via .queue_rq */ 203 mtip_init_cmd_header(rq); 204 205 return blk_mq_rq_to_pdu(rq); 206 } 207 208 static struct mtip_cmd *mtip_cmd_from_tag(struct driver_data *dd, 209 unsigned int tag) 210 { 211 struct blk_mq_hw_ctx *hctx = dd->queue->queue_hw_ctx[0]; 212 213 return blk_mq_rq_to_pdu(blk_mq_tag_to_rq(hctx->tags, tag)); 214 } 215 216 /* 217 * Reset the HBA (without sleeping) 218 * 219 * @dd Pointer to the driver data structure. 220 * 221 * return value 222 * 0 The reset was successful. 223 * -1 The HBA Reset bit did not clear. 224 */ 225 static int mtip_hba_reset(struct driver_data *dd) 226 { 227 unsigned long timeout; 228 229 /* Set the reset bit */ 230 writel(HOST_RESET, dd->mmio + HOST_CTL); 231 232 /* Flush */ 233 readl(dd->mmio + HOST_CTL); 234 235 /* 236 * Spin for up to 10 seconds waiting for reset acknowledgement. Spec 237 * is 1 sec but in LUN failure conditions, up to 10 secs are required 238 */ 239 timeout = jiffies + msecs_to_jiffies(10000); 240 do { 241 mdelay(10); 242 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) 243 return -1; 244 245 } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET) 246 && time_before(jiffies, timeout)); 247 248 if (readl(dd->mmio + HOST_CTL) & HOST_RESET) 249 return -1; 250 251 return 0; 252 } 253 254 /* 255 * Issue a command to the hardware. 256 * 257 * Set the appropriate bit in the s_active and Command Issue hardware 258 * registers, causing hardware command processing to begin. 259 * 260 * @port Pointer to the port structure. 261 * @tag The tag of the command to be issued. 262 * 263 * return value 264 * None 265 */ 266 static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag) 267 { 268 int group = tag >> 5; 269 270 /* guard SACT and CI registers */ 271 spin_lock(&port->cmd_issue_lock[group]); 272 writel((1 << MTIP_TAG_BIT(tag)), 273 port->s_active[MTIP_TAG_INDEX(tag)]); 274 writel((1 << MTIP_TAG_BIT(tag)), 275 port->cmd_issue[MTIP_TAG_INDEX(tag)]); 276 spin_unlock(&port->cmd_issue_lock[group]); 277 } 278 279 /* 280 * Enable/disable the reception of FIS 281 * 282 * @port Pointer to the port data structure 283 * @enable 1 to enable, 0 to disable 284 * 285 * return value 286 * Previous state: 1 enabled, 0 disabled 287 */ 288 static int mtip_enable_fis(struct mtip_port *port, int enable) 289 { 290 u32 tmp; 291 292 /* enable FIS reception */ 293 tmp = readl(port->mmio + PORT_CMD); 294 if (enable) 295 writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD); 296 else 297 writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD); 298 299 /* Flush */ 300 readl(port->mmio + PORT_CMD); 301 302 return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX)); 303 } 304 305 /* 306 * Enable/disable the DMA engine 307 * 308 * @port Pointer to the port data structure 309 * @enable 1 to enable, 0 to disable 310 * 311 * return value 312 * Previous state: 1 enabled, 0 disabled. 313 */ 314 static int mtip_enable_engine(struct mtip_port *port, int enable) 315 { 316 u32 tmp; 317 318 /* enable FIS reception */ 319 tmp = readl(port->mmio + PORT_CMD); 320 if (enable) 321 writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD); 322 else 323 writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD); 324 325 readl(port->mmio + PORT_CMD); 326 return (((tmp & PORT_CMD_START) == PORT_CMD_START)); 327 } 328 329 /* 330 * Enables the port DMA engine and FIS reception. 331 * 332 * return value 333 * None 334 */ 335 static inline void mtip_start_port(struct mtip_port *port) 336 { 337 /* Enable FIS reception */ 338 mtip_enable_fis(port, 1); 339 340 /* Enable the DMA engine */ 341 mtip_enable_engine(port, 1); 342 } 343 344 /* 345 * Deinitialize a port by disabling port interrupts, the DMA engine, 346 * and FIS reception. 347 * 348 * @port Pointer to the port structure 349 * 350 * return value 351 * None 352 */ 353 static inline void mtip_deinit_port(struct mtip_port *port) 354 { 355 /* Disable interrupts on this port */ 356 writel(0, port->mmio + PORT_IRQ_MASK); 357 358 /* Disable the DMA engine */ 359 mtip_enable_engine(port, 0); 360 361 /* Disable FIS reception */ 362 mtip_enable_fis(port, 0); 363 } 364 365 /* 366 * Initialize a port. 367 * 368 * This function deinitializes the port by calling mtip_deinit_port() and 369 * then initializes it by setting the command header and RX FIS addresses, 370 * clearing the SError register and any pending port interrupts before 371 * re-enabling the default set of port interrupts. 372 * 373 * @port Pointer to the port structure. 374 * 375 * return value 376 * None 377 */ 378 static void mtip_init_port(struct mtip_port *port) 379 { 380 int i; 381 mtip_deinit_port(port); 382 383 /* Program the command list base and FIS base addresses */ 384 if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) { 385 writel((port->command_list_dma >> 16) >> 16, 386 port->mmio + PORT_LST_ADDR_HI); 387 writel((port->rxfis_dma >> 16) >> 16, 388 port->mmio + PORT_FIS_ADDR_HI); 389 } 390 391 writel(port->command_list_dma & 0xFFFFFFFF, 392 port->mmio + PORT_LST_ADDR); 393 writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR); 394 395 /* Clear SError */ 396 writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR); 397 398 /* reset the completed registers.*/ 399 for (i = 0; i < port->dd->slot_groups; i++) 400 writel(0xFFFFFFFF, port->completed[i]); 401 402 /* Clear any pending interrupts for this port */ 403 writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT); 404 405 /* Clear any pending interrupts on the HBA. */ 406 writel(readl(port->dd->mmio + HOST_IRQ_STAT), 407 port->dd->mmio + HOST_IRQ_STAT); 408 409 /* Enable port interrupts */ 410 writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK); 411 } 412 413 /* 414 * Restart a port 415 * 416 * @port Pointer to the port data structure. 417 * 418 * return value 419 * None 420 */ 421 static void mtip_restart_port(struct mtip_port *port) 422 { 423 unsigned long timeout; 424 425 /* Disable the DMA engine */ 426 mtip_enable_engine(port, 0); 427 428 /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */ 429 timeout = jiffies + msecs_to_jiffies(500); 430 while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) 431 && time_before(jiffies, timeout)) 432 ; 433 434 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) 435 return; 436 437 /* 438 * Chip quirk: escalate to hba reset if 439 * PxCMD.CR not clear after 500 ms 440 */ 441 if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) { 442 dev_warn(&port->dd->pdev->dev, 443 "PxCMD.CR not clear, escalating reset\n"); 444 445 if (mtip_hba_reset(port->dd)) 446 dev_err(&port->dd->pdev->dev, 447 "HBA reset escalation failed.\n"); 448 449 /* 30 ms delay before com reset to quiesce chip */ 450 mdelay(30); 451 } 452 453 dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n"); 454 455 /* Set PxSCTL.DET */ 456 writel(readl(port->mmio + PORT_SCR_CTL) | 457 1, port->mmio + PORT_SCR_CTL); 458 readl(port->mmio + PORT_SCR_CTL); 459 460 /* Wait 1 ms to quiesce chip function */ 461 timeout = jiffies + msecs_to_jiffies(1); 462 while (time_before(jiffies, timeout)) 463 ; 464 465 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) 466 return; 467 468 /* Clear PxSCTL.DET */ 469 writel(readl(port->mmio + PORT_SCR_CTL) & ~1, 470 port->mmio + PORT_SCR_CTL); 471 readl(port->mmio + PORT_SCR_CTL); 472 473 /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */ 474 timeout = jiffies + msecs_to_jiffies(500); 475 while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) 476 && time_before(jiffies, timeout)) 477 ; 478 479 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) 480 return; 481 482 if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) 483 dev_warn(&port->dd->pdev->dev, 484 "COM reset failed\n"); 485 486 mtip_init_port(port); 487 mtip_start_port(port); 488 489 } 490 491 static int mtip_device_reset(struct driver_data *dd) 492 { 493 int rv = 0; 494 495 if (mtip_check_surprise_removal(dd->pdev)) 496 return 0; 497 498 if (mtip_hba_reset(dd) < 0) 499 rv = -EFAULT; 500 501 mdelay(1); 502 mtip_init_port(dd->port); 503 mtip_start_port(dd->port); 504 505 /* Enable interrupts on the HBA. */ 506 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, 507 dd->mmio + HOST_CTL); 508 return rv; 509 } 510 511 /* 512 * Helper function for tag logging 513 */ 514 static void print_tags(struct driver_data *dd, 515 char *msg, 516 unsigned long *tagbits, 517 int cnt) 518 { 519 unsigned char tagmap[128]; 520 int group, tagmap_len = 0; 521 522 memset(tagmap, 0, sizeof(tagmap)); 523 for (group = SLOTBITS_IN_LONGS; group > 0; group--) 524 tagmap_len += sprintf(tagmap + tagmap_len, "%016lX ", 525 tagbits[group-1]); 526 dev_warn(&dd->pdev->dev, 527 "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap); 528 } 529 530 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer, 531 dma_addr_t buffer_dma, unsigned int sectors); 532 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id, 533 struct smart_attr *attrib); 534 535 static void mtip_complete_command(struct mtip_cmd *cmd, int status) 536 { 537 struct request *req = blk_mq_rq_from_pdu(cmd); 538 539 cmd->status = status; 540 blk_mq_complete_request(req); 541 } 542 543 /* 544 * Handle an error. 545 * 546 * @dd Pointer to the DRIVER_DATA structure. 547 * 548 * return value 549 * None 550 */ 551 static void mtip_handle_tfe(struct driver_data *dd) 552 { 553 int group, tag, bit, reissue, rv; 554 struct mtip_port *port; 555 struct mtip_cmd *cmd; 556 u32 completed; 557 struct host_to_dev_fis *fis; 558 unsigned long tagaccum[SLOTBITS_IN_LONGS]; 559 unsigned int cmd_cnt = 0; 560 unsigned char *buf; 561 char *fail_reason = NULL; 562 int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0; 563 564 dev_warn(&dd->pdev->dev, "Taskfile error\n"); 565 566 port = dd->port; 567 568 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) { 569 cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL); 570 dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n"); 571 mtip_complete_command(cmd, -EIO); 572 return; 573 } 574 575 /* clear the tag accumulator */ 576 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); 577 578 /* Loop through all the groups */ 579 for (group = 0; group < dd->slot_groups; group++) { 580 completed = readl(port->completed[group]); 581 582 dev_warn(&dd->pdev->dev, "g=%u, comp=%x\n", group, completed); 583 584 /* clear completed status register in the hardware.*/ 585 writel(completed, port->completed[group]); 586 587 /* Process successfully completed commands */ 588 for (bit = 0; bit < 32 && completed; bit++) { 589 if (!(completed & (1<<bit))) 590 continue; 591 tag = (group << 5) + bit; 592 593 /* Skip the internal command slot */ 594 if (tag == MTIP_TAG_INTERNAL) 595 continue; 596 597 cmd = mtip_cmd_from_tag(dd, tag); 598 mtip_complete_command(cmd, 0); 599 set_bit(tag, tagaccum); 600 cmd_cnt++; 601 } 602 } 603 604 print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt); 605 606 /* Restart the port */ 607 mdelay(20); 608 mtip_restart_port(port); 609 610 /* Trying to determine the cause of the error */ 611 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ, 612 dd->port->log_buf, 613 dd->port->log_buf_dma, 1); 614 if (rv) { 615 dev_warn(&dd->pdev->dev, 616 "Error in READ LOG EXT (10h) command\n"); 617 /* non-critical error, don't fail the load */ 618 } else { 619 buf = (unsigned char *)dd->port->log_buf; 620 if (buf[259] & 0x1) { 621 dev_info(&dd->pdev->dev, 622 "Write protect bit is set.\n"); 623 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag); 624 fail_all_ncq_write = 1; 625 fail_reason = "write protect"; 626 } 627 if (buf[288] == 0xF7) { 628 dev_info(&dd->pdev->dev, 629 "Exceeded Tmax, drive in thermal shutdown.\n"); 630 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag); 631 fail_all_ncq_cmds = 1; 632 fail_reason = "thermal shutdown"; 633 } 634 if (buf[288] == 0xBF) { 635 set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag); 636 dev_info(&dd->pdev->dev, 637 "Drive indicates rebuild has failed. Secure erase required.\n"); 638 fail_all_ncq_cmds = 1; 639 fail_reason = "rebuild failed"; 640 } 641 } 642 643 /* clear the tag accumulator */ 644 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); 645 646 /* Loop through all the groups */ 647 for (group = 0; group < dd->slot_groups; group++) { 648 for (bit = 0; bit < 32; bit++) { 649 reissue = 1; 650 tag = (group << 5) + bit; 651 cmd = mtip_cmd_from_tag(dd, tag); 652 653 fis = (struct host_to_dev_fis *)cmd->command; 654 655 /* Should re-issue? */ 656 if (tag == MTIP_TAG_INTERNAL || 657 fis->command == ATA_CMD_SET_FEATURES) 658 reissue = 0; 659 else { 660 if (fail_all_ncq_cmds || 661 (fail_all_ncq_write && 662 fis->command == ATA_CMD_FPDMA_WRITE)) { 663 dev_warn(&dd->pdev->dev, 664 " Fail: %s w/tag %d [%s].\n", 665 fis->command == ATA_CMD_FPDMA_WRITE ? 666 "write" : "read", 667 tag, 668 fail_reason != NULL ? 669 fail_reason : "unknown"); 670 mtip_complete_command(cmd, -ENODATA); 671 continue; 672 } 673 } 674 675 /* 676 * First check if this command has 677 * exceeded its retries. 678 */ 679 if (reissue && (cmd->retries-- > 0)) { 680 681 set_bit(tag, tagaccum); 682 683 /* Re-issue the command. */ 684 mtip_issue_ncq_command(port, tag); 685 686 continue; 687 } 688 689 /* Retire a command that will not be reissued */ 690 dev_warn(&port->dd->pdev->dev, 691 "retiring tag %d\n", tag); 692 693 mtip_complete_command(cmd, -EIO); 694 } 695 } 696 print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt); 697 } 698 699 /* 700 * Handle a set device bits interrupt 701 */ 702 static inline void mtip_workq_sdbfx(struct mtip_port *port, int group, 703 u32 completed) 704 { 705 struct driver_data *dd = port->dd; 706 int tag, bit; 707 struct mtip_cmd *command; 708 709 if (!completed) { 710 WARN_ON_ONCE(!completed); 711 return; 712 } 713 /* clear completed status register in the hardware.*/ 714 writel(completed, port->completed[group]); 715 716 /* Process completed commands. */ 717 for (bit = 0; (bit < 32) && completed; bit++) { 718 if (completed & 0x01) { 719 tag = (group << 5) | bit; 720 721 /* skip internal command slot. */ 722 if (unlikely(tag == MTIP_TAG_INTERNAL)) 723 continue; 724 725 command = mtip_cmd_from_tag(dd, tag); 726 mtip_complete_command(command, 0); 727 } 728 completed >>= 1; 729 } 730 731 /* If last, re-enable interrupts */ 732 if (atomic_dec_return(&dd->irq_workers_active) == 0) 733 writel(0xffffffff, dd->mmio + HOST_IRQ_STAT); 734 } 735 736 /* 737 * Process legacy pio and d2h interrupts 738 */ 739 static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat) 740 { 741 struct mtip_port *port = dd->port; 742 struct mtip_cmd *cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL); 743 744 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) && cmd) { 745 int group = MTIP_TAG_INDEX(MTIP_TAG_INTERNAL); 746 int status = readl(port->cmd_issue[group]); 747 748 if (!(status & (1 << MTIP_TAG_BIT(MTIP_TAG_INTERNAL)))) 749 mtip_complete_command(cmd, 0); 750 } 751 } 752 753 /* 754 * Demux and handle errors 755 */ 756 static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat) 757 { 758 if (unlikely(port_stat & PORT_IRQ_CONNECT)) { 759 dev_warn(&dd->pdev->dev, 760 "Clearing PxSERR.DIAG.x\n"); 761 writel((1 << 26), dd->port->mmio + PORT_SCR_ERR); 762 } 763 764 if (unlikely(port_stat & PORT_IRQ_PHYRDY)) { 765 dev_warn(&dd->pdev->dev, 766 "Clearing PxSERR.DIAG.n\n"); 767 writel((1 << 16), dd->port->mmio + PORT_SCR_ERR); 768 } 769 770 if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) { 771 dev_warn(&dd->pdev->dev, 772 "Port stat errors %x unhandled\n", 773 (port_stat & ~PORT_IRQ_HANDLED)); 774 if (mtip_check_surprise_removal(dd->pdev)) 775 return; 776 } 777 if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) { 778 set_bit(MTIP_PF_EH_ACTIVE_BIT, &dd->port->flags); 779 wake_up_interruptible(&dd->port->svc_wait); 780 } 781 } 782 783 static inline irqreturn_t mtip_handle_irq(struct driver_data *data) 784 { 785 struct driver_data *dd = (struct driver_data *) data; 786 struct mtip_port *port = dd->port; 787 u32 hba_stat, port_stat; 788 int rv = IRQ_NONE; 789 int do_irq_enable = 1, i, workers; 790 struct mtip_work *twork; 791 792 hba_stat = readl(dd->mmio + HOST_IRQ_STAT); 793 if (hba_stat) { 794 rv = IRQ_HANDLED; 795 796 /* Acknowledge the interrupt status on the port.*/ 797 port_stat = readl(port->mmio + PORT_IRQ_STAT); 798 if (unlikely(port_stat == 0xFFFFFFFF)) { 799 mtip_check_surprise_removal(dd->pdev); 800 return IRQ_HANDLED; 801 } 802 writel(port_stat, port->mmio + PORT_IRQ_STAT); 803 804 /* Demux port status */ 805 if (likely(port_stat & PORT_IRQ_SDB_FIS)) { 806 do_irq_enable = 0; 807 WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0); 808 809 /* Start at 1: group zero is always local? */ 810 for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS; 811 i++) { 812 twork = &dd->work[i]; 813 twork->completed = readl(port->completed[i]); 814 if (twork->completed) 815 workers++; 816 } 817 818 atomic_set(&dd->irq_workers_active, workers); 819 if (workers) { 820 for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) { 821 twork = &dd->work[i]; 822 if (twork->completed) 823 queue_work_on( 824 twork->cpu_binding, 825 dd->isr_workq, 826 &twork->work); 827 } 828 829 if (likely(dd->work[0].completed)) 830 mtip_workq_sdbfx(port, 0, 831 dd->work[0].completed); 832 833 } else { 834 /* 835 * Chip quirk: SDB interrupt but nothing 836 * to complete 837 */ 838 do_irq_enable = 1; 839 } 840 } 841 842 if (unlikely(port_stat & PORT_IRQ_ERR)) { 843 if (unlikely(mtip_check_surprise_removal(dd->pdev))) { 844 /* don't proceed further */ 845 return IRQ_HANDLED; 846 } 847 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, 848 &dd->dd_flag)) 849 return rv; 850 851 mtip_process_errors(dd, port_stat & PORT_IRQ_ERR); 852 } 853 854 if (unlikely(port_stat & PORT_IRQ_LEGACY)) 855 mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY); 856 } 857 858 /* acknowledge interrupt */ 859 if (unlikely(do_irq_enable)) 860 writel(hba_stat, dd->mmio + HOST_IRQ_STAT); 861 862 return rv; 863 } 864 865 /* 866 * HBA interrupt subroutine. 867 * 868 * @irq IRQ number. 869 * @instance Pointer to the driver data structure. 870 * 871 * return value 872 * IRQ_HANDLED A HBA interrupt was pending and handled. 873 * IRQ_NONE This interrupt was not for the HBA. 874 */ 875 static irqreturn_t mtip_irq_handler(int irq, void *instance) 876 { 877 struct driver_data *dd = instance; 878 879 return mtip_handle_irq(dd); 880 } 881 882 static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag) 883 { 884 writel(1 << MTIP_TAG_BIT(tag), port->cmd_issue[MTIP_TAG_INDEX(tag)]); 885 } 886 887 static bool mtip_pause_ncq(struct mtip_port *port, 888 struct host_to_dev_fis *fis) 889 { 890 struct host_to_dev_fis *reply; 891 unsigned long task_file_data; 892 893 reply = port->rxfis + RX_FIS_D2H_REG; 894 task_file_data = readl(port->mmio+PORT_TFDATA); 895 896 if ((task_file_data & 1)) 897 return false; 898 899 if (fis->command == ATA_CMD_SEC_ERASE_PREP) { 900 port->ic_pause_timer = jiffies; 901 return true; 902 } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) && 903 (fis->features == 0x03)) { 904 set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); 905 port->ic_pause_timer = jiffies; 906 return true; 907 } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) || 908 ((fis->command == 0xFC) && 909 (fis->features == 0x27 || fis->features == 0x72 || 910 fis->features == 0x62 || fis->features == 0x26))) { 911 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); 912 clear_bit(MTIP_DDF_REBUILD_FAILED_BIT, &port->dd->dd_flag); 913 /* Com reset after secure erase or lowlevel format */ 914 mtip_restart_port(port); 915 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); 916 return false; 917 } 918 919 return false; 920 } 921 922 static bool mtip_commands_active(struct mtip_port *port) 923 { 924 unsigned int active; 925 unsigned int n; 926 927 /* 928 * Ignore s_active bit 0 of array element 0. 929 * This bit will always be set 930 */ 931 active = readl(port->s_active[0]) & 0xFFFFFFFE; 932 for (n = 1; n < port->dd->slot_groups; n++) 933 active |= readl(port->s_active[n]); 934 935 return active != 0; 936 } 937 938 /* 939 * Wait for port to quiesce 940 * 941 * @port Pointer to port data structure 942 * @timeout Max duration to wait (ms) 943 * 944 * return value 945 * 0 Success 946 * -EBUSY Commands still active 947 */ 948 static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout) 949 { 950 unsigned long to; 951 bool active = true; 952 953 blk_mq_stop_hw_queues(port->dd->queue); 954 955 to = jiffies + msecs_to_jiffies(timeout); 956 do { 957 if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) && 958 test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) { 959 msleep(20); 960 continue; /* svc thd is actively issuing commands */ 961 } 962 963 msleep(100); 964 965 if (mtip_check_surprise_removal(port->dd->pdev)) 966 goto err_fault; 967 968 active = mtip_commands_active(port); 969 if (!active) 970 break; 971 } while (time_before(jiffies, to)); 972 973 blk_mq_start_stopped_hw_queues(port->dd->queue, true); 974 return active ? -EBUSY : 0; 975 err_fault: 976 blk_mq_start_stopped_hw_queues(port->dd->queue, true); 977 return -EFAULT; 978 } 979 980 struct mtip_int_cmd { 981 int fis_len; 982 dma_addr_t buffer; 983 int buf_len; 984 u32 opts; 985 }; 986 987 /* 988 * Execute an internal command and wait for the completion. 989 * 990 * @port Pointer to the port data structure. 991 * @fis Pointer to the FIS that describes the command. 992 * @fis_len Length in WORDS of the FIS. 993 * @buffer DMA accessible for command data. 994 * @buf_len Length, in bytes, of the data buffer. 995 * @opts Command header options, excluding the FIS length 996 * and the number of PRD entries. 997 * @timeout Time in ms to wait for the command to complete. 998 * 999 * return value 1000 * 0 Command completed successfully. 1001 * -EFAULT The buffer address is not correctly aligned. 1002 * -EBUSY Internal command or other IO in progress. 1003 * -EAGAIN Time out waiting for command to complete. 1004 */ 1005 static int mtip_exec_internal_command(struct mtip_port *port, 1006 struct host_to_dev_fis *fis, 1007 int fis_len, 1008 dma_addr_t buffer, 1009 int buf_len, 1010 u32 opts, 1011 unsigned long timeout) 1012 { 1013 struct mtip_cmd *int_cmd; 1014 struct driver_data *dd = port->dd; 1015 struct request *rq; 1016 struct mtip_int_cmd icmd = { 1017 .fis_len = fis_len, 1018 .buffer = buffer, 1019 .buf_len = buf_len, 1020 .opts = opts 1021 }; 1022 int rv = 0; 1023 unsigned long start; 1024 1025 /* Make sure the buffer is 8 byte aligned. This is asic specific. */ 1026 if (buffer & 0x00000007) { 1027 dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n"); 1028 return -EFAULT; 1029 } 1030 1031 int_cmd = mtip_get_int_command(dd); 1032 if (!int_cmd) { 1033 dbg_printk(MTIP_DRV_NAME "Unable to allocate tag for PIO cmd\n"); 1034 return -EFAULT; 1035 } 1036 rq = blk_mq_rq_from_pdu(int_cmd); 1037 rq->special = &icmd; 1038 1039 set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); 1040 1041 if (fis->command == ATA_CMD_SEC_ERASE_PREP) 1042 set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); 1043 1044 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); 1045 1046 if (fis->command != ATA_CMD_STANDBYNOW1) { 1047 /* wait for io to complete if non atomic */ 1048 if (mtip_quiesce_io(port, MTIP_QUIESCE_IO_TIMEOUT_MS) < 0) { 1049 dev_warn(&dd->pdev->dev, "Failed to quiesce IO\n"); 1050 blk_mq_free_request(rq); 1051 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); 1052 wake_up_interruptible(&port->svc_wait); 1053 return -EBUSY; 1054 } 1055 } 1056 1057 /* Copy the command to the command table */ 1058 memcpy(int_cmd->command, fis, fis_len*4); 1059 1060 start = jiffies; 1061 rq->timeout = timeout; 1062 1063 /* insert request and run queue */ 1064 blk_execute_rq(rq->q, NULL, rq, true); 1065 1066 rv = int_cmd->status; 1067 if (rv < 0) { 1068 if (rv == -ERESTARTSYS) { /* interrupted */ 1069 dev_err(&dd->pdev->dev, 1070 "Internal command [%02X] was interrupted after %u ms\n", 1071 fis->command, 1072 jiffies_to_msecs(jiffies - start)); 1073 rv = -EINTR; 1074 goto exec_ic_exit; 1075 } else if (rv == 0) /* timeout */ 1076 dev_err(&dd->pdev->dev, 1077 "Internal command did not complete [%02X] within timeout of %lu ms\n", 1078 fis->command, timeout); 1079 else 1080 dev_err(&dd->pdev->dev, 1081 "Internal command [%02X] wait returned code [%d] after %lu ms - unhandled\n", 1082 fis->command, rv, timeout); 1083 1084 if (mtip_check_surprise_removal(dd->pdev) || 1085 test_bit(MTIP_DDF_REMOVE_PENDING_BIT, 1086 &dd->dd_flag)) { 1087 dev_err(&dd->pdev->dev, 1088 "Internal command [%02X] wait returned due to SR\n", 1089 fis->command); 1090 rv = -ENXIO; 1091 goto exec_ic_exit; 1092 } 1093 mtip_device_reset(dd); /* recover from timeout issue */ 1094 rv = -EAGAIN; 1095 goto exec_ic_exit; 1096 } 1097 1098 if (readl(port->cmd_issue[MTIP_TAG_INDEX(MTIP_TAG_INTERNAL)]) 1099 & (1 << MTIP_TAG_BIT(MTIP_TAG_INTERNAL))) { 1100 rv = -ENXIO; 1101 if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) { 1102 mtip_device_reset(dd); 1103 rv = -EAGAIN; 1104 } 1105 } 1106 exec_ic_exit: 1107 /* Clear the allocated and active bits for the internal command. */ 1108 blk_mq_free_request(rq); 1109 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); 1110 if (rv >= 0 && mtip_pause_ncq(port, fis)) { 1111 /* NCQ paused */ 1112 return rv; 1113 } 1114 wake_up_interruptible(&port->svc_wait); 1115 1116 return rv; 1117 } 1118 1119 /* 1120 * Byte-swap ATA ID strings. 1121 * 1122 * ATA identify data contains strings in byte-swapped 16-bit words. 1123 * They must be swapped (on all architectures) to be usable as C strings. 1124 * This function swaps bytes in-place. 1125 * 1126 * @buf The buffer location of the string 1127 * @len The number of bytes to swap 1128 * 1129 * return value 1130 * None 1131 */ 1132 static inline void ata_swap_string(u16 *buf, unsigned int len) 1133 { 1134 int i; 1135 for (i = 0; i < (len/2); i++) 1136 be16_to_cpus(&buf[i]); 1137 } 1138 1139 static void mtip_set_timeout(struct driver_data *dd, 1140 struct host_to_dev_fis *fis, 1141 unsigned int *timeout, u8 erasemode) 1142 { 1143 switch (fis->command) { 1144 case ATA_CMD_DOWNLOAD_MICRO: 1145 *timeout = 120000; /* 2 minutes */ 1146 break; 1147 case ATA_CMD_SEC_ERASE_UNIT: 1148 case 0xFC: 1149 if (erasemode) 1150 *timeout = ((*(dd->port->identify + 90) * 2) * 60000); 1151 else 1152 *timeout = ((*(dd->port->identify + 89) * 2) * 60000); 1153 break; 1154 case ATA_CMD_STANDBYNOW1: 1155 *timeout = 120000; /* 2 minutes */ 1156 break; 1157 case 0xF7: 1158 case 0xFA: 1159 *timeout = 60000; /* 60 seconds */ 1160 break; 1161 case ATA_CMD_SMART: 1162 *timeout = 15000; /* 15 seconds */ 1163 break; 1164 default: 1165 *timeout = MTIP_IOCTL_CMD_TIMEOUT_MS; 1166 break; 1167 } 1168 } 1169 1170 /* 1171 * Request the device identity information. 1172 * 1173 * If a user space buffer is not specified, i.e. is NULL, the 1174 * identify information is still read from the drive and placed 1175 * into the identify data buffer (@e port->identify) in the 1176 * port data structure. 1177 * When the identify buffer contains valid identify information @e 1178 * port->identify_valid is non-zero. 1179 * 1180 * @port Pointer to the port structure. 1181 * @user_buffer A user space buffer where the identify data should be 1182 * copied. 1183 * 1184 * return value 1185 * 0 Command completed successfully. 1186 * -EFAULT An error occurred while coping data to the user buffer. 1187 * -1 Command failed. 1188 */ 1189 static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer) 1190 { 1191 int rv = 0; 1192 struct host_to_dev_fis fis; 1193 1194 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) 1195 return -EFAULT; 1196 1197 /* Build the FIS. */ 1198 memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1199 fis.type = 0x27; 1200 fis.opts = 1 << 7; 1201 fis.command = ATA_CMD_ID_ATA; 1202 1203 /* Set the identify information as invalid. */ 1204 port->identify_valid = 0; 1205 1206 /* Clear the identify information. */ 1207 memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS); 1208 1209 /* Execute the command. */ 1210 if (mtip_exec_internal_command(port, 1211 &fis, 1212 5, 1213 port->identify_dma, 1214 sizeof(u16) * ATA_ID_WORDS, 1215 0, 1216 MTIP_INT_CMD_TIMEOUT_MS) 1217 < 0) { 1218 rv = -1; 1219 goto out; 1220 } 1221 1222 /* 1223 * Perform any necessary byte-swapping. Yes, the kernel does in fact 1224 * perform field-sensitive swapping on the string fields. 1225 * See the kernel use of ata_id_string() for proof of this. 1226 */ 1227 #ifdef __LITTLE_ENDIAN 1228 ata_swap_string(port->identify + 27, 40); /* model string*/ 1229 ata_swap_string(port->identify + 23, 8); /* firmware string*/ 1230 ata_swap_string(port->identify + 10, 20); /* serial# string*/ 1231 #else 1232 { 1233 int i; 1234 for (i = 0; i < ATA_ID_WORDS; i++) 1235 port->identify[i] = le16_to_cpu(port->identify[i]); 1236 } 1237 #endif 1238 1239 /* Check security locked state */ 1240 if (port->identify[128] & 0x4) 1241 set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); 1242 else 1243 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); 1244 1245 #ifdef MTIP_TRIM /* Disabling TRIM support temporarily */ 1246 /* Demux ID.DRAT & ID.RZAT to determine trim support */ 1247 if (port->identify[69] & (1 << 14) && port->identify[69] & (1 << 5)) 1248 port->dd->trim_supp = true; 1249 else 1250 #endif 1251 port->dd->trim_supp = false; 1252 1253 /* Set the identify buffer as valid. */ 1254 port->identify_valid = 1; 1255 1256 if (user_buffer) { 1257 if (copy_to_user( 1258 user_buffer, 1259 port->identify, 1260 ATA_ID_WORDS * sizeof(u16))) { 1261 rv = -EFAULT; 1262 goto out; 1263 } 1264 } 1265 1266 out: 1267 return rv; 1268 } 1269 1270 /* 1271 * Issue a standby immediate command to the device. 1272 * 1273 * @port Pointer to the port structure. 1274 * 1275 * return value 1276 * 0 Command was executed successfully. 1277 * -1 An error occurred while executing the command. 1278 */ 1279 static int mtip_standby_immediate(struct mtip_port *port) 1280 { 1281 int rv; 1282 struct host_to_dev_fis fis; 1283 unsigned long start; 1284 unsigned int timeout; 1285 1286 /* Build the FIS. */ 1287 memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1288 fis.type = 0x27; 1289 fis.opts = 1 << 7; 1290 fis.command = ATA_CMD_STANDBYNOW1; 1291 1292 mtip_set_timeout(port->dd, &fis, &timeout, 0); 1293 1294 start = jiffies; 1295 rv = mtip_exec_internal_command(port, 1296 &fis, 1297 5, 1298 0, 1299 0, 1300 0, 1301 timeout); 1302 dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n", 1303 jiffies_to_msecs(jiffies - start)); 1304 if (rv) 1305 dev_warn(&port->dd->pdev->dev, 1306 "STANDBY IMMEDIATE command failed.\n"); 1307 1308 return rv; 1309 } 1310 1311 /* 1312 * Issue a READ LOG EXT command to the device. 1313 * 1314 * @port pointer to the port structure. 1315 * @page page number to fetch 1316 * @buffer pointer to buffer 1317 * @buffer_dma dma address corresponding to @buffer 1318 * @sectors page length to fetch, in sectors 1319 * 1320 * return value 1321 * @rv return value from mtip_exec_internal_command() 1322 */ 1323 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer, 1324 dma_addr_t buffer_dma, unsigned int sectors) 1325 { 1326 struct host_to_dev_fis fis; 1327 1328 memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1329 fis.type = 0x27; 1330 fis.opts = 1 << 7; 1331 fis.command = ATA_CMD_READ_LOG_EXT; 1332 fis.sect_count = sectors & 0xFF; 1333 fis.sect_cnt_ex = (sectors >> 8) & 0xFF; 1334 fis.lba_low = page; 1335 fis.lba_mid = 0; 1336 fis.device = ATA_DEVICE_OBS; 1337 1338 memset(buffer, 0, sectors * ATA_SECT_SIZE); 1339 1340 return mtip_exec_internal_command(port, 1341 &fis, 1342 5, 1343 buffer_dma, 1344 sectors * ATA_SECT_SIZE, 1345 0, 1346 MTIP_INT_CMD_TIMEOUT_MS); 1347 } 1348 1349 /* 1350 * Issue a SMART READ DATA command to the device. 1351 * 1352 * @port pointer to the port structure. 1353 * @buffer pointer to buffer 1354 * @buffer_dma dma address corresponding to @buffer 1355 * 1356 * return value 1357 * @rv return value from mtip_exec_internal_command() 1358 */ 1359 static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer, 1360 dma_addr_t buffer_dma) 1361 { 1362 struct host_to_dev_fis fis; 1363 1364 memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1365 fis.type = 0x27; 1366 fis.opts = 1 << 7; 1367 fis.command = ATA_CMD_SMART; 1368 fis.features = 0xD0; 1369 fis.sect_count = 1; 1370 fis.lba_mid = 0x4F; 1371 fis.lba_hi = 0xC2; 1372 fis.device = ATA_DEVICE_OBS; 1373 1374 return mtip_exec_internal_command(port, 1375 &fis, 1376 5, 1377 buffer_dma, 1378 ATA_SECT_SIZE, 1379 0, 1380 15000); 1381 } 1382 1383 /* 1384 * Get the value of a smart attribute 1385 * 1386 * @port pointer to the port structure 1387 * @id attribute number 1388 * @attrib pointer to return attrib information corresponding to @id 1389 * 1390 * return value 1391 * -EINVAL NULL buffer passed or unsupported attribute @id. 1392 * -EPERM Identify data not valid, SMART not supported or not enabled 1393 */ 1394 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id, 1395 struct smart_attr *attrib) 1396 { 1397 int rv, i; 1398 struct smart_attr *pattr; 1399 1400 if (!attrib) 1401 return -EINVAL; 1402 1403 if (!port->identify_valid) { 1404 dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n"); 1405 return -EPERM; 1406 } 1407 if (!(port->identify[82] & 0x1)) { 1408 dev_warn(&port->dd->pdev->dev, "SMART not supported\n"); 1409 return -EPERM; 1410 } 1411 if (!(port->identify[85] & 0x1)) { 1412 dev_warn(&port->dd->pdev->dev, "SMART not enabled\n"); 1413 return -EPERM; 1414 } 1415 1416 memset(port->smart_buf, 0, ATA_SECT_SIZE); 1417 rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma); 1418 if (rv) { 1419 dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n"); 1420 return rv; 1421 } 1422 1423 pattr = (struct smart_attr *)(port->smart_buf + 2); 1424 for (i = 0; i < 29; i++, pattr++) 1425 if (pattr->attr_id == id) { 1426 memcpy(attrib, pattr, sizeof(struct smart_attr)); 1427 break; 1428 } 1429 1430 if (i == 29) { 1431 dev_warn(&port->dd->pdev->dev, 1432 "Query for invalid SMART attribute ID\n"); 1433 rv = -EINVAL; 1434 } 1435 1436 return rv; 1437 } 1438 1439 /* 1440 * Trim unused sectors 1441 * 1442 * @dd pointer to driver_data structure 1443 * @lba starting lba 1444 * @len # of 512b sectors to trim 1445 * 1446 * return value 1447 * -ENOMEM Out of dma memory 1448 * -EINVAL Invalid parameters passed in, trim not supported 1449 * -EIO Error submitting trim request to hw 1450 */ 1451 static int mtip_send_trim(struct driver_data *dd, unsigned int lba, 1452 unsigned int len) 1453 { 1454 int i, rv = 0; 1455 u64 tlba, tlen, sect_left; 1456 struct mtip_trim_entry *buf; 1457 dma_addr_t dma_addr; 1458 struct host_to_dev_fis fis; 1459 1460 if (!len || dd->trim_supp == false) 1461 return -EINVAL; 1462 1463 /* Trim request too big */ 1464 WARN_ON(len > (MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES)); 1465 1466 /* Trim request not aligned on 4k boundary */ 1467 WARN_ON(len % 8 != 0); 1468 1469 /* Warn if vu_trim structure is too big */ 1470 WARN_ON(sizeof(struct mtip_trim) > ATA_SECT_SIZE); 1471 1472 /* Allocate a DMA buffer for the trim structure */ 1473 buf = dmam_alloc_coherent(&dd->pdev->dev, ATA_SECT_SIZE, &dma_addr, 1474 GFP_KERNEL); 1475 if (!buf) 1476 return -ENOMEM; 1477 memset(buf, 0, ATA_SECT_SIZE); 1478 1479 for (i = 0, sect_left = len, tlba = lba; 1480 i < MTIP_MAX_TRIM_ENTRIES && sect_left; 1481 i++) { 1482 tlen = (sect_left >= MTIP_MAX_TRIM_ENTRY_LEN ? 1483 MTIP_MAX_TRIM_ENTRY_LEN : 1484 sect_left); 1485 buf[i].lba = __force_bit2int cpu_to_le32(tlba); 1486 buf[i].range = __force_bit2int cpu_to_le16(tlen); 1487 tlba += tlen; 1488 sect_left -= tlen; 1489 } 1490 WARN_ON(sect_left != 0); 1491 1492 /* Build the fis */ 1493 memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1494 fis.type = 0x27; 1495 fis.opts = 1 << 7; 1496 fis.command = 0xfb; 1497 fis.features = 0x60; 1498 fis.sect_count = 1; 1499 fis.device = ATA_DEVICE_OBS; 1500 1501 if (mtip_exec_internal_command(dd->port, 1502 &fis, 1503 5, 1504 dma_addr, 1505 ATA_SECT_SIZE, 1506 0, 1507 MTIP_TRIM_TIMEOUT_MS) < 0) 1508 rv = -EIO; 1509 1510 dmam_free_coherent(&dd->pdev->dev, ATA_SECT_SIZE, buf, dma_addr); 1511 return rv; 1512 } 1513 1514 /* 1515 * Get the drive capacity. 1516 * 1517 * @dd Pointer to the device data structure. 1518 * @sectors Pointer to the variable that will receive the sector count. 1519 * 1520 * return value 1521 * 1 Capacity was returned successfully. 1522 * 0 The identify information is invalid. 1523 */ 1524 static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors) 1525 { 1526 struct mtip_port *port = dd->port; 1527 u64 total, raw0, raw1, raw2, raw3; 1528 raw0 = port->identify[100]; 1529 raw1 = port->identify[101]; 1530 raw2 = port->identify[102]; 1531 raw3 = port->identify[103]; 1532 total = raw0 | raw1<<16 | raw2<<32 | raw3<<48; 1533 *sectors = total; 1534 return (bool) !!port->identify_valid; 1535 } 1536 1537 /* 1538 * Display the identify command data. 1539 * 1540 * @port Pointer to the port data structure. 1541 * 1542 * return value 1543 * None 1544 */ 1545 static void mtip_dump_identify(struct mtip_port *port) 1546 { 1547 sector_t sectors; 1548 unsigned short revid; 1549 char cbuf[42]; 1550 1551 if (!port->identify_valid) 1552 return; 1553 1554 strlcpy(cbuf, (char *)(port->identify+10), 21); 1555 dev_info(&port->dd->pdev->dev, 1556 "Serial No.: %s\n", cbuf); 1557 1558 strlcpy(cbuf, (char *)(port->identify+23), 9); 1559 dev_info(&port->dd->pdev->dev, 1560 "Firmware Ver.: %s\n", cbuf); 1561 1562 strlcpy(cbuf, (char *)(port->identify+27), 41); 1563 dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf); 1564 1565 dev_info(&port->dd->pdev->dev, "Security: %04x %s\n", 1566 port->identify[128], 1567 port->identify[128] & 0x4 ? "(LOCKED)" : ""); 1568 1569 if (mtip_hw_get_capacity(port->dd, §ors)) 1570 dev_info(&port->dd->pdev->dev, 1571 "Capacity: %llu sectors (%llu MB)\n", 1572 (u64)sectors, 1573 ((u64)sectors) * ATA_SECT_SIZE >> 20); 1574 1575 pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid); 1576 switch (revid & 0xFF) { 1577 case 0x1: 1578 strlcpy(cbuf, "A0", 3); 1579 break; 1580 case 0x3: 1581 strlcpy(cbuf, "A2", 3); 1582 break; 1583 default: 1584 strlcpy(cbuf, "?", 2); 1585 break; 1586 } 1587 dev_info(&port->dd->pdev->dev, 1588 "Card Type: %s\n", cbuf); 1589 } 1590 1591 /* 1592 * Map the commands scatter list into the command table. 1593 * 1594 * @command Pointer to the command. 1595 * @nents Number of scatter list entries. 1596 * 1597 * return value 1598 * None 1599 */ 1600 static inline void fill_command_sg(struct driver_data *dd, 1601 struct mtip_cmd *command, 1602 int nents) 1603 { 1604 int n; 1605 unsigned int dma_len; 1606 struct mtip_cmd_sg *command_sg; 1607 struct scatterlist *sg = command->sg; 1608 1609 command_sg = command->command + AHCI_CMD_TBL_HDR_SZ; 1610 1611 for (n = 0; n < nents; n++) { 1612 dma_len = sg_dma_len(sg); 1613 if (dma_len > 0x400000) 1614 dev_err(&dd->pdev->dev, 1615 "DMA segment length truncated\n"); 1616 command_sg->info = __force_bit2int 1617 cpu_to_le32((dma_len-1) & 0x3FFFFF); 1618 command_sg->dba = __force_bit2int 1619 cpu_to_le32(sg_dma_address(sg)); 1620 command_sg->dba_upper = __force_bit2int 1621 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16); 1622 command_sg++; 1623 sg++; 1624 } 1625 } 1626 1627 /* 1628 * @brief Execute a drive command. 1629 * 1630 * return value 0 The command completed successfully. 1631 * return value -1 An error occurred while executing the command. 1632 */ 1633 static int exec_drive_task(struct mtip_port *port, u8 *command) 1634 { 1635 struct host_to_dev_fis fis; 1636 struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG); 1637 unsigned int to; 1638 1639 /* Build the FIS. */ 1640 memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1641 fis.type = 0x27; 1642 fis.opts = 1 << 7; 1643 fis.command = command[0]; 1644 fis.features = command[1]; 1645 fis.sect_count = command[2]; 1646 fis.sector = command[3]; 1647 fis.cyl_low = command[4]; 1648 fis.cyl_hi = command[5]; 1649 fis.device = command[6] & ~0x10; /* Clear the dev bit*/ 1650 1651 mtip_set_timeout(port->dd, &fis, &to, 0); 1652 1653 dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n", 1654 __func__, 1655 command[0], 1656 command[1], 1657 command[2], 1658 command[3], 1659 command[4], 1660 command[5], 1661 command[6]); 1662 1663 /* Execute the command. */ 1664 if (mtip_exec_internal_command(port, 1665 &fis, 1666 5, 1667 0, 1668 0, 1669 0, 1670 to) < 0) { 1671 return -1; 1672 } 1673 1674 command[0] = reply->command; /* Status*/ 1675 command[1] = reply->features; /* Error*/ 1676 command[4] = reply->cyl_low; 1677 command[5] = reply->cyl_hi; 1678 1679 dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n", 1680 __func__, 1681 command[0], 1682 command[1], 1683 command[4], 1684 command[5]); 1685 1686 return 0; 1687 } 1688 1689 /* 1690 * @brief Execute a drive command. 1691 * 1692 * @param port Pointer to the port data structure. 1693 * @param command Pointer to the user specified command parameters. 1694 * @param user_buffer Pointer to the user space buffer where read sector 1695 * data should be copied. 1696 * 1697 * return value 0 The command completed successfully. 1698 * return value -EFAULT An error occurred while copying the completion 1699 * data to the user space buffer. 1700 * return value -1 An error occurred while executing the command. 1701 */ 1702 static int exec_drive_command(struct mtip_port *port, u8 *command, 1703 void __user *user_buffer) 1704 { 1705 struct host_to_dev_fis fis; 1706 struct host_to_dev_fis *reply; 1707 u8 *buf = NULL; 1708 dma_addr_t dma_addr = 0; 1709 int rv = 0, xfer_sz = command[3]; 1710 unsigned int to; 1711 1712 if (xfer_sz) { 1713 if (!user_buffer) 1714 return -EFAULT; 1715 1716 buf = dmam_alloc_coherent(&port->dd->pdev->dev, 1717 ATA_SECT_SIZE * xfer_sz, 1718 &dma_addr, 1719 GFP_KERNEL); 1720 if (!buf) { 1721 dev_err(&port->dd->pdev->dev, 1722 "Memory allocation failed (%d bytes)\n", 1723 ATA_SECT_SIZE * xfer_sz); 1724 return -ENOMEM; 1725 } 1726 memset(buf, 0, ATA_SECT_SIZE * xfer_sz); 1727 } 1728 1729 /* Build the FIS. */ 1730 memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1731 fis.type = 0x27; 1732 fis.opts = 1 << 7; 1733 fis.command = command[0]; 1734 fis.features = command[2]; 1735 fis.sect_count = command[3]; 1736 if (fis.command == ATA_CMD_SMART) { 1737 fis.sector = command[1]; 1738 fis.cyl_low = 0x4F; 1739 fis.cyl_hi = 0xC2; 1740 } 1741 1742 mtip_set_timeout(port->dd, &fis, &to, 0); 1743 1744 if (xfer_sz) 1745 reply = (port->rxfis + RX_FIS_PIO_SETUP); 1746 else 1747 reply = (port->rxfis + RX_FIS_D2H_REG); 1748 1749 dbg_printk(MTIP_DRV_NAME 1750 " %s: User Command: cmd %x, sect %x, " 1751 "feat %x, sectcnt %x\n", 1752 __func__, 1753 command[0], 1754 command[1], 1755 command[2], 1756 command[3]); 1757 1758 /* Execute the command. */ 1759 if (mtip_exec_internal_command(port, 1760 &fis, 1761 5, 1762 (xfer_sz ? dma_addr : 0), 1763 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0), 1764 0, 1765 to) 1766 < 0) { 1767 rv = -EFAULT; 1768 goto exit_drive_command; 1769 } 1770 1771 /* Collect the completion status. */ 1772 command[0] = reply->command; /* Status*/ 1773 command[1] = reply->features; /* Error*/ 1774 command[2] = reply->sect_count; 1775 1776 dbg_printk(MTIP_DRV_NAME 1777 " %s: Completion Status: stat %x, " 1778 "err %x, nsect %x\n", 1779 __func__, 1780 command[0], 1781 command[1], 1782 command[2]); 1783 1784 if (xfer_sz) { 1785 if (copy_to_user(user_buffer, 1786 buf, 1787 ATA_SECT_SIZE * command[3])) { 1788 rv = -EFAULT; 1789 goto exit_drive_command; 1790 } 1791 } 1792 exit_drive_command: 1793 if (buf) 1794 dmam_free_coherent(&port->dd->pdev->dev, 1795 ATA_SECT_SIZE * xfer_sz, buf, dma_addr); 1796 return rv; 1797 } 1798 1799 /* 1800 * Indicates whether a command has a single sector payload. 1801 * 1802 * @command passed to the device to perform the certain event. 1803 * @features passed to the device to perform the certain event. 1804 * 1805 * return value 1806 * 1 command is one that always has a single sector payload, 1807 * regardless of the value in the Sector Count field. 1808 * 0 otherwise 1809 * 1810 */ 1811 static unsigned int implicit_sector(unsigned char command, 1812 unsigned char features) 1813 { 1814 unsigned int rv = 0; 1815 1816 /* list of commands that have an implicit sector count of 1 */ 1817 switch (command) { 1818 case ATA_CMD_SEC_SET_PASS: 1819 case ATA_CMD_SEC_UNLOCK: 1820 case ATA_CMD_SEC_ERASE_PREP: 1821 case ATA_CMD_SEC_ERASE_UNIT: 1822 case ATA_CMD_SEC_FREEZE_LOCK: 1823 case ATA_CMD_SEC_DISABLE_PASS: 1824 case ATA_CMD_PMP_READ: 1825 case ATA_CMD_PMP_WRITE: 1826 rv = 1; 1827 break; 1828 case ATA_CMD_SET_MAX: 1829 if (features == ATA_SET_MAX_UNLOCK) 1830 rv = 1; 1831 break; 1832 case ATA_CMD_SMART: 1833 if ((features == ATA_SMART_READ_VALUES) || 1834 (features == ATA_SMART_READ_THRESHOLDS)) 1835 rv = 1; 1836 break; 1837 case ATA_CMD_CONF_OVERLAY: 1838 if ((features == ATA_DCO_IDENTIFY) || 1839 (features == ATA_DCO_SET)) 1840 rv = 1; 1841 break; 1842 } 1843 return rv; 1844 } 1845 1846 /* 1847 * Executes a taskfile 1848 * See ide_taskfile_ioctl() for derivation 1849 */ 1850 static int exec_drive_taskfile(struct driver_data *dd, 1851 void __user *buf, 1852 ide_task_request_t *req_task, 1853 int outtotal) 1854 { 1855 struct host_to_dev_fis fis; 1856 struct host_to_dev_fis *reply; 1857 u8 *outbuf = NULL; 1858 u8 *inbuf = NULL; 1859 dma_addr_t outbuf_dma = 0; 1860 dma_addr_t inbuf_dma = 0; 1861 dma_addr_t dma_buffer = 0; 1862 int err = 0; 1863 unsigned int taskin = 0; 1864 unsigned int taskout = 0; 1865 u8 nsect = 0; 1866 unsigned int timeout; 1867 unsigned int force_single_sector; 1868 unsigned int transfer_size; 1869 unsigned long task_file_data; 1870 int intotal = outtotal + req_task->out_size; 1871 int erasemode = 0; 1872 1873 taskout = req_task->out_size; 1874 taskin = req_task->in_size; 1875 /* 130560 = 512 * 0xFF*/ 1876 if (taskin > 130560 || taskout > 130560) 1877 return -EINVAL; 1878 1879 if (taskout) { 1880 outbuf = memdup_user(buf + outtotal, taskout); 1881 if (IS_ERR(outbuf)) 1882 return PTR_ERR(outbuf); 1883 1884 outbuf_dma = pci_map_single(dd->pdev, 1885 outbuf, 1886 taskout, 1887 DMA_TO_DEVICE); 1888 if (pci_dma_mapping_error(dd->pdev, outbuf_dma)) { 1889 err = -ENOMEM; 1890 goto abort; 1891 } 1892 dma_buffer = outbuf_dma; 1893 } 1894 1895 if (taskin) { 1896 inbuf = memdup_user(buf + intotal, taskin); 1897 if (IS_ERR(inbuf)) { 1898 err = PTR_ERR(inbuf); 1899 inbuf = NULL; 1900 goto abort; 1901 } 1902 inbuf_dma = pci_map_single(dd->pdev, 1903 inbuf, 1904 taskin, DMA_FROM_DEVICE); 1905 if (pci_dma_mapping_error(dd->pdev, inbuf_dma)) { 1906 err = -ENOMEM; 1907 goto abort; 1908 } 1909 dma_buffer = inbuf_dma; 1910 } 1911 1912 /* only supports PIO and non-data commands from this ioctl. */ 1913 switch (req_task->data_phase) { 1914 case TASKFILE_OUT: 1915 nsect = taskout / ATA_SECT_SIZE; 1916 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); 1917 break; 1918 case TASKFILE_IN: 1919 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); 1920 break; 1921 case TASKFILE_NO_DATA: 1922 reply = (dd->port->rxfis + RX_FIS_D2H_REG); 1923 break; 1924 default: 1925 err = -EINVAL; 1926 goto abort; 1927 } 1928 1929 /* Build the FIS. */ 1930 memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1931 1932 fis.type = 0x27; 1933 fis.opts = 1 << 7; 1934 fis.command = req_task->io_ports[7]; 1935 fis.features = req_task->io_ports[1]; 1936 fis.sect_count = req_task->io_ports[2]; 1937 fis.lba_low = req_task->io_ports[3]; 1938 fis.lba_mid = req_task->io_ports[4]; 1939 fis.lba_hi = req_task->io_ports[5]; 1940 /* Clear the dev bit*/ 1941 fis.device = req_task->io_ports[6] & ~0x10; 1942 1943 if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) { 1944 req_task->in_flags.all = 1945 IDE_TASKFILE_STD_IN_FLAGS | 1946 (IDE_HOB_STD_IN_FLAGS << 8); 1947 fis.lba_low_ex = req_task->hob_ports[3]; 1948 fis.lba_mid_ex = req_task->hob_ports[4]; 1949 fis.lba_hi_ex = req_task->hob_ports[5]; 1950 fis.features_ex = req_task->hob_ports[1]; 1951 fis.sect_cnt_ex = req_task->hob_ports[2]; 1952 1953 } else { 1954 req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS; 1955 } 1956 1957 force_single_sector = implicit_sector(fis.command, fis.features); 1958 1959 if ((taskin || taskout) && (!fis.sect_count)) { 1960 if (nsect) 1961 fis.sect_count = nsect; 1962 else { 1963 if (!force_single_sector) { 1964 dev_warn(&dd->pdev->dev, 1965 "data movement but " 1966 "sect_count is 0\n"); 1967 err = -EINVAL; 1968 goto abort; 1969 } 1970 } 1971 } 1972 1973 dbg_printk(MTIP_DRV_NAME 1974 " %s: cmd %x, feat %x, nsect %x," 1975 " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x," 1976 " head/dev %x\n", 1977 __func__, 1978 fis.command, 1979 fis.features, 1980 fis.sect_count, 1981 fis.lba_low, 1982 fis.lba_mid, 1983 fis.lba_hi, 1984 fis.device); 1985 1986 /* check for erase mode support during secure erase.*/ 1987 if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf && 1988 (outbuf[0] & MTIP_SEC_ERASE_MODE)) { 1989 erasemode = 1; 1990 } 1991 1992 mtip_set_timeout(dd, &fis, &timeout, erasemode); 1993 1994 /* Determine the correct transfer size.*/ 1995 if (force_single_sector) 1996 transfer_size = ATA_SECT_SIZE; 1997 else 1998 transfer_size = ATA_SECT_SIZE * fis.sect_count; 1999 2000 /* Execute the command.*/ 2001 if (mtip_exec_internal_command(dd->port, 2002 &fis, 2003 5, 2004 dma_buffer, 2005 transfer_size, 2006 0, 2007 timeout) < 0) { 2008 err = -EIO; 2009 goto abort; 2010 } 2011 2012 task_file_data = readl(dd->port->mmio+PORT_TFDATA); 2013 2014 if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) { 2015 reply = dd->port->rxfis + RX_FIS_PIO_SETUP; 2016 req_task->io_ports[7] = reply->control; 2017 } else { 2018 reply = dd->port->rxfis + RX_FIS_D2H_REG; 2019 req_task->io_ports[7] = reply->command; 2020 } 2021 2022 /* reclaim the DMA buffers.*/ 2023 if (inbuf_dma) 2024 pci_unmap_single(dd->pdev, inbuf_dma, 2025 taskin, DMA_FROM_DEVICE); 2026 if (outbuf_dma) 2027 pci_unmap_single(dd->pdev, outbuf_dma, 2028 taskout, DMA_TO_DEVICE); 2029 inbuf_dma = 0; 2030 outbuf_dma = 0; 2031 2032 /* return the ATA registers to the caller.*/ 2033 req_task->io_ports[1] = reply->features; 2034 req_task->io_ports[2] = reply->sect_count; 2035 req_task->io_ports[3] = reply->lba_low; 2036 req_task->io_ports[4] = reply->lba_mid; 2037 req_task->io_ports[5] = reply->lba_hi; 2038 req_task->io_ports[6] = reply->device; 2039 2040 if (req_task->out_flags.all & 1) { 2041 2042 req_task->hob_ports[3] = reply->lba_low_ex; 2043 req_task->hob_ports[4] = reply->lba_mid_ex; 2044 req_task->hob_ports[5] = reply->lba_hi_ex; 2045 req_task->hob_ports[1] = reply->features_ex; 2046 req_task->hob_ports[2] = reply->sect_cnt_ex; 2047 } 2048 dbg_printk(MTIP_DRV_NAME 2049 " %s: Completion: stat %x," 2050 "err %x, sect_cnt %x, lbalo %x," 2051 "lbamid %x, lbahi %x, dev %x\n", 2052 __func__, 2053 req_task->io_ports[7], 2054 req_task->io_ports[1], 2055 req_task->io_ports[2], 2056 req_task->io_ports[3], 2057 req_task->io_ports[4], 2058 req_task->io_ports[5], 2059 req_task->io_ports[6]); 2060 2061 if (taskout) { 2062 if (copy_to_user(buf + outtotal, outbuf, taskout)) { 2063 err = -EFAULT; 2064 goto abort; 2065 } 2066 } 2067 if (taskin) { 2068 if (copy_to_user(buf + intotal, inbuf, taskin)) { 2069 err = -EFAULT; 2070 goto abort; 2071 } 2072 } 2073 abort: 2074 if (inbuf_dma) 2075 pci_unmap_single(dd->pdev, inbuf_dma, 2076 taskin, DMA_FROM_DEVICE); 2077 if (outbuf_dma) 2078 pci_unmap_single(dd->pdev, outbuf_dma, 2079 taskout, DMA_TO_DEVICE); 2080 kfree(outbuf); 2081 kfree(inbuf); 2082 2083 return err; 2084 } 2085 2086 /* 2087 * Handle IOCTL calls from the Block Layer. 2088 * 2089 * This function is called by the Block Layer when it receives an IOCTL 2090 * command that it does not understand. If the IOCTL command is not supported 2091 * this function returns -ENOTTY. 2092 * 2093 * @dd Pointer to the driver data structure. 2094 * @cmd IOCTL command passed from the Block Layer. 2095 * @arg IOCTL argument passed from the Block Layer. 2096 * 2097 * return value 2098 * 0 The IOCTL completed successfully. 2099 * -ENOTTY The specified command is not supported. 2100 * -EFAULT An error occurred copying data to a user space buffer. 2101 * -EIO An error occurred while executing the command. 2102 */ 2103 static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd, 2104 unsigned long arg) 2105 { 2106 switch (cmd) { 2107 case HDIO_GET_IDENTITY: 2108 { 2109 if (copy_to_user((void __user *)arg, dd->port->identify, 2110 sizeof(u16) * ATA_ID_WORDS)) 2111 return -EFAULT; 2112 break; 2113 } 2114 case HDIO_DRIVE_CMD: 2115 { 2116 u8 drive_command[4]; 2117 2118 /* Copy the user command info to our buffer. */ 2119 if (copy_from_user(drive_command, 2120 (void __user *) arg, 2121 sizeof(drive_command))) 2122 return -EFAULT; 2123 2124 /* Execute the drive command. */ 2125 if (exec_drive_command(dd->port, 2126 drive_command, 2127 (void __user *) (arg+4))) 2128 return -EIO; 2129 2130 /* Copy the status back to the users buffer. */ 2131 if (copy_to_user((void __user *) arg, 2132 drive_command, 2133 sizeof(drive_command))) 2134 return -EFAULT; 2135 2136 break; 2137 } 2138 case HDIO_DRIVE_TASK: 2139 { 2140 u8 drive_command[7]; 2141 2142 /* Copy the user command info to our buffer. */ 2143 if (copy_from_user(drive_command, 2144 (void __user *) arg, 2145 sizeof(drive_command))) 2146 return -EFAULT; 2147 2148 /* Execute the drive command. */ 2149 if (exec_drive_task(dd->port, drive_command)) 2150 return -EIO; 2151 2152 /* Copy the status back to the users buffer. */ 2153 if (copy_to_user((void __user *) arg, 2154 drive_command, 2155 sizeof(drive_command))) 2156 return -EFAULT; 2157 2158 break; 2159 } 2160 case HDIO_DRIVE_TASKFILE: { 2161 ide_task_request_t req_task; 2162 int ret, outtotal; 2163 2164 if (copy_from_user(&req_task, (void __user *) arg, 2165 sizeof(req_task))) 2166 return -EFAULT; 2167 2168 outtotal = sizeof(req_task); 2169 2170 ret = exec_drive_taskfile(dd, (void __user *) arg, 2171 &req_task, outtotal); 2172 2173 if (copy_to_user((void __user *) arg, &req_task, 2174 sizeof(req_task))) 2175 return -EFAULT; 2176 2177 return ret; 2178 } 2179 2180 default: 2181 return -EINVAL; 2182 } 2183 return 0; 2184 } 2185 2186 /* 2187 * Submit an IO to the hw 2188 * 2189 * This function is called by the block layer to issue an io 2190 * to the device. Upon completion, the callback function will 2191 * be called with the data parameter passed as the callback data. 2192 * 2193 * @dd Pointer to the driver data structure. 2194 * @start First sector to read. 2195 * @nsect Number of sectors to read. 2196 * @nents Number of entries in scatter list for the read command. 2197 * @tag The tag of this read command. 2198 * @callback Pointer to the function that should be called 2199 * when the read completes. 2200 * @data Callback data passed to the callback function 2201 * when the read completes. 2202 * @dir Direction (read or write) 2203 * 2204 * return value 2205 * None 2206 */ 2207 static void mtip_hw_submit_io(struct driver_data *dd, struct request *rq, 2208 struct mtip_cmd *command, int nents, 2209 struct blk_mq_hw_ctx *hctx) 2210 { 2211 struct host_to_dev_fis *fis; 2212 struct mtip_port *port = dd->port; 2213 int dma_dir = rq_data_dir(rq) == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE; 2214 u64 start = blk_rq_pos(rq); 2215 unsigned int nsect = blk_rq_sectors(rq); 2216 2217 /* Map the scatter list for DMA access */ 2218 nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir); 2219 2220 prefetch(&port->flags); 2221 2222 command->scatter_ents = nents; 2223 2224 /* 2225 * The number of retries for this command before it is 2226 * reported as a failure to the upper layers. 2227 */ 2228 command->retries = MTIP_MAX_RETRIES; 2229 2230 /* Fill out fis */ 2231 fis = command->command; 2232 fis->type = 0x27; 2233 fis->opts = 1 << 7; 2234 if (dma_dir == DMA_FROM_DEVICE) 2235 fis->command = ATA_CMD_FPDMA_READ; 2236 else 2237 fis->command = ATA_CMD_FPDMA_WRITE; 2238 fis->lba_low = start & 0xFF; 2239 fis->lba_mid = (start >> 8) & 0xFF; 2240 fis->lba_hi = (start >> 16) & 0xFF; 2241 fis->lba_low_ex = (start >> 24) & 0xFF; 2242 fis->lba_mid_ex = (start >> 32) & 0xFF; 2243 fis->lba_hi_ex = (start >> 40) & 0xFF; 2244 fis->device = 1 << 6; 2245 fis->features = nsect & 0xFF; 2246 fis->features_ex = (nsect >> 8) & 0xFF; 2247 fis->sect_count = ((rq->tag << 3) | (rq->tag >> 5)); 2248 fis->sect_cnt_ex = 0; 2249 fis->control = 0; 2250 fis->res2 = 0; 2251 fis->res3 = 0; 2252 fill_command_sg(dd, command, nents); 2253 2254 if (unlikely(command->unaligned)) 2255 fis->device |= 1 << 7; 2256 2257 /* Populate the command header */ 2258 command->command_header->opts = 2259 __force_bit2int cpu_to_le32( 2260 (nents << 16) | 5 | AHCI_CMD_PREFETCH); 2261 command->command_header->byte_count = 0; 2262 2263 command->direction = dma_dir; 2264 2265 /* 2266 * To prevent this command from being issued 2267 * if an internal command is in progress or error handling is active. 2268 */ 2269 if (unlikely(port->flags & MTIP_PF_PAUSE_IO)) { 2270 set_bit(rq->tag, port->cmds_to_issue); 2271 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags); 2272 return; 2273 } 2274 2275 /* Issue the command to the hardware */ 2276 mtip_issue_ncq_command(port, rq->tag); 2277 } 2278 2279 /* 2280 * Sysfs status dump. 2281 * 2282 * @dev Pointer to the device structure, passed by the kernrel. 2283 * @attr Pointer to the device_attribute structure passed by the kernel. 2284 * @buf Pointer to the char buffer that will receive the stats info. 2285 * 2286 * return value 2287 * The size, in bytes, of the data copied into buf. 2288 */ 2289 static ssize_t mtip_hw_show_status(struct device *dev, 2290 struct device_attribute *attr, 2291 char *buf) 2292 { 2293 struct driver_data *dd = dev_to_disk(dev)->private_data; 2294 int size = 0; 2295 2296 if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag)) 2297 size += sprintf(buf, "%s", "thermal_shutdown\n"); 2298 else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag)) 2299 size += sprintf(buf, "%s", "write_protect\n"); 2300 else 2301 size += sprintf(buf, "%s", "online\n"); 2302 2303 return size; 2304 } 2305 2306 static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL); 2307 2308 /* debugsfs entries */ 2309 2310 static ssize_t show_device_status(struct device_driver *drv, char *buf) 2311 { 2312 int size = 0; 2313 struct driver_data *dd, *tmp; 2314 unsigned long flags; 2315 char id_buf[42]; 2316 u16 status = 0; 2317 2318 spin_lock_irqsave(&dev_lock, flags); 2319 size += sprintf(&buf[size], "Devices Present:\n"); 2320 list_for_each_entry_safe(dd, tmp, &online_list, online_list) { 2321 if (dd->pdev) { 2322 if (dd->port && 2323 dd->port->identify && 2324 dd->port->identify_valid) { 2325 strlcpy(id_buf, 2326 (char *) (dd->port->identify + 10), 21); 2327 status = *(dd->port->identify + 141); 2328 } else { 2329 memset(id_buf, 0, 42); 2330 status = 0; 2331 } 2332 2333 if (dd->port && 2334 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) { 2335 size += sprintf(&buf[size], 2336 " device %s %s (ftl rebuild %d %%)\n", 2337 dev_name(&dd->pdev->dev), 2338 id_buf, 2339 status); 2340 } else { 2341 size += sprintf(&buf[size], 2342 " device %s %s\n", 2343 dev_name(&dd->pdev->dev), 2344 id_buf); 2345 } 2346 } 2347 } 2348 2349 size += sprintf(&buf[size], "Devices Being Removed:\n"); 2350 list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) { 2351 if (dd->pdev) { 2352 if (dd->port && 2353 dd->port->identify && 2354 dd->port->identify_valid) { 2355 strlcpy(id_buf, 2356 (char *) (dd->port->identify+10), 21); 2357 status = *(dd->port->identify + 141); 2358 } else { 2359 memset(id_buf, 0, 42); 2360 status = 0; 2361 } 2362 2363 if (dd->port && 2364 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) { 2365 size += sprintf(&buf[size], 2366 " device %s %s (ftl rebuild %d %%)\n", 2367 dev_name(&dd->pdev->dev), 2368 id_buf, 2369 status); 2370 } else { 2371 size += sprintf(&buf[size], 2372 " device %s %s\n", 2373 dev_name(&dd->pdev->dev), 2374 id_buf); 2375 } 2376 } 2377 } 2378 spin_unlock_irqrestore(&dev_lock, flags); 2379 2380 return size; 2381 } 2382 2383 static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf, 2384 size_t len, loff_t *offset) 2385 { 2386 struct driver_data *dd = (struct driver_data *)f->private_data; 2387 int size = *offset; 2388 char *buf; 2389 int rv = 0; 2390 2391 if (!len || *offset) 2392 return 0; 2393 2394 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL); 2395 if (!buf) { 2396 dev_err(&dd->pdev->dev, 2397 "Memory allocation: status buffer\n"); 2398 return -ENOMEM; 2399 } 2400 2401 size += show_device_status(NULL, buf); 2402 2403 *offset = size <= len ? size : len; 2404 size = copy_to_user(ubuf, buf, *offset); 2405 if (size) 2406 rv = -EFAULT; 2407 2408 kfree(buf); 2409 return rv ? rv : *offset; 2410 } 2411 2412 static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf, 2413 size_t len, loff_t *offset) 2414 { 2415 struct driver_data *dd = (struct driver_data *)f->private_data; 2416 char *buf; 2417 u32 group_allocated; 2418 int size = *offset; 2419 int n, rv = 0; 2420 2421 if (!len || size) 2422 return 0; 2423 2424 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL); 2425 if (!buf) { 2426 dev_err(&dd->pdev->dev, 2427 "Memory allocation: register buffer\n"); 2428 return -ENOMEM; 2429 } 2430 2431 size += sprintf(&buf[size], "H/ S ACTive : [ 0x"); 2432 2433 for (n = dd->slot_groups-1; n >= 0; n--) 2434 size += sprintf(&buf[size], "%08X ", 2435 readl(dd->port->s_active[n])); 2436 2437 size += sprintf(&buf[size], "]\n"); 2438 size += sprintf(&buf[size], "H/ Command Issue : [ 0x"); 2439 2440 for (n = dd->slot_groups-1; n >= 0; n--) 2441 size += sprintf(&buf[size], "%08X ", 2442 readl(dd->port->cmd_issue[n])); 2443 2444 size += sprintf(&buf[size], "]\n"); 2445 size += sprintf(&buf[size], "H/ Completed : [ 0x"); 2446 2447 for (n = dd->slot_groups-1; n >= 0; n--) 2448 size += sprintf(&buf[size], "%08X ", 2449 readl(dd->port->completed[n])); 2450 2451 size += sprintf(&buf[size], "]\n"); 2452 size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n", 2453 readl(dd->port->mmio + PORT_IRQ_STAT)); 2454 size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n", 2455 readl(dd->mmio + HOST_IRQ_STAT)); 2456 size += sprintf(&buf[size], "\n"); 2457 2458 size += sprintf(&buf[size], "L/ Commands in Q : [ 0x"); 2459 2460 for (n = dd->slot_groups-1; n >= 0; n--) { 2461 if (sizeof(long) > sizeof(u32)) 2462 group_allocated = 2463 dd->port->cmds_to_issue[n/2] >> (32*(n&1)); 2464 else 2465 group_allocated = dd->port->cmds_to_issue[n]; 2466 size += sprintf(&buf[size], "%08X ", group_allocated); 2467 } 2468 size += sprintf(&buf[size], "]\n"); 2469 2470 *offset = size <= len ? size : len; 2471 size = copy_to_user(ubuf, buf, *offset); 2472 if (size) 2473 rv = -EFAULT; 2474 2475 kfree(buf); 2476 return rv ? rv : *offset; 2477 } 2478 2479 static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf, 2480 size_t len, loff_t *offset) 2481 { 2482 struct driver_data *dd = (struct driver_data *)f->private_data; 2483 char *buf; 2484 int size = *offset; 2485 int rv = 0; 2486 2487 if (!len || size) 2488 return 0; 2489 2490 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL); 2491 if (!buf) { 2492 dev_err(&dd->pdev->dev, 2493 "Memory allocation: flag buffer\n"); 2494 return -ENOMEM; 2495 } 2496 2497 size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n", 2498 dd->port->flags); 2499 size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n", 2500 dd->dd_flag); 2501 2502 *offset = size <= len ? size : len; 2503 size = copy_to_user(ubuf, buf, *offset); 2504 if (size) 2505 rv = -EFAULT; 2506 2507 kfree(buf); 2508 return rv ? rv : *offset; 2509 } 2510 2511 static const struct file_operations mtip_device_status_fops = { 2512 .owner = THIS_MODULE, 2513 .open = simple_open, 2514 .read = mtip_hw_read_device_status, 2515 .llseek = no_llseek, 2516 }; 2517 2518 static const struct file_operations mtip_regs_fops = { 2519 .owner = THIS_MODULE, 2520 .open = simple_open, 2521 .read = mtip_hw_read_registers, 2522 .llseek = no_llseek, 2523 }; 2524 2525 static const struct file_operations mtip_flags_fops = { 2526 .owner = THIS_MODULE, 2527 .open = simple_open, 2528 .read = mtip_hw_read_flags, 2529 .llseek = no_llseek, 2530 }; 2531 2532 /* 2533 * Create the sysfs related attributes. 2534 * 2535 * @dd Pointer to the driver data structure. 2536 * @kobj Pointer to the kobj for the block device. 2537 * 2538 * return value 2539 * 0 Operation completed successfully. 2540 * -EINVAL Invalid parameter. 2541 */ 2542 static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj) 2543 { 2544 if (!kobj || !dd) 2545 return -EINVAL; 2546 2547 if (sysfs_create_file(kobj, &dev_attr_status.attr)) 2548 dev_warn(&dd->pdev->dev, 2549 "Error creating 'status' sysfs entry\n"); 2550 return 0; 2551 } 2552 2553 /* 2554 * Remove the sysfs related attributes. 2555 * 2556 * @dd Pointer to the driver data structure. 2557 * @kobj Pointer to the kobj for the block device. 2558 * 2559 * return value 2560 * 0 Operation completed successfully. 2561 * -EINVAL Invalid parameter. 2562 */ 2563 static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj) 2564 { 2565 if (!kobj || !dd) 2566 return -EINVAL; 2567 2568 sysfs_remove_file(kobj, &dev_attr_status.attr); 2569 2570 return 0; 2571 } 2572 2573 static int mtip_hw_debugfs_init(struct driver_data *dd) 2574 { 2575 if (!dfs_parent) 2576 return -1; 2577 2578 dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent); 2579 if (IS_ERR_OR_NULL(dd->dfs_node)) { 2580 dev_warn(&dd->pdev->dev, 2581 "Error creating node %s under debugfs\n", 2582 dd->disk->disk_name); 2583 dd->dfs_node = NULL; 2584 return -1; 2585 } 2586 2587 debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd, 2588 &mtip_flags_fops); 2589 debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd, 2590 &mtip_regs_fops); 2591 2592 return 0; 2593 } 2594 2595 static void mtip_hw_debugfs_exit(struct driver_data *dd) 2596 { 2597 if (dd->dfs_node) 2598 debugfs_remove_recursive(dd->dfs_node); 2599 } 2600 2601 /* 2602 * Perform any init/resume time hardware setup 2603 * 2604 * @dd Pointer to the driver data structure. 2605 * 2606 * return value 2607 * None 2608 */ 2609 static inline void hba_setup(struct driver_data *dd) 2610 { 2611 u32 hwdata; 2612 hwdata = readl(dd->mmio + HOST_HSORG); 2613 2614 /* interrupt bug workaround: use only 1 IS bit.*/ 2615 writel(hwdata | 2616 HSORG_DISABLE_SLOTGRP_INTR | 2617 HSORG_DISABLE_SLOTGRP_PXIS, 2618 dd->mmio + HOST_HSORG); 2619 } 2620 2621 static int mtip_device_unaligned_constrained(struct driver_data *dd) 2622 { 2623 return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0); 2624 } 2625 2626 /* 2627 * Detect the details of the product, and store anything needed 2628 * into the driver data structure. This includes product type and 2629 * version and number of slot groups. 2630 * 2631 * @dd Pointer to the driver data structure. 2632 * 2633 * return value 2634 * None 2635 */ 2636 static void mtip_detect_product(struct driver_data *dd) 2637 { 2638 u32 hwdata; 2639 unsigned int rev, slotgroups; 2640 2641 /* 2642 * HBA base + 0xFC [15:0] - vendor-specific hardware interface 2643 * info register: 2644 * [15:8] hardware/software interface rev# 2645 * [ 3] asic-style interface 2646 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style). 2647 */ 2648 hwdata = readl(dd->mmio + HOST_HSORG); 2649 2650 dd->product_type = MTIP_PRODUCT_UNKNOWN; 2651 dd->slot_groups = 1; 2652 2653 if (hwdata & 0x8) { 2654 dd->product_type = MTIP_PRODUCT_ASICFPGA; 2655 rev = (hwdata & HSORG_HWREV) >> 8; 2656 slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1; 2657 dev_info(&dd->pdev->dev, 2658 "ASIC-FPGA design, HS rev 0x%x, " 2659 "%i slot groups [%i slots]\n", 2660 rev, 2661 slotgroups, 2662 slotgroups * 32); 2663 2664 if (slotgroups > MTIP_MAX_SLOT_GROUPS) { 2665 dev_warn(&dd->pdev->dev, 2666 "Warning: driver only supports " 2667 "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS); 2668 slotgroups = MTIP_MAX_SLOT_GROUPS; 2669 } 2670 dd->slot_groups = slotgroups; 2671 return; 2672 } 2673 2674 dev_warn(&dd->pdev->dev, "Unrecognized product id\n"); 2675 } 2676 2677 /* 2678 * Blocking wait for FTL rebuild to complete 2679 * 2680 * @dd Pointer to the DRIVER_DATA structure. 2681 * 2682 * return value 2683 * 0 FTL rebuild completed successfully 2684 * -EFAULT FTL rebuild error/timeout/interruption 2685 */ 2686 static int mtip_ftl_rebuild_poll(struct driver_data *dd) 2687 { 2688 unsigned long timeout, cnt = 0, start; 2689 2690 dev_warn(&dd->pdev->dev, 2691 "FTL rebuild in progress. Polling for completion.\n"); 2692 2693 start = jiffies; 2694 timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS); 2695 2696 do { 2697 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, 2698 &dd->dd_flag))) 2699 return -EFAULT; 2700 if (mtip_check_surprise_removal(dd->pdev)) 2701 return -EFAULT; 2702 2703 if (mtip_get_identify(dd->port, NULL) < 0) 2704 return -EFAULT; 2705 2706 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == 2707 MTIP_FTL_REBUILD_MAGIC) { 2708 ssleep(1); 2709 /* Print message every 3 minutes */ 2710 if (cnt++ >= 180) { 2711 dev_warn(&dd->pdev->dev, 2712 "FTL rebuild in progress (%d secs).\n", 2713 jiffies_to_msecs(jiffies - start) / 1000); 2714 cnt = 0; 2715 } 2716 } else { 2717 dev_warn(&dd->pdev->dev, 2718 "FTL rebuild complete (%d secs).\n", 2719 jiffies_to_msecs(jiffies - start) / 1000); 2720 mtip_block_initialize(dd); 2721 return 0; 2722 } 2723 } while (time_before(jiffies, timeout)); 2724 2725 /* Check for timeout */ 2726 dev_err(&dd->pdev->dev, 2727 "Timed out waiting for FTL rebuild to complete (%d secs).\n", 2728 jiffies_to_msecs(jiffies - start) / 1000); 2729 return -EFAULT; 2730 } 2731 2732 static void mtip_softirq_done_fn(struct request *rq) 2733 { 2734 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); 2735 struct driver_data *dd = rq->q->queuedata; 2736 2737 /* Unmap the DMA scatter list entries */ 2738 dma_unmap_sg(&dd->pdev->dev, cmd->sg, cmd->scatter_ents, 2739 cmd->direction); 2740 2741 if (unlikely(cmd->unaligned)) 2742 up(&dd->port->cmd_slot_unal); 2743 2744 blk_mq_end_request(rq, cmd->status); 2745 } 2746 2747 static void mtip_abort_cmd(struct request *req, void *data, 2748 bool reserved) 2749 { 2750 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req); 2751 struct driver_data *dd = data; 2752 2753 dbg_printk(MTIP_DRV_NAME " Aborting request, tag = %d\n", req->tag); 2754 2755 clear_bit(req->tag, dd->port->cmds_to_issue); 2756 cmd->status = -EIO; 2757 mtip_softirq_done_fn(req); 2758 } 2759 2760 static void mtip_queue_cmd(struct request *req, void *data, 2761 bool reserved) 2762 { 2763 struct driver_data *dd = data; 2764 2765 set_bit(req->tag, dd->port->cmds_to_issue); 2766 blk_abort_request(req); 2767 } 2768 2769 /* 2770 * service thread to issue queued commands 2771 * 2772 * @data Pointer to the driver data structure. 2773 * 2774 * return value 2775 * 0 2776 */ 2777 2778 static int mtip_service_thread(void *data) 2779 { 2780 struct driver_data *dd = (struct driver_data *)data; 2781 unsigned long slot, slot_start, slot_wrap, to; 2782 unsigned int num_cmd_slots = dd->slot_groups * 32; 2783 struct mtip_port *port = dd->port; 2784 2785 while (1) { 2786 if (kthread_should_stop() || 2787 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags)) 2788 goto st_out; 2789 clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags); 2790 2791 /* 2792 * the condition is to check neither an internal command is 2793 * is in progress nor error handling is active 2794 */ 2795 wait_event_interruptible(port->svc_wait, (port->flags) && 2796 (port->flags & MTIP_PF_SVC_THD_WORK)); 2797 2798 if (kthread_should_stop() || 2799 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags)) 2800 goto st_out; 2801 2802 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, 2803 &dd->dd_flag))) 2804 goto st_out; 2805 2806 set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags); 2807 2808 restart_eh: 2809 /* Demux bits: start with error handling */ 2810 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) { 2811 mtip_handle_tfe(dd); 2812 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); 2813 } 2814 2815 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) 2816 goto restart_eh; 2817 2818 if (test_bit(MTIP_PF_TO_ACTIVE_BIT, &port->flags)) { 2819 to = jiffies + msecs_to_jiffies(5000); 2820 2821 do { 2822 mdelay(100); 2823 } while (atomic_read(&dd->irq_workers_active) != 0 && 2824 time_before(jiffies, to)); 2825 2826 if (atomic_read(&dd->irq_workers_active) != 0) 2827 dev_warn(&dd->pdev->dev, 2828 "Completion workers still active!"); 2829 2830 spin_lock(dd->queue->queue_lock); 2831 blk_mq_tagset_busy_iter(&dd->tags, 2832 mtip_queue_cmd, dd); 2833 spin_unlock(dd->queue->queue_lock); 2834 2835 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &dd->port->flags); 2836 2837 if (mtip_device_reset(dd)) 2838 blk_mq_tagset_busy_iter(&dd->tags, 2839 mtip_abort_cmd, dd); 2840 2841 clear_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags); 2842 } 2843 2844 if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) { 2845 slot = 1; 2846 /* used to restrict the loop to one iteration */ 2847 slot_start = num_cmd_slots; 2848 slot_wrap = 0; 2849 while (1) { 2850 slot = find_next_bit(port->cmds_to_issue, 2851 num_cmd_slots, slot); 2852 if (slot_wrap == 1) { 2853 if ((slot_start >= slot) || 2854 (slot >= num_cmd_slots)) 2855 break; 2856 } 2857 if (unlikely(slot_start == num_cmd_slots)) 2858 slot_start = slot; 2859 2860 if (unlikely(slot == num_cmd_slots)) { 2861 slot = 1; 2862 slot_wrap = 1; 2863 continue; 2864 } 2865 2866 /* Issue the command to the hardware */ 2867 mtip_issue_ncq_command(port, slot); 2868 2869 clear_bit(slot, port->cmds_to_issue); 2870 } 2871 2872 clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags); 2873 } 2874 2875 if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) { 2876 if (mtip_ftl_rebuild_poll(dd) == 0) 2877 clear_bit(MTIP_PF_REBUILD_BIT, &port->flags); 2878 } 2879 } 2880 2881 st_out: 2882 return 0; 2883 } 2884 2885 /* 2886 * DMA region teardown 2887 * 2888 * @dd Pointer to driver_data structure 2889 * 2890 * return value 2891 * None 2892 */ 2893 static void mtip_dma_free(struct driver_data *dd) 2894 { 2895 struct mtip_port *port = dd->port; 2896 2897 if (port->block1) 2898 dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ, 2899 port->block1, port->block1_dma); 2900 2901 if (port->command_list) { 2902 dmam_free_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ, 2903 port->command_list, port->command_list_dma); 2904 } 2905 } 2906 2907 /* 2908 * DMA region setup 2909 * 2910 * @dd Pointer to driver_data structure 2911 * 2912 * return value 2913 * -ENOMEM Not enough free DMA region space to initialize driver 2914 */ 2915 static int mtip_dma_alloc(struct driver_data *dd) 2916 { 2917 struct mtip_port *port = dd->port; 2918 2919 /* Allocate dma memory for RX Fis, Identify, and Sector Bufffer */ 2920 port->block1 = 2921 dmam_alloc_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ, 2922 &port->block1_dma, GFP_KERNEL); 2923 if (!port->block1) 2924 return -ENOMEM; 2925 memset(port->block1, 0, BLOCK_DMA_ALLOC_SZ); 2926 2927 /* Allocate dma memory for command list */ 2928 port->command_list = 2929 dmam_alloc_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ, 2930 &port->command_list_dma, GFP_KERNEL); 2931 if (!port->command_list) { 2932 dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ, 2933 port->block1, port->block1_dma); 2934 port->block1 = NULL; 2935 port->block1_dma = 0; 2936 return -ENOMEM; 2937 } 2938 memset(port->command_list, 0, AHCI_CMD_TBL_SZ); 2939 2940 /* Setup all pointers into first DMA region */ 2941 port->rxfis = port->block1 + AHCI_RX_FIS_OFFSET; 2942 port->rxfis_dma = port->block1_dma + AHCI_RX_FIS_OFFSET; 2943 port->identify = port->block1 + AHCI_IDFY_OFFSET; 2944 port->identify_dma = port->block1_dma + AHCI_IDFY_OFFSET; 2945 port->log_buf = port->block1 + AHCI_SECTBUF_OFFSET; 2946 port->log_buf_dma = port->block1_dma + AHCI_SECTBUF_OFFSET; 2947 port->smart_buf = port->block1 + AHCI_SMARTBUF_OFFSET; 2948 port->smart_buf_dma = port->block1_dma + AHCI_SMARTBUF_OFFSET; 2949 2950 return 0; 2951 } 2952 2953 static int mtip_hw_get_identify(struct driver_data *dd) 2954 { 2955 struct smart_attr attr242; 2956 unsigned char *buf; 2957 int rv; 2958 2959 if (mtip_get_identify(dd->port, NULL) < 0) 2960 return -EFAULT; 2961 2962 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == 2963 MTIP_FTL_REBUILD_MAGIC) { 2964 set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags); 2965 return MTIP_FTL_REBUILD_MAGIC; 2966 } 2967 mtip_dump_identify(dd->port); 2968 2969 /* check write protect, over temp and rebuild statuses */ 2970 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ, 2971 dd->port->log_buf, 2972 dd->port->log_buf_dma, 1); 2973 if (rv) { 2974 dev_warn(&dd->pdev->dev, 2975 "Error in READ LOG EXT (10h) command\n"); 2976 /* non-critical error, don't fail the load */ 2977 } else { 2978 buf = (unsigned char *)dd->port->log_buf; 2979 if (buf[259] & 0x1) { 2980 dev_info(&dd->pdev->dev, 2981 "Write protect bit is set.\n"); 2982 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag); 2983 } 2984 if (buf[288] == 0xF7) { 2985 dev_info(&dd->pdev->dev, 2986 "Exceeded Tmax, drive in thermal shutdown.\n"); 2987 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag); 2988 } 2989 if (buf[288] == 0xBF) { 2990 dev_info(&dd->pdev->dev, 2991 "Drive indicates rebuild has failed.\n"); 2992 set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag); 2993 } 2994 } 2995 2996 /* get write protect progess */ 2997 memset(&attr242, 0, sizeof(struct smart_attr)); 2998 if (mtip_get_smart_attr(dd->port, 242, &attr242)) 2999 dev_warn(&dd->pdev->dev, 3000 "Unable to check write protect progress\n"); 3001 else 3002 dev_info(&dd->pdev->dev, 3003 "Write protect progress: %u%% (%u blocks)\n", 3004 attr242.cur, le32_to_cpu(attr242.data)); 3005 3006 return rv; 3007 } 3008 3009 /* 3010 * Called once for each card. 3011 * 3012 * @dd Pointer to the driver data structure. 3013 * 3014 * return value 3015 * 0 on success, else an error code. 3016 */ 3017 static int mtip_hw_init(struct driver_data *dd) 3018 { 3019 int i; 3020 int rv; 3021 unsigned int num_command_slots; 3022 unsigned long timeout, timetaken; 3023 3024 dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR]; 3025 3026 mtip_detect_product(dd); 3027 if (dd->product_type == MTIP_PRODUCT_UNKNOWN) { 3028 rv = -EIO; 3029 goto out1; 3030 } 3031 num_command_slots = dd->slot_groups * 32; 3032 3033 hba_setup(dd); 3034 3035 dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL, 3036 dd->numa_node); 3037 if (!dd->port) { 3038 dev_err(&dd->pdev->dev, 3039 "Memory allocation: port structure\n"); 3040 return -ENOMEM; 3041 } 3042 3043 /* Continue workqueue setup */ 3044 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++) 3045 dd->work[i].port = dd->port; 3046 3047 /* Enable unaligned IO constraints for some devices */ 3048 if (mtip_device_unaligned_constrained(dd)) 3049 dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS; 3050 else 3051 dd->unal_qdepth = 0; 3052 3053 sema_init(&dd->port->cmd_slot_unal, dd->unal_qdepth); 3054 3055 /* Spinlock to prevent concurrent issue */ 3056 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++) 3057 spin_lock_init(&dd->port->cmd_issue_lock[i]); 3058 3059 /* Set the port mmio base address. */ 3060 dd->port->mmio = dd->mmio + PORT_OFFSET; 3061 dd->port->dd = dd; 3062 3063 /* DMA allocations */ 3064 rv = mtip_dma_alloc(dd); 3065 if (rv < 0) 3066 goto out1; 3067 3068 /* Setup the pointers to the extended s_active and CI registers. */ 3069 for (i = 0; i < dd->slot_groups; i++) { 3070 dd->port->s_active[i] = 3071 dd->port->mmio + i*0x80 + PORT_SCR_ACT; 3072 dd->port->cmd_issue[i] = 3073 dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE; 3074 dd->port->completed[i] = 3075 dd->port->mmio + i*0x80 + PORT_SDBV; 3076 } 3077 3078 timetaken = jiffies; 3079 timeout = jiffies + msecs_to_jiffies(30000); 3080 while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) && 3081 time_before(jiffies, timeout)) { 3082 mdelay(100); 3083 } 3084 if (unlikely(mtip_check_surprise_removal(dd->pdev))) { 3085 timetaken = jiffies - timetaken; 3086 dev_warn(&dd->pdev->dev, 3087 "Surprise removal detected at %u ms\n", 3088 jiffies_to_msecs(timetaken)); 3089 rv = -ENODEV; 3090 goto out2 ; 3091 } 3092 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) { 3093 timetaken = jiffies - timetaken; 3094 dev_warn(&dd->pdev->dev, 3095 "Removal detected at %u ms\n", 3096 jiffies_to_msecs(timetaken)); 3097 rv = -EFAULT; 3098 goto out2; 3099 } 3100 3101 /* Conditionally reset the HBA. */ 3102 if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) { 3103 if (mtip_hba_reset(dd) < 0) { 3104 dev_err(&dd->pdev->dev, 3105 "Card did not reset within timeout\n"); 3106 rv = -EIO; 3107 goto out2; 3108 } 3109 } else { 3110 /* Clear any pending interrupts on the HBA */ 3111 writel(readl(dd->mmio + HOST_IRQ_STAT), 3112 dd->mmio + HOST_IRQ_STAT); 3113 } 3114 3115 mtip_init_port(dd->port); 3116 mtip_start_port(dd->port); 3117 3118 /* Setup the ISR and enable interrupts. */ 3119 rv = devm_request_irq(&dd->pdev->dev, 3120 dd->pdev->irq, 3121 mtip_irq_handler, 3122 IRQF_SHARED, 3123 dev_driver_string(&dd->pdev->dev), 3124 dd); 3125 3126 if (rv) { 3127 dev_err(&dd->pdev->dev, 3128 "Unable to allocate IRQ %d\n", dd->pdev->irq); 3129 goto out2; 3130 } 3131 irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding)); 3132 3133 /* Enable interrupts on the HBA. */ 3134 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, 3135 dd->mmio + HOST_CTL); 3136 3137 init_waitqueue_head(&dd->port->svc_wait); 3138 3139 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) { 3140 rv = -EFAULT; 3141 goto out3; 3142 } 3143 3144 return rv; 3145 3146 out3: 3147 /* Disable interrupts on the HBA. */ 3148 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, 3149 dd->mmio + HOST_CTL); 3150 3151 /* Release the IRQ. */ 3152 irq_set_affinity_hint(dd->pdev->irq, NULL); 3153 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd); 3154 3155 out2: 3156 mtip_deinit_port(dd->port); 3157 mtip_dma_free(dd); 3158 3159 out1: 3160 /* Free the memory allocated for the for structure. */ 3161 kfree(dd->port); 3162 3163 return rv; 3164 } 3165 3166 static int mtip_standby_drive(struct driver_data *dd) 3167 { 3168 int rv = 0; 3169 3170 if (dd->sr || !dd->port) 3171 return -ENODEV; 3172 /* 3173 * Send standby immediate (E0h) to the drive so that it 3174 * saves its state. 3175 */ 3176 if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags) && 3177 !test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag) && 3178 !test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag)) { 3179 rv = mtip_standby_immediate(dd->port); 3180 if (rv) 3181 dev_warn(&dd->pdev->dev, 3182 "STANDBY IMMEDIATE failed\n"); 3183 } 3184 return rv; 3185 } 3186 3187 /* 3188 * Called to deinitialize an interface. 3189 * 3190 * @dd Pointer to the driver data structure. 3191 * 3192 * return value 3193 * 0 3194 */ 3195 static int mtip_hw_exit(struct driver_data *dd) 3196 { 3197 if (!dd->sr) { 3198 /* de-initialize the port. */ 3199 mtip_deinit_port(dd->port); 3200 3201 /* Disable interrupts on the HBA. */ 3202 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, 3203 dd->mmio + HOST_CTL); 3204 } 3205 3206 /* Release the IRQ. */ 3207 irq_set_affinity_hint(dd->pdev->irq, NULL); 3208 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd); 3209 msleep(1000); 3210 3211 /* Free dma regions */ 3212 mtip_dma_free(dd); 3213 3214 /* Free the memory allocated for the for structure. */ 3215 kfree(dd->port); 3216 dd->port = NULL; 3217 3218 return 0; 3219 } 3220 3221 /* 3222 * Issue a Standby Immediate command to the device. 3223 * 3224 * This function is called by the Block Layer just before the 3225 * system powers off during a shutdown. 3226 * 3227 * @dd Pointer to the driver data structure. 3228 * 3229 * return value 3230 * 0 3231 */ 3232 static int mtip_hw_shutdown(struct driver_data *dd) 3233 { 3234 /* 3235 * Send standby immediate (E0h) to the drive so that it 3236 * saves its state. 3237 */ 3238 mtip_standby_drive(dd); 3239 3240 return 0; 3241 } 3242 3243 /* 3244 * Suspend function 3245 * 3246 * This function is called by the Block Layer just before the 3247 * system hibernates. 3248 * 3249 * @dd Pointer to the driver data structure. 3250 * 3251 * return value 3252 * 0 Suspend was successful 3253 * -EFAULT Suspend was not successful 3254 */ 3255 static int mtip_hw_suspend(struct driver_data *dd) 3256 { 3257 /* 3258 * Send standby immediate (E0h) to the drive 3259 * so that it saves its state. 3260 */ 3261 if (mtip_standby_drive(dd) != 0) { 3262 dev_err(&dd->pdev->dev, 3263 "Failed standby-immediate command\n"); 3264 return -EFAULT; 3265 } 3266 3267 /* Disable interrupts on the HBA.*/ 3268 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, 3269 dd->mmio + HOST_CTL); 3270 mtip_deinit_port(dd->port); 3271 3272 return 0; 3273 } 3274 3275 /* 3276 * Resume function 3277 * 3278 * This function is called by the Block Layer as the 3279 * system resumes. 3280 * 3281 * @dd Pointer to the driver data structure. 3282 * 3283 * return value 3284 * 0 Resume was successful 3285 * -EFAULT Resume was not successful 3286 */ 3287 static int mtip_hw_resume(struct driver_data *dd) 3288 { 3289 /* Perform any needed hardware setup steps */ 3290 hba_setup(dd); 3291 3292 /* Reset the HBA */ 3293 if (mtip_hba_reset(dd) != 0) { 3294 dev_err(&dd->pdev->dev, 3295 "Unable to reset the HBA\n"); 3296 return -EFAULT; 3297 } 3298 3299 /* 3300 * Enable the port, DMA engine, and FIS reception specific 3301 * h/w in controller. 3302 */ 3303 mtip_init_port(dd->port); 3304 mtip_start_port(dd->port); 3305 3306 /* Enable interrupts on the HBA.*/ 3307 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, 3308 dd->mmio + HOST_CTL); 3309 3310 return 0; 3311 } 3312 3313 /* 3314 * Helper function for reusing disk name 3315 * upon hot insertion. 3316 */ 3317 static int rssd_disk_name_format(char *prefix, 3318 int index, 3319 char *buf, 3320 int buflen) 3321 { 3322 const int base = 'z' - 'a' + 1; 3323 char *begin = buf + strlen(prefix); 3324 char *end = buf + buflen; 3325 char *p; 3326 int unit; 3327 3328 p = end - 1; 3329 *p = '\0'; 3330 unit = base; 3331 do { 3332 if (p == begin) 3333 return -EINVAL; 3334 *--p = 'a' + (index % unit); 3335 index = (index / unit) - 1; 3336 } while (index >= 0); 3337 3338 memmove(begin, p, end - p); 3339 memcpy(buf, prefix, strlen(prefix)); 3340 3341 return 0; 3342 } 3343 3344 /* 3345 * Block layer IOCTL handler. 3346 * 3347 * @dev Pointer to the block_device structure. 3348 * @mode ignored 3349 * @cmd IOCTL command passed from the user application. 3350 * @arg Argument passed from the user application. 3351 * 3352 * return value 3353 * 0 IOCTL completed successfully. 3354 * -ENOTTY IOCTL not supported or invalid driver data 3355 * structure pointer. 3356 */ 3357 static int mtip_block_ioctl(struct block_device *dev, 3358 fmode_t mode, 3359 unsigned cmd, 3360 unsigned long arg) 3361 { 3362 struct driver_data *dd = dev->bd_disk->private_data; 3363 3364 if (!capable(CAP_SYS_ADMIN)) 3365 return -EACCES; 3366 3367 if (!dd) 3368 return -ENOTTY; 3369 3370 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) 3371 return -ENOTTY; 3372 3373 switch (cmd) { 3374 case BLKFLSBUF: 3375 return -ENOTTY; 3376 default: 3377 return mtip_hw_ioctl(dd, cmd, arg); 3378 } 3379 } 3380 3381 #ifdef CONFIG_COMPAT 3382 /* 3383 * Block layer compat IOCTL handler. 3384 * 3385 * @dev Pointer to the block_device structure. 3386 * @mode ignored 3387 * @cmd IOCTL command passed from the user application. 3388 * @arg Argument passed from the user application. 3389 * 3390 * return value 3391 * 0 IOCTL completed successfully. 3392 * -ENOTTY IOCTL not supported or invalid driver data 3393 * structure pointer. 3394 */ 3395 static int mtip_block_compat_ioctl(struct block_device *dev, 3396 fmode_t mode, 3397 unsigned cmd, 3398 unsigned long arg) 3399 { 3400 struct driver_data *dd = dev->bd_disk->private_data; 3401 3402 if (!capable(CAP_SYS_ADMIN)) 3403 return -EACCES; 3404 3405 if (!dd) 3406 return -ENOTTY; 3407 3408 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) 3409 return -ENOTTY; 3410 3411 switch (cmd) { 3412 case BLKFLSBUF: 3413 return -ENOTTY; 3414 case HDIO_DRIVE_TASKFILE: { 3415 struct mtip_compat_ide_task_request_s __user *compat_req_task; 3416 ide_task_request_t req_task; 3417 int compat_tasksize, outtotal, ret; 3418 3419 compat_tasksize = 3420 sizeof(struct mtip_compat_ide_task_request_s); 3421 3422 compat_req_task = 3423 (struct mtip_compat_ide_task_request_s __user *) arg; 3424 3425 if (copy_from_user(&req_task, (void __user *) arg, 3426 compat_tasksize - (2 * sizeof(compat_long_t)))) 3427 return -EFAULT; 3428 3429 if (get_user(req_task.out_size, &compat_req_task->out_size)) 3430 return -EFAULT; 3431 3432 if (get_user(req_task.in_size, &compat_req_task->in_size)) 3433 return -EFAULT; 3434 3435 outtotal = sizeof(struct mtip_compat_ide_task_request_s); 3436 3437 ret = exec_drive_taskfile(dd, (void __user *) arg, 3438 &req_task, outtotal); 3439 3440 if (copy_to_user((void __user *) arg, &req_task, 3441 compat_tasksize - 3442 (2 * sizeof(compat_long_t)))) 3443 return -EFAULT; 3444 3445 if (put_user(req_task.out_size, &compat_req_task->out_size)) 3446 return -EFAULT; 3447 3448 if (put_user(req_task.in_size, &compat_req_task->in_size)) 3449 return -EFAULT; 3450 3451 return ret; 3452 } 3453 default: 3454 return mtip_hw_ioctl(dd, cmd, arg); 3455 } 3456 } 3457 #endif 3458 3459 /* 3460 * Obtain the geometry of the device. 3461 * 3462 * You may think that this function is obsolete, but some applications, 3463 * fdisk for example still used CHS values. This function describes the 3464 * device as having 224 heads and 56 sectors per cylinder. These values are 3465 * chosen so that each cylinder is aligned on a 4KB boundary. Since a 3466 * partition is described in terms of a start and end cylinder this means 3467 * that each partition is also 4KB aligned. Non-aligned partitions adversely 3468 * affects performance. 3469 * 3470 * @dev Pointer to the block_device strucutre. 3471 * @geo Pointer to a hd_geometry structure. 3472 * 3473 * return value 3474 * 0 Operation completed successfully. 3475 * -ENOTTY An error occurred while reading the drive capacity. 3476 */ 3477 static int mtip_block_getgeo(struct block_device *dev, 3478 struct hd_geometry *geo) 3479 { 3480 struct driver_data *dd = dev->bd_disk->private_data; 3481 sector_t capacity; 3482 3483 if (!dd) 3484 return -ENOTTY; 3485 3486 if (!(mtip_hw_get_capacity(dd, &capacity))) { 3487 dev_warn(&dd->pdev->dev, 3488 "Could not get drive capacity.\n"); 3489 return -ENOTTY; 3490 } 3491 3492 geo->heads = 224; 3493 geo->sectors = 56; 3494 sector_div(capacity, (geo->heads * geo->sectors)); 3495 geo->cylinders = capacity; 3496 return 0; 3497 } 3498 3499 static int mtip_block_open(struct block_device *dev, fmode_t mode) 3500 { 3501 struct driver_data *dd; 3502 3503 if (dev && dev->bd_disk) { 3504 dd = (struct driver_data *) dev->bd_disk->private_data; 3505 3506 if (dd) { 3507 if (test_bit(MTIP_DDF_REMOVAL_BIT, 3508 &dd->dd_flag)) { 3509 return -ENODEV; 3510 } 3511 return 0; 3512 } 3513 } 3514 return -ENODEV; 3515 } 3516 3517 static void mtip_block_release(struct gendisk *disk, fmode_t mode) 3518 { 3519 } 3520 3521 /* 3522 * Block device operation function. 3523 * 3524 * This structure contains pointers to the functions required by the block 3525 * layer. 3526 */ 3527 static const struct block_device_operations mtip_block_ops = { 3528 .open = mtip_block_open, 3529 .release = mtip_block_release, 3530 .ioctl = mtip_block_ioctl, 3531 #ifdef CONFIG_COMPAT 3532 .compat_ioctl = mtip_block_compat_ioctl, 3533 #endif 3534 .getgeo = mtip_block_getgeo, 3535 .owner = THIS_MODULE 3536 }; 3537 3538 static inline bool is_se_active(struct driver_data *dd) 3539 { 3540 if (unlikely(test_bit(MTIP_PF_SE_ACTIVE_BIT, &dd->port->flags))) { 3541 if (dd->port->ic_pause_timer) { 3542 unsigned long to = dd->port->ic_pause_timer + 3543 msecs_to_jiffies(1000); 3544 if (time_after(jiffies, to)) { 3545 clear_bit(MTIP_PF_SE_ACTIVE_BIT, 3546 &dd->port->flags); 3547 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag); 3548 dd->port->ic_pause_timer = 0; 3549 wake_up_interruptible(&dd->port->svc_wait); 3550 return false; 3551 } 3552 } 3553 return true; 3554 } 3555 return false; 3556 } 3557 3558 /* 3559 * Block layer make request function. 3560 * 3561 * This function is called by the kernel to process a BIO for 3562 * the P320 device. 3563 * 3564 * @queue Pointer to the request queue. Unused other than to obtain 3565 * the driver data structure. 3566 * @rq Pointer to the request. 3567 * 3568 */ 3569 static int mtip_submit_request(struct blk_mq_hw_ctx *hctx, struct request *rq) 3570 { 3571 struct driver_data *dd = hctx->queue->queuedata; 3572 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); 3573 unsigned int nents; 3574 3575 if (is_se_active(dd)) 3576 return -ENODATA; 3577 3578 if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) { 3579 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, 3580 &dd->dd_flag))) { 3581 return -ENXIO; 3582 } 3583 if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) { 3584 return -ENODATA; 3585 } 3586 if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT, 3587 &dd->dd_flag) && 3588 rq_data_dir(rq))) { 3589 return -ENODATA; 3590 } 3591 if (unlikely(test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag) || 3592 test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag))) 3593 return -ENODATA; 3594 } 3595 3596 if (req_op(rq) == REQ_OP_DISCARD) { 3597 int err; 3598 3599 err = mtip_send_trim(dd, blk_rq_pos(rq), blk_rq_sectors(rq)); 3600 blk_mq_end_request(rq, err); 3601 return 0; 3602 } 3603 3604 /* Create the scatter list for this request. */ 3605 nents = blk_rq_map_sg(hctx->queue, rq, cmd->sg); 3606 3607 /* Issue the read/write. */ 3608 mtip_hw_submit_io(dd, rq, cmd, nents, hctx); 3609 return 0; 3610 } 3611 3612 static bool mtip_check_unal_depth(struct blk_mq_hw_ctx *hctx, 3613 struct request *rq) 3614 { 3615 struct driver_data *dd = hctx->queue->queuedata; 3616 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); 3617 3618 if (rq_data_dir(rq) == READ || !dd->unal_qdepth) 3619 return false; 3620 3621 /* 3622 * If unaligned depth must be limited on this controller, mark it 3623 * as unaligned if the IO isn't on a 4k boundary (start of length). 3624 */ 3625 if (blk_rq_sectors(rq) <= 64) { 3626 if ((blk_rq_pos(rq) & 7) || (blk_rq_sectors(rq) & 7)) 3627 cmd->unaligned = 1; 3628 } 3629 3630 if (cmd->unaligned && down_trylock(&dd->port->cmd_slot_unal)) 3631 return true; 3632 3633 return false; 3634 } 3635 3636 static int mtip_issue_reserved_cmd(struct blk_mq_hw_ctx *hctx, 3637 struct request *rq) 3638 { 3639 struct driver_data *dd = hctx->queue->queuedata; 3640 struct mtip_int_cmd *icmd = rq->special; 3641 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); 3642 struct mtip_cmd_sg *command_sg; 3643 3644 if (mtip_commands_active(dd->port)) 3645 return BLK_MQ_RQ_QUEUE_BUSY; 3646 3647 /* Populate the SG list */ 3648 cmd->command_header->opts = 3649 __force_bit2int cpu_to_le32(icmd->opts | icmd->fis_len); 3650 if (icmd->buf_len) { 3651 command_sg = cmd->command + AHCI_CMD_TBL_HDR_SZ; 3652 3653 command_sg->info = 3654 __force_bit2int cpu_to_le32((icmd->buf_len-1) & 0x3FFFFF); 3655 command_sg->dba = 3656 __force_bit2int cpu_to_le32(icmd->buffer & 0xFFFFFFFF); 3657 command_sg->dba_upper = 3658 __force_bit2int cpu_to_le32((icmd->buffer >> 16) >> 16); 3659 3660 cmd->command_header->opts |= 3661 __force_bit2int cpu_to_le32((1 << 16)); 3662 } 3663 3664 /* Populate the command header */ 3665 cmd->command_header->byte_count = 0; 3666 3667 blk_mq_start_request(rq); 3668 mtip_issue_non_ncq_command(dd->port, rq->tag); 3669 return BLK_MQ_RQ_QUEUE_OK; 3670 } 3671 3672 static int mtip_queue_rq(struct blk_mq_hw_ctx *hctx, 3673 const struct blk_mq_queue_data *bd) 3674 { 3675 struct request *rq = bd->rq; 3676 int ret; 3677 3678 mtip_init_cmd_header(rq); 3679 3680 if (blk_rq_is_passthrough(rq)) 3681 return mtip_issue_reserved_cmd(hctx, rq); 3682 3683 if (unlikely(mtip_check_unal_depth(hctx, rq))) 3684 return BLK_MQ_RQ_QUEUE_BUSY; 3685 3686 blk_mq_start_request(rq); 3687 3688 ret = mtip_submit_request(hctx, rq); 3689 if (likely(!ret)) 3690 return BLK_MQ_RQ_QUEUE_OK; 3691 3692 return BLK_MQ_RQ_QUEUE_ERROR; 3693 } 3694 3695 static void mtip_free_cmd(struct blk_mq_tag_set *set, struct request *rq, 3696 unsigned int hctx_idx) 3697 { 3698 struct driver_data *dd = set->driver_data; 3699 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); 3700 3701 if (!cmd->command) 3702 return; 3703 3704 dmam_free_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ, 3705 cmd->command, cmd->command_dma); 3706 } 3707 3708 static int mtip_init_cmd(struct blk_mq_tag_set *set, struct request *rq, 3709 unsigned int hctx_idx, unsigned int numa_node) 3710 { 3711 struct driver_data *dd = set->driver_data; 3712 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); 3713 3714 cmd->command = dmam_alloc_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ, 3715 &cmd->command_dma, GFP_KERNEL); 3716 if (!cmd->command) 3717 return -ENOMEM; 3718 3719 memset(cmd->command, 0, CMD_DMA_ALLOC_SZ); 3720 3721 sg_init_table(cmd->sg, MTIP_MAX_SG); 3722 return 0; 3723 } 3724 3725 static enum blk_eh_timer_return mtip_cmd_timeout(struct request *req, 3726 bool reserved) 3727 { 3728 struct driver_data *dd = req->q->queuedata; 3729 3730 if (reserved) { 3731 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req); 3732 3733 cmd->status = -ETIME; 3734 return BLK_EH_HANDLED; 3735 } 3736 3737 if (test_bit(req->tag, dd->port->cmds_to_issue)) 3738 goto exit_handler; 3739 3740 if (test_and_set_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags)) 3741 goto exit_handler; 3742 3743 wake_up_interruptible(&dd->port->svc_wait); 3744 exit_handler: 3745 return BLK_EH_RESET_TIMER; 3746 } 3747 3748 static const struct blk_mq_ops mtip_mq_ops = { 3749 .queue_rq = mtip_queue_rq, 3750 .init_request = mtip_init_cmd, 3751 .exit_request = mtip_free_cmd, 3752 .complete = mtip_softirq_done_fn, 3753 .timeout = mtip_cmd_timeout, 3754 }; 3755 3756 /* 3757 * Block layer initialization function. 3758 * 3759 * This function is called once by the PCI layer for each P320 3760 * device that is connected to the system. 3761 * 3762 * @dd Pointer to the driver data structure. 3763 * 3764 * return value 3765 * 0 on success else an error code. 3766 */ 3767 static int mtip_block_initialize(struct driver_data *dd) 3768 { 3769 int rv = 0, wait_for_rebuild = 0; 3770 sector_t capacity; 3771 unsigned int index = 0; 3772 struct kobject *kobj; 3773 3774 if (dd->disk) 3775 goto skip_create_disk; /* hw init done, before rebuild */ 3776 3777 if (mtip_hw_init(dd)) { 3778 rv = -EINVAL; 3779 goto protocol_init_error; 3780 } 3781 3782 dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node); 3783 if (dd->disk == NULL) { 3784 dev_err(&dd->pdev->dev, 3785 "Unable to allocate gendisk structure\n"); 3786 rv = -EINVAL; 3787 goto alloc_disk_error; 3788 } 3789 3790 /* Generate the disk name, implemented same as in sd.c */ 3791 do { 3792 if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL)) { 3793 rv = -ENOMEM; 3794 goto ida_get_error; 3795 } 3796 3797 spin_lock(&rssd_index_lock); 3798 rv = ida_get_new(&rssd_index_ida, &index); 3799 spin_unlock(&rssd_index_lock); 3800 } while (rv == -EAGAIN); 3801 3802 if (rv) 3803 goto ida_get_error; 3804 3805 rv = rssd_disk_name_format("rssd", 3806 index, 3807 dd->disk->disk_name, 3808 DISK_NAME_LEN); 3809 if (rv) 3810 goto disk_index_error; 3811 3812 dd->disk->major = dd->major; 3813 dd->disk->first_minor = index * MTIP_MAX_MINORS; 3814 dd->disk->minors = MTIP_MAX_MINORS; 3815 dd->disk->fops = &mtip_block_ops; 3816 dd->disk->private_data = dd; 3817 dd->index = index; 3818 3819 mtip_hw_debugfs_init(dd); 3820 3821 memset(&dd->tags, 0, sizeof(dd->tags)); 3822 dd->tags.ops = &mtip_mq_ops; 3823 dd->tags.nr_hw_queues = 1; 3824 dd->tags.queue_depth = MTIP_MAX_COMMAND_SLOTS; 3825 dd->tags.reserved_tags = 1; 3826 dd->tags.cmd_size = sizeof(struct mtip_cmd); 3827 dd->tags.numa_node = dd->numa_node; 3828 dd->tags.flags = BLK_MQ_F_SHOULD_MERGE; 3829 dd->tags.driver_data = dd; 3830 dd->tags.timeout = MTIP_NCQ_CMD_TIMEOUT_MS; 3831 3832 rv = blk_mq_alloc_tag_set(&dd->tags); 3833 if (rv) { 3834 dev_err(&dd->pdev->dev, 3835 "Unable to allocate request queue\n"); 3836 goto block_queue_alloc_tag_error; 3837 } 3838 3839 /* Allocate the request queue. */ 3840 dd->queue = blk_mq_init_queue(&dd->tags); 3841 if (IS_ERR(dd->queue)) { 3842 dev_err(&dd->pdev->dev, 3843 "Unable to allocate request queue\n"); 3844 rv = -ENOMEM; 3845 goto block_queue_alloc_init_error; 3846 } 3847 3848 dd->disk->queue = dd->queue; 3849 dd->queue->queuedata = dd; 3850 3851 skip_create_disk: 3852 /* Initialize the protocol layer. */ 3853 wait_for_rebuild = mtip_hw_get_identify(dd); 3854 if (wait_for_rebuild < 0) { 3855 dev_err(&dd->pdev->dev, 3856 "Protocol layer initialization failed\n"); 3857 rv = -EINVAL; 3858 goto init_hw_cmds_error; 3859 } 3860 3861 /* 3862 * if rebuild pending, start the service thread, and delay the block 3863 * queue creation and device_add_disk() 3864 */ 3865 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC) 3866 goto start_service_thread; 3867 3868 /* Set device limits. */ 3869 set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags); 3870 clear_bit(QUEUE_FLAG_ADD_RANDOM, &dd->queue->queue_flags); 3871 blk_queue_max_segments(dd->queue, MTIP_MAX_SG); 3872 blk_queue_physical_block_size(dd->queue, 4096); 3873 blk_queue_max_hw_sectors(dd->queue, 0xffff); 3874 blk_queue_max_segment_size(dd->queue, 0x400000); 3875 blk_queue_io_min(dd->queue, 4096); 3876 blk_queue_bounce_limit(dd->queue, dd->pdev->dma_mask); 3877 3878 /* Signal trim support */ 3879 if (dd->trim_supp == true) { 3880 set_bit(QUEUE_FLAG_DISCARD, &dd->queue->queue_flags); 3881 dd->queue->limits.discard_granularity = 4096; 3882 blk_queue_max_discard_sectors(dd->queue, 3883 MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES); 3884 } 3885 3886 /* Set the capacity of the device in 512 byte sectors. */ 3887 if (!(mtip_hw_get_capacity(dd, &capacity))) { 3888 dev_warn(&dd->pdev->dev, 3889 "Could not read drive capacity\n"); 3890 rv = -EIO; 3891 goto read_capacity_error; 3892 } 3893 set_capacity(dd->disk, capacity); 3894 3895 /* Enable the block device and add it to /dev */ 3896 device_add_disk(&dd->pdev->dev, dd->disk); 3897 3898 dd->bdev = bdget_disk(dd->disk, 0); 3899 /* 3900 * Now that the disk is active, initialize any sysfs attributes 3901 * managed by the protocol layer. 3902 */ 3903 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); 3904 if (kobj) { 3905 mtip_hw_sysfs_init(dd, kobj); 3906 kobject_put(kobj); 3907 } 3908 3909 if (dd->mtip_svc_handler) { 3910 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag); 3911 return rv; /* service thread created for handling rebuild */ 3912 } 3913 3914 start_service_thread: 3915 dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread, 3916 dd, dd->numa_node, 3917 "mtip_svc_thd_%02d", index); 3918 3919 if (IS_ERR(dd->mtip_svc_handler)) { 3920 dev_err(&dd->pdev->dev, "service thread failed to start\n"); 3921 dd->mtip_svc_handler = NULL; 3922 rv = -EFAULT; 3923 goto kthread_run_error; 3924 } 3925 wake_up_process(dd->mtip_svc_handler); 3926 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC) 3927 rv = wait_for_rebuild; 3928 3929 return rv; 3930 3931 kthread_run_error: 3932 bdput(dd->bdev); 3933 dd->bdev = NULL; 3934 3935 /* Delete our gendisk. This also removes the device from /dev */ 3936 del_gendisk(dd->disk); 3937 3938 read_capacity_error: 3939 init_hw_cmds_error: 3940 blk_cleanup_queue(dd->queue); 3941 block_queue_alloc_init_error: 3942 blk_mq_free_tag_set(&dd->tags); 3943 block_queue_alloc_tag_error: 3944 mtip_hw_debugfs_exit(dd); 3945 disk_index_error: 3946 spin_lock(&rssd_index_lock); 3947 ida_remove(&rssd_index_ida, index); 3948 spin_unlock(&rssd_index_lock); 3949 3950 ida_get_error: 3951 put_disk(dd->disk); 3952 3953 alloc_disk_error: 3954 mtip_hw_exit(dd); /* De-initialize the protocol layer. */ 3955 3956 protocol_init_error: 3957 return rv; 3958 } 3959 3960 static void mtip_no_dev_cleanup(struct request *rq, void *data, bool reserv) 3961 { 3962 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); 3963 3964 cmd->status = -ENODEV; 3965 blk_mq_complete_request(rq); 3966 } 3967 3968 /* 3969 * Block layer deinitialization function. 3970 * 3971 * Called by the PCI layer as each P320 device is removed. 3972 * 3973 * @dd Pointer to the driver data structure. 3974 * 3975 * return value 3976 * 0 3977 */ 3978 static int mtip_block_remove(struct driver_data *dd) 3979 { 3980 struct kobject *kobj; 3981 3982 mtip_hw_debugfs_exit(dd); 3983 3984 if (dd->mtip_svc_handler) { 3985 set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags); 3986 wake_up_interruptible(&dd->port->svc_wait); 3987 kthread_stop(dd->mtip_svc_handler); 3988 } 3989 3990 /* Clean up the sysfs attributes, if created */ 3991 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) { 3992 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); 3993 if (kobj) { 3994 mtip_hw_sysfs_exit(dd, kobj); 3995 kobject_put(kobj); 3996 } 3997 } 3998 3999 if (!dd->sr) { 4000 /* 4001 * Explicitly wait here for IOs to quiesce, 4002 * as mtip_standby_drive usually won't wait for IOs. 4003 */ 4004 if (!mtip_quiesce_io(dd->port, MTIP_QUIESCE_IO_TIMEOUT_MS)) 4005 mtip_standby_drive(dd); 4006 } 4007 else 4008 dev_info(&dd->pdev->dev, "device %s surprise removal\n", 4009 dd->disk->disk_name); 4010 4011 blk_freeze_queue_start(dd->queue); 4012 blk_mq_stop_hw_queues(dd->queue); 4013 blk_mq_tagset_busy_iter(&dd->tags, mtip_no_dev_cleanup, dd); 4014 4015 /* 4016 * Delete our gendisk structure. This also removes the device 4017 * from /dev 4018 */ 4019 if (dd->bdev) { 4020 bdput(dd->bdev); 4021 dd->bdev = NULL; 4022 } 4023 if (dd->disk) { 4024 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) 4025 del_gendisk(dd->disk); 4026 if (dd->disk->queue) { 4027 blk_cleanup_queue(dd->queue); 4028 blk_mq_free_tag_set(&dd->tags); 4029 dd->queue = NULL; 4030 } 4031 put_disk(dd->disk); 4032 } 4033 dd->disk = NULL; 4034 4035 spin_lock(&rssd_index_lock); 4036 ida_remove(&rssd_index_ida, dd->index); 4037 spin_unlock(&rssd_index_lock); 4038 4039 /* De-initialize the protocol layer. */ 4040 mtip_hw_exit(dd); 4041 4042 return 0; 4043 } 4044 4045 /* 4046 * Function called by the PCI layer when just before the 4047 * machine shuts down. 4048 * 4049 * If a protocol layer shutdown function is present it will be called 4050 * by this function. 4051 * 4052 * @dd Pointer to the driver data structure. 4053 * 4054 * return value 4055 * 0 4056 */ 4057 static int mtip_block_shutdown(struct driver_data *dd) 4058 { 4059 mtip_hw_shutdown(dd); 4060 4061 /* Delete our gendisk structure, and cleanup the blk queue. */ 4062 if (dd->disk) { 4063 dev_info(&dd->pdev->dev, 4064 "Shutting down %s ...\n", dd->disk->disk_name); 4065 4066 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) 4067 del_gendisk(dd->disk); 4068 if (dd->disk->queue) { 4069 blk_cleanup_queue(dd->queue); 4070 blk_mq_free_tag_set(&dd->tags); 4071 } 4072 put_disk(dd->disk); 4073 dd->disk = NULL; 4074 dd->queue = NULL; 4075 } 4076 4077 spin_lock(&rssd_index_lock); 4078 ida_remove(&rssd_index_ida, dd->index); 4079 spin_unlock(&rssd_index_lock); 4080 return 0; 4081 } 4082 4083 static int mtip_block_suspend(struct driver_data *dd) 4084 { 4085 dev_info(&dd->pdev->dev, 4086 "Suspending %s ...\n", dd->disk->disk_name); 4087 mtip_hw_suspend(dd); 4088 return 0; 4089 } 4090 4091 static int mtip_block_resume(struct driver_data *dd) 4092 { 4093 dev_info(&dd->pdev->dev, "Resuming %s ...\n", 4094 dd->disk->disk_name); 4095 mtip_hw_resume(dd); 4096 return 0; 4097 } 4098 4099 static void drop_cpu(int cpu) 4100 { 4101 cpu_use[cpu]--; 4102 } 4103 4104 static int get_least_used_cpu_on_node(int node) 4105 { 4106 int cpu, least_used_cpu, least_cnt; 4107 const struct cpumask *node_mask; 4108 4109 node_mask = cpumask_of_node(node); 4110 least_used_cpu = cpumask_first(node_mask); 4111 least_cnt = cpu_use[least_used_cpu]; 4112 cpu = least_used_cpu; 4113 4114 for_each_cpu(cpu, node_mask) { 4115 if (cpu_use[cpu] < least_cnt) { 4116 least_used_cpu = cpu; 4117 least_cnt = cpu_use[cpu]; 4118 } 4119 } 4120 cpu_use[least_used_cpu]++; 4121 return least_used_cpu; 4122 } 4123 4124 /* Helper for selecting a node in round robin mode */ 4125 static inline int mtip_get_next_rr_node(void) 4126 { 4127 static int next_node = -1; 4128 4129 if (next_node == -1) { 4130 next_node = first_online_node; 4131 return next_node; 4132 } 4133 4134 next_node = next_online_node(next_node); 4135 if (next_node == MAX_NUMNODES) 4136 next_node = first_online_node; 4137 return next_node; 4138 } 4139 4140 static DEFINE_HANDLER(0); 4141 static DEFINE_HANDLER(1); 4142 static DEFINE_HANDLER(2); 4143 static DEFINE_HANDLER(3); 4144 static DEFINE_HANDLER(4); 4145 static DEFINE_HANDLER(5); 4146 static DEFINE_HANDLER(6); 4147 static DEFINE_HANDLER(7); 4148 4149 static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev) 4150 { 4151 int pos; 4152 unsigned short pcie_dev_ctrl; 4153 4154 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP); 4155 if (pos) { 4156 pci_read_config_word(pdev, 4157 pos + PCI_EXP_DEVCTL, 4158 &pcie_dev_ctrl); 4159 if (pcie_dev_ctrl & (1 << 11) || 4160 pcie_dev_ctrl & (1 << 4)) { 4161 dev_info(&dd->pdev->dev, 4162 "Disabling ERO/No-Snoop on bridge device %04x:%04x\n", 4163 pdev->vendor, pdev->device); 4164 pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN | 4165 PCI_EXP_DEVCTL_RELAX_EN); 4166 pci_write_config_word(pdev, 4167 pos + PCI_EXP_DEVCTL, 4168 pcie_dev_ctrl); 4169 } 4170 } 4171 } 4172 4173 static void mtip_fix_ero_nosnoop(struct driver_data *dd, struct pci_dev *pdev) 4174 { 4175 /* 4176 * This workaround is specific to AMD/ATI chipset with a PCI upstream 4177 * device with device id 0x5aXX 4178 */ 4179 if (pdev->bus && pdev->bus->self) { 4180 if (pdev->bus->self->vendor == PCI_VENDOR_ID_ATI && 4181 ((pdev->bus->self->device & 0xff00) == 0x5a00)) { 4182 mtip_disable_link_opts(dd, pdev->bus->self); 4183 } else { 4184 /* Check further up the topology */ 4185 struct pci_dev *parent_dev = pdev->bus->self; 4186 if (parent_dev->bus && 4187 parent_dev->bus->parent && 4188 parent_dev->bus->parent->self && 4189 parent_dev->bus->parent->self->vendor == 4190 PCI_VENDOR_ID_ATI && 4191 (parent_dev->bus->parent->self->device & 4192 0xff00) == 0x5a00) { 4193 mtip_disable_link_opts(dd, 4194 parent_dev->bus->parent->self); 4195 } 4196 } 4197 } 4198 } 4199 4200 /* 4201 * Called for each supported PCI device detected. 4202 * 4203 * This function allocates the private data structure, enables the 4204 * PCI device and then calls the block layer initialization function. 4205 * 4206 * return value 4207 * 0 on success else an error code. 4208 */ 4209 static int mtip_pci_probe(struct pci_dev *pdev, 4210 const struct pci_device_id *ent) 4211 { 4212 int rv = 0; 4213 struct driver_data *dd = NULL; 4214 char cpu_list[256]; 4215 const struct cpumask *node_mask; 4216 int cpu, i = 0, j = 0; 4217 int my_node = NUMA_NO_NODE; 4218 unsigned long flags; 4219 4220 /* Allocate memory for this devices private data. */ 4221 my_node = pcibus_to_node(pdev->bus); 4222 if (my_node != NUMA_NO_NODE) { 4223 if (!node_online(my_node)) 4224 my_node = mtip_get_next_rr_node(); 4225 } else { 4226 dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n"); 4227 my_node = mtip_get_next_rr_node(); 4228 } 4229 dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n", 4230 my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev), 4231 cpu_to_node(raw_smp_processor_id()), raw_smp_processor_id()); 4232 4233 dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node); 4234 if (dd == NULL) { 4235 dev_err(&pdev->dev, 4236 "Unable to allocate memory for driver data\n"); 4237 return -ENOMEM; 4238 } 4239 4240 /* Attach the private data to this PCI device. */ 4241 pci_set_drvdata(pdev, dd); 4242 4243 rv = pcim_enable_device(pdev); 4244 if (rv < 0) { 4245 dev_err(&pdev->dev, "Unable to enable device\n"); 4246 goto iomap_err; 4247 } 4248 4249 /* Map BAR5 to memory. */ 4250 rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME); 4251 if (rv < 0) { 4252 dev_err(&pdev->dev, "Unable to map regions\n"); 4253 goto iomap_err; 4254 } 4255 4256 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { 4257 rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 4258 4259 if (rv) { 4260 rv = pci_set_consistent_dma_mask(pdev, 4261 DMA_BIT_MASK(32)); 4262 if (rv) { 4263 dev_warn(&pdev->dev, 4264 "64-bit DMA enable failed\n"); 4265 goto setmask_err; 4266 } 4267 } 4268 } 4269 4270 /* Copy the info we may need later into the private data structure. */ 4271 dd->major = mtip_major; 4272 dd->instance = instance; 4273 dd->pdev = pdev; 4274 dd->numa_node = my_node; 4275 4276 INIT_LIST_HEAD(&dd->online_list); 4277 INIT_LIST_HEAD(&dd->remove_list); 4278 4279 memset(dd->workq_name, 0, 32); 4280 snprintf(dd->workq_name, 31, "mtipq%d", dd->instance); 4281 4282 dd->isr_workq = create_workqueue(dd->workq_name); 4283 if (!dd->isr_workq) { 4284 dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance); 4285 rv = -ENOMEM; 4286 goto block_initialize_err; 4287 } 4288 4289 memset(cpu_list, 0, sizeof(cpu_list)); 4290 4291 node_mask = cpumask_of_node(dd->numa_node); 4292 if (!cpumask_empty(node_mask)) { 4293 for_each_cpu(cpu, node_mask) 4294 { 4295 snprintf(&cpu_list[j], 256 - j, "%d ", cpu); 4296 j = strlen(cpu_list); 4297 } 4298 4299 dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n", 4300 dd->numa_node, 4301 topology_physical_package_id(cpumask_first(node_mask)), 4302 nr_cpus_node(dd->numa_node), 4303 cpu_list); 4304 } else 4305 dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n"); 4306 4307 dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node); 4308 dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n", 4309 cpu_to_node(dd->isr_binding), dd->isr_binding); 4310 4311 /* first worker context always runs in ISR */ 4312 dd->work[0].cpu_binding = dd->isr_binding; 4313 dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node); 4314 dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node); 4315 dd->work[3].cpu_binding = dd->work[0].cpu_binding; 4316 dd->work[4].cpu_binding = dd->work[1].cpu_binding; 4317 dd->work[5].cpu_binding = dd->work[2].cpu_binding; 4318 dd->work[6].cpu_binding = dd->work[2].cpu_binding; 4319 dd->work[7].cpu_binding = dd->work[1].cpu_binding; 4320 4321 /* Log the bindings */ 4322 for_each_present_cpu(cpu) { 4323 memset(cpu_list, 0, sizeof(cpu_list)); 4324 for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) { 4325 if (dd->work[i].cpu_binding == cpu) { 4326 snprintf(&cpu_list[j], 256 - j, "%d ", i); 4327 j = strlen(cpu_list); 4328 } 4329 } 4330 if (j) 4331 dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list); 4332 } 4333 4334 INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0); 4335 INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1); 4336 INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2); 4337 INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3); 4338 INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4); 4339 INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5); 4340 INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6); 4341 INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7); 4342 4343 pci_set_master(pdev); 4344 rv = pci_enable_msi(pdev); 4345 if (rv) { 4346 dev_warn(&pdev->dev, 4347 "Unable to enable MSI interrupt.\n"); 4348 goto msi_initialize_err; 4349 } 4350 4351 mtip_fix_ero_nosnoop(dd, pdev); 4352 4353 /* Initialize the block layer. */ 4354 rv = mtip_block_initialize(dd); 4355 if (rv < 0) { 4356 dev_err(&pdev->dev, 4357 "Unable to initialize block layer\n"); 4358 goto block_initialize_err; 4359 } 4360 4361 /* 4362 * Increment the instance count so that each device has a unique 4363 * instance number. 4364 */ 4365 instance++; 4366 if (rv != MTIP_FTL_REBUILD_MAGIC) 4367 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag); 4368 else 4369 rv = 0; /* device in rebuild state, return 0 from probe */ 4370 4371 /* Add to online list even if in ftl rebuild */ 4372 spin_lock_irqsave(&dev_lock, flags); 4373 list_add(&dd->online_list, &online_list); 4374 spin_unlock_irqrestore(&dev_lock, flags); 4375 4376 goto done; 4377 4378 block_initialize_err: 4379 pci_disable_msi(pdev); 4380 4381 msi_initialize_err: 4382 if (dd->isr_workq) { 4383 flush_workqueue(dd->isr_workq); 4384 destroy_workqueue(dd->isr_workq); 4385 drop_cpu(dd->work[0].cpu_binding); 4386 drop_cpu(dd->work[1].cpu_binding); 4387 drop_cpu(dd->work[2].cpu_binding); 4388 } 4389 setmask_err: 4390 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); 4391 4392 iomap_err: 4393 kfree(dd); 4394 pci_set_drvdata(pdev, NULL); 4395 return rv; 4396 done: 4397 return rv; 4398 } 4399 4400 /* 4401 * Called for each probed device when the device is removed or the 4402 * driver is unloaded. 4403 * 4404 * return value 4405 * None 4406 */ 4407 static void mtip_pci_remove(struct pci_dev *pdev) 4408 { 4409 struct driver_data *dd = pci_get_drvdata(pdev); 4410 unsigned long flags, to; 4411 4412 set_bit(MTIP_DDF_REMOVAL_BIT, &dd->dd_flag); 4413 4414 spin_lock_irqsave(&dev_lock, flags); 4415 list_del_init(&dd->online_list); 4416 list_add(&dd->remove_list, &removing_list); 4417 spin_unlock_irqrestore(&dev_lock, flags); 4418 4419 mtip_check_surprise_removal(pdev); 4420 synchronize_irq(dd->pdev->irq); 4421 4422 /* Spin until workers are done */ 4423 to = jiffies + msecs_to_jiffies(4000); 4424 do { 4425 msleep(20); 4426 } while (atomic_read(&dd->irq_workers_active) != 0 && 4427 time_before(jiffies, to)); 4428 4429 if (!dd->sr) 4430 fsync_bdev(dd->bdev); 4431 4432 if (atomic_read(&dd->irq_workers_active) != 0) { 4433 dev_warn(&dd->pdev->dev, 4434 "Completion workers still active!\n"); 4435 } 4436 4437 blk_set_queue_dying(dd->queue); 4438 set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag); 4439 4440 /* Clean up the block layer. */ 4441 mtip_block_remove(dd); 4442 4443 if (dd->isr_workq) { 4444 flush_workqueue(dd->isr_workq); 4445 destroy_workqueue(dd->isr_workq); 4446 drop_cpu(dd->work[0].cpu_binding); 4447 drop_cpu(dd->work[1].cpu_binding); 4448 drop_cpu(dd->work[2].cpu_binding); 4449 } 4450 4451 pci_disable_msi(pdev); 4452 4453 spin_lock_irqsave(&dev_lock, flags); 4454 list_del_init(&dd->remove_list); 4455 spin_unlock_irqrestore(&dev_lock, flags); 4456 4457 kfree(dd); 4458 4459 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); 4460 pci_set_drvdata(pdev, NULL); 4461 } 4462 4463 /* 4464 * Called for each probed device when the device is suspended. 4465 * 4466 * return value 4467 * 0 Success 4468 * <0 Error 4469 */ 4470 static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) 4471 { 4472 int rv = 0; 4473 struct driver_data *dd = pci_get_drvdata(pdev); 4474 4475 if (!dd) { 4476 dev_err(&pdev->dev, 4477 "Driver private datastructure is NULL\n"); 4478 return -EFAULT; 4479 } 4480 4481 set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag); 4482 4483 /* Disable ports & interrupts then send standby immediate */ 4484 rv = mtip_block_suspend(dd); 4485 if (rv < 0) { 4486 dev_err(&pdev->dev, 4487 "Failed to suspend controller\n"); 4488 return rv; 4489 } 4490 4491 /* 4492 * Save the pci config space to pdev structure & 4493 * disable the device 4494 */ 4495 pci_save_state(pdev); 4496 pci_disable_device(pdev); 4497 4498 /* Move to Low power state*/ 4499 pci_set_power_state(pdev, PCI_D3hot); 4500 4501 return rv; 4502 } 4503 4504 /* 4505 * Called for each probed device when the device is resumed. 4506 * 4507 * return value 4508 * 0 Success 4509 * <0 Error 4510 */ 4511 static int mtip_pci_resume(struct pci_dev *pdev) 4512 { 4513 int rv = 0; 4514 struct driver_data *dd; 4515 4516 dd = pci_get_drvdata(pdev); 4517 if (!dd) { 4518 dev_err(&pdev->dev, 4519 "Driver private datastructure is NULL\n"); 4520 return -EFAULT; 4521 } 4522 4523 /* Move the device to active State */ 4524 pci_set_power_state(pdev, PCI_D0); 4525 4526 /* Restore PCI configuration space */ 4527 pci_restore_state(pdev); 4528 4529 /* Enable the PCI device*/ 4530 rv = pcim_enable_device(pdev); 4531 if (rv < 0) { 4532 dev_err(&pdev->dev, 4533 "Failed to enable card during resume\n"); 4534 goto err; 4535 } 4536 pci_set_master(pdev); 4537 4538 /* 4539 * Calls hbaReset, initPort, & startPort function 4540 * then enables interrupts 4541 */ 4542 rv = mtip_block_resume(dd); 4543 if (rv < 0) 4544 dev_err(&pdev->dev, "Unable to resume\n"); 4545 4546 err: 4547 clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag); 4548 4549 return rv; 4550 } 4551 4552 /* 4553 * Shutdown routine 4554 * 4555 * return value 4556 * None 4557 */ 4558 static void mtip_pci_shutdown(struct pci_dev *pdev) 4559 { 4560 struct driver_data *dd = pci_get_drvdata(pdev); 4561 if (dd) 4562 mtip_block_shutdown(dd); 4563 } 4564 4565 /* Table of device ids supported by this driver. */ 4566 static const struct pci_device_id mtip_pci_tbl[] = { 4567 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) }, 4568 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) }, 4569 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) }, 4570 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) }, 4571 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) }, 4572 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) }, 4573 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) }, 4574 { 0 } 4575 }; 4576 4577 /* Structure that describes the PCI driver functions. */ 4578 static struct pci_driver mtip_pci_driver = { 4579 .name = MTIP_DRV_NAME, 4580 .id_table = mtip_pci_tbl, 4581 .probe = mtip_pci_probe, 4582 .remove = mtip_pci_remove, 4583 .suspend = mtip_pci_suspend, 4584 .resume = mtip_pci_resume, 4585 .shutdown = mtip_pci_shutdown, 4586 }; 4587 4588 MODULE_DEVICE_TABLE(pci, mtip_pci_tbl); 4589 4590 /* 4591 * Module initialization function. 4592 * 4593 * Called once when the module is loaded. This function allocates a major 4594 * block device number to the Cyclone devices and registers the PCI layer 4595 * of the driver. 4596 * 4597 * Return value 4598 * 0 on success else error code. 4599 */ 4600 static int __init mtip_init(void) 4601 { 4602 int error; 4603 4604 pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n"); 4605 4606 spin_lock_init(&dev_lock); 4607 4608 INIT_LIST_HEAD(&online_list); 4609 INIT_LIST_HEAD(&removing_list); 4610 4611 /* Allocate a major block device number to use with this driver. */ 4612 error = register_blkdev(0, MTIP_DRV_NAME); 4613 if (error <= 0) { 4614 pr_err("Unable to register block device (%d)\n", 4615 error); 4616 return -EBUSY; 4617 } 4618 mtip_major = error; 4619 4620 dfs_parent = debugfs_create_dir("rssd", NULL); 4621 if (IS_ERR_OR_NULL(dfs_parent)) { 4622 pr_warn("Error creating debugfs parent\n"); 4623 dfs_parent = NULL; 4624 } 4625 if (dfs_parent) { 4626 dfs_device_status = debugfs_create_file("device_status", 4627 S_IRUGO, dfs_parent, NULL, 4628 &mtip_device_status_fops); 4629 if (IS_ERR_OR_NULL(dfs_device_status)) { 4630 pr_err("Error creating device_status node\n"); 4631 dfs_device_status = NULL; 4632 } 4633 } 4634 4635 /* Register our PCI operations. */ 4636 error = pci_register_driver(&mtip_pci_driver); 4637 if (error) { 4638 debugfs_remove(dfs_parent); 4639 unregister_blkdev(mtip_major, MTIP_DRV_NAME); 4640 } 4641 4642 return error; 4643 } 4644 4645 /* 4646 * Module de-initialization function. 4647 * 4648 * Called once when the module is unloaded. This function deallocates 4649 * the major block device number allocated by mtip_init() and 4650 * unregisters the PCI layer of the driver. 4651 * 4652 * Return value 4653 * none 4654 */ 4655 static void __exit mtip_exit(void) 4656 { 4657 /* Release the allocated major block device number. */ 4658 unregister_blkdev(mtip_major, MTIP_DRV_NAME); 4659 4660 /* Unregister the PCI driver. */ 4661 pci_unregister_driver(&mtip_pci_driver); 4662 4663 debugfs_remove_recursive(dfs_parent); 4664 } 4665 4666 MODULE_AUTHOR("Micron Technology, Inc"); 4667 MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver"); 4668 MODULE_LICENSE("GPL"); 4669 MODULE_VERSION(MTIP_DRV_VERSION); 4670 4671 module_init(mtip_init); 4672 module_exit(mtip_exit); 4673