1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Driver for the Micron P320 SSD
4  *   Copyright (C) 2011 Micron Technology, Inc.
5  *
6  * Portions of this code were derived from works subjected to the
7  * following copyright:
8  *    Copyright (C) 2009 Integrated Device Technology, Inc.
9  */
10 
11 #include <linux/pci.h>
12 #include <linux/interrupt.h>
13 #include <linux/ata.h>
14 #include <linux/delay.h>
15 #include <linux/hdreg.h>
16 #include <linux/uaccess.h>
17 #include <linux/random.h>
18 #include <linux/smp.h>
19 #include <linux/compat.h>
20 #include <linux/fs.h>
21 #include <linux/module.h>
22 #include <linux/genhd.h>
23 #include <linux/blkdev.h>
24 #include <linux/blk-mq.h>
25 #include <linux/bio.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/idr.h>
28 #include <linux/kthread.h>
29 #include <../drivers/ata/ahci.h>
30 #include <linux/export.h>
31 #include <linux/debugfs.h>
32 #include <linux/prefetch.h>
33 #include <linux/numa.h>
34 #include "mtip32xx.h"
35 
36 #define HW_CMD_SLOT_SZ		(MTIP_MAX_COMMAND_SLOTS * 32)
37 
38 /* DMA region containing RX Fis, Identify, RLE10, and SMART buffers */
39 #define AHCI_RX_FIS_SZ          0x100
40 #define AHCI_RX_FIS_OFFSET      0x0
41 #define AHCI_IDFY_SZ            ATA_SECT_SIZE
42 #define AHCI_IDFY_OFFSET        0x400
43 #define AHCI_SECTBUF_SZ         ATA_SECT_SIZE
44 #define AHCI_SECTBUF_OFFSET     0x800
45 #define AHCI_SMARTBUF_SZ        ATA_SECT_SIZE
46 #define AHCI_SMARTBUF_OFFSET    0xC00
47 /* 0x100 + 0x200 + 0x200 + 0x200 is smaller than 4k but we pad it out */
48 #define BLOCK_DMA_ALLOC_SZ      4096
49 
50 /* DMA region containing command table (should be 8192 bytes) */
51 #define AHCI_CMD_SLOT_SZ        sizeof(struct mtip_cmd_hdr)
52 #define AHCI_CMD_TBL_SZ         (MTIP_MAX_COMMAND_SLOTS * AHCI_CMD_SLOT_SZ)
53 #define AHCI_CMD_TBL_OFFSET     0x0
54 
55 /* DMA region per command (contains header and SGL) */
56 #define AHCI_CMD_TBL_HDR_SZ     0x80
57 #define AHCI_CMD_TBL_HDR_OFFSET 0x0
58 #define AHCI_CMD_TBL_SGL_SZ     (MTIP_MAX_SG * sizeof(struct mtip_cmd_sg))
59 #define AHCI_CMD_TBL_SGL_OFFSET AHCI_CMD_TBL_HDR_SZ
60 #define CMD_DMA_ALLOC_SZ        (AHCI_CMD_TBL_SGL_SZ + AHCI_CMD_TBL_HDR_SZ)
61 
62 
63 #define HOST_CAP_NZDMA		(1 << 19)
64 #define HOST_HSORG		0xFC
65 #define HSORG_DISABLE_SLOTGRP_INTR (1<<24)
66 #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16)
67 #define HSORG_HWREV		0xFF00
68 #define HSORG_STYLE		0x8
69 #define HSORG_SLOTGROUPS	0x7
70 
71 #define PORT_COMMAND_ISSUE	0x38
72 #define PORT_SDBV		0x7C
73 
74 #define PORT_OFFSET		0x100
75 #define PORT_MEM_SIZE		0x80
76 
77 #define PORT_IRQ_ERR \
78 	(PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \
79 	 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \
80 	 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \
81 	 PORT_IRQ_OVERFLOW)
82 #define PORT_IRQ_LEGACY \
83 	(PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS)
84 #define PORT_IRQ_HANDLED \
85 	(PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \
86 	 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \
87 	 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)
88 #define DEF_PORT_IRQ \
89 	(PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS)
90 
91 /* product numbers */
92 #define MTIP_PRODUCT_UNKNOWN	0x00
93 #define MTIP_PRODUCT_ASICFPGA	0x11
94 
95 /* Device instance number, incremented each time a device is probed. */
96 static int instance;
97 
98 static struct list_head online_list;
99 static struct list_head removing_list;
100 static spinlock_t dev_lock;
101 
102 /*
103  * Global variable used to hold the major block device number
104  * allocated in mtip_init().
105  */
106 static int mtip_major;
107 static struct dentry *dfs_parent;
108 static struct dentry *dfs_device_status;
109 
110 static u32 cpu_use[NR_CPUS];
111 
112 static DEFINE_IDA(rssd_index_ida);
113 
114 static int mtip_block_initialize(struct driver_data *dd);
115 
116 #ifdef CONFIG_COMPAT
117 struct mtip_compat_ide_task_request_s {
118 	__u8		io_ports[8];
119 	__u8		hob_ports[8];
120 	ide_reg_valid_t	out_flags;
121 	ide_reg_valid_t	in_flags;
122 	int		data_phase;
123 	int		req_cmd;
124 	compat_ulong_t	out_size;
125 	compat_ulong_t	in_size;
126 };
127 #endif
128 
129 /*
130  * This function check_for_surprise_removal is called
131  * while card is removed from the system and it will
132  * read the vendor id from the configuration space
133  *
134  * @pdev Pointer to the pci_dev structure.
135  *
136  * return value
137  *	 true if device removed, else false
138  */
139 static bool mtip_check_surprise_removal(struct pci_dev *pdev)
140 {
141 	u16 vendor_id = 0;
142 	struct driver_data *dd = pci_get_drvdata(pdev);
143 
144 	if (dd->sr)
145 		return true;
146 
147        /* Read the vendorID from the configuration space */
148 	pci_read_config_word(pdev, 0x00, &vendor_id);
149 	if (vendor_id == 0xFFFF) {
150 		dd->sr = true;
151 		if (dd->queue)
152 			blk_queue_flag_set(QUEUE_FLAG_DEAD, dd->queue);
153 		else
154 			dev_warn(&dd->pdev->dev,
155 				"%s: dd->queue is NULL\n", __func__);
156 		return true; /* device removed */
157 	}
158 
159 	return false; /* device present */
160 }
161 
162 static struct mtip_cmd *mtip_cmd_from_tag(struct driver_data *dd,
163 					  unsigned int tag)
164 {
165 	struct blk_mq_hw_ctx *hctx = dd->queue->queue_hw_ctx[0];
166 
167 	return blk_mq_rq_to_pdu(blk_mq_tag_to_rq(hctx->tags, tag));
168 }
169 
170 /*
171  * Reset the HBA (without sleeping)
172  *
173  * @dd Pointer to the driver data structure.
174  *
175  * return value
176  *	0	The reset was successful.
177  *	-1	The HBA Reset bit did not clear.
178  */
179 static int mtip_hba_reset(struct driver_data *dd)
180 {
181 	unsigned long timeout;
182 
183 	/* Set the reset bit */
184 	writel(HOST_RESET, dd->mmio + HOST_CTL);
185 
186 	/* Flush */
187 	readl(dd->mmio + HOST_CTL);
188 
189 	/*
190 	 * Spin for up to 10 seconds waiting for reset acknowledgement. Spec
191 	 * is 1 sec but in LUN failure conditions, up to 10 secs are required
192 	 */
193 	timeout = jiffies + msecs_to_jiffies(10000);
194 	do {
195 		mdelay(10);
196 		if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
197 			return -1;
198 
199 	} while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
200 		 && time_before(jiffies, timeout));
201 
202 	if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
203 		return -1;
204 
205 	return 0;
206 }
207 
208 /*
209  * Issue a command to the hardware.
210  *
211  * Set the appropriate bit in the s_active and Command Issue hardware
212  * registers, causing hardware command processing to begin.
213  *
214  * @port Pointer to the port structure.
215  * @tag  The tag of the command to be issued.
216  *
217  * return value
218  *      None
219  */
220 static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)
221 {
222 	int group = tag >> 5;
223 
224 	/* guard SACT and CI registers */
225 	spin_lock(&port->cmd_issue_lock[group]);
226 	writel((1 << MTIP_TAG_BIT(tag)),
227 			port->s_active[MTIP_TAG_INDEX(tag)]);
228 	writel((1 << MTIP_TAG_BIT(tag)),
229 			port->cmd_issue[MTIP_TAG_INDEX(tag)]);
230 	spin_unlock(&port->cmd_issue_lock[group]);
231 }
232 
233 /*
234  * Enable/disable the reception of FIS
235  *
236  * @port   Pointer to the port data structure
237  * @enable 1 to enable, 0 to disable
238  *
239  * return value
240  *	Previous state: 1 enabled, 0 disabled
241  */
242 static int mtip_enable_fis(struct mtip_port *port, int enable)
243 {
244 	u32 tmp;
245 
246 	/* enable FIS reception */
247 	tmp = readl(port->mmio + PORT_CMD);
248 	if (enable)
249 		writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
250 	else
251 		writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
252 
253 	/* Flush */
254 	readl(port->mmio + PORT_CMD);
255 
256 	return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX));
257 }
258 
259 /*
260  * Enable/disable the DMA engine
261  *
262  * @port   Pointer to the port data structure
263  * @enable 1 to enable, 0 to disable
264  *
265  * return value
266  *	Previous state: 1 enabled, 0 disabled.
267  */
268 static int mtip_enable_engine(struct mtip_port *port, int enable)
269 {
270 	u32 tmp;
271 
272 	/* enable FIS reception */
273 	tmp = readl(port->mmio + PORT_CMD);
274 	if (enable)
275 		writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
276 	else
277 		writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
278 
279 	readl(port->mmio + PORT_CMD);
280 	return (((tmp & PORT_CMD_START) == PORT_CMD_START));
281 }
282 
283 /*
284  * Enables the port DMA engine and FIS reception.
285  *
286  * return value
287  *	None
288  */
289 static inline void mtip_start_port(struct mtip_port *port)
290 {
291 	/* Enable FIS reception */
292 	mtip_enable_fis(port, 1);
293 
294 	/* Enable the DMA engine */
295 	mtip_enable_engine(port, 1);
296 }
297 
298 /*
299  * Deinitialize a port by disabling port interrupts, the DMA engine,
300  * and FIS reception.
301  *
302  * @port Pointer to the port structure
303  *
304  * return value
305  *	None
306  */
307 static inline void mtip_deinit_port(struct mtip_port *port)
308 {
309 	/* Disable interrupts on this port */
310 	writel(0, port->mmio + PORT_IRQ_MASK);
311 
312 	/* Disable the DMA engine */
313 	mtip_enable_engine(port, 0);
314 
315 	/* Disable FIS reception */
316 	mtip_enable_fis(port, 0);
317 }
318 
319 /*
320  * Initialize a port.
321  *
322  * This function deinitializes the port by calling mtip_deinit_port() and
323  * then initializes it by setting the command header and RX FIS addresses,
324  * clearing the SError register and any pending port interrupts before
325  * re-enabling the default set of port interrupts.
326  *
327  * @port Pointer to the port structure.
328  *
329  * return value
330  *	None
331  */
332 static void mtip_init_port(struct mtip_port *port)
333 {
334 	int i;
335 	mtip_deinit_port(port);
336 
337 	/* Program the command list base and FIS base addresses */
338 	if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
339 		writel((port->command_list_dma >> 16) >> 16,
340 			 port->mmio + PORT_LST_ADDR_HI);
341 		writel((port->rxfis_dma >> 16) >> 16,
342 			 port->mmio + PORT_FIS_ADDR_HI);
343 		set_bit(MTIP_PF_HOST_CAP_64, &port->flags);
344 	}
345 
346 	writel(port->command_list_dma & 0xFFFFFFFF,
347 			port->mmio + PORT_LST_ADDR);
348 	writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
349 
350 	/* Clear SError */
351 	writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
352 
353 	/* reset the completed registers.*/
354 	for (i = 0; i < port->dd->slot_groups; i++)
355 		writel(0xFFFFFFFF, port->completed[i]);
356 
357 	/* Clear any pending interrupts for this port */
358 	writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
359 
360 	/* Clear any pending interrupts on the HBA. */
361 	writel(readl(port->dd->mmio + HOST_IRQ_STAT),
362 					port->dd->mmio + HOST_IRQ_STAT);
363 
364 	/* Enable port interrupts */
365 	writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
366 }
367 
368 /*
369  * Restart a port
370  *
371  * @port Pointer to the port data structure.
372  *
373  * return value
374  *	None
375  */
376 static void mtip_restart_port(struct mtip_port *port)
377 {
378 	unsigned long timeout;
379 
380 	/* Disable the DMA engine */
381 	mtip_enable_engine(port, 0);
382 
383 	/* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */
384 	timeout = jiffies + msecs_to_jiffies(500);
385 	while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
386 		 && time_before(jiffies, timeout))
387 		;
388 
389 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
390 		return;
391 
392 	/*
393 	 * Chip quirk: escalate to hba reset if
394 	 * PxCMD.CR not clear after 500 ms
395 	 */
396 	if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
397 		dev_warn(&port->dd->pdev->dev,
398 			"PxCMD.CR not clear, escalating reset\n");
399 
400 		if (mtip_hba_reset(port->dd))
401 			dev_err(&port->dd->pdev->dev,
402 				"HBA reset escalation failed.\n");
403 
404 		/* 30 ms delay before com reset to quiesce chip */
405 		mdelay(30);
406 	}
407 
408 	dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n");
409 
410 	/* Set PxSCTL.DET */
411 	writel(readl(port->mmio + PORT_SCR_CTL) |
412 			 1, port->mmio + PORT_SCR_CTL);
413 	readl(port->mmio + PORT_SCR_CTL);
414 
415 	/* Wait 1 ms to quiesce chip function */
416 	timeout = jiffies + msecs_to_jiffies(1);
417 	while (time_before(jiffies, timeout))
418 		;
419 
420 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
421 		return;
422 
423 	/* Clear PxSCTL.DET */
424 	writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
425 			 port->mmio + PORT_SCR_CTL);
426 	readl(port->mmio + PORT_SCR_CTL);
427 
428 	/* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */
429 	timeout = jiffies + msecs_to_jiffies(500);
430 	while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
431 			 && time_before(jiffies, timeout))
432 		;
433 
434 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
435 		return;
436 
437 	if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
438 		dev_warn(&port->dd->pdev->dev,
439 			"COM reset failed\n");
440 
441 	mtip_init_port(port);
442 	mtip_start_port(port);
443 
444 }
445 
446 static int mtip_device_reset(struct driver_data *dd)
447 {
448 	int rv = 0;
449 
450 	if (mtip_check_surprise_removal(dd->pdev))
451 		return 0;
452 
453 	if (mtip_hba_reset(dd) < 0)
454 		rv = -EFAULT;
455 
456 	mdelay(1);
457 	mtip_init_port(dd->port);
458 	mtip_start_port(dd->port);
459 
460 	/* Enable interrupts on the HBA. */
461 	writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
462 					dd->mmio + HOST_CTL);
463 	return rv;
464 }
465 
466 /*
467  * Helper function for tag logging
468  */
469 static void print_tags(struct driver_data *dd,
470 			char *msg,
471 			unsigned long *tagbits,
472 			int cnt)
473 {
474 	unsigned char tagmap[128];
475 	int group, tagmap_len = 0;
476 
477 	memset(tagmap, 0, sizeof(tagmap));
478 	for (group = SLOTBITS_IN_LONGS; group > 0; group--)
479 		tagmap_len += sprintf(tagmap + tagmap_len, "%016lX ",
480 						tagbits[group-1]);
481 	dev_warn(&dd->pdev->dev,
482 			"%d command(s) %s: tagmap [%s]", cnt, msg, tagmap);
483 }
484 
485 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
486 				dma_addr_t buffer_dma, unsigned int sectors);
487 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
488 						struct smart_attr *attrib);
489 
490 static void mtip_complete_command(struct mtip_cmd *cmd, blk_status_t status)
491 {
492 	struct request *req = blk_mq_rq_from_pdu(cmd);
493 
494 	cmd->status = status;
495 	blk_mq_complete_request(req);
496 }
497 
498 /*
499  * Handle an error.
500  *
501  * @dd Pointer to the DRIVER_DATA structure.
502  *
503  * return value
504  *	None
505  */
506 static void mtip_handle_tfe(struct driver_data *dd)
507 {
508 	int group, tag, bit, reissue, rv;
509 	struct mtip_port *port;
510 	struct mtip_cmd  *cmd;
511 	u32 completed;
512 	struct host_to_dev_fis *fis;
513 	unsigned long tagaccum[SLOTBITS_IN_LONGS];
514 	unsigned int cmd_cnt = 0;
515 	unsigned char *buf;
516 	char *fail_reason = NULL;
517 	int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0;
518 
519 	dev_warn(&dd->pdev->dev, "Taskfile error\n");
520 
521 	port = dd->port;
522 
523 	if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
524 		cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
525 		dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n");
526 		mtip_complete_command(cmd, BLK_STS_IOERR);
527 		return;
528 	}
529 
530 	/* clear the tag accumulator */
531 	memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
532 
533 	/* Loop through all the groups */
534 	for (group = 0; group < dd->slot_groups; group++) {
535 		completed = readl(port->completed[group]);
536 
537 		dev_warn(&dd->pdev->dev, "g=%u, comp=%x\n", group, completed);
538 
539 		/* clear completed status register in the hardware.*/
540 		writel(completed, port->completed[group]);
541 
542 		/* Process successfully completed commands */
543 		for (bit = 0; bit < 32 && completed; bit++) {
544 			if (!(completed & (1<<bit)))
545 				continue;
546 			tag = (group << 5) + bit;
547 
548 			/* Skip the internal command slot */
549 			if (tag == MTIP_TAG_INTERNAL)
550 				continue;
551 
552 			cmd = mtip_cmd_from_tag(dd, tag);
553 			mtip_complete_command(cmd, 0);
554 			set_bit(tag, tagaccum);
555 			cmd_cnt++;
556 		}
557 	}
558 
559 	print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt);
560 
561 	/* Restart the port */
562 	mdelay(20);
563 	mtip_restart_port(port);
564 
565 	/* Trying to determine the cause of the error */
566 	rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
567 				dd->port->log_buf,
568 				dd->port->log_buf_dma, 1);
569 	if (rv) {
570 		dev_warn(&dd->pdev->dev,
571 			"Error in READ LOG EXT (10h) command\n");
572 		/* non-critical error, don't fail the load */
573 	} else {
574 		buf = (unsigned char *)dd->port->log_buf;
575 		if (buf[259] & 0x1) {
576 			dev_info(&dd->pdev->dev,
577 				"Write protect bit is set.\n");
578 			set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
579 			fail_all_ncq_write = 1;
580 			fail_reason = "write protect";
581 		}
582 		if (buf[288] == 0xF7) {
583 			dev_info(&dd->pdev->dev,
584 				"Exceeded Tmax, drive in thermal shutdown.\n");
585 			set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
586 			fail_all_ncq_cmds = 1;
587 			fail_reason = "thermal shutdown";
588 		}
589 		if (buf[288] == 0xBF) {
590 			set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag);
591 			dev_info(&dd->pdev->dev,
592 				"Drive indicates rebuild has failed. Secure erase required.\n");
593 			fail_all_ncq_cmds = 1;
594 			fail_reason = "rebuild failed";
595 		}
596 	}
597 
598 	/* clear the tag accumulator */
599 	memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
600 
601 	/* Loop through all the groups */
602 	for (group = 0; group < dd->slot_groups; group++) {
603 		for (bit = 0; bit < 32; bit++) {
604 			reissue = 1;
605 			tag = (group << 5) + bit;
606 			cmd = mtip_cmd_from_tag(dd, tag);
607 
608 			fis = (struct host_to_dev_fis *)cmd->command;
609 
610 			/* Should re-issue? */
611 			if (tag == MTIP_TAG_INTERNAL ||
612 			    fis->command == ATA_CMD_SET_FEATURES)
613 				reissue = 0;
614 			else {
615 				if (fail_all_ncq_cmds ||
616 					(fail_all_ncq_write &&
617 					fis->command == ATA_CMD_FPDMA_WRITE)) {
618 					dev_warn(&dd->pdev->dev,
619 					"  Fail: %s w/tag %d [%s].\n",
620 					fis->command == ATA_CMD_FPDMA_WRITE ?
621 						"write" : "read",
622 					tag,
623 					fail_reason != NULL ?
624 						fail_reason : "unknown");
625 					mtip_complete_command(cmd, BLK_STS_MEDIUM);
626 					continue;
627 				}
628 			}
629 
630 			/*
631 			 * First check if this command has
632 			 *  exceeded its retries.
633 			 */
634 			if (reissue && (cmd->retries-- > 0)) {
635 
636 				set_bit(tag, tagaccum);
637 
638 				/* Re-issue the command. */
639 				mtip_issue_ncq_command(port, tag);
640 
641 				continue;
642 			}
643 
644 			/* Retire a command that will not be reissued */
645 			dev_warn(&port->dd->pdev->dev,
646 				"retiring tag %d\n", tag);
647 
648 			mtip_complete_command(cmd, BLK_STS_IOERR);
649 		}
650 	}
651 	print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt);
652 }
653 
654 /*
655  * Handle a set device bits interrupt
656  */
657 static inline void mtip_workq_sdbfx(struct mtip_port *port, int group,
658 							u32 completed)
659 {
660 	struct driver_data *dd = port->dd;
661 	int tag, bit;
662 	struct mtip_cmd *command;
663 
664 	if (!completed) {
665 		WARN_ON_ONCE(!completed);
666 		return;
667 	}
668 	/* clear completed status register in the hardware.*/
669 	writel(completed, port->completed[group]);
670 
671 	/* Process completed commands. */
672 	for (bit = 0; (bit < 32) && completed; bit++) {
673 		if (completed & 0x01) {
674 			tag = (group << 5) | bit;
675 
676 			/* skip internal command slot. */
677 			if (unlikely(tag == MTIP_TAG_INTERNAL))
678 				continue;
679 
680 			command = mtip_cmd_from_tag(dd, tag);
681 			mtip_complete_command(command, 0);
682 		}
683 		completed >>= 1;
684 	}
685 
686 	/* If last, re-enable interrupts */
687 	if (atomic_dec_return(&dd->irq_workers_active) == 0)
688 		writel(0xffffffff, dd->mmio + HOST_IRQ_STAT);
689 }
690 
691 /*
692  * Process legacy pio and d2h interrupts
693  */
694 static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat)
695 {
696 	struct mtip_port *port = dd->port;
697 	struct mtip_cmd *cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
698 
699 	if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) && cmd) {
700 		int group = MTIP_TAG_INDEX(MTIP_TAG_INTERNAL);
701 		int status = readl(port->cmd_issue[group]);
702 
703 		if (!(status & (1 << MTIP_TAG_BIT(MTIP_TAG_INTERNAL))))
704 			mtip_complete_command(cmd, 0);
705 	}
706 }
707 
708 /*
709  * Demux and handle errors
710  */
711 static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat)
712 {
713 	if (unlikely(port_stat & PORT_IRQ_CONNECT)) {
714 		dev_warn(&dd->pdev->dev,
715 			"Clearing PxSERR.DIAG.x\n");
716 		writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
717 	}
718 
719 	if (unlikely(port_stat & PORT_IRQ_PHYRDY)) {
720 		dev_warn(&dd->pdev->dev,
721 			"Clearing PxSERR.DIAG.n\n");
722 		writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
723 	}
724 
725 	if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) {
726 		dev_warn(&dd->pdev->dev,
727 			"Port stat errors %x unhandled\n",
728 			(port_stat & ~PORT_IRQ_HANDLED));
729 		if (mtip_check_surprise_removal(dd->pdev))
730 			return;
731 	}
732 	if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) {
733 		set_bit(MTIP_PF_EH_ACTIVE_BIT, &dd->port->flags);
734 		wake_up_interruptible(&dd->port->svc_wait);
735 	}
736 }
737 
738 static inline irqreturn_t mtip_handle_irq(struct driver_data *data)
739 {
740 	struct driver_data *dd = (struct driver_data *) data;
741 	struct mtip_port *port = dd->port;
742 	u32 hba_stat, port_stat;
743 	int rv = IRQ_NONE;
744 	int do_irq_enable = 1, i, workers;
745 	struct mtip_work *twork;
746 
747 	hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
748 	if (hba_stat) {
749 		rv = IRQ_HANDLED;
750 
751 		/* Acknowledge the interrupt status on the port.*/
752 		port_stat = readl(port->mmio + PORT_IRQ_STAT);
753 		if (unlikely(port_stat == 0xFFFFFFFF)) {
754 			mtip_check_surprise_removal(dd->pdev);
755 			return IRQ_HANDLED;
756 		}
757 		writel(port_stat, port->mmio + PORT_IRQ_STAT);
758 
759 		/* Demux port status */
760 		if (likely(port_stat & PORT_IRQ_SDB_FIS)) {
761 			do_irq_enable = 0;
762 			WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0);
763 
764 			/* Start at 1: group zero is always local? */
765 			for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS;
766 									i++) {
767 				twork = &dd->work[i];
768 				twork->completed = readl(port->completed[i]);
769 				if (twork->completed)
770 					workers++;
771 			}
772 
773 			atomic_set(&dd->irq_workers_active, workers);
774 			if (workers) {
775 				for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) {
776 					twork = &dd->work[i];
777 					if (twork->completed)
778 						queue_work_on(
779 							twork->cpu_binding,
780 							dd->isr_workq,
781 							&twork->work);
782 				}
783 
784 				if (likely(dd->work[0].completed))
785 					mtip_workq_sdbfx(port, 0,
786 							dd->work[0].completed);
787 
788 			} else {
789 				/*
790 				 * Chip quirk: SDB interrupt but nothing
791 				 * to complete
792 				 */
793 				do_irq_enable = 1;
794 			}
795 		}
796 
797 		if (unlikely(port_stat & PORT_IRQ_ERR)) {
798 			if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
799 				/* don't proceed further */
800 				return IRQ_HANDLED;
801 			}
802 			if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
803 							&dd->dd_flag))
804 				return rv;
805 
806 			mtip_process_errors(dd, port_stat & PORT_IRQ_ERR);
807 		}
808 
809 		if (unlikely(port_stat & PORT_IRQ_LEGACY))
810 			mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY);
811 	}
812 
813 	/* acknowledge interrupt */
814 	if (unlikely(do_irq_enable))
815 		writel(hba_stat, dd->mmio + HOST_IRQ_STAT);
816 
817 	return rv;
818 }
819 
820 /*
821  * HBA interrupt subroutine.
822  *
823  * @irq		IRQ number.
824  * @instance	Pointer to the driver data structure.
825  *
826  * return value
827  *	IRQ_HANDLED	A HBA interrupt was pending and handled.
828  *	IRQ_NONE	This interrupt was not for the HBA.
829  */
830 static irqreturn_t mtip_irq_handler(int irq, void *instance)
831 {
832 	struct driver_data *dd = instance;
833 
834 	return mtip_handle_irq(dd);
835 }
836 
837 static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag)
838 {
839 	writel(1 << MTIP_TAG_BIT(tag), port->cmd_issue[MTIP_TAG_INDEX(tag)]);
840 }
841 
842 static bool mtip_pause_ncq(struct mtip_port *port,
843 				struct host_to_dev_fis *fis)
844 {
845 	unsigned long task_file_data;
846 
847 	task_file_data = readl(port->mmio+PORT_TFDATA);
848 	if ((task_file_data & 1))
849 		return false;
850 
851 	if (fis->command == ATA_CMD_SEC_ERASE_PREP) {
852 		port->ic_pause_timer = jiffies;
853 		return true;
854 	} else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) &&
855 					(fis->features == 0x03)) {
856 		set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
857 		port->ic_pause_timer = jiffies;
858 		return true;
859 	} else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) ||
860 		((fis->command == 0xFC) &&
861 			(fis->features == 0x27 || fis->features == 0x72 ||
862 			 fis->features == 0x62 || fis->features == 0x26))) {
863 		clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
864 		clear_bit(MTIP_DDF_REBUILD_FAILED_BIT, &port->dd->dd_flag);
865 		/* Com reset after secure erase or lowlevel format */
866 		mtip_restart_port(port);
867 		clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
868 		return false;
869 	}
870 
871 	return false;
872 }
873 
874 static bool mtip_commands_active(struct mtip_port *port)
875 {
876 	unsigned int active;
877 	unsigned int n;
878 
879 	/*
880 	 * Ignore s_active bit 0 of array element 0.
881 	 * This bit will always be set
882 	 */
883 	active = readl(port->s_active[0]) & 0xFFFFFFFE;
884 	for (n = 1; n < port->dd->slot_groups; n++)
885 		active |= readl(port->s_active[n]);
886 
887 	return active != 0;
888 }
889 
890 /*
891  * Wait for port to quiesce
892  *
893  * @port    Pointer to port data structure
894  * @timeout Max duration to wait (ms)
895  *
896  * return value
897  *	0	Success
898  *	-EBUSY  Commands still active
899  */
900 static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout)
901 {
902 	unsigned long to;
903 	bool active = true;
904 
905 	blk_mq_quiesce_queue(port->dd->queue);
906 
907 	to = jiffies + msecs_to_jiffies(timeout);
908 	do {
909 		if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) &&
910 			test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
911 			msleep(20);
912 			continue; /* svc thd is actively issuing commands */
913 		}
914 
915 		msleep(100);
916 
917 		if (mtip_check_surprise_removal(port->dd->pdev))
918 			goto err_fault;
919 
920 		active = mtip_commands_active(port);
921 		if (!active)
922 			break;
923 	} while (time_before(jiffies, to));
924 
925 	blk_mq_unquiesce_queue(port->dd->queue);
926 	return active ? -EBUSY : 0;
927 err_fault:
928 	blk_mq_unquiesce_queue(port->dd->queue);
929 	return -EFAULT;
930 }
931 
932 struct mtip_int_cmd {
933 	int fis_len;
934 	dma_addr_t buffer;
935 	int buf_len;
936 	u32 opts;
937 };
938 
939 /*
940  * Execute an internal command and wait for the completion.
941  *
942  * @port    Pointer to the port data structure.
943  * @fis     Pointer to the FIS that describes the command.
944  * @fis_len  Length in WORDS of the FIS.
945  * @buffer  DMA accessible for command data.
946  * @buf_len  Length, in bytes, of the data buffer.
947  * @opts    Command header options, excluding the FIS length
948  *             and the number of PRD entries.
949  * @timeout Time in ms to wait for the command to complete.
950  *
951  * return value
952  *	0	 Command completed successfully.
953  *	-EFAULT  The buffer address is not correctly aligned.
954  *	-EBUSY   Internal command or other IO in progress.
955  *	-EAGAIN  Time out waiting for command to complete.
956  */
957 static int mtip_exec_internal_command(struct mtip_port *port,
958 					struct host_to_dev_fis *fis,
959 					int fis_len,
960 					dma_addr_t buffer,
961 					int buf_len,
962 					u32 opts,
963 					unsigned long timeout)
964 {
965 	struct mtip_cmd *int_cmd;
966 	struct driver_data *dd = port->dd;
967 	struct request *rq;
968 	struct mtip_int_cmd icmd = {
969 		.fis_len = fis_len,
970 		.buffer = buffer,
971 		.buf_len = buf_len,
972 		.opts = opts
973 	};
974 	int rv = 0;
975 
976 	/* Make sure the buffer is 8 byte aligned. This is asic specific. */
977 	if (buffer & 0x00000007) {
978 		dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n");
979 		return -EFAULT;
980 	}
981 
982 	if (mtip_check_surprise_removal(dd->pdev))
983 		return -EFAULT;
984 
985 	rq = blk_mq_alloc_request(dd->queue, REQ_OP_DRV_IN, BLK_MQ_REQ_RESERVED);
986 	if (IS_ERR(rq)) {
987 		dbg_printk(MTIP_DRV_NAME "Unable to allocate tag for PIO cmd\n");
988 		return -EFAULT;
989 	}
990 
991 	set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
992 
993 	if (fis->command == ATA_CMD_SEC_ERASE_PREP)
994 		set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
995 
996 	clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
997 
998 	if (fis->command != ATA_CMD_STANDBYNOW1) {
999 		/* wait for io to complete if non atomic */
1000 		if (mtip_quiesce_io(port, MTIP_QUIESCE_IO_TIMEOUT_MS) < 0) {
1001 			dev_warn(&dd->pdev->dev, "Failed to quiesce IO\n");
1002 			blk_mq_free_request(rq);
1003 			clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1004 			wake_up_interruptible(&port->svc_wait);
1005 			return -EBUSY;
1006 		}
1007 	}
1008 
1009 	/* Copy the command to the command table */
1010 	int_cmd = blk_mq_rq_to_pdu(rq);
1011 	int_cmd->icmd = &icmd;
1012 	memcpy(int_cmd->command, fis, fis_len*4);
1013 
1014 	rq->timeout = timeout;
1015 
1016 	/* insert request and run queue */
1017 	blk_execute_rq(rq->q, NULL, rq, true);
1018 
1019 	if (int_cmd->status) {
1020 		dev_err(&dd->pdev->dev, "Internal command [%02X] failed %d\n",
1021 				fis->command, int_cmd->status);
1022 		rv = -EIO;
1023 
1024 		if (mtip_check_surprise_removal(dd->pdev) ||
1025 			test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1026 					&dd->dd_flag)) {
1027 			dev_err(&dd->pdev->dev,
1028 				"Internal command [%02X] wait returned due to SR\n",
1029 				fis->command);
1030 			rv = -ENXIO;
1031 			goto exec_ic_exit;
1032 		}
1033 		mtip_device_reset(dd); /* recover from timeout issue */
1034 		rv = -EAGAIN;
1035 		goto exec_ic_exit;
1036 	}
1037 
1038 	if (readl(port->cmd_issue[MTIP_TAG_INDEX(MTIP_TAG_INTERNAL)])
1039 			& (1 << MTIP_TAG_BIT(MTIP_TAG_INTERNAL))) {
1040 		rv = -ENXIO;
1041 		if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
1042 			mtip_device_reset(dd);
1043 			rv = -EAGAIN;
1044 		}
1045 	}
1046 exec_ic_exit:
1047 	/* Clear the allocated and active bits for the internal command. */
1048 	blk_mq_free_request(rq);
1049 	clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1050 	if (rv >= 0 && mtip_pause_ncq(port, fis)) {
1051 		/* NCQ paused */
1052 		return rv;
1053 	}
1054 	wake_up_interruptible(&port->svc_wait);
1055 
1056 	return rv;
1057 }
1058 
1059 /*
1060  * Byte-swap ATA ID strings.
1061  *
1062  * ATA identify data contains strings in byte-swapped 16-bit words.
1063  * They must be swapped (on all architectures) to be usable as C strings.
1064  * This function swaps bytes in-place.
1065  *
1066  * @buf The buffer location of the string
1067  * @len The number of bytes to swap
1068  *
1069  * return value
1070  *	None
1071  */
1072 static inline void ata_swap_string(u16 *buf, unsigned int len)
1073 {
1074 	int i;
1075 	for (i = 0; i < (len/2); i++)
1076 		be16_to_cpus(&buf[i]);
1077 }
1078 
1079 static void mtip_set_timeout(struct driver_data *dd,
1080 					struct host_to_dev_fis *fis,
1081 					unsigned int *timeout, u8 erasemode)
1082 {
1083 	switch (fis->command) {
1084 	case ATA_CMD_DOWNLOAD_MICRO:
1085 		*timeout = 120000; /* 2 minutes */
1086 		break;
1087 	case ATA_CMD_SEC_ERASE_UNIT:
1088 	case 0xFC:
1089 		if (erasemode)
1090 			*timeout = ((*(dd->port->identify + 90) * 2) * 60000);
1091 		else
1092 			*timeout = ((*(dd->port->identify + 89) * 2) * 60000);
1093 		break;
1094 	case ATA_CMD_STANDBYNOW1:
1095 		*timeout = 120000;  /* 2 minutes */
1096 		break;
1097 	case 0xF7:
1098 	case 0xFA:
1099 		*timeout = 60000;  /* 60 seconds */
1100 		break;
1101 	case ATA_CMD_SMART:
1102 		*timeout = 15000;  /* 15 seconds */
1103 		break;
1104 	default:
1105 		*timeout = MTIP_IOCTL_CMD_TIMEOUT_MS;
1106 		break;
1107 	}
1108 }
1109 
1110 /*
1111  * Request the device identity information.
1112  *
1113  * If a user space buffer is not specified, i.e. is NULL, the
1114  * identify information is still read from the drive and placed
1115  * into the identify data buffer (@e port->identify) in the
1116  * port data structure.
1117  * When the identify buffer contains valid identify information @e
1118  * port->identify_valid is non-zero.
1119  *
1120  * @port	 Pointer to the port structure.
1121  * @user_buffer  A user space buffer where the identify data should be
1122  *                    copied.
1123  *
1124  * return value
1125  *	0	Command completed successfully.
1126  *	-EFAULT An error occurred while coping data to the user buffer.
1127  *	-1	Command failed.
1128  */
1129 static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer)
1130 {
1131 	int rv = 0;
1132 	struct host_to_dev_fis fis;
1133 
1134 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1135 		return -EFAULT;
1136 
1137 	/* Build the FIS. */
1138 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1139 	fis.type	= 0x27;
1140 	fis.opts	= 1 << 7;
1141 	fis.command	= ATA_CMD_ID_ATA;
1142 
1143 	/* Set the identify information as invalid. */
1144 	port->identify_valid = 0;
1145 
1146 	/* Clear the identify information. */
1147 	memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS);
1148 
1149 	/* Execute the command. */
1150 	if (mtip_exec_internal_command(port,
1151 				&fis,
1152 				5,
1153 				port->identify_dma,
1154 				sizeof(u16) * ATA_ID_WORDS,
1155 				0,
1156 				MTIP_INT_CMD_TIMEOUT_MS)
1157 				< 0) {
1158 		rv = -1;
1159 		goto out;
1160 	}
1161 
1162 	/*
1163 	 * Perform any necessary byte-swapping.  Yes, the kernel does in fact
1164 	 * perform field-sensitive swapping on the string fields.
1165 	 * See the kernel use of ata_id_string() for proof of this.
1166 	 */
1167 #ifdef __LITTLE_ENDIAN
1168 	ata_swap_string(port->identify + 27, 40);  /* model string*/
1169 	ata_swap_string(port->identify + 23, 8);   /* firmware string*/
1170 	ata_swap_string(port->identify + 10, 20);  /* serial# string*/
1171 #else
1172 	{
1173 		int i;
1174 		for (i = 0; i < ATA_ID_WORDS; i++)
1175 			port->identify[i] = le16_to_cpu(port->identify[i]);
1176 	}
1177 #endif
1178 
1179 	/* Check security locked state */
1180 	if (port->identify[128] & 0x4)
1181 		set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1182 	else
1183 		clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1184 
1185 	/* Set the identify buffer as valid. */
1186 	port->identify_valid = 1;
1187 
1188 	if (user_buffer) {
1189 		if (copy_to_user(
1190 			user_buffer,
1191 			port->identify,
1192 			ATA_ID_WORDS * sizeof(u16))) {
1193 			rv = -EFAULT;
1194 			goto out;
1195 		}
1196 	}
1197 
1198 out:
1199 	return rv;
1200 }
1201 
1202 /*
1203  * Issue a standby immediate command to the device.
1204  *
1205  * @port Pointer to the port structure.
1206  *
1207  * return value
1208  *	0	Command was executed successfully.
1209  *	-1	An error occurred while executing the command.
1210  */
1211 static int mtip_standby_immediate(struct mtip_port *port)
1212 {
1213 	int rv;
1214 	struct host_to_dev_fis	fis;
1215 	unsigned long start;
1216 	unsigned int timeout;
1217 
1218 	/* Build the FIS. */
1219 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1220 	fis.type	= 0x27;
1221 	fis.opts	= 1 << 7;
1222 	fis.command	= ATA_CMD_STANDBYNOW1;
1223 
1224 	mtip_set_timeout(port->dd, &fis, &timeout, 0);
1225 
1226 	start = jiffies;
1227 	rv = mtip_exec_internal_command(port,
1228 					&fis,
1229 					5,
1230 					0,
1231 					0,
1232 					0,
1233 					timeout);
1234 	dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n",
1235 			jiffies_to_msecs(jiffies - start));
1236 	if (rv)
1237 		dev_warn(&port->dd->pdev->dev,
1238 			"STANDBY IMMEDIATE command failed.\n");
1239 
1240 	return rv;
1241 }
1242 
1243 /*
1244  * Issue a READ LOG EXT command to the device.
1245  *
1246  * @port	pointer to the port structure.
1247  * @page	page number to fetch
1248  * @buffer	pointer to buffer
1249  * @buffer_dma	dma address corresponding to @buffer
1250  * @sectors	page length to fetch, in sectors
1251  *
1252  * return value
1253  *	@rv	return value from mtip_exec_internal_command()
1254  */
1255 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
1256 				dma_addr_t buffer_dma, unsigned int sectors)
1257 {
1258 	struct host_to_dev_fis fis;
1259 
1260 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1261 	fis.type	= 0x27;
1262 	fis.opts	= 1 << 7;
1263 	fis.command	= ATA_CMD_READ_LOG_EXT;
1264 	fis.sect_count	= sectors & 0xFF;
1265 	fis.sect_cnt_ex	= (sectors >> 8) & 0xFF;
1266 	fis.lba_low	= page;
1267 	fis.lba_mid	= 0;
1268 	fis.device	= ATA_DEVICE_OBS;
1269 
1270 	memset(buffer, 0, sectors * ATA_SECT_SIZE);
1271 
1272 	return mtip_exec_internal_command(port,
1273 					&fis,
1274 					5,
1275 					buffer_dma,
1276 					sectors * ATA_SECT_SIZE,
1277 					0,
1278 					MTIP_INT_CMD_TIMEOUT_MS);
1279 }
1280 
1281 /*
1282  * Issue a SMART READ DATA command to the device.
1283  *
1284  * @port	pointer to the port structure.
1285  * @buffer	pointer to buffer
1286  * @buffer_dma	dma address corresponding to @buffer
1287  *
1288  * return value
1289  *	@rv	return value from mtip_exec_internal_command()
1290  */
1291 static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer,
1292 					dma_addr_t buffer_dma)
1293 {
1294 	struct host_to_dev_fis fis;
1295 
1296 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1297 	fis.type	= 0x27;
1298 	fis.opts	= 1 << 7;
1299 	fis.command	= ATA_CMD_SMART;
1300 	fis.features	= 0xD0;
1301 	fis.sect_count	= 1;
1302 	fis.lba_mid	= 0x4F;
1303 	fis.lba_hi	= 0xC2;
1304 	fis.device	= ATA_DEVICE_OBS;
1305 
1306 	return mtip_exec_internal_command(port,
1307 					&fis,
1308 					5,
1309 					buffer_dma,
1310 					ATA_SECT_SIZE,
1311 					0,
1312 					15000);
1313 }
1314 
1315 /*
1316  * Get the value of a smart attribute
1317  *
1318  * @port	pointer to the port structure
1319  * @id		attribute number
1320  * @attrib	pointer to return attrib information corresponding to @id
1321  *
1322  * return value
1323  *	-EINVAL	NULL buffer passed or unsupported attribute @id.
1324  *	-EPERM	Identify data not valid, SMART not supported or not enabled
1325  */
1326 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
1327 						struct smart_attr *attrib)
1328 {
1329 	int rv, i;
1330 	struct smart_attr *pattr;
1331 
1332 	if (!attrib)
1333 		return -EINVAL;
1334 
1335 	if (!port->identify_valid) {
1336 		dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n");
1337 		return -EPERM;
1338 	}
1339 	if (!(port->identify[82] & 0x1)) {
1340 		dev_warn(&port->dd->pdev->dev, "SMART not supported\n");
1341 		return -EPERM;
1342 	}
1343 	if (!(port->identify[85] & 0x1)) {
1344 		dev_warn(&port->dd->pdev->dev, "SMART not enabled\n");
1345 		return -EPERM;
1346 	}
1347 
1348 	memset(port->smart_buf, 0, ATA_SECT_SIZE);
1349 	rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma);
1350 	if (rv) {
1351 		dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n");
1352 		return rv;
1353 	}
1354 
1355 	pattr = (struct smart_attr *)(port->smart_buf + 2);
1356 	for (i = 0; i < 29; i++, pattr++)
1357 		if (pattr->attr_id == id) {
1358 			memcpy(attrib, pattr, sizeof(struct smart_attr));
1359 			break;
1360 		}
1361 
1362 	if (i == 29) {
1363 		dev_warn(&port->dd->pdev->dev,
1364 			"Query for invalid SMART attribute ID\n");
1365 		rv = -EINVAL;
1366 	}
1367 
1368 	return rv;
1369 }
1370 
1371 /*
1372  * Get the drive capacity.
1373  *
1374  * @dd      Pointer to the device data structure.
1375  * @sectors Pointer to the variable that will receive the sector count.
1376  *
1377  * return value
1378  *	1 Capacity was returned successfully.
1379  *	0 The identify information is invalid.
1380  */
1381 static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors)
1382 {
1383 	struct mtip_port *port = dd->port;
1384 	u64 total, raw0, raw1, raw2, raw3;
1385 	raw0 = port->identify[100];
1386 	raw1 = port->identify[101];
1387 	raw2 = port->identify[102];
1388 	raw3 = port->identify[103];
1389 	total = raw0 | raw1<<16 | raw2<<32 | raw3<<48;
1390 	*sectors = total;
1391 	return (bool) !!port->identify_valid;
1392 }
1393 
1394 /*
1395  * Display the identify command data.
1396  *
1397  * @port Pointer to the port data structure.
1398  *
1399  * return value
1400  *	None
1401  */
1402 static void mtip_dump_identify(struct mtip_port *port)
1403 {
1404 	sector_t sectors;
1405 	unsigned short revid;
1406 	char cbuf[42];
1407 
1408 	if (!port->identify_valid)
1409 		return;
1410 
1411 	strlcpy(cbuf, (char *)(port->identify+10), 21);
1412 	dev_info(&port->dd->pdev->dev,
1413 		"Serial No.: %s\n", cbuf);
1414 
1415 	strlcpy(cbuf, (char *)(port->identify+23), 9);
1416 	dev_info(&port->dd->pdev->dev,
1417 		"Firmware Ver.: %s\n", cbuf);
1418 
1419 	strlcpy(cbuf, (char *)(port->identify+27), 41);
1420 	dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf);
1421 
1422 	dev_info(&port->dd->pdev->dev, "Security: %04x %s\n",
1423 		port->identify[128],
1424 		port->identify[128] & 0x4 ? "(LOCKED)" : "");
1425 
1426 	if (mtip_hw_get_capacity(port->dd, &sectors))
1427 		dev_info(&port->dd->pdev->dev,
1428 			"Capacity: %llu sectors (%llu MB)\n",
1429 			 (u64)sectors,
1430 			 ((u64)sectors) * ATA_SECT_SIZE >> 20);
1431 
1432 	pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid);
1433 	switch (revid & 0xFF) {
1434 	case 0x1:
1435 		strlcpy(cbuf, "A0", 3);
1436 		break;
1437 	case 0x3:
1438 		strlcpy(cbuf, "A2", 3);
1439 		break;
1440 	default:
1441 		strlcpy(cbuf, "?", 2);
1442 		break;
1443 	}
1444 	dev_info(&port->dd->pdev->dev,
1445 		"Card Type: %s\n", cbuf);
1446 }
1447 
1448 /*
1449  * Map the commands scatter list into the command table.
1450  *
1451  * @command Pointer to the command.
1452  * @nents Number of scatter list entries.
1453  *
1454  * return value
1455  *	None
1456  */
1457 static inline void fill_command_sg(struct driver_data *dd,
1458 				struct mtip_cmd *command,
1459 				int nents)
1460 {
1461 	int n;
1462 	unsigned int dma_len;
1463 	struct mtip_cmd_sg *command_sg;
1464 	struct scatterlist *sg;
1465 
1466 	command_sg = command->command + AHCI_CMD_TBL_HDR_SZ;
1467 
1468 	for_each_sg(command->sg, sg, nents, n) {
1469 		dma_len = sg_dma_len(sg);
1470 		if (dma_len > 0x400000)
1471 			dev_err(&dd->pdev->dev,
1472 				"DMA segment length truncated\n");
1473 		command_sg->info = cpu_to_le32((dma_len-1) & 0x3FFFFF);
1474 		command_sg->dba	=  cpu_to_le32(sg_dma_address(sg));
1475 		command_sg->dba_upper =
1476 			cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
1477 		command_sg++;
1478 	}
1479 }
1480 
1481 /*
1482  * @brief Execute a drive command.
1483  *
1484  * return value 0 The command completed successfully.
1485  * return value -1 An error occurred while executing the command.
1486  */
1487 static int exec_drive_task(struct mtip_port *port, u8 *command)
1488 {
1489 	struct host_to_dev_fis	fis;
1490 	struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
1491 	unsigned int to;
1492 
1493 	/* Build the FIS. */
1494 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1495 	fis.type	= 0x27;
1496 	fis.opts	= 1 << 7;
1497 	fis.command	= command[0];
1498 	fis.features	= command[1];
1499 	fis.sect_count	= command[2];
1500 	fis.sector	= command[3];
1501 	fis.cyl_low	= command[4];
1502 	fis.cyl_hi	= command[5];
1503 	fis.device	= command[6] & ~0x10; /* Clear the dev bit*/
1504 
1505 	mtip_set_timeout(port->dd, &fis, &to, 0);
1506 
1507 	dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n",
1508 		__func__,
1509 		command[0],
1510 		command[1],
1511 		command[2],
1512 		command[3],
1513 		command[4],
1514 		command[5],
1515 		command[6]);
1516 
1517 	/* Execute the command. */
1518 	if (mtip_exec_internal_command(port,
1519 				 &fis,
1520 				 5,
1521 				 0,
1522 				 0,
1523 				 0,
1524 				 to) < 0) {
1525 		return -1;
1526 	}
1527 
1528 	command[0] = reply->command; /* Status*/
1529 	command[1] = reply->features; /* Error*/
1530 	command[4] = reply->cyl_low;
1531 	command[5] = reply->cyl_hi;
1532 
1533 	dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n",
1534 		__func__,
1535 		command[0],
1536 		command[1],
1537 		command[4],
1538 		command[5]);
1539 
1540 	return 0;
1541 }
1542 
1543 /*
1544  * @brief Execute a drive command.
1545  *
1546  * @param port Pointer to the port data structure.
1547  * @param command Pointer to the user specified command parameters.
1548  * @param user_buffer Pointer to the user space buffer where read sector
1549  *                   data should be copied.
1550  *
1551  * return value 0 The command completed successfully.
1552  * return value -EFAULT An error occurred while copying the completion
1553  *                 data to the user space buffer.
1554  * return value -1 An error occurred while executing the command.
1555  */
1556 static int exec_drive_command(struct mtip_port *port, u8 *command,
1557 				void __user *user_buffer)
1558 {
1559 	struct host_to_dev_fis	fis;
1560 	struct host_to_dev_fis *reply;
1561 	u8 *buf = NULL;
1562 	dma_addr_t dma_addr = 0;
1563 	int rv = 0, xfer_sz = command[3];
1564 	unsigned int to;
1565 
1566 	if (xfer_sz) {
1567 		if (!user_buffer)
1568 			return -EFAULT;
1569 
1570 		buf = dma_alloc_coherent(&port->dd->pdev->dev,
1571 				ATA_SECT_SIZE * xfer_sz,
1572 				&dma_addr,
1573 				GFP_KERNEL);
1574 		if (!buf) {
1575 			dev_err(&port->dd->pdev->dev,
1576 				"Memory allocation failed (%d bytes)\n",
1577 				ATA_SECT_SIZE * xfer_sz);
1578 			return -ENOMEM;
1579 		}
1580 	}
1581 
1582 	/* Build the FIS. */
1583 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1584 	fis.type	= 0x27;
1585 	fis.opts	= 1 << 7;
1586 	fis.command	= command[0];
1587 	fis.features	= command[2];
1588 	fis.sect_count	= command[3];
1589 	if (fis.command == ATA_CMD_SMART) {
1590 		fis.sector	= command[1];
1591 		fis.cyl_low	= 0x4F;
1592 		fis.cyl_hi	= 0xC2;
1593 	}
1594 
1595 	mtip_set_timeout(port->dd, &fis, &to, 0);
1596 
1597 	if (xfer_sz)
1598 		reply = (port->rxfis + RX_FIS_PIO_SETUP);
1599 	else
1600 		reply = (port->rxfis + RX_FIS_D2H_REG);
1601 
1602 	dbg_printk(MTIP_DRV_NAME
1603 		" %s: User Command: cmd %x, sect %x, "
1604 		"feat %x, sectcnt %x\n",
1605 		__func__,
1606 		command[0],
1607 		command[1],
1608 		command[2],
1609 		command[3]);
1610 
1611 	/* Execute the command. */
1612 	if (mtip_exec_internal_command(port,
1613 				&fis,
1614 				 5,
1615 				 (xfer_sz ? dma_addr : 0),
1616 				 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0),
1617 				 0,
1618 				 to)
1619 				 < 0) {
1620 		rv = -EFAULT;
1621 		goto exit_drive_command;
1622 	}
1623 
1624 	/* Collect the completion status. */
1625 	command[0] = reply->command; /* Status*/
1626 	command[1] = reply->features; /* Error*/
1627 	command[2] = reply->sect_count;
1628 
1629 	dbg_printk(MTIP_DRV_NAME
1630 		" %s: Completion Status: stat %x, "
1631 		"err %x, nsect %x\n",
1632 		__func__,
1633 		command[0],
1634 		command[1],
1635 		command[2]);
1636 
1637 	if (xfer_sz) {
1638 		if (copy_to_user(user_buffer,
1639 				 buf,
1640 				 ATA_SECT_SIZE * command[3])) {
1641 			rv = -EFAULT;
1642 			goto exit_drive_command;
1643 		}
1644 	}
1645 exit_drive_command:
1646 	if (buf)
1647 		dma_free_coherent(&port->dd->pdev->dev,
1648 				ATA_SECT_SIZE * xfer_sz, buf, dma_addr);
1649 	return rv;
1650 }
1651 
1652 /*
1653  *  Indicates whether a command has a single sector payload.
1654  *
1655  *  @command passed to the device to perform the certain event.
1656  *  @features passed to the device to perform the certain event.
1657  *
1658  *  return value
1659  *	1	command is one that always has a single sector payload,
1660  *		regardless of the value in the Sector Count field.
1661  *      0       otherwise
1662  *
1663  */
1664 static unsigned int implicit_sector(unsigned char command,
1665 				    unsigned char features)
1666 {
1667 	unsigned int rv = 0;
1668 
1669 	/* list of commands that have an implicit sector count of 1 */
1670 	switch (command) {
1671 	case ATA_CMD_SEC_SET_PASS:
1672 	case ATA_CMD_SEC_UNLOCK:
1673 	case ATA_CMD_SEC_ERASE_PREP:
1674 	case ATA_CMD_SEC_ERASE_UNIT:
1675 	case ATA_CMD_SEC_FREEZE_LOCK:
1676 	case ATA_CMD_SEC_DISABLE_PASS:
1677 	case ATA_CMD_PMP_READ:
1678 	case ATA_CMD_PMP_WRITE:
1679 		rv = 1;
1680 		break;
1681 	case ATA_CMD_SET_MAX:
1682 		if (features == ATA_SET_MAX_UNLOCK)
1683 			rv = 1;
1684 		break;
1685 	case ATA_CMD_SMART:
1686 		if ((features == ATA_SMART_READ_VALUES) ||
1687 				(features == ATA_SMART_READ_THRESHOLDS))
1688 			rv = 1;
1689 		break;
1690 	case ATA_CMD_CONF_OVERLAY:
1691 		if ((features == ATA_DCO_IDENTIFY) ||
1692 				(features == ATA_DCO_SET))
1693 			rv = 1;
1694 		break;
1695 	}
1696 	return rv;
1697 }
1698 
1699 /*
1700  * Executes a taskfile
1701  * See ide_taskfile_ioctl() for derivation
1702  */
1703 static int exec_drive_taskfile(struct driver_data *dd,
1704 			       void __user *buf,
1705 			       ide_task_request_t *req_task,
1706 			       int outtotal)
1707 {
1708 	struct host_to_dev_fis	fis;
1709 	struct host_to_dev_fis *reply;
1710 	u8 *outbuf = NULL;
1711 	u8 *inbuf = NULL;
1712 	dma_addr_t outbuf_dma = 0;
1713 	dma_addr_t inbuf_dma = 0;
1714 	dma_addr_t dma_buffer = 0;
1715 	int err = 0;
1716 	unsigned int taskin = 0;
1717 	unsigned int taskout = 0;
1718 	u8 nsect = 0;
1719 	unsigned int timeout;
1720 	unsigned int force_single_sector;
1721 	unsigned int transfer_size;
1722 	unsigned long task_file_data;
1723 	int intotal = outtotal + req_task->out_size;
1724 	int erasemode = 0;
1725 
1726 	taskout = req_task->out_size;
1727 	taskin = req_task->in_size;
1728 	/* 130560 = 512 * 0xFF*/
1729 	if (taskin > 130560 || taskout > 130560)
1730 		return -EINVAL;
1731 
1732 	if (taskout) {
1733 		outbuf = memdup_user(buf + outtotal, taskout);
1734 		if (IS_ERR(outbuf))
1735 			return PTR_ERR(outbuf);
1736 
1737 		outbuf_dma = dma_map_single(&dd->pdev->dev, outbuf,
1738 					    taskout, DMA_TO_DEVICE);
1739 		if (dma_mapping_error(&dd->pdev->dev, outbuf_dma)) {
1740 			err = -ENOMEM;
1741 			goto abort;
1742 		}
1743 		dma_buffer = outbuf_dma;
1744 	}
1745 
1746 	if (taskin) {
1747 		inbuf = memdup_user(buf + intotal, taskin);
1748 		if (IS_ERR(inbuf)) {
1749 			err = PTR_ERR(inbuf);
1750 			inbuf = NULL;
1751 			goto abort;
1752 		}
1753 		inbuf_dma = dma_map_single(&dd->pdev->dev, inbuf,
1754 					   taskin, DMA_FROM_DEVICE);
1755 		if (dma_mapping_error(&dd->pdev->dev, inbuf_dma)) {
1756 			err = -ENOMEM;
1757 			goto abort;
1758 		}
1759 		dma_buffer = inbuf_dma;
1760 	}
1761 
1762 	/* only supports PIO and non-data commands from this ioctl. */
1763 	switch (req_task->data_phase) {
1764 	case TASKFILE_OUT:
1765 		nsect = taskout / ATA_SECT_SIZE;
1766 		reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
1767 		break;
1768 	case TASKFILE_IN:
1769 		reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
1770 		break;
1771 	case TASKFILE_NO_DATA:
1772 		reply = (dd->port->rxfis + RX_FIS_D2H_REG);
1773 		break;
1774 	default:
1775 		err = -EINVAL;
1776 		goto abort;
1777 	}
1778 
1779 	/* Build the FIS. */
1780 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1781 
1782 	fis.type	= 0x27;
1783 	fis.opts	= 1 << 7;
1784 	fis.command	= req_task->io_ports[7];
1785 	fis.features	= req_task->io_ports[1];
1786 	fis.sect_count	= req_task->io_ports[2];
1787 	fis.lba_low	= req_task->io_ports[3];
1788 	fis.lba_mid	= req_task->io_ports[4];
1789 	fis.lba_hi	= req_task->io_ports[5];
1790 	 /* Clear the dev bit*/
1791 	fis.device	= req_task->io_ports[6] & ~0x10;
1792 
1793 	if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) {
1794 		req_task->in_flags.all	=
1795 			IDE_TASKFILE_STD_IN_FLAGS |
1796 			(IDE_HOB_STD_IN_FLAGS << 8);
1797 		fis.lba_low_ex		= req_task->hob_ports[3];
1798 		fis.lba_mid_ex		= req_task->hob_ports[4];
1799 		fis.lba_hi_ex		= req_task->hob_ports[5];
1800 		fis.features_ex		= req_task->hob_ports[1];
1801 		fis.sect_cnt_ex		= req_task->hob_ports[2];
1802 
1803 	} else {
1804 		req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS;
1805 	}
1806 
1807 	force_single_sector = implicit_sector(fis.command, fis.features);
1808 
1809 	if ((taskin || taskout) && (!fis.sect_count)) {
1810 		if (nsect)
1811 			fis.sect_count = nsect;
1812 		else {
1813 			if (!force_single_sector) {
1814 				dev_warn(&dd->pdev->dev,
1815 					"data movement but "
1816 					"sect_count is 0\n");
1817 				err = -EINVAL;
1818 				goto abort;
1819 			}
1820 		}
1821 	}
1822 
1823 	dbg_printk(MTIP_DRV_NAME
1824 		" %s: cmd %x, feat %x, nsect %x,"
1825 		" sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x,"
1826 		" head/dev %x\n",
1827 		__func__,
1828 		fis.command,
1829 		fis.features,
1830 		fis.sect_count,
1831 		fis.lba_low,
1832 		fis.lba_mid,
1833 		fis.lba_hi,
1834 		fis.device);
1835 
1836 	/* check for erase mode support during secure erase.*/
1837 	if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf &&
1838 					(outbuf[0] & MTIP_SEC_ERASE_MODE)) {
1839 		erasemode = 1;
1840 	}
1841 
1842 	mtip_set_timeout(dd, &fis, &timeout, erasemode);
1843 
1844 	/* Determine the correct transfer size.*/
1845 	if (force_single_sector)
1846 		transfer_size = ATA_SECT_SIZE;
1847 	else
1848 		transfer_size = ATA_SECT_SIZE * fis.sect_count;
1849 
1850 	/* Execute the command.*/
1851 	if (mtip_exec_internal_command(dd->port,
1852 				 &fis,
1853 				 5,
1854 				 dma_buffer,
1855 				 transfer_size,
1856 				 0,
1857 				 timeout) < 0) {
1858 		err = -EIO;
1859 		goto abort;
1860 	}
1861 
1862 	task_file_data = readl(dd->port->mmio+PORT_TFDATA);
1863 
1864 	if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) {
1865 		reply = dd->port->rxfis + RX_FIS_PIO_SETUP;
1866 		req_task->io_ports[7] = reply->control;
1867 	} else {
1868 		reply = dd->port->rxfis + RX_FIS_D2H_REG;
1869 		req_task->io_ports[7] = reply->command;
1870 	}
1871 
1872 	/* reclaim the DMA buffers.*/
1873 	if (inbuf_dma)
1874 		dma_unmap_single(&dd->pdev->dev, inbuf_dma, taskin,
1875 				 DMA_FROM_DEVICE);
1876 	if (outbuf_dma)
1877 		dma_unmap_single(&dd->pdev->dev, outbuf_dma, taskout,
1878 				 DMA_TO_DEVICE);
1879 	inbuf_dma  = 0;
1880 	outbuf_dma = 0;
1881 
1882 	/* return the ATA registers to the caller.*/
1883 	req_task->io_ports[1] = reply->features;
1884 	req_task->io_ports[2] = reply->sect_count;
1885 	req_task->io_ports[3] = reply->lba_low;
1886 	req_task->io_ports[4] = reply->lba_mid;
1887 	req_task->io_ports[5] = reply->lba_hi;
1888 	req_task->io_ports[6] = reply->device;
1889 
1890 	if (req_task->out_flags.all & 1)  {
1891 
1892 		req_task->hob_ports[3] = reply->lba_low_ex;
1893 		req_task->hob_ports[4] = reply->lba_mid_ex;
1894 		req_task->hob_ports[5] = reply->lba_hi_ex;
1895 		req_task->hob_ports[1] = reply->features_ex;
1896 		req_task->hob_ports[2] = reply->sect_cnt_ex;
1897 	}
1898 	dbg_printk(MTIP_DRV_NAME
1899 		" %s: Completion: stat %x,"
1900 		"err %x, sect_cnt %x, lbalo %x,"
1901 		"lbamid %x, lbahi %x, dev %x\n",
1902 		__func__,
1903 		req_task->io_ports[7],
1904 		req_task->io_ports[1],
1905 		req_task->io_ports[2],
1906 		req_task->io_ports[3],
1907 		req_task->io_ports[4],
1908 		req_task->io_ports[5],
1909 		req_task->io_ports[6]);
1910 
1911 	if (taskout) {
1912 		if (copy_to_user(buf + outtotal, outbuf, taskout)) {
1913 			err = -EFAULT;
1914 			goto abort;
1915 		}
1916 	}
1917 	if (taskin) {
1918 		if (copy_to_user(buf + intotal, inbuf, taskin)) {
1919 			err = -EFAULT;
1920 			goto abort;
1921 		}
1922 	}
1923 abort:
1924 	if (inbuf_dma)
1925 		dma_unmap_single(&dd->pdev->dev, inbuf_dma, taskin,
1926 				 DMA_FROM_DEVICE);
1927 	if (outbuf_dma)
1928 		dma_unmap_single(&dd->pdev->dev, outbuf_dma, taskout,
1929 				 DMA_TO_DEVICE);
1930 	kfree(outbuf);
1931 	kfree(inbuf);
1932 
1933 	return err;
1934 }
1935 
1936 /*
1937  * Handle IOCTL calls from the Block Layer.
1938  *
1939  * This function is called by the Block Layer when it receives an IOCTL
1940  * command that it does not understand. If the IOCTL command is not supported
1941  * this function returns -ENOTTY.
1942  *
1943  * @dd  Pointer to the driver data structure.
1944  * @cmd IOCTL command passed from the Block Layer.
1945  * @arg IOCTL argument passed from the Block Layer.
1946  *
1947  * return value
1948  *	0	The IOCTL completed successfully.
1949  *	-ENOTTY The specified command is not supported.
1950  *	-EFAULT An error occurred copying data to a user space buffer.
1951  *	-EIO	An error occurred while executing the command.
1952  */
1953 static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd,
1954 			 unsigned long arg)
1955 {
1956 	switch (cmd) {
1957 	case HDIO_GET_IDENTITY:
1958 	{
1959 		if (copy_to_user((void __user *)arg, dd->port->identify,
1960 						sizeof(u16) * ATA_ID_WORDS))
1961 			return -EFAULT;
1962 		break;
1963 	}
1964 	case HDIO_DRIVE_CMD:
1965 	{
1966 		u8 drive_command[4];
1967 
1968 		/* Copy the user command info to our buffer. */
1969 		if (copy_from_user(drive_command,
1970 					 (void __user *) arg,
1971 					 sizeof(drive_command)))
1972 			return -EFAULT;
1973 
1974 		/* Execute the drive command. */
1975 		if (exec_drive_command(dd->port,
1976 					 drive_command,
1977 					 (void __user *) (arg+4)))
1978 			return -EIO;
1979 
1980 		/* Copy the status back to the users buffer. */
1981 		if (copy_to_user((void __user *) arg,
1982 					 drive_command,
1983 					 sizeof(drive_command)))
1984 			return -EFAULT;
1985 
1986 		break;
1987 	}
1988 	case HDIO_DRIVE_TASK:
1989 	{
1990 		u8 drive_command[7];
1991 
1992 		/* Copy the user command info to our buffer. */
1993 		if (copy_from_user(drive_command,
1994 					 (void __user *) arg,
1995 					 sizeof(drive_command)))
1996 			return -EFAULT;
1997 
1998 		/* Execute the drive command. */
1999 		if (exec_drive_task(dd->port, drive_command))
2000 			return -EIO;
2001 
2002 		/* Copy the status back to the users buffer. */
2003 		if (copy_to_user((void __user *) arg,
2004 					 drive_command,
2005 					 sizeof(drive_command)))
2006 			return -EFAULT;
2007 
2008 		break;
2009 	}
2010 	case HDIO_DRIVE_TASKFILE: {
2011 		ide_task_request_t req_task;
2012 		int ret, outtotal;
2013 
2014 		if (copy_from_user(&req_task, (void __user *) arg,
2015 					sizeof(req_task)))
2016 			return -EFAULT;
2017 
2018 		outtotal = sizeof(req_task);
2019 
2020 		ret = exec_drive_taskfile(dd, (void __user *) arg,
2021 						&req_task, outtotal);
2022 
2023 		if (copy_to_user((void __user *) arg, &req_task,
2024 							sizeof(req_task)))
2025 			return -EFAULT;
2026 
2027 		return ret;
2028 	}
2029 
2030 	default:
2031 		return -EINVAL;
2032 	}
2033 	return 0;
2034 }
2035 
2036 /*
2037  * Submit an IO to the hw
2038  *
2039  * This function is called by the block layer to issue an io
2040  * to the device. Upon completion, the callback function will
2041  * be called with the data parameter passed as the callback data.
2042  *
2043  * @dd       Pointer to the driver data structure.
2044  * @start    First sector to read.
2045  * @nsect    Number of sectors to read.
2046  * @tag      The tag of this read command.
2047  * @callback Pointer to the function that should be called
2048  *	     when the read completes.
2049  * @data     Callback data passed to the callback function
2050  *	     when the read completes.
2051  * @dir      Direction (read or write)
2052  *
2053  * return value
2054  *	None
2055  */
2056 static void mtip_hw_submit_io(struct driver_data *dd, struct request *rq,
2057 			      struct mtip_cmd *command,
2058 			      struct blk_mq_hw_ctx *hctx)
2059 {
2060 	struct mtip_cmd_hdr *hdr =
2061 		dd->port->command_list + sizeof(struct mtip_cmd_hdr) * rq->tag;
2062 	struct host_to_dev_fis	*fis;
2063 	struct mtip_port *port = dd->port;
2064 	int dma_dir = rq_data_dir(rq) == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
2065 	u64 start = blk_rq_pos(rq);
2066 	unsigned int nsect = blk_rq_sectors(rq);
2067 	unsigned int nents;
2068 
2069 	/* Map the scatter list for DMA access */
2070 	nents = blk_rq_map_sg(hctx->queue, rq, command->sg);
2071 	nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir);
2072 
2073 	prefetch(&port->flags);
2074 
2075 	command->scatter_ents = nents;
2076 
2077 	/*
2078 	 * The number of retries for this command before it is
2079 	 * reported as a failure to the upper layers.
2080 	 */
2081 	command->retries = MTIP_MAX_RETRIES;
2082 
2083 	/* Fill out fis */
2084 	fis = command->command;
2085 	fis->type        = 0x27;
2086 	fis->opts        = 1 << 7;
2087 	if (dma_dir == DMA_FROM_DEVICE)
2088 		fis->command = ATA_CMD_FPDMA_READ;
2089 	else
2090 		fis->command = ATA_CMD_FPDMA_WRITE;
2091 	fis->lba_low     = start & 0xFF;
2092 	fis->lba_mid     = (start >> 8) & 0xFF;
2093 	fis->lba_hi      = (start >> 16) & 0xFF;
2094 	fis->lba_low_ex  = (start >> 24) & 0xFF;
2095 	fis->lba_mid_ex  = (start >> 32) & 0xFF;
2096 	fis->lba_hi_ex   = (start >> 40) & 0xFF;
2097 	fis->device	 = 1 << 6;
2098 	fis->features    = nsect & 0xFF;
2099 	fis->features_ex = (nsect >> 8) & 0xFF;
2100 	fis->sect_count  = ((rq->tag << 3) | (rq->tag >> 5));
2101 	fis->sect_cnt_ex = 0;
2102 	fis->control     = 0;
2103 	fis->res2        = 0;
2104 	fis->res3        = 0;
2105 	fill_command_sg(dd, command, nents);
2106 
2107 	if (unlikely(command->unaligned))
2108 		fis->device |= 1 << 7;
2109 
2110 	/* Populate the command header */
2111 	hdr->ctba = cpu_to_le32(command->command_dma & 0xFFFFFFFF);
2112 	if (test_bit(MTIP_PF_HOST_CAP_64, &dd->port->flags))
2113 		hdr->ctbau = cpu_to_le32((command->command_dma >> 16) >> 16);
2114 	hdr->opts = cpu_to_le32((nents << 16) | 5 | AHCI_CMD_PREFETCH);
2115 	hdr->byte_count = 0;
2116 
2117 	command->direction = dma_dir;
2118 
2119 	/*
2120 	 * To prevent this command from being issued
2121 	 * if an internal command is in progress or error handling is active.
2122 	 */
2123 	if (unlikely(port->flags & MTIP_PF_PAUSE_IO)) {
2124 		set_bit(rq->tag, port->cmds_to_issue);
2125 		set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2126 		return;
2127 	}
2128 
2129 	/* Issue the command to the hardware */
2130 	mtip_issue_ncq_command(port, rq->tag);
2131 }
2132 
2133 /*
2134  * Sysfs status dump.
2135  *
2136  * @dev  Pointer to the device structure, passed by the kernrel.
2137  * @attr Pointer to the device_attribute structure passed by the kernel.
2138  * @buf  Pointer to the char buffer that will receive the stats info.
2139  *
2140  * return value
2141  *	The size, in bytes, of the data copied into buf.
2142  */
2143 static ssize_t mtip_hw_show_status(struct device *dev,
2144 				struct device_attribute *attr,
2145 				char *buf)
2146 {
2147 	struct driver_data *dd = dev_to_disk(dev)->private_data;
2148 	int size = 0;
2149 
2150 	if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
2151 		size += sprintf(buf, "%s", "thermal_shutdown\n");
2152 	else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
2153 		size += sprintf(buf, "%s", "write_protect\n");
2154 	else
2155 		size += sprintf(buf, "%s", "online\n");
2156 
2157 	return size;
2158 }
2159 
2160 static DEVICE_ATTR(status, 0444, mtip_hw_show_status, NULL);
2161 
2162 /* debugsfs entries */
2163 
2164 static ssize_t show_device_status(struct device_driver *drv, char *buf)
2165 {
2166 	int size = 0;
2167 	struct driver_data *dd, *tmp;
2168 	unsigned long flags;
2169 	char id_buf[42];
2170 	u16 status = 0;
2171 
2172 	spin_lock_irqsave(&dev_lock, flags);
2173 	size += sprintf(&buf[size], "Devices Present:\n");
2174 	list_for_each_entry_safe(dd, tmp, &online_list, online_list) {
2175 		if (dd->pdev) {
2176 			if (dd->port &&
2177 			    dd->port->identify &&
2178 			    dd->port->identify_valid) {
2179 				strlcpy(id_buf,
2180 					(char *) (dd->port->identify + 10), 21);
2181 				status = *(dd->port->identify + 141);
2182 			} else {
2183 				memset(id_buf, 0, 42);
2184 				status = 0;
2185 			}
2186 
2187 			if (dd->port &&
2188 			    test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2189 				size += sprintf(&buf[size],
2190 					" device %s %s (ftl rebuild %d %%)\n",
2191 					dev_name(&dd->pdev->dev),
2192 					id_buf,
2193 					status);
2194 			} else {
2195 				size += sprintf(&buf[size],
2196 					" device %s %s\n",
2197 					dev_name(&dd->pdev->dev),
2198 					id_buf);
2199 			}
2200 		}
2201 	}
2202 
2203 	size += sprintf(&buf[size], "Devices Being Removed:\n");
2204 	list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) {
2205 		if (dd->pdev) {
2206 			if (dd->port &&
2207 			    dd->port->identify &&
2208 			    dd->port->identify_valid) {
2209 				strlcpy(id_buf,
2210 					(char *) (dd->port->identify+10), 21);
2211 				status = *(dd->port->identify + 141);
2212 			} else {
2213 				memset(id_buf, 0, 42);
2214 				status = 0;
2215 			}
2216 
2217 			if (dd->port &&
2218 			    test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2219 				size += sprintf(&buf[size],
2220 					" device %s %s (ftl rebuild %d %%)\n",
2221 					dev_name(&dd->pdev->dev),
2222 					id_buf,
2223 					status);
2224 			} else {
2225 				size += sprintf(&buf[size],
2226 					" device %s %s\n",
2227 					dev_name(&dd->pdev->dev),
2228 					id_buf);
2229 			}
2230 		}
2231 	}
2232 	spin_unlock_irqrestore(&dev_lock, flags);
2233 
2234 	return size;
2235 }
2236 
2237 static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf,
2238 						size_t len, loff_t *offset)
2239 {
2240 	struct driver_data *dd =  (struct driver_data *)f->private_data;
2241 	int size = *offset;
2242 	char *buf;
2243 	int rv = 0;
2244 
2245 	if (!len || *offset)
2246 		return 0;
2247 
2248 	buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2249 	if (!buf) {
2250 		dev_err(&dd->pdev->dev,
2251 			"Memory allocation: status buffer\n");
2252 		return -ENOMEM;
2253 	}
2254 
2255 	size += show_device_status(NULL, buf);
2256 
2257 	*offset = size <= len ? size : len;
2258 	size = copy_to_user(ubuf, buf, *offset);
2259 	if (size)
2260 		rv = -EFAULT;
2261 
2262 	kfree(buf);
2263 	return rv ? rv : *offset;
2264 }
2265 
2266 static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf,
2267 				  size_t len, loff_t *offset)
2268 {
2269 	struct driver_data *dd =  (struct driver_data *)f->private_data;
2270 	char *buf;
2271 	u32 group_allocated;
2272 	int size = *offset;
2273 	int n, rv = 0;
2274 
2275 	if (!len || size)
2276 		return 0;
2277 
2278 	buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2279 	if (!buf) {
2280 		dev_err(&dd->pdev->dev,
2281 			"Memory allocation: register buffer\n");
2282 		return -ENOMEM;
2283 	}
2284 
2285 	size += sprintf(&buf[size], "H/ S ACTive      : [ 0x");
2286 
2287 	for (n = dd->slot_groups-1; n >= 0; n--)
2288 		size += sprintf(&buf[size], "%08X ",
2289 					 readl(dd->port->s_active[n]));
2290 
2291 	size += sprintf(&buf[size], "]\n");
2292 	size += sprintf(&buf[size], "H/ Command Issue : [ 0x");
2293 
2294 	for (n = dd->slot_groups-1; n >= 0; n--)
2295 		size += sprintf(&buf[size], "%08X ",
2296 					readl(dd->port->cmd_issue[n]));
2297 
2298 	size += sprintf(&buf[size], "]\n");
2299 	size += sprintf(&buf[size], "H/ Completed     : [ 0x");
2300 
2301 	for (n = dd->slot_groups-1; n >= 0; n--)
2302 		size += sprintf(&buf[size], "%08X ",
2303 				readl(dd->port->completed[n]));
2304 
2305 	size += sprintf(&buf[size], "]\n");
2306 	size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n",
2307 				readl(dd->port->mmio + PORT_IRQ_STAT));
2308 	size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n",
2309 				readl(dd->mmio + HOST_IRQ_STAT));
2310 	size += sprintf(&buf[size], "\n");
2311 
2312 	size += sprintf(&buf[size], "L/ Commands in Q : [ 0x");
2313 
2314 	for (n = dd->slot_groups-1; n >= 0; n--) {
2315 		if (sizeof(long) > sizeof(u32))
2316 			group_allocated =
2317 				dd->port->cmds_to_issue[n/2] >> (32*(n&1));
2318 		else
2319 			group_allocated = dd->port->cmds_to_issue[n];
2320 		size += sprintf(&buf[size], "%08X ", group_allocated);
2321 	}
2322 	size += sprintf(&buf[size], "]\n");
2323 
2324 	*offset = size <= len ? size : len;
2325 	size = copy_to_user(ubuf, buf, *offset);
2326 	if (size)
2327 		rv = -EFAULT;
2328 
2329 	kfree(buf);
2330 	return rv ? rv : *offset;
2331 }
2332 
2333 static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf,
2334 				  size_t len, loff_t *offset)
2335 {
2336 	struct driver_data *dd =  (struct driver_data *)f->private_data;
2337 	char *buf;
2338 	int size = *offset;
2339 	int rv = 0;
2340 
2341 	if (!len || size)
2342 		return 0;
2343 
2344 	buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2345 	if (!buf) {
2346 		dev_err(&dd->pdev->dev,
2347 			"Memory allocation: flag buffer\n");
2348 		return -ENOMEM;
2349 	}
2350 
2351 	size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n",
2352 							dd->port->flags);
2353 	size += sprintf(&buf[size], "Flag-dd   : [ %08lX ]\n",
2354 							dd->dd_flag);
2355 
2356 	*offset = size <= len ? size : len;
2357 	size = copy_to_user(ubuf, buf, *offset);
2358 	if (size)
2359 		rv = -EFAULT;
2360 
2361 	kfree(buf);
2362 	return rv ? rv : *offset;
2363 }
2364 
2365 static const struct file_operations mtip_device_status_fops = {
2366 	.owner  = THIS_MODULE,
2367 	.open   = simple_open,
2368 	.read   = mtip_hw_read_device_status,
2369 	.llseek = no_llseek,
2370 };
2371 
2372 static const struct file_operations mtip_regs_fops = {
2373 	.owner  = THIS_MODULE,
2374 	.open   = simple_open,
2375 	.read   = mtip_hw_read_registers,
2376 	.llseek = no_llseek,
2377 };
2378 
2379 static const struct file_operations mtip_flags_fops = {
2380 	.owner  = THIS_MODULE,
2381 	.open   = simple_open,
2382 	.read   = mtip_hw_read_flags,
2383 	.llseek = no_llseek,
2384 };
2385 
2386 /*
2387  * Create the sysfs related attributes.
2388  *
2389  * @dd   Pointer to the driver data structure.
2390  * @kobj Pointer to the kobj for the block device.
2391  *
2392  * return value
2393  *	0	Operation completed successfully.
2394  *	-EINVAL Invalid parameter.
2395  */
2396 static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj)
2397 {
2398 	if (!kobj || !dd)
2399 		return -EINVAL;
2400 
2401 	if (sysfs_create_file(kobj, &dev_attr_status.attr))
2402 		dev_warn(&dd->pdev->dev,
2403 			"Error creating 'status' sysfs entry\n");
2404 	return 0;
2405 }
2406 
2407 /*
2408  * Remove the sysfs related attributes.
2409  *
2410  * @dd   Pointer to the driver data structure.
2411  * @kobj Pointer to the kobj for the block device.
2412  *
2413  * return value
2414  *	0	Operation completed successfully.
2415  *	-EINVAL Invalid parameter.
2416  */
2417 static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj)
2418 {
2419 	if (!kobj || !dd)
2420 		return -EINVAL;
2421 
2422 	sysfs_remove_file(kobj, &dev_attr_status.attr);
2423 
2424 	return 0;
2425 }
2426 
2427 static int mtip_hw_debugfs_init(struct driver_data *dd)
2428 {
2429 	if (!dfs_parent)
2430 		return -1;
2431 
2432 	dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent);
2433 	if (IS_ERR_OR_NULL(dd->dfs_node)) {
2434 		dev_warn(&dd->pdev->dev,
2435 			"Error creating node %s under debugfs\n",
2436 						dd->disk->disk_name);
2437 		dd->dfs_node = NULL;
2438 		return -1;
2439 	}
2440 
2441 	debugfs_create_file("flags", 0444, dd->dfs_node, dd, &mtip_flags_fops);
2442 	debugfs_create_file("registers", 0444, dd->dfs_node, dd,
2443 			    &mtip_regs_fops);
2444 
2445 	return 0;
2446 }
2447 
2448 static void mtip_hw_debugfs_exit(struct driver_data *dd)
2449 {
2450 	debugfs_remove_recursive(dd->dfs_node);
2451 }
2452 
2453 /*
2454  * Perform any init/resume time hardware setup
2455  *
2456  * @dd Pointer to the driver data structure.
2457  *
2458  * return value
2459  *	None
2460  */
2461 static inline void hba_setup(struct driver_data *dd)
2462 {
2463 	u32 hwdata;
2464 	hwdata = readl(dd->mmio + HOST_HSORG);
2465 
2466 	/* interrupt bug workaround: use only 1 IS bit.*/
2467 	writel(hwdata |
2468 		HSORG_DISABLE_SLOTGRP_INTR |
2469 		HSORG_DISABLE_SLOTGRP_PXIS,
2470 		dd->mmio + HOST_HSORG);
2471 }
2472 
2473 static int mtip_device_unaligned_constrained(struct driver_data *dd)
2474 {
2475 	return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0);
2476 }
2477 
2478 /*
2479  * Detect the details of the product, and store anything needed
2480  * into the driver data structure.  This includes product type and
2481  * version and number of slot groups.
2482  *
2483  * @dd Pointer to the driver data structure.
2484  *
2485  * return value
2486  *	None
2487  */
2488 static void mtip_detect_product(struct driver_data *dd)
2489 {
2490 	u32 hwdata;
2491 	unsigned int rev, slotgroups;
2492 
2493 	/*
2494 	 * HBA base + 0xFC [15:0] - vendor-specific hardware interface
2495 	 * info register:
2496 	 * [15:8] hardware/software interface rev#
2497 	 * [   3] asic-style interface
2498 	 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style).
2499 	 */
2500 	hwdata = readl(dd->mmio + HOST_HSORG);
2501 
2502 	dd->product_type = MTIP_PRODUCT_UNKNOWN;
2503 	dd->slot_groups = 1;
2504 
2505 	if (hwdata & 0x8) {
2506 		dd->product_type = MTIP_PRODUCT_ASICFPGA;
2507 		rev = (hwdata & HSORG_HWREV) >> 8;
2508 		slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1;
2509 		dev_info(&dd->pdev->dev,
2510 			"ASIC-FPGA design, HS rev 0x%x, "
2511 			"%i slot groups [%i slots]\n",
2512 			 rev,
2513 			 slotgroups,
2514 			 slotgroups * 32);
2515 
2516 		if (slotgroups > MTIP_MAX_SLOT_GROUPS) {
2517 			dev_warn(&dd->pdev->dev,
2518 				"Warning: driver only supports "
2519 				"%i slot groups.\n", MTIP_MAX_SLOT_GROUPS);
2520 			slotgroups = MTIP_MAX_SLOT_GROUPS;
2521 		}
2522 		dd->slot_groups = slotgroups;
2523 		return;
2524 	}
2525 
2526 	dev_warn(&dd->pdev->dev, "Unrecognized product id\n");
2527 }
2528 
2529 /*
2530  * Blocking wait for FTL rebuild to complete
2531  *
2532  * @dd Pointer to the DRIVER_DATA structure.
2533  *
2534  * return value
2535  *	0	FTL rebuild completed successfully
2536  *	-EFAULT FTL rebuild error/timeout/interruption
2537  */
2538 static int mtip_ftl_rebuild_poll(struct driver_data *dd)
2539 {
2540 	unsigned long timeout, cnt = 0, start;
2541 
2542 	dev_warn(&dd->pdev->dev,
2543 		"FTL rebuild in progress. Polling for completion.\n");
2544 
2545 	start = jiffies;
2546 	timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS);
2547 
2548 	do {
2549 		if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2550 				&dd->dd_flag)))
2551 			return -EFAULT;
2552 		if (mtip_check_surprise_removal(dd->pdev))
2553 			return -EFAULT;
2554 
2555 		if (mtip_get_identify(dd->port, NULL) < 0)
2556 			return -EFAULT;
2557 
2558 		if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2559 			MTIP_FTL_REBUILD_MAGIC) {
2560 			ssleep(1);
2561 			/* Print message every 3 minutes */
2562 			if (cnt++ >= 180) {
2563 				dev_warn(&dd->pdev->dev,
2564 				"FTL rebuild in progress (%d secs).\n",
2565 				jiffies_to_msecs(jiffies - start) / 1000);
2566 				cnt = 0;
2567 			}
2568 		} else {
2569 			dev_warn(&dd->pdev->dev,
2570 				"FTL rebuild complete (%d secs).\n",
2571 			jiffies_to_msecs(jiffies - start) / 1000);
2572 			mtip_block_initialize(dd);
2573 			return 0;
2574 		}
2575 	} while (time_before(jiffies, timeout));
2576 
2577 	/* Check for timeout */
2578 	dev_err(&dd->pdev->dev,
2579 		"Timed out waiting for FTL rebuild to complete (%d secs).\n",
2580 		jiffies_to_msecs(jiffies - start) / 1000);
2581 	return -EFAULT;
2582 }
2583 
2584 static void mtip_softirq_done_fn(struct request *rq)
2585 {
2586 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
2587 	struct driver_data *dd = rq->q->queuedata;
2588 
2589 	/* Unmap the DMA scatter list entries */
2590 	dma_unmap_sg(&dd->pdev->dev, cmd->sg, cmd->scatter_ents,
2591 							cmd->direction);
2592 
2593 	if (unlikely(cmd->unaligned))
2594 		atomic_inc(&dd->port->cmd_slot_unal);
2595 
2596 	blk_mq_end_request(rq, cmd->status);
2597 }
2598 
2599 static bool mtip_abort_cmd(struct request *req, void *data, bool reserved)
2600 {
2601 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req);
2602 	struct driver_data *dd = data;
2603 
2604 	dbg_printk(MTIP_DRV_NAME " Aborting request, tag = %d\n", req->tag);
2605 
2606 	clear_bit(req->tag, dd->port->cmds_to_issue);
2607 	cmd->status = BLK_STS_IOERR;
2608 	mtip_softirq_done_fn(req);
2609 	return true;
2610 }
2611 
2612 static bool mtip_queue_cmd(struct request *req, void *data, bool reserved)
2613 {
2614 	struct driver_data *dd = data;
2615 
2616 	set_bit(req->tag, dd->port->cmds_to_issue);
2617 	blk_abort_request(req);
2618 	return true;
2619 }
2620 
2621 /*
2622  * service thread to issue queued commands
2623  *
2624  * @data Pointer to the driver data structure.
2625  *
2626  * return value
2627  *	0
2628  */
2629 
2630 static int mtip_service_thread(void *data)
2631 {
2632 	struct driver_data *dd = (struct driver_data *)data;
2633 	unsigned long slot, slot_start, slot_wrap, to;
2634 	unsigned int num_cmd_slots = dd->slot_groups * 32;
2635 	struct mtip_port *port = dd->port;
2636 
2637 	while (1) {
2638 		if (kthread_should_stop() ||
2639 			test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2640 			goto st_out;
2641 		clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2642 
2643 		/*
2644 		 * the condition is to check neither an internal command is
2645 		 * is in progress nor error handling is active
2646 		 */
2647 		wait_event_interruptible(port->svc_wait, (port->flags) &&
2648 			(port->flags & MTIP_PF_SVC_THD_WORK));
2649 
2650 		if (kthread_should_stop() ||
2651 			test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2652 			goto st_out;
2653 
2654 		if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2655 				&dd->dd_flag)))
2656 			goto st_out;
2657 
2658 		set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2659 
2660 restart_eh:
2661 		/* Demux bits: start with error handling */
2662 		if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) {
2663 			mtip_handle_tfe(dd);
2664 			clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
2665 		}
2666 
2667 		if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags))
2668 			goto restart_eh;
2669 
2670 		if (test_bit(MTIP_PF_TO_ACTIVE_BIT, &port->flags)) {
2671 			to = jiffies + msecs_to_jiffies(5000);
2672 
2673 			do {
2674 				mdelay(100);
2675 			} while (atomic_read(&dd->irq_workers_active) != 0 &&
2676 				time_before(jiffies, to));
2677 
2678 			if (atomic_read(&dd->irq_workers_active) != 0)
2679 				dev_warn(&dd->pdev->dev,
2680 					"Completion workers still active!");
2681 
2682 			blk_mq_quiesce_queue(dd->queue);
2683 
2684 			blk_mq_tagset_busy_iter(&dd->tags, mtip_queue_cmd, dd);
2685 
2686 			set_bit(MTIP_PF_ISSUE_CMDS_BIT, &dd->port->flags);
2687 
2688 			if (mtip_device_reset(dd))
2689 				blk_mq_tagset_busy_iter(&dd->tags,
2690 							mtip_abort_cmd, dd);
2691 
2692 			clear_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags);
2693 
2694 			blk_mq_unquiesce_queue(dd->queue);
2695 		}
2696 
2697 		if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
2698 			slot = 1;
2699 			/* used to restrict the loop to one iteration */
2700 			slot_start = num_cmd_slots;
2701 			slot_wrap = 0;
2702 			while (1) {
2703 				slot = find_next_bit(port->cmds_to_issue,
2704 						num_cmd_slots, slot);
2705 				if (slot_wrap == 1) {
2706 					if ((slot_start >= slot) ||
2707 						(slot >= num_cmd_slots))
2708 						break;
2709 				}
2710 				if (unlikely(slot_start == num_cmd_slots))
2711 					slot_start = slot;
2712 
2713 				if (unlikely(slot == num_cmd_slots)) {
2714 					slot = 1;
2715 					slot_wrap = 1;
2716 					continue;
2717 				}
2718 
2719 				/* Issue the command to the hardware */
2720 				mtip_issue_ncq_command(port, slot);
2721 
2722 				clear_bit(slot, port->cmds_to_issue);
2723 			}
2724 
2725 			clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2726 		}
2727 
2728 		if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) {
2729 			if (mtip_ftl_rebuild_poll(dd) == 0)
2730 				clear_bit(MTIP_PF_REBUILD_BIT, &port->flags);
2731 		}
2732 	}
2733 
2734 st_out:
2735 	return 0;
2736 }
2737 
2738 /*
2739  * DMA region teardown
2740  *
2741  * @dd Pointer to driver_data structure
2742  *
2743  * return value
2744  *      None
2745  */
2746 static void mtip_dma_free(struct driver_data *dd)
2747 {
2748 	struct mtip_port *port = dd->port;
2749 
2750 	if (port->block1)
2751 		dma_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
2752 					port->block1, port->block1_dma);
2753 
2754 	if (port->command_list) {
2755 		dma_free_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
2756 				port->command_list, port->command_list_dma);
2757 	}
2758 }
2759 
2760 /*
2761  * DMA region setup
2762  *
2763  * @dd Pointer to driver_data structure
2764  *
2765  * return value
2766  *      -ENOMEM Not enough free DMA region space to initialize driver
2767  */
2768 static int mtip_dma_alloc(struct driver_data *dd)
2769 {
2770 	struct mtip_port *port = dd->port;
2771 
2772 	/* Allocate dma memory for RX Fis, Identify, and Sector Bufffer */
2773 	port->block1 =
2774 		dma_alloc_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
2775 					&port->block1_dma, GFP_KERNEL);
2776 	if (!port->block1)
2777 		return -ENOMEM;
2778 
2779 	/* Allocate dma memory for command list */
2780 	port->command_list =
2781 		dma_alloc_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
2782 					&port->command_list_dma, GFP_KERNEL);
2783 	if (!port->command_list) {
2784 		dma_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
2785 					port->block1, port->block1_dma);
2786 		port->block1 = NULL;
2787 		port->block1_dma = 0;
2788 		return -ENOMEM;
2789 	}
2790 
2791 	/* Setup all pointers into first DMA region */
2792 	port->rxfis         = port->block1 + AHCI_RX_FIS_OFFSET;
2793 	port->rxfis_dma     = port->block1_dma + AHCI_RX_FIS_OFFSET;
2794 	port->identify      = port->block1 + AHCI_IDFY_OFFSET;
2795 	port->identify_dma  = port->block1_dma + AHCI_IDFY_OFFSET;
2796 	port->log_buf       = port->block1 + AHCI_SECTBUF_OFFSET;
2797 	port->log_buf_dma   = port->block1_dma + AHCI_SECTBUF_OFFSET;
2798 	port->smart_buf     = port->block1 + AHCI_SMARTBUF_OFFSET;
2799 	port->smart_buf_dma = port->block1_dma + AHCI_SMARTBUF_OFFSET;
2800 
2801 	return 0;
2802 }
2803 
2804 static int mtip_hw_get_identify(struct driver_data *dd)
2805 {
2806 	struct smart_attr attr242;
2807 	unsigned char *buf;
2808 	int rv;
2809 
2810 	if (mtip_get_identify(dd->port, NULL) < 0)
2811 		return -EFAULT;
2812 
2813 	if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2814 		MTIP_FTL_REBUILD_MAGIC) {
2815 		set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags);
2816 		return MTIP_FTL_REBUILD_MAGIC;
2817 	}
2818 	mtip_dump_identify(dd->port);
2819 
2820 	/* check write protect, over temp and rebuild statuses */
2821 	rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
2822 				dd->port->log_buf,
2823 				dd->port->log_buf_dma, 1);
2824 	if (rv) {
2825 		dev_warn(&dd->pdev->dev,
2826 			"Error in READ LOG EXT (10h) command\n");
2827 		/* non-critical error, don't fail the load */
2828 	} else {
2829 		buf = (unsigned char *)dd->port->log_buf;
2830 		if (buf[259] & 0x1) {
2831 			dev_info(&dd->pdev->dev,
2832 				"Write protect bit is set.\n");
2833 			set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
2834 		}
2835 		if (buf[288] == 0xF7) {
2836 			dev_info(&dd->pdev->dev,
2837 				"Exceeded Tmax, drive in thermal shutdown.\n");
2838 			set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
2839 		}
2840 		if (buf[288] == 0xBF) {
2841 			dev_info(&dd->pdev->dev,
2842 				"Drive indicates rebuild has failed.\n");
2843 			set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag);
2844 		}
2845 	}
2846 
2847 	/* get write protect progess */
2848 	memset(&attr242, 0, sizeof(struct smart_attr));
2849 	if (mtip_get_smart_attr(dd->port, 242, &attr242))
2850 		dev_warn(&dd->pdev->dev,
2851 				"Unable to check write protect progress\n");
2852 	else
2853 		dev_info(&dd->pdev->dev,
2854 				"Write protect progress: %u%% (%u blocks)\n",
2855 				attr242.cur, le32_to_cpu(attr242.data));
2856 
2857 	return rv;
2858 }
2859 
2860 /*
2861  * Called once for each card.
2862  *
2863  * @dd Pointer to the driver data structure.
2864  *
2865  * return value
2866  *	0 on success, else an error code.
2867  */
2868 static int mtip_hw_init(struct driver_data *dd)
2869 {
2870 	int i;
2871 	int rv;
2872 	unsigned long timeout, timetaken;
2873 
2874 	dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR];
2875 
2876 	mtip_detect_product(dd);
2877 	if (dd->product_type == MTIP_PRODUCT_UNKNOWN) {
2878 		rv = -EIO;
2879 		goto out1;
2880 	}
2881 
2882 	hba_setup(dd);
2883 
2884 	dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL,
2885 				dd->numa_node);
2886 	if (!dd->port) {
2887 		dev_err(&dd->pdev->dev,
2888 			"Memory allocation: port structure\n");
2889 		return -ENOMEM;
2890 	}
2891 
2892 	/* Continue workqueue setup */
2893 	for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
2894 		dd->work[i].port = dd->port;
2895 
2896 	/* Enable unaligned IO constraints for some devices */
2897 	if (mtip_device_unaligned_constrained(dd))
2898 		dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS;
2899 	else
2900 		dd->unal_qdepth = 0;
2901 
2902 	atomic_set(&dd->port->cmd_slot_unal, dd->unal_qdepth);
2903 
2904 	/* Spinlock to prevent concurrent issue */
2905 	for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
2906 		spin_lock_init(&dd->port->cmd_issue_lock[i]);
2907 
2908 	/* Set the port mmio base address. */
2909 	dd->port->mmio	= dd->mmio + PORT_OFFSET;
2910 	dd->port->dd	= dd;
2911 
2912 	/* DMA allocations */
2913 	rv = mtip_dma_alloc(dd);
2914 	if (rv < 0)
2915 		goto out1;
2916 
2917 	/* Setup the pointers to the extended s_active and CI registers. */
2918 	for (i = 0; i < dd->slot_groups; i++) {
2919 		dd->port->s_active[i] =
2920 			dd->port->mmio + i*0x80 + PORT_SCR_ACT;
2921 		dd->port->cmd_issue[i] =
2922 			dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE;
2923 		dd->port->completed[i] =
2924 			dd->port->mmio + i*0x80 + PORT_SDBV;
2925 	}
2926 
2927 	timetaken = jiffies;
2928 	timeout = jiffies + msecs_to_jiffies(30000);
2929 	while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
2930 		 time_before(jiffies, timeout)) {
2931 		mdelay(100);
2932 	}
2933 	if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
2934 		timetaken = jiffies - timetaken;
2935 		dev_warn(&dd->pdev->dev,
2936 			"Surprise removal detected at %u ms\n",
2937 			jiffies_to_msecs(timetaken));
2938 		rv = -ENODEV;
2939 		goto out2 ;
2940 	}
2941 	if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
2942 		timetaken = jiffies - timetaken;
2943 		dev_warn(&dd->pdev->dev,
2944 			"Removal detected at %u ms\n",
2945 			jiffies_to_msecs(timetaken));
2946 		rv = -EFAULT;
2947 		goto out2;
2948 	}
2949 
2950 	/* Conditionally reset the HBA. */
2951 	if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) {
2952 		if (mtip_hba_reset(dd) < 0) {
2953 			dev_err(&dd->pdev->dev,
2954 				"Card did not reset within timeout\n");
2955 			rv = -EIO;
2956 			goto out2;
2957 		}
2958 	} else {
2959 		/* Clear any pending interrupts on the HBA */
2960 		writel(readl(dd->mmio + HOST_IRQ_STAT),
2961 			dd->mmio + HOST_IRQ_STAT);
2962 	}
2963 
2964 	mtip_init_port(dd->port);
2965 	mtip_start_port(dd->port);
2966 
2967 	/* Setup the ISR and enable interrupts. */
2968 	rv = request_irq(dd->pdev->irq, mtip_irq_handler, IRQF_SHARED,
2969 			 dev_driver_string(&dd->pdev->dev), dd);
2970 	if (rv) {
2971 		dev_err(&dd->pdev->dev,
2972 			"Unable to allocate IRQ %d\n", dd->pdev->irq);
2973 		goto out2;
2974 	}
2975 	irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding));
2976 
2977 	/* Enable interrupts on the HBA. */
2978 	writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
2979 					dd->mmio + HOST_CTL);
2980 
2981 	init_waitqueue_head(&dd->port->svc_wait);
2982 
2983 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
2984 		rv = -EFAULT;
2985 		goto out3;
2986 	}
2987 
2988 	return rv;
2989 
2990 out3:
2991 	/* Disable interrupts on the HBA. */
2992 	writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
2993 			dd->mmio + HOST_CTL);
2994 
2995 	/* Release the IRQ. */
2996 	irq_set_affinity_hint(dd->pdev->irq, NULL);
2997 	free_irq(dd->pdev->irq, dd);
2998 
2999 out2:
3000 	mtip_deinit_port(dd->port);
3001 	mtip_dma_free(dd);
3002 
3003 out1:
3004 	/* Free the memory allocated for the for structure. */
3005 	kfree(dd->port);
3006 
3007 	return rv;
3008 }
3009 
3010 static int mtip_standby_drive(struct driver_data *dd)
3011 {
3012 	int rv = 0;
3013 
3014 	if (dd->sr || !dd->port)
3015 		return -ENODEV;
3016 	/*
3017 	 * Send standby immediate (E0h) to the drive so that it
3018 	 * saves its state.
3019 	 */
3020 	if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags) &&
3021 	    !test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag) &&
3022 	    !test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag)) {
3023 		rv = mtip_standby_immediate(dd->port);
3024 		if (rv)
3025 			dev_warn(&dd->pdev->dev,
3026 				"STANDBY IMMEDIATE failed\n");
3027 	}
3028 	return rv;
3029 }
3030 
3031 /*
3032  * Called to deinitialize an interface.
3033  *
3034  * @dd Pointer to the driver data structure.
3035  *
3036  * return value
3037  *	0
3038  */
3039 static int mtip_hw_exit(struct driver_data *dd)
3040 {
3041 	if (!dd->sr) {
3042 		/* de-initialize the port. */
3043 		mtip_deinit_port(dd->port);
3044 
3045 		/* Disable interrupts on the HBA. */
3046 		writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3047 				dd->mmio + HOST_CTL);
3048 	}
3049 
3050 	/* Release the IRQ. */
3051 	irq_set_affinity_hint(dd->pdev->irq, NULL);
3052 	free_irq(dd->pdev->irq, dd);
3053 	msleep(1000);
3054 
3055 	/* Free dma regions */
3056 	mtip_dma_free(dd);
3057 
3058 	/* Free the memory allocated for the for structure. */
3059 	kfree(dd->port);
3060 	dd->port = NULL;
3061 
3062 	return 0;
3063 }
3064 
3065 /*
3066  * Issue a Standby Immediate command to the device.
3067  *
3068  * This function is called by the Block Layer just before the
3069  * system powers off during a shutdown.
3070  *
3071  * @dd Pointer to the driver data structure.
3072  *
3073  * return value
3074  *	0
3075  */
3076 static int mtip_hw_shutdown(struct driver_data *dd)
3077 {
3078 	/*
3079 	 * Send standby immediate (E0h) to the drive so that it
3080 	 * saves its state.
3081 	 */
3082 	mtip_standby_drive(dd);
3083 
3084 	return 0;
3085 }
3086 
3087 /*
3088  * Suspend function
3089  *
3090  * This function is called by the Block Layer just before the
3091  * system hibernates.
3092  *
3093  * @dd Pointer to the driver data structure.
3094  *
3095  * return value
3096  *	0	Suspend was successful
3097  *	-EFAULT Suspend was not successful
3098  */
3099 static int mtip_hw_suspend(struct driver_data *dd)
3100 {
3101 	/*
3102 	 * Send standby immediate (E0h) to the drive
3103 	 * so that it saves its state.
3104 	 */
3105 	if (mtip_standby_drive(dd) != 0) {
3106 		dev_err(&dd->pdev->dev,
3107 			"Failed standby-immediate command\n");
3108 		return -EFAULT;
3109 	}
3110 
3111 	/* Disable interrupts on the HBA.*/
3112 	writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3113 			dd->mmio + HOST_CTL);
3114 	mtip_deinit_port(dd->port);
3115 
3116 	return 0;
3117 }
3118 
3119 /*
3120  * Resume function
3121  *
3122  * This function is called by the Block Layer as the
3123  * system resumes.
3124  *
3125  * @dd Pointer to the driver data structure.
3126  *
3127  * return value
3128  *	0	Resume was successful
3129  *      -EFAULT Resume was not successful
3130  */
3131 static int mtip_hw_resume(struct driver_data *dd)
3132 {
3133 	/* Perform any needed hardware setup steps */
3134 	hba_setup(dd);
3135 
3136 	/* Reset the HBA */
3137 	if (mtip_hba_reset(dd) != 0) {
3138 		dev_err(&dd->pdev->dev,
3139 			"Unable to reset the HBA\n");
3140 		return -EFAULT;
3141 	}
3142 
3143 	/*
3144 	 * Enable the port, DMA engine, and FIS reception specific
3145 	 * h/w in controller.
3146 	 */
3147 	mtip_init_port(dd->port);
3148 	mtip_start_port(dd->port);
3149 
3150 	/* Enable interrupts on the HBA.*/
3151 	writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3152 			dd->mmio + HOST_CTL);
3153 
3154 	return 0;
3155 }
3156 
3157 /*
3158  * Helper function for reusing disk name
3159  * upon hot insertion.
3160  */
3161 static int rssd_disk_name_format(char *prefix,
3162 				 int index,
3163 				 char *buf,
3164 				 int buflen)
3165 {
3166 	const int base = 'z' - 'a' + 1;
3167 	char *begin = buf + strlen(prefix);
3168 	char *end = buf + buflen;
3169 	char *p;
3170 	int unit;
3171 
3172 	p = end - 1;
3173 	*p = '\0';
3174 	unit = base;
3175 	do {
3176 		if (p == begin)
3177 			return -EINVAL;
3178 		*--p = 'a' + (index % unit);
3179 		index = (index / unit) - 1;
3180 	} while (index >= 0);
3181 
3182 	memmove(begin, p, end - p);
3183 	memcpy(buf, prefix, strlen(prefix));
3184 
3185 	return 0;
3186 }
3187 
3188 /*
3189  * Block layer IOCTL handler.
3190  *
3191  * @dev Pointer to the block_device structure.
3192  * @mode ignored
3193  * @cmd IOCTL command passed from the user application.
3194  * @arg Argument passed from the user application.
3195  *
3196  * return value
3197  *	0        IOCTL completed successfully.
3198  *	-ENOTTY  IOCTL not supported or invalid driver data
3199  *                 structure pointer.
3200  */
3201 static int mtip_block_ioctl(struct block_device *dev,
3202 			    fmode_t mode,
3203 			    unsigned cmd,
3204 			    unsigned long arg)
3205 {
3206 	struct driver_data *dd = dev->bd_disk->private_data;
3207 
3208 	if (!capable(CAP_SYS_ADMIN))
3209 		return -EACCES;
3210 
3211 	if (!dd)
3212 		return -ENOTTY;
3213 
3214 	if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3215 		return -ENOTTY;
3216 
3217 	switch (cmd) {
3218 	case BLKFLSBUF:
3219 		return -ENOTTY;
3220 	default:
3221 		return mtip_hw_ioctl(dd, cmd, arg);
3222 	}
3223 }
3224 
3225 #ifdef CONFIG_COMPAT
3226 /*
3227  * Block layer compat IOCTL handler.
3228  *
3229  * @dev Pointer to the block_device structure.
3230  * @mode ignored
3231  * @cmd IOCTL command passed from the user application.
3232  * @arg Argument passed from the user application.
3233  *
3234  * return value
3235  *	0        IOCTL completed successfully.
3236  *	-ENOTTY  IOCTL not supported or invalid driver data
3237  *                 structure pointer.
3238  */
3239 static int mtip_block_compat_ioctl(struct block_device *dev,
3240 			    fmode_t mode,
3241 			    unsigned cmd,
3242 			    unsigned long arg)
3243 {
3244 	struct driver_data *dd = dev->bd_disk->private_data;
3245 
3246 	if (!capable(CAP_SYS_ADMIN))
3247 		return -EACCES;
3248 
3249 	if (!dd)
3250 		return -ENOTTY;
3251 
3252 	if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3253 		return -ENOTTY;
3254 
3255 	switch (cmd) {
3256 	case BLKFLSBUF:
3257 		return -ENOTTY;
3258 	case HDIO_DRIVE_TASKFILE: {
3259 		struct mtip_compat_ide_task_request_s __user *compat_req_task;
3260 		ide_task_request_t req_task;
3261 		int compat_tasksize, outtotal, ret;
3262 
3263 		compat_tasksize =
3264 			sizeof(struct mtip_compat_ide_task_request_s);
3265 
3266 		compat_req_task =
3267 			(struct mtip_compat_ide_task_request_s __user *) arg;
3268 
3269 		if (copy_from_user(&req_task, (void __user *) arg,
3270 			compat_tasksize - (2 * sizeof(compat_long_t))))
3271 			return -EFAULT;
3272 
3273 		if (get_user(req_task.out_size, &compat_req_task->out_size))
3274 			return -EFAULT;
3275 
3276 		if (get_user(req_task.in_size, &compat_req_task->in_size))
3277 			return -EFAULT;
3278 
3279 		outtotal = sizeof(struct mtip_compat_ide_task_request_s);
3280 
3281 		ret = exec_drive_taskfile(dd, (void __user *) arg,
3282 						&req_task, outtotal);
3283 
3284 		if (copy_to_user((void __user *) arg, &req_task,
3285 				compat_tasksize -
3286 				(2 * sizeof(compat_long_t))))
3287 			return -EFAULT;
3288 
3289 		if (put_user(req_task.out_size, &compat_req_task->out_size))
3290 			return -EFAULT;
3291 
3292 		if (put_user(req_task.in_size, &compat_req_task->in_size))
3293 			return -EFAULT;
3294 
3295 		return ret;
3296 	}
3297 	default:
3298 		return mtip_hw_ioctl(dd, cmd, arg);
3299 	}
3300 }
3301 #endif
3302 
3303 /*
3304  * Obtain the geometry of the device.
3305  *
3306  * You may think that this function is obsolete, but some applications,
3307  * fdisk for example still used CHS values. This function describes the
3308  * device as having 224 heads and 56 sectors per cylinder. These values are
3309  * chosen so that each cylinder is aligned on a 4KB boundary. Since a
3310  * partition is described in terms of a start and end cylinder this means
3311  * that each partition is also 4KB aligned. Non-aligned partitions adversely
3312  * affects performance.
3313  *
3314  * @dev Pointer to the block_device strucutre.
3315  * @geo Pointer to a hd_geometry structure.
3316  *
3317  * return value
3318  *	0       Operation completed successfully.
3319  *	-ENOTTY An error occurred while reading the drive capacity.
3320  */
3321 static int mtip_block_getgeo(struct block_device *dev,
3322 				struct hd_geometry *geo)
3323 {
3324 	struct driver_data *dd = dev->bd_disk->private_data;
3325 	sector_t capacity;
3326 
3327 	if (!dd)
3328 		return -ENOTTY;
3329 
3330 	if (!(mtip_hw_get_capacity(dd, &capacity))) {
3331 		dev_warn(&dd->pdev->dev,
3332 			"Could not get drive capacity.\n");
3333 		return -ENOTTY;
3334 	}
3335 
3336 	geo->heads = 224;
3337 	geo->sectors = 56;
3338 	sector_div(capacity, (geo->heads * geo->sectors));
3339 	geo->cylinders = capacity;
3340 	return 0;
3341 }
3342 
3343 static int mtip_block_open(struct block_device *dev, fmode_t mode)
3344 {
3345 	struct driver_data *dd;
3346 
3347 	if (dev && dev->bd_disk) {
3348 		dd = (struct driver_data *) dev->bd_disk->private_data;
3349 
3350 		if (dd) {
3351 			if (test_bit(MTIP_DDF_REMOVAL_BIT,
3352 							&dd->dd_flag)) {
3353 				return -ENODEV;
3354 			}
3355 			return 0;
3356 		}
3357 	}
3358 	return -ENODEV;
3359 }
3360 
3361 static void mtip_block_release(struct gendisk *disk, fmode_t mode)
3362 {
3363 }
3364 
3365 /*
3366  * Block device operation function.
3367  *
3368  * This structure contains pointers to the functions required by the block
3369  * layer.
3370  */
3371 static const struct block_device_operations mtip_block_ops = {
3372 	.open		= mtip_block_open,
3373 	.release	= mtip_block_release,
3374 	.ioctl		= mtip_block_ioctl,
3375 #ifdef CONFIG_COMPAT
3376 	.compat_ioctl	= mtip_block_compat_ioctl,
3377 #endif
3378 	.getgeo		= mtip_block_getgeo,
3379 	.owner		= THIS_MODULE
3380 };
3381 
3382 static inline bool is_se_active(struct driver_data *dd)
3383 {
3384 	if (unlikely(test_bit(MTIP_PF_SE_ACTIVE_BIT, &dd->port->flags))) {
3385 		if (dd->port->ic_pause_timer) {
3386 			unsigned long to = dd->port->ic_pause_timer +
3387 							msecs_to_jiffies(1000);
3388 			if (time_after(jiffies, to)) {
3389 				clear_bit(MTIP_PF_SE_ACTIVE_BIT,
3390 							&dd->port->flags);
3391 				clear_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag);
3392 				dd->port->ic_pause_timer = 0;
3393 				wake_up_interruptible(&dd->port->svc_wait);
3394 				return false;
3395 			}
3396 		}
3397 		return true;
3398 	}
3399 	return false;
3400 }
3401 
3402 static inline bool is_stopped(struct driver_data *dd, struct request *rq)
3403 {
3404 	if (likely(!(dd->dd_flag & MTIP_DDF_STOP_IO)))
3405 		return false;
3406 
3407 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
3408 		return true;
3409 	if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
3410 		return true;
3411 	if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag) &&
3412 	    rq_data_dir(rq))
3413 		return true;
3414 	if (test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag))
3415 		return true;
3416 	if (test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag))
3417 		return true;
3418 
3419 	return false;
3420 }
3421 
3422 static bool mtip_check_unal_depth(struct blk_mq_hw_ctx *hctx,
3423 				  struct request *rq)
3424 {
3425 	struct driver_data *dd = hctx->queue->queuedata;
3426 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3427 
3428 	if (rq_data_dir(rq) == READ || !dd->unal_qdepth)
3429 		return false;
3430 
3431 	/*
3432 	 * If unaligned depth must be limited on this controller, mark it
3433 	 * as unaligned if the IO isn't on a 4k boundary (start of length).
3434 	 */
3435 	if (blk_rq_sectors(rq) <= 64) {
3436 		if ((blk_rq_pos(rq) & 7) || (blk_rq_sectors(rq) & 7))
3437 			cmd->unaligned = 1;
3438 	}
3439 
3440 	if (cmd->unaligned && atomic_dec_if_positive(&dd->port->cmd_slot_unal) >= 0)
3441 		return true;
3442 
3443 	return false;
3444 }
3445 
3446 static blk_status_t mtip_issue_reserved_cmd(struct blk_mq_hw_ctx *hctx,
3447 		struct request *rq)
3448 {
3449 	struct driver_data *dd = hctx->queue->queuedata;
3450 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3451 	struct mtip_int_cmd *icmd = cmd->icmd;
3452 	struct mtip_cmd_hdr *hdr =
3453 		dd->port->command_list + sizeof(struct mtip_cmd_hdr) * rq->tag;
3454 	struct mtip_cmd_sg *command_sg;
3455 
3456 	if (mtip_commands_active(dd->port))
3457 		return BLK_STS_DEV_RESOURCE;
3458 
3459 	hdr->ctba = cpu_to_le32(cmd->command_dma & 0xFFFFFFFF);
3460 	if (test_bit(MTIP_PF_HOST_CAP_64, &dd->port->flags))
3461 		hdr->ctbau = cpu_to_le32((cmd->command_dma >> 16) >> 16);
3462 	/* Populate the SG list */
3463 	hdr->opts = cpu_to_le32(icmd->opts | icmd->fis_len);
3464 	if (icmd->buf_len) {
3465 		command_sg = cmd->command + AHCI_CMD_TBL_HDR_SZ;
3466 
3467 		command_sg->info = cpu_to_le32((icmd->buf_len-1) & 0x3FFFFF);
3468 		command_sg->dba	= cpu_to_le32(icmd->buffer & 0xFFFFFFFF);
3469 		command_sg->dba_upper =
3470 			cpu_to_le32((icmd->buffer >> 16) >> 16);
3471 
3472 		hdr->opts |= cpu_to_le32((1 << 16));
3473 	}
3474 
3475 	/* Populate the command header */
3476 	hdr->byte_count = 0;
3477 
3478 	blk_mq_start_request(rq);
3479 	mtip_issue_non_ncq_command(dd->port, rq->tag);
3480 	return 0;
3481 }
3482 
3483 static blk_status_t mtip_queue_rq(struct blk_mq_hw_ctx *hctx,
3484 			 const struct blk_mq_queue_data *bd)
3485 {
3486 	struct driver_data *dd = hctx->queue->queuedata;
3487 	struct request *rq = bd->rq;
3488 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3489 
3490 	if (blk_rq_is_passthrough(rq))
3491 		return mtip_issue_reserved_cmd(hctx, rq);
3492 
3493 	if (unlikely(mtip_check_unal_depth(hctx, rq)))
3494 		return BLK_STS_DEV_RESOURCE;
3495 
3496 	if (is_se_active(dd) || is_stopped(dd, rq))
3497 		return BLK_STS_IOERR;
3498 
3499 	blk_mq_start_request(rq);
3500 
3501 	mtip_hw_submit_io(dd, rq, cmd, hctx);
3502 	return BLK_STS_OK;
3503 }
3504 
3505 static void mtip_free_cmd(struct blk_mq_tag_set *set, struct request *rq,
3506 			  unsigned int hctx_idx)
3507 {
3508 	struct driver_data *dd = set->driver_data;
3509 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3510 
3511 	if (!cmd->command)
3512 		return;
3513 
3514 	dma_free_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ, cmd->command,
3515 			  cmd->command_dma);
3516 }
3517 
3518 static int mtip_init_cmd(struct blk_mq_tag_set *set, struct request *rq,
3519 			 unsigned int hctx_idx, unsigned int numa_node)
3520 {
3521 	struct driver_data *dd = set->driver_data;
3522 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3523 
3524 	cmd->command = dma_alloc_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
3525 			&cmd->command_dma, GFP_KERNEL);
3526 	if (!cmd->command)
3527 		return -ENOMEM;
3528 
3529 	sg_init_table(cmd->sg, MTIP_MAX_SG);
3530 	return 0;
3531 }
3532 
3533 static enum blk_eh_timer_return mtip_cmd_timeout(struct request *req,
3534 								bool reserved)
3535 {
3536 	struct driver_data *dd = req->q->queuedata;
3537 
3538 	if (reserved) {
3539 		struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req);
3540 
3541 		cmd->status = BLK_STS_TIMEOUT;
3542 		blk_mq_complete_request(req);
3543 		return BLK_EH_DONE;
3544 	}
3545 
3546 	if (test_bit(req->tag, dd->port->cmds_to_issue))
3547 		goto exit_handler;
3548 
3549 	if (test_and_set_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags))
3550 		goto exit_handler;
3551 
3552 	wake_up_interruptible(&dd->port->svc_wait);
3553 exit_handler:
3554 	return BLK_EH_RESET_TIMER;
3555 }
3556 
3557 static const struct blk_mq_ops mtip_mq_ops = {
3558 	.queue_rq	= mtip_queue_rq,
3559 	.init_request	= mtip_init_cmd,
3560 	.exit_request	= mtip_free_cmd,
3561 	.complete	= mtip_softirq_done_fn,
3562 	.timeout        = mtip_cmd_timeout,
3563 };
3564 
3565 /*
3566  * Block layer initialization function.
3567  *
3568  * This function is called once by the PCI layer for each P320
3569  * device that is connected to the system.
3570  *
3571  * @dd Pointer to the driver data structure.
3572  *
3573  * return value
3574  *	0 on success else an error code.
3575  */
3576 static int mtip_block_initialize(struct driver_data *dd)
3577 {
3578 	int rv = 0, wait_for_rebuild = 0;
3579 	sector_t capacity;
3580 	unsigned int index = 0;
3581 	struct kobject *kobj;
3582 
3583 	if (dd->disk)
3584 		goto skip_create_disk; /* hw init done, before rebuild */
3585 
3586 	if (mtip_hw_init(dd)) {
3587 		rv = -EINVAL;
3588 		goto protocol_init_error;
3589 	}
3590 
3591 	dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node);
3592 	if (dd->disk  == NULL) {
3593 		dev_err(&dd->pdev->dev,
3594 			"Unable to allocate gendisk structure\n");
3595 		rv = -EINVAL;
3596 		goto alloc_disk_error;
3597 	}
3598 
3599 	rv = ida_alloc(&rssd_index_ida, GFP_KERNEL);
3600 	if (rv < 0)
3601 		goto ida_get_error;
3602 	index = rv;
3603 
3604 	rv = rssd_disk_name_format("rssd",
3605 				index,
3606 				dd->disk->disk_name,
3607 				DISK_NAME_LEN);
3608 	if (rv)
3609 		goto disk_index_error;
3610 
3611 	dd->disk->major		= dd->major;
3612 	dd->disk->first_minor	= index * MTIP_MAX_MINORS;
3613 	dd->disk->minors 	= MTIP_MAX_MINORS;
3614 	dd->disk->fops		= &mtip_block_ops;
3615 	dd->disk->private_data	= dd;
3616 	dd->index		= index;
3617 
3618 	mtip_hw_debugfs_init(dd);
3619 
3620 	memset(&dd->tags, 0, sizeof(dd->tags));
3621 	dd->tags.ops = &mtip_mq_ops;
3622 	dd->tags.nr_hw_queues = 1;
3623 	dd->tags.queue_depth = MTIP_MAX_COMMAND_SLOTS;
3624 	dd->tags.reserved_tags = 1;
3625 	dd->tags.cmd_size = sizeof(struct mtip_cmd);
3626 	dd->tags.numa_node = dd->numa_node;
3627 	dd->tags.flags = BLK_MQ_F_SHOULD_MERGE;
3628 	dd->tags.driver_data = dd;
3629 	dd->tags.timeout = MTIP_NCQ_CMD_TIMEOUT_MS;
3630 
3631 	rv = blk_mq_alloc_tag_set(&dd->tags);
3632 	if (rv) {
3633 		dev_err(&dd->pdev->dev,
3634 			"Unable to allocate request queue\n");
3635 		goto block_queue_alloc_tag_error;
3636 	}
3637 
3638 	/* Allocate the request queue. */
3639 	dd->queue = blk_mq_init_queue(&dd->tags);
3640 	if (IS_ERR(dd->queue)) {
3641 		dev_err(&dd->pdev->dev,
3642 			"Unable to allocate request queue\n");
3643 		rv = -ENOMEM;
3644 		goto block_queue_alloc_init_error;
3645 	}
3646 
3647 	dd->disk->queue		= dd->queue;
3648 	dd->queue->queuedata	= dd;
3649 
3650 skip_create_disk:
3651 	/* Initialize the protocol layer. */
3652 	wait_for_rebuild = mtip_hw_get_identify(dd);
3653 	if (wait_for_rebuild < 0) {
3654 		dev_err(&dd->pdev->dev,
3655 			"Protocol layer initialization failed\n");
3656 		rv = -EINVAL;
3657 		goto init_hw_cmds_error;
3658 	}
3659 
3660 	/*
3661 	 * if rebuild pending, start the service thread, and delay the block
3662 	 * queue creation and device_add_disk()
3663 	 */
3664 	if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3665 		goto start_service_thread;
3666 
3667 	/* Set device limits. */
3668 	blk_queue_flag_set(QUEUE_FLAG_NONROT, dd->queue);
3669 	blk_queue_flag_clear(QUEUE_FLAG_ADD_RANDOM, dd->queue);
3670 	blk_queue_max_segments(dd->queue, MTIP_MAX_SG);
3671 	blk_queue_physical_block_size(dd->queue, 4096);
3672 	blk_queue_max_hw_sectors(dd->queue, 0xffff);
3673 	blk_queue_max_segment_size(dd->queue, 0x400000);
3674 	dma_set_max_seg_size(&dd->pdev->dev, 0x400000);
3675 	blk_queue_io_min(dd->queue, 4096);
3676 
3677 	/* Set the capacity of the device in 512 byte sectors. */
3678 	if (!(mtip_hw_get_capacity(dd, &capacity))) {
3679 		dev_warn(&dd->pdev->dev,
3680 			"Could not read drive capacity\n");
3681 		rv = -EIO;
3682 		goto read_capacity_error;
3683 	}
3684 	set_capacity(dd->disk, capacity);
3685 
3686 	/* Enable the block device and add it to /dev */
3687 	device_add_disk(&dd->pdev->dev, dd->disk, NULL);
3688 
3689 	dd->bdev = bdget_disk(dd->disk, 0);
3690 	/*
3691 	 * Now that the disk is active, initialize any sysfs attributes
3692 	 * managed by the protocol layer.
3693 	 */
3694 	kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3695 	if (kobj) {
3696 		mtip_hw_sysfs_init(dd, kobj);
3697 		kobject_put(kobj);
3698 	}
3699 
3700 	if (dd->mtip_svc_handler) {
3701 		set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
3702 		return rv; /* service thread created for handling rebuild */
3703 	}
3704 
3705 start_service_thread:
3706 	dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread,
3707 						dd, dd->numa_node,
3708 						"mtip_svc_thd_%02d", index);
3709 
3710 	if (IS_ERR(dd->mtip_svc_handler)) {
3711 		dev_err(&dd->pdev->dev, "service thread failed to start\n");
3712 		dd->mtip_svc_handler = NULL;
3713 		rv = -EFAULT;
3714 		goto kthread_run_error;
3715 	}
3716 	wake_up_process(dd->mtip_svc_handler);
3717 	if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3718 		rv = wait_for_rebuild;
3719 
3720 	return rv;
3721 
3722 kthread_run_error:
3723 	bdput(dd->bdev);
3724 	dd->bdev = NULL;
3725 
3726 	/* Delete our gendisk. This also removes the device from /dev */
3727 	del_gendisk(dd->disk);
3728 
3729 read_capacity_error:
3730 init_hw_cmds_error:
3731 	blk_cleanup_queue(dd->queue);
3732 block_queue_alloc_init_error:
3733 	blk_mq_free_tag_set(&dd->tags);
3734 block_queue_alloc_tag_error:
3735 	mtip_hw_debugfs_exit(dd);
3736 disk_index_error:
3737 	ida_free(&rssd_index_ida, index);
3738 
3739 ida_get_error:
3740 	put_disk(dd->disk);
3741 
3742 alloc_disk_error:
3743 	mtip_hw_exit(dd); /* De-initialize the protocol layer. */
3744 
3745 protocol_init_error:
3746 	return rv;
3747 }
3748 
3749 static bool mtip_no_dev_cleanup(struct request *rq, void *data, bool reserv)
3750 {
3751 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3752 
3753 	cmd->status = BLK_STS_IOERR;
3754 	blk_mq_complete_request(rq);
3755 	return true;
3756 }
3757 
3758 /*
3759  * Block layer deinitialization function.
3760  *
3761  * Called by the PCI layer as each P320 device is removed.
3762  *
3763  * @dd Pointer to the driver data structure.
3764  *
3765  * return value
3766  *	0
3767  */
3768 static int mtip_block_remove(struct driver_data *dd)
3769 {
3770 	struct kobject *kobj;
3771 
3772 	mtip_hw_debugfs_exit(dd);
3773 
3774 	if (dd->mtip_svc_handler) {
3775 		set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags);
3776 		wake_up_interruptible(&dd->port->svc_wait);
3777 		kthread_stop(dd->mtip_svc_handler);
3778 	}
3779 
3780 	/* Clean up the sysfs attributes, if created */
3781 	if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) {
3782 		kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3783 		if (kobj) {
3784 			mtip_hw_sysfs_exit(dd, kobj);
3785 			kobject_put(kobj);
3786 		}
3787 	}
3788 
3789 	if (!dd->sr) {
3790 		/*
3791 		 * Explicitly wait here for IOs to quiesce,
3792 		 * as mtip_standby_drive usually won't wait for IOs.
3793 		 */
3794 		if (!mtip_quiesce_io(dd->port, MTIP_QUIESCE_IO_TIMEOUT_MS))
3795 			mtip_standby_drive(dd);
3796 	}
3797 	else
3798 		dev_info(&dd->pdev->dev, "device %s surprise removal\n",
3799 						dd->disk->disk_name);
3800 
3801 	blk_freeze_queue_start(dd->queue);
3802 	blk_mq_quiesce_queue(dd->queue);
3803 	blk_mq_tagset_busy_iter(&dd->tags, mtip_no_dev_cleanup, dd);
3804 	blk_mq_unquiesce_queue(dd->queue);
3805 
3806 	/*
3807 	 * Delete our gendisk structure. This also removes the device
3808 	 * from /dev
3809 	 */
3810 	if (dd->bdev) {
3811 		bdput(dd->bdev);
3812 		dd->bdev = NULL;
3813 	}
3814 	if (dd->disk) {
3815 		if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag))
3816 			del_gendisk(dd->disk);
3817 		if (dd->disk->queue) {
3818 			blk_cleanup_queue(dd->queue);
3819 			blk_mq_free_tag_set(&dd->tags);
3820 			dd->queue = NULL;
3821 		}
3822 		put_disk(dd->disk);
3823 	}
3824 	dd->disk  = NULL;
3825 
3826 	ida_free(&rssd_index_ida, dd->index);
3827 
3828 	/* De-initialize the protocol layer. */
3829 	mtip_hw_exit(dd);
3830 
3831 	return 0;
3832 }
3833 
3834 /*
3835  * Function called by the PCI layer when just before the
3836  * machine shuts down.
3837  *
3838  * If a protocol layer shutdown function is present it will be called
3839  * by this function.
3840  *
3841  * @dd Pointer to the driver data structure.
3842  *
3843  * return value
3844  *	0
3845  */
3846 static int mtip_block_shutdown(struct driver_data *dd)
3847 {
3848 	mtip_hw_shutdown(dd);
3849 
3850 	/* Delete our gendisk structure, and cleanup the blk queue. */
3851 	if (dd->disk) {
3852 		dev_info(&dd->pdev->dev,
3853 			"Shutting down %s ...\n", dd->disk->disk_name);
3854 
3855 		if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag))
3856 			del_gendisk(dd->disk);
3857 		if (dd->disk->queue) {
3858 			blk_cleanup_queue(dd->queue);
3859 			blk_mq_free_tag_set(&dd->tags);
3860 		}
3861 		put_disk(dd->disk);
3862 		dd->disk  = NULL;
3863 		dd->queue = NULL;
3864 	}
3865 
3866 	ida_free(&rssd_index_ida, dd->index);
3867 	return 0;
3868 }
3869 
3870 static int mtip_block_suspend(struct driver_data *dd)
3871 {
3872 	dev_info(&dd->pdev->dev,
3873 		"Suspending %s ...\n", dd->disk->disk_name);
3874 	mtip_hw_suspend(dd);
3875 	return 0;
3876 }
3877 
3878 static int mtip_block_resume(struct driver_data *dd)
3879 {
3880 	dev_info(&dd->pdev->dev, "Resuming %s ...\n",
3881 		dd->disk->disk_name);
3882 	mtip_hw_resume(dd);
3883 	return 0;
3884 }
3885 
3886 static void drop_cpu(int cpu)
3887 {
3888 	cpu_use[cpu]--;
3889 }
3890 
3891 static int get_least_used_cpu_on_node(int node)
3892 {
3893 	int cpu, least_used_cpu, least_cnt;
3894 	const struct cpumask *node_mask;
3895 
3896 	node_mask = cpumask_of_node(node);
3897 	least_used_cpu = cpumask_first(node_mask);
3898 	least_cnt = cpu_use[least_used_cpu];
3899 	cpu = least_used_cpu;
3900 
3901 	for_each_cpu(cpu, node_mask) {
3902 		if (cpu_use[cpu] < least_cnt) {
3903 			least_used_cpu = cpu;
3904 			least_cnt = cpu_use[cpu];
3905 		}
3906 	}
3907 	cpu_use[least_used_cpu]++;
3908 	return least_used_cpu;
3909 }
3910 
3911 /* Helper for selecting a node in round robin mode */
3912 static inline int mtip_get_next_rr_node(void)
3913 {
3914 	static int next_node = NUMA_NO_NODE;
3915 
3916 	if (next_node == NUMA_NO_NODE) {
3917 		next_node = first_online_node;
3918 		return next_node;
3919 	}
3920 
3921 	next_node = next_online_node(next_node);
3922 	if (next_node == MAX_NUMNODES)
3923 		next_node = first_online_node;
3924 	return next_node;
3925 }
3926 
3927 static DEFINE_HANDLER(0);
3928 static DEFINE_HANDLER(1);
3929 static DEFINE_HANDLER(2);
3930 static DEFINE_HANDLER(3);
3931 static DEFINE_HANDLER(4);
3932 static DEFINE_HANDLER(5);
3933 static DEFINE_HANDLER(6);
3934 static DEFINE_HANDLER(7);
3935 
3936 static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev)
3937 {
3938 	int pos;
3939 	unsigned short pcie_dev_ctrl;
3940 
3941 	pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
3942 	if (pos) {
3943 		pci_read_config_word(pdev,
3944 			pos + PCI_EXP_DEVCTL,
3945 			&pcie_dev_ctrl);
3946 		if (pcie_dev_ctrl & (1 << 11) ||
3947 		    pcie_dev_ctrl & (1 << 4)) {
3948 			dev_info(&dd->pdev->dev,
3949 				"Disabling ERO/No-Snoop on bridge device %04x:%04x\n",
3950 					pdev->vendor, pdev->device);
3951 			pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN |
3952 						PCI_EXP_DEVCTL_RELAX_EN);
3953 			pci_write_config_word(pdev,
3954 				pos + PCI_EXP_DEVCTL,
3955 				pcie_dev_ctrl);
3956 		}
3957 	}
3958 }
3959 
3960 static void mtip_fix_ero_nosnoop(struct driver_data *dd, struct pci_dev *pdev)
3961 {
3962 	/*
3963 	 * This workaround is specific to AMD/ATI chipset with a PCI upstream
3964 	 * device with device id 0x5aXX
3965 	 */
3966 	if (pdev->bus && pdev->bus->self) {
3967 		if (pdev->bus->self->vendor == PCI_VENDOR_ID_ATI &&
3968 		    ((pdev->bus->self->device & 0xff00) == 0x5a00)) {
3969 			mtip_disable_link_opts(dd, pdev->bus->self);
3970 		} else {
3971 			/* Check further up the topology */
3972 			struct pci_dev *parent_dev = pdev->bus->self;
3973 			if (parent_dev->bus &&
3974 				parent_dev->bus->parent &&
3975 				parent_dev->bus->parent->self &&
3976 				parent_dev->bus->parent->self->vendor ==
3977 					 PCI_VENDOR_ID_ATI &&
3978 				(parent_dev->bus->parent->self->device &
3979 					0xff00) == 0x5a00) {
3980 				mtip_disable_link_opts(dd,
3981 					parent_dev->bus->parent->self);
3982 			}
3983 		}
3984 	}
3985 }
3986 
3987 /*
3988  * Called for each supported PCI device detected.
3989  *
3990  * This function allocates the private data structure, enables the
3991  * PCI device and then calls the block layer initialization function.
3992  *
3993  * return value
3994  *	0 on success else an error code.
3995  */
3996 static int mtip_pci_probe(struct pci_dev *pdev,
3997 			const struct pci_device_id *ent)
3998 {
3999 	int rv = 0;
4000 	struct driver_data *dd = NULL;
4001 	char cpu_list[256];
4002 	const struct cpumask *node_mask;
4003 	int cpu, i = 0, j = 0;
4004 	int my_node = NUMA_NO_NODE;
4005 	unsigned long flags;
4006 
4007 	/* Allocate memory for this devices private data. */
4008 	my_node = pcibus_to_node(pdev->bus);
4009 	if (my_node != NUMA_NO_NODE) {
4010 		if (!node_online(my_node))
4011 			my_node = mtip_get_next_rr_node();
4012 	} else {
4013 		dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n");
4014 		my_node = mtip_get_next_rr_node();
4015 	}
4016 	dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n",
4017 		my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev),
4018 		cpu_to_node(raw_smp_processor_id()), raw_smp_processor_id());
4019 
4020 	dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node);
4021 	if (dd == NULL) {
4022 		dev_err(&pdev->dev,
4023 			"Unable to allocate memory for driver data\n");
4024 		return -ENOMEM;
4025 	}
4026 
4027 	/* Attach the private data to this PCI device.  */
4028 	pci_set_drvdata(pdev, dd);
4029 
4030 	rv = pcim_enable_device(pdev);
4031 	if (rv < 0) {
4032 		dev_err(&pdev->dev, "Unable to enable device\n");
4033 		goto iomap_err;
4034 	}
4035 
4036 	/* Map BAR5 to memory. */
4037 	rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME);
4038 	if (rv < 0) {
4039 		dev_err(&pdev->dev, "Unable to map regions\n");
4040 		goto iomap_err;
4041 	}
4042 
4043 	rv = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
4044 	if (rv) {
4045 		dev_warn(&pdev->dev, "64-bit DMA enable failed\n");
4046 		goto setmask_err;
4047 	}
4048 
4049 	/* Copy the info we may need later into the private data structure. */
4050 	dd->major	= mtip_major;
4051 	dd->instance	= instance;
4052 	dd->pdev	= pdev;
4053 	dd->numa_node	= my_node;
4054 
4055 	INIT_LIST_HEAD(&dd->online_list);
4056 	INIT_LIST_HEAD(&dd->remove_list);
4057 
4058 	memset(dd->workq_name, 0, 32);
4059 	snprintf(dd->workq_name, 31, "mtipq%d", dd->instance);
4060 
4061 	dd->isr_workq = create_workqueue(dd->workq_name);
4062 	if (!dd->isr_workq) {
4063 		dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance);
4064 		rv = -ENOMEM;
4065 		goto setmask_err;
4066 	}
4067 
4068 	memset(cpu_list, 0, sizeof(cpu_list));
4069 
4070 	node_mask = cpumask_of_node(dd->numa_node);
4071 	if (!cpumask_empty(node_mask)) {
4072 		for_each_cpu(cpu, node_mask)
4073 		{
4074 			snprintf(&cpu_list[j], 256 - j, "%d ", cpu);
4075 			j = strlen(cpu_list);
4076 		}
4077 
4078 		dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n",
4079 			dd->numa_node,
4080 			topology_physical_package_id(cpumask_first(node_mask)),
4081 			nr_cpus_node(dd->numa_node),
4082 			cpu_list);
4083 	} else
4084 		dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n");
4085 
4086 	dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node);
4087 	dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n",
4088 		cpu_to_node(dd->isr_binding), dd->isr_binding);
4089 
4090 	/* first worker context always runs in ISR */
4091 	dd->work[0].cpu_binding = dd->isr_binding;
4092 	dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4093 	dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4094 	dd->work[3].cpu_binding = dd->work[0].cpu_binding;
4095 	dd->work[4].cpu_binding = dd->work[1].cpu_binding;
4096 	dd->work[5].cpu_binding = dd->work[2].cpu_binding;
4097 	dd->work[6].cpu_binding = dd->work[2].cpu_binding;
4098 	dd->work[7].cpu_binding = dd->work[1].cpu_binding;
4099 
4100 	/* Log the bindings */
4101 	for_each_present_cpu(cpu) {
4102 		memset(cpu_list, 0, sizeof(cpu_list));
4103 		for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) {
4104 			if (dd->work[i].cpu_binding == cpu) {
4105 				snprintf(&cpu_list[j], 256 - j, "%d ", i);
4106 				j = strlen(cpu_list);
4107 			}
4108 		}
4109 		if (j)
4110 			dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list);
4111 	}
4112 
4113 	INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0);
4114 	INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1);
4115 	INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2);
4116 	INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3);
4117 	INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4);
4118 	INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5);
4119 	INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6);
4120 	INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7);
4121 
4122 	pci_set_master(pdev);
4123 	rv = pci_enable_msi(pdev);
4124 	if (rv) {
4125 		dev_warn(&pdev->dev,
4126 			"Unable to enable MSI interrupt.\n");
4127 		goto msi_initialize_err;
4128 	}
4129 
4130 	mtip_fix_ero_nosnoop(dd, pdev);
4131 
4132 	/* Initialize the block layer. */
4133 	rv = mtip_block_initialize(dd);
4134 	if (rv < 0) {
4135 		dev_err(&pdev->dev,
4136 			"Unable to initialize block layer\n");
4137 		goto block_initialize_err;
4138 	}
4139 
4140 	/*
4141 	 * Increment the instance count so that each device has a unique
4142 	 * instance number.
4143 	 */
4144 	instance++;
4145 	if (rv != MTIP_FTL_REBUILD_MAGIC)
4146 		set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
4147 	else
4148 		rv = 0; /* device in rebuild state, return 0 from probe */
4149 
4150 	/* Add to online list even if in ftl rebuild */
4151 	spin_lock_irqsave(&dev_lock, flags);
4152 	list_add(&dd->online_list, &online_list);
4153 	spin_unlock_irqrestore(&dev_lock, flags);
4154 
4155 	goto done;
4156 
4157 block_initialize_err:
4158 	pci_disable_msi(pdev);
4159 
4160 msi_initialize_err:
4161 	if (dd->isr_workq) {
4162 		flush_workqueue(dd->isr_workq);
4163 		destroy_workqueue(dd->isr_workq);
4164 		drop_cpu(dd->work[0].cpu_binding);
4165 		drop_cpu(dd->work[1].cpu_binding);
4166 		drop_cpu(dd->work[2].cpu_binding);
4167 	}
4168 setmask_err:
4169 	pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4170 
4171 iomap_err:
4172 	kfree(dd);
4173 	pci_set_drvdata(pdev, NULL);
4174 	return rv;
4175 done:
4176 	return rv;
4177 }
4178 
4179 /*
4180  * Called for each probed device when the device is removed or the
4181  * driver is unloaded.
4182  *
4183  * return value
4184  *	None
4185  */
4186 static void mtip_pci_remove(struct pci_dev *pdev)
4187 {
4188 	struct driver_data *dd = pci_get_drvdata(pdev);
4189 	unsigned long flags, to;
4190 
4191 	set_bit(MTIP_DDF_REMOVAL_BIT, &dd->dd_flag);
4192 
4193 	spin_lock_irqsave(&dev_lock, flags);
4194 	list_del_init(&dd->online_list);
4195 	list_add(&dd->remove_list, &removing_list);
4196 	spin_unlock_irqrestore(&dev_lock, flags);
4197 
4198 	mtip_check_surprise_removal(pdev);
4199 	synchronize_irq(dd->pdev->irq);
4200 
4201 	/* Spin until workers are done */
4202 	to = jiffies + msecs_to_jiffies(4000);
4203 	do {
4204 		msleep(20);
4205 	} while (atomic_read(&dd->irq_workers_active) != 0 &&
4206 		time_before(jiffies, to));
4207 
4208 	if (!dd->sr)
4209 		fsync_bdev(dd->bdev);
4210 
4211 	if (atomic_read(&dd->irq_workers_active) != 0) {
4212 		dev_warn(&dd->pdev->dev,
4213 			"Completion workers still active!\n");
4214 	}
4215 
4216 	blk_set_queue_dying(dd->queue);
4217 	set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
4218 
4219 	/* Clean up the block layer. */
4220 	mtip_block_remove(dd);
4221 
4222 	if (dd->isr_workq) {
4223 		flush_workqueue(dd->isr_workq);
4224 		destroy_workqueue(dd->isr_workq);
4225 		drop_cpu(dd->work[0].cpu_binding);
4226 		drop_cpu(dd->work[1].cpu_binding);
4227 		drop_cpu(dd->work[2].cpu_binding);
4228 	}
4229 
4230 	pci_disable_msi(pdev);
4231 
4232 	spin_lock_irqsave(&dev_lock, flags);
4233 	list_del_init(&dd->remove_list);
4234 	spin_unlock_irqrestore(&dev_lock, flags);
4235 
4236 	kfree(dd);
4237 
4238 	pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4239 	pci_set_drvdata(pdev, NULL);
4240 }
4241 
4242 /*
4243  * Called for each probed device when the device is suspended.
4244  *
4245  * return value
4246  *	0  Success
4247  *	<0 Error
4248  */
4249 static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
4250 {
4251 	int rv = 0;
4252 	struct driver_data *dd = pci_get_drvdata(pdev);
4253 
4254 	if (!dd) {
4255 		dev_err(&pdev->dev,
4256 			"Driver private datastructure is NULL\n");
4257 		return -EFAULT;
4258 	}
4259 
4260 	set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4261 
4262 	/* Disable ports & interrupts then send standby immediate */
4263 	rv = mtip_block_suspend(dd);
4264 	if (rv < 0) {
4265 		dev_err(&pdev->dev,
4266 			"Failed to suspend controller\n");
4267 		return rv;
4268 	}
4269 
4270 	/*
4271 	 * Save the pci config space to pdev structure &
4272 	 * disable the device
4273 	 */
4274 	pci_save_state(pdev);
4275 	pci_disable_device(pdev);
4276 
4277 	/* Move to Low power state*/
4278 	pci_set_power_state(pdev, PCI_D3hot);
4279 
4280 	return rv;
4281 }
4282 
4283 /*
4284  * Called for each probed device when the device is resumed.
4285  *
4286  * return value
4287  *      0  Success
4288  *      <0 Error
4289  */
4290 static int mtip_pci_resume(struct pci_dev *pdev)
4291 {
4292 	int rv = 0;
4293 	struct driver_data *dd;
4294 
4295 	dd = pci_get_drvdata(pdev);
4296 	if (!dd) {
4297 		dev_err(&pdev->dev,
4298 			"Driver private datastructure is NULL\n");
4299 		return -EFAULT;
4300 	}
4301 
4302 	/* Move the device to active State */
4303 	pci_set_power_state(pdev, PCI_D0);
4304 
4305 	/* Restore PCI configuration space */
4306 	pci_restore_state(pdev);
4307 
4308 	/* Enable the PCI device*/
4309 	rv = pcim_enable_device(pdev);
4310 	if (rv < 0) {
4311 		dev_err(&pdev->dev,
4312 			"Failed to enable card during resume\n");
4313 		goto err;
4314 	}
4315 	pci_set_master(pdev);
4316 
4317 	/*
4318 	 * Calls hbaReset, initPort, & startPort function
4319 	 * then enables interrupts
4320 	 */
4321 	rv = mtip_block_resume(dd);
4322 	if (rv < 0)
4323 		dev_err(&pdev->dev, "Unable to resume\n");
4324 
4325 err:
4326 	clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4327 
4328 	return rv;
4329 }
4330 
4331 /*
4332  * Shutdown routine
4333  *
4334  * return value
4335  *      None
4336  */
4337 static void mtip_pci_shutdown(struct pci_dev *pdev)
4338 {
4339 	struct driver_data *dd = pci_get_drvdata(pdev);
4340 	if (dd)
4341 		mtip_block_shutdown(dd);
4342 }
4343 
4344 /* Table of device ids supported by this driver. */
4345 static const struct pci_device_id mtip_pci_tbl[] = {
4346 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) },
4347 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) },
4348 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) },
4349 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) },
4350 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) },
4351 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) },
4352 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) },
4353 	{ 0 }
4354 };
4355 
4356 /* Structure that describes the PCI driver functions. */
4357 static struct pci_driver mtip_pci_driver = {
4358 	.name			= MTIP_DRV_NAME,
4359 	.id_table		= mtip_pci_tbl,
4360 	.probe			= mtip_pci_probe,
4361 	.remove			= mtip_pci_remove,
4362 	.suspend		= mtip_pci_suspend,
4363 	.resume			= mtip_pci_resume,
4364 	.shutdown		= mtip_pci_shutdown,
4365 };
4366 
4367 MODULE_DEVICE_TABLE(pci, mtip_pci_tbl);
4368 
4369 /*
4370  * Module initialization function.
4371  *
4372  * Called once when the module is loaded. This function allocates a major
4373  * block device number to the Cyclone devices and registers the PCI layer
4374  * of the driver.
4375  *
4376  * Return value
4377  *      0 on success else error code.
4378  */
4379 static int __init mtip_init(void)
4380 {
4381 	int error;
4382 
4383 	pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
4384 
4385 	spin_lock_init(&dev_lock);
4386 
4387 	INIT_LIST_HEAD(&online_list);
4388 	INIT_LIST_HEAD(&removing_list);
4389 
4390 	/* Allocate a major block device number to use with this driver. */
4391 	error = register_blkdev(0, MTIP_DRV_NAME);
4392 	if (error <= 0) {
4393 		pr_err("Unable to register block device (%d)\n",
4394 		error);
4395 		return -EBUSY;
4396 	}
4397 	mtip_major = error;
4398 
4399 	dfs_parent = debugfs_create_dir("rssd", NULL);
4400 	if (IS_ERR_OR_NULL(dfs_parent)) {
4401 		pr_warn("Error creating debugfs parent\n");
4402 		dfs_parent = NULL;
4403 	}
4404 	if (dfs_parent) {
4405 		dfs_device_status = debugfs_create_file("device_status",
4406 					0444, dfs_parent, NULL,
4407 					&mtip_device_status_fops);
4408 		if (IS_ERR_OR_NULL(dfs_device_status)) {
4409 			pr_err("Error creating device_status node\n");
4410 			dfs_device_status = NULL;
4411 		}
4412 	}
4413 
4414 	/* Register our PCI operations. */
4415 	error = pci_register_driver(&mtip_pci_driver);
4416 	if (error) {
4417 		debugfs_remove(dfs_parent);
4418 		unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4419 	}
4420 
4421 	return error;
4422 }
4423 
4424 /*
4425  * Module de-initialization function.
4426  *
4427  * Called once when the module is unloaded. This function deallocates
4428  * the major block device number allocated by mtip_init() and
4429  * unregisters the PCI layer of the driver.
4430  *
4431  * Return value
4432  *      none
4433  */
4434 static void __exit mtip_exit(void)
4435 {
4436 	/* Release the allocated major block device number. */
4437 	unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4438 
4439 	/* Unregister the PCI driver. */
4440 	pci_unregister_driver(&mtip_pci_driver);
4441 
4442 	debugfs_remove_recursive(dfs_parent);
4443 }
4444 
4445 MODULE_AUTHOR("Micron Technology, Inc");
4446 MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver");
4447 MODULE_LICENSE("GPL");
4448 MODULE_VERSION(MTIP_DRV_VERSION);
4449 
4450 module_init(mtip_init);
4451 module_exit(mtip_exit);
4452