1 /* 2 * Driver for the Micron P320 SSD 3 * Copyright (C) 2011 Micron Technology, Inc. 4 * 5 * Portions of this code were derived from works subjected to the 6 * following copyright: 7 * Copyright (C) 2009 Integrated Device Technology, Inc. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 */ 20 21 #include <linux/pci.h> 22 #include <linux/interrupt.h> 23 #include <linux/ata.h> 24 #include <linux/delay.h> 25 #include <linux/hdreg.h> 26 #include <linux/uaccess.h> 27 #include <linux/random.h> 28 #include <linux/smp.h> 29 #include <linux/compat.h> 30 #include <linux/fs.h> 31 #include <linux/module.h> 32 #include <linux/genhd.h> 33 #include <linux/blkdev.h> 34 #include <linux/blk-mq.h> 35 #include <linux/bio.h> 36 #include <linux/dma-mapping.h> 37 #include <linux/idr.h> 38 #include <linux/kthread.h> 39 #include <../drivers/ata/ahci.h> 40 #include <linux/export.h> 41 #include <linux/debugfs.h> 42 #include <linux/prefetch.h> 43 #include <linux/numa.h> 44 #include "mtip32xx.h" 45 46 #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32) 47 48 /* DMA region containing RX Fis, Identify, RLE10, and SMART buffers */ 49 #define AHCI_RX_FIS_SZ 0x100 50 #define AHCI_RX_FIS_OFFSET 0x0 51 #define AHCI_IDFY_SZ ATA_SECT_SIZE 52 #define AHCI_IDFY_OFFSET 0x400 53 #define AHCI_SECTBUF_SZ ATA_SECT_SIZE 54 #define AHCI_SECTBUF_OFFSET 0x800 55 #define AHCI_SMARTBUF_SZ ATA_SECT_SIZE 56 #define AHCI_SMARTBUF_OFFSET 0xC00 57 /* 0x100 + 0x200 + 0x200 + 0x200 is smaller than 4k but we pad it out */ 58 #define BLOCK_DMA_ALLOC_SZ 4096 59 60 /* DMA region containing command table (should be 8192 bytes) */ 61 #define AHCI_CMD_SLOT_SZ sizeof(struct mtip_cmd_hdr) 62 #define AHCI_CMD_TBL_SZ (MTIP_MAX_COMMAND_SLOTS * AHCI_CMD_SLOT_SZ) 63 #define AHCI_CMD_TBL_OFFSET 0x0 64 65 /* DMA region per command (contains header and SGL) */ 66 #define AHCI_CMD_TBL_HDR_SZ 0x80 67 #define AHCI_CMD_TBL_HDR_OFFSET 0x0 68 #define AHCI_CMD_TBL_SGL_SZ (MTIP_MAX_SG * sizeof(struct mtip_cmd_sg)) 69 #define AHCI_CMD_TBL_SGL_OFFSET AHCI_CMD_TBL_HDR_SZ 70 #define CMD_DMA_ALLOC_SZ (AHCI_CMD_TBL_SGL_SZ + AHCI_CMD_TBL_HDR_SZ) 71 72 73 #define HOST_CAP_NZDMA (1 << 19) 74 #define HOST_HSORG 0xFC 75 #define HSORG_DISABLE_SLOTGRP_INTR (1<<24) 76 #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16) 77 #define HSORG_HWREV 0xFF00 78 #define HSORG_STYLE 0x8 79 #define HSORG_SLOTGROUPS 0x7 80 81 #define PORT_COMMAND_ISSUE 0x38 82 #define PORT_SDBV 0x7C 83 84 #define PORT_OFFSET 0x100 85 #define PORT_MEM_SIZE 0x80 86 87 #define PORT_IRQ_ERR \ 88 (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \ 89 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \ 90 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \ 91 PORT_IRQ_OVERFLOW) 92 #define PORT_IRQ_LEGACY \ 93 (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS) 94 #define PORT_IRQ_HANDLED \ 95 (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \ 96 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \ 97 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY) 98 #define DEF_PORT_IRQ \ 99 (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS) 100 101 /* product numbers */ 102 #define MTIP_PRODUCT_UNKNOWN 0x00 103 #define MTIP_PRODUCT_ASICFPGA 0x11 104 105 /* Device instance number, incremented each time a device is probed. */ 106 static int instance; 107 108 static struct list_head online_list; 109 static struct list_head removing_list; 110 static spinlock_t dev_lock; 111 112 /* 113 * Global variable used to hold the major block device number 114 * allocated in mtip_init(). 115 */ 116 static int mtip_major; 117 static struct dentry *dfs_parent; 118 static struct dentry *dfs_device_status; 119 120 static u32 cpu_use[NR_CPUS]; 121 122 static DEFINE_IDA(rssd_index_ida); 123 124 static int mtip_block_initialize(struct driver_data *dd); 125 126 #ifdef CONFIG_COMPAT 127 struct mtip_compat_ide_task_request_s { 128 __u8 io_ports[8]; 129 __u8 hob_ports[8]; 130 ide_reg_valid_t out_flags; 131 ide_reg_valid_t in_flags; 132 int data_phase; 133 int req_cmd; 134 compat_ulong_t out_size; 135 compat_ulong_t in_size; 136 }; 137 #endif 138 139 /* 140 * This function check_for_surprise_removal is called 141 * while card is removed from the system and it will 142 * read the vendor id from the configration space 143 * 144 * @pdev Pointer to the pci_dev structure. 145 * 146 * return value 147 * true if device removed, else false 148 */ 149 static bool mtip_check_surprise_removal(struct pci_dev *pdev) 150 { 151 u16 vendor_id = 0; 152 struct driver_data *dd = pci_get_drvdata(pdev); 153 154 if (dd->sr) 155 return true; 156 157 /* Read the vendorID from the configuration space */ 158 pci_read_config_word(pdev, 0x00, &vendor_id); 159 if (vendor_id == 0xFFFF) { 160 dd->sr = true; 161 if (dd->queue) 162 blk_queue_flag_set(QUEUE_FLAG_DEAD, dd->queue); 163 else 164 dev_warn(&dd->pdev->dev, 165 "%s: dd->queue is NULL\n", __func__); 166 return true; /* device removed */ 167 } 168 169 return false; /* device present */ 170 } 171 172 static struct mtip_cmd *mtip_cmd_from_tag(struct driver_data *dd, 173 unsigned int tag) 174 { 175 struct blk_mq_hw_ctx *hctx = dd->queue->queue_hw_ctx[0]; 176 177 return blk_mq_rq_to_pdu(blk_mq_tag_to_rq(hctx->tags, tag)); 178 } 179 180 /* 181 * Reset the HBA (without sleeping) 182 * 183 * @dd Pointer to the driver data structure. 184 * 185 * return value 186 * 0 The reset was successful. 187 * -1 The HBA Reset bit did not clear. 188 */ 189 static int mtip_hba_reset(struct driver_data *dd) 190 { 191 unsigned long timeout; 192 193 /* Set the reset bit */ 194 writel(HOST_RESET, dd->mmio + HOST_CTL); 195 196 /* Flush */ 197 readl(dd->mmio + HOST_CTL); 198 199 /* 200 * Spin for up to 10 seconds waiting for reset acknowledgement. Spec 201 * is 1 sec but in LUN failure conditions, up to 10 secs are required 202 */ 203 timeout = jiffies + msecs_to_jiffies(10000); 204 do { 205 mdelay(10); 206 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) 207 return -1; 208 209 } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET) 210 && time_before(jiffies, timeout)); 211 212 if (readl(dd->mmio + HOST_CTL) & HOST_RESET) 213 return -1; 214 215 return 0; 216 } 217 218 /* 219 * Issue a command to the hardware. 220 * 221 * Set the appropriate bit in the s_active and Command Issue hardware 222 * registers, causing hardware command processing to begin. 223 * 224 * @port Pointer to the port structure. 225 * @tag The tag of the command to be issued. 226 * 227 * return value 228 * None 229 */ 230 static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag) 231 { 232 int group = tag >> 5; 233 234 /* guard SACT and CI registers */ 235 spin_lock(&port->cmd_issue_lock[group]); 236 writel((1 << MTIP_TAG_BIT(tag)), 237 port->s_active[MTIP_TAG_INDEX(tag)]); 238 writel((1 << MTIP_TAG_BIT(tag)), 239 port->cmd_issue[MTIP_TAG_INDEX(tag)]); 240 spin_unlock(&port->cmd_issue_lock[group]); 241 } 242 243 /* 244 * Enable/disable the reception of FIS 245 * 246 * @port Pointer to the port data structure 247 * @enable 1 to enable, 0 to disable 248 * 249 * return value 250 * Previous state: 1 enabled, 0 disabled 251 */ 252 static int mtip_enable_fis(struct mtip_port *port, int enable) 253 { 254 u32 tmp; 255 256 /* enable FIS reception */ 257 tmp = readl(port->mmio + PORT_CMD); 258 if (enable) 259 writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD); 260 else 261 writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD); 262 263 /* Flush */ 264 readl(port->mmio + PORT_CMD); 265 266 return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX)); 267 } 268 269 /* 270 * Enable/disable the DMA engine 271 * 272 * @port Pointer to the port data structure 273 * @enable 1 to enable, 0 to disable 274 * 275 * return value 276 * Previous state: 1 enabled, 0 disabled. 277 */ 278 static int mtip_enable_engine(struct mtip_port *port, int enable) 279 { 280 u32 tmp; 281 282 /* enable FIS reception */ 283 tmp = readl(port->mmio + PORT_CMD); 284 if (enable) 285 writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD); 286 else 287 writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD); 288 289 readl(port->mmio + PORT_CMD); 290 return (((tmp & PORT_CMD_START) == PORT_CMD_START)); 291 } 292 293 /* 294 * Enables the port DMA engine and FIS reception. 295 * 296 * return value 297 * None 298 */ 299 static inline void mtip_start_port(struct mtip_port *port) 300 { 301 /* Enable FIS reception */ 302 mtip_enable_fis(port, 1); 303 304 /* Enable the DMA engine */ 305 mtip_enable_engine(port, 1); 306 } 307 308 /* 309 * Deinitialize a port by disabling port interrupts, the DMA engine, 310 * and FIS reception. 311 * 312 * @port Pointer to the port structure 313 * 314 * return value 315 * None 316 */ 317 static inline void mtip_deinit_port(struct mtip_port *port) 318 { 319 /* Disable interrupts on this port */ 320 writel(0, port->mmio + PORT_IRQ_MASK); 321 322 /* Disable the DMA engine */ 323 mtip_enable_engine(port, 0); 324 325 /* Disable FIS reception */ 326 mtip_enable_fis(port, 0); 327 } 328 329 /* 330 * Initialize a port. 331 * 332 * This function deinitializes the port by calling mtip_deinit_port() and 333 * then initializes it by setting the command header and RX FIS addresses, 334 * clearing the SError register and any pending port interrupts before 335 * re-enabling the default set of port interrupts. 336 * 337 * @port Pointer to the port structure. 338 * 339 * return value 340 * None 341 */ 342 static void mtip_init_port(struct mtip_port *port) 343 { 344 int i; 345 mtip_deinit_port(port); 346 347 /* Program the command list base and FIS base addresses */ 348 if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) { 349 writel((port->command_list_dma >> 16) >> 16, 350 port->mmio + PORT_LST_ADDR_HI); 351 writel((port->rxfis_dma >> 16) >> 16, 352 port->mmio + PORT_FIS_ADDR_HI); 353 set_bit(MTIP_PF_HOST_CAP_64, &port->flags); 354 } 355 356 writel(port->command_list_dma & 0xFFFFFFFF, 357 port->mmio + PORT_LST_ADDR); 358 writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR); 359 360 /* Clear SError */ 361 writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR); 362 363 /* reset the completed registers.*/ 364 for (i = 0; i < port->dd->slot_groups; i++) 365 writel(0xFFFFFFFF, port->completed[i]); 366 367 /* Clear any pending interrupts for this port */ 368 writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT); 369 370 /* Clear any pending interrupts on the HBA. */ 371 writel(readl(port->dd->mmio + HOST_IRQ_STAT), 372 port->dd->mmio + HOST_IRQ_STAT); 373 374 /* Enable port interrupts */ 375 writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK); 376 } 377 378 /* 379 * Restart a port 380 * 381 * @port Pointer to the port data structure. 382 * 383 * return value 384 * None 385 */ 386 static void mtip_restart_port(struct mtip_port *port) 387 { 388 unsigned long timeout; 389 390 /* Disable the DMA engine */ 391 mtip_enable_engine(port, 0); 392 393 /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */ 394 timeout = jiffies + msecs_to_jiffies(500); 395 while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) 396 && time_before(jiffies, timeout)) 397 ; 398 399 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) 400 return; 401 402 /* 403 * Chip quirk: escalate to hba reset if 404 * PxCMD.CR not clear after 500 ms 405 */ 406 if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) { 407 dev_warn(&port->dd->pdev->dev, 408 "PxCMD.CR not clear, escalating reset\n"); 409 410 if (mtip_hba_reset(port->dd)) 411 dev_err(&port->dd->pdev->dev, 412 "HBA reset escalation failed.\n"); 413 414 /* 30 ms delay before com reset to quiesce chip */ 415 mdelay(30); 416 } 417 418 dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n"); 419 420 /* Set PxSCTL.DET */ 421 writel(readl(port->mmio + PORT_SCR_CTL) | 422 1, port->mmio + PORT_SCR_CTL); 423 readl(port->mmio + PORT_SCR_CTL); 424 425 /* Wait 1 ms to quiesce chip function */ 426 timeout = jiffies + msecs_to_jiffies(1); 427 while (time_before(jiffies, timeout)) 428 ; 429 430 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) 431 return; 432 433 /* Clear PxSCTL.DET */ 434 writel(readl(port->mmio + PORT_SCR_CTL) & ~1, 435 port->mmio + PORT_SCR_CTL); 436 readl(port->mmio + PORT_SCR_CTL); 437 438 /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */ 439 timeout = jiffies + msecs_to_jiffies(500); 440 while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) 441 && time_before(jiffies, timeout)) 442 ; 443 444 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) 445 return; 446 447 if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) 448 dev_warn(&port->dd->pdev->dev, 449 "COM reset failed\n"); 450 451 mtip_init_port(port); 452 mtip_start_port(port); 453 454 } 455 456 static int mtip_device_reset(struct driver_data *dd) 457 { 458 int rv = 0; 459 460 if (mtip_check_surprise_removal(dd->pdev)) 461 return 0; 462 463 if (mtip_hba_reset(dd) < 0) 464 rv = -EFAULT; 465 466 mdelay(1); 467 mtip_init_port(dd->port); 468 mtip_start_port(dd->port); 469 470 /* Enable interrupts on the HBA. */ 471 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, 472 dd->mmio + HOST_CTL); 473 return rv; 474 } 475 476 /* 477 * Helper function for tag logging 478 */ 479 static void print_tags(struct driver_data *dd, 480 char *msg, 481 unsigned long *tagbits, 482 int cnt) 483 { 484 unsigned char tagmap[128]; 485 int group, tagmap_len = 0; 486 487 memset(tagmap, 0, sizeof(tagmap)); 488 for (group = SLOTBITS_IN_LONGS; group > 0; group--) 489 tagmap_len += sprintf(tagmap + tagmap_len, "%016lX ", 490 tagbits[group-1]); 491 dev_warn(&dd->pdev->dev, 492 "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap); 493 } 494 495 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer, 496 dma_addr_t buffer_dma, unsigned int sectors); 497 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id, 498 struct smart_attr *attrib); 499 500 static void mtip_complete_command(struct mtip_cmd *cmd, blk_status_t status) 501 { 502 struct request *req = blk_mq_rq_from_pdu(cmd); 503 504 cmd->status = status; 505 blk_mq_complete_request(req); 506 } 507 508 /* 509 * Handle an error. 510 * 511 * @dd Pointer to the DRIVER_DATA structure. 512 * 513 * return value 514 * None 515 */ 516 static void mtip_handle_tfe(struct driver_data *dd) 517 { 518 int group, tag, bit, reissue, rv; 519 struct mtip_port *port; 520 struct mtip_cmd *cmd; 521 u32 completed; 522 struct host_to_dev_fis *fis; 523 unsigned long tagaccum[SLOTBITS_IN_LONGS]; 524 unsigned int cmd_cnt = 0; 525 unsigned char *buf; 526 char *fail_reason = NULL; 527 int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0; 528 529 dev_warn(&dd->pdev->dev, "Taskfile error\n"); 530 531 port = dd->port; 532 533 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) { 534 cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL); 535 dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n"); 536 mtip_complete_command(cmd, BLK_STS_IOERR); 537 return; 538 } 539 540 /* clear the tag accumulator */ 541 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); 542 543 /* Loop through all the groups */ 544 for (group = 0; group < dd->slot_groups; group++) { 545 completed = readl(port->completed[group]); 546 547 dev_warn(&dd->pdev->dev, "g=%u, comp=%x\n", group, completed); 548 549 /* clear completed status register in the hardware.*/ 550 writel(completed, port->completed[group]); 551 552 /* Process successfully completed commands */ 553 for (bit = 0; bit < 32 && completed; bit++) { 554 if (!(completed & (1<<bit))) 555 continue; 556 tag = (group << 5) + bit; 557 558 /* Skip the internal command slot */ 559 if (tag == MTIP_TAG_INTERNAL) 560 continue; 561 562 cmd = mtip_cmd_from_tag(dd, tag); 563 mtip_complete_command(cmd, 0); 564 set_bit(tag, tagaccum); 565 cmd_cnt++; 566 } 567 } 568 569 print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt); 570 571 /* Restart the port */ 572 mdelay(20); 573 mtip_restart_port(port); 574 575 /* Trying to determine the cause of the error */ 576 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ, 577 dd->port->log_buf, 578 dd->port->log_buf_dma, 1); 579 if (rv) { 580 dev_warn(&dd->pdev->dev, 581 "Error in READ LOG EXT (10h) command\n"); 582 /* non-critical error, don't fail the load */ 583 } else { 584 buf = (unsigned char *)dd->port->log_buf; 585 if (buf[259] & 0x1) { 586 dev_info(&dd->pdev->dev, 587 "Write protect bit is set.\n"); 588 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag); 589 fail_all_ncq_write = 1; 590 fail_reason = "write protect"; 591 } 592 if (buf[288] == 0xF7) { 593 dev_info(&dd->pdev->dev, 594 "Exceeded Tmax, drive in thermal shutdown.\n"); 595 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag); 596 fail_all_ncq_cmds = 1; 597 fail_reason = "thermal shutdown"; 598 } 599 if (buf[288] == 0xBF) { 600 set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag); 601 dev_info(&dd->pdev->dev, 602 "Drive indicates rebuild has failed. Secure erase required.\n"); 603 fail_all_ncq_cmds = 1; 604 fail_reason = "rebuild failed"; 605 } 606 } 607 608 /* clear the tag accumulator */ 609 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); 610 611 /* Loop through all the groups */ 612 for (group = 0; group < dd->slot_groups; group++) { 613 for (bit = 0; bit < 32; bit++) { 614 reissue = 1; 615 tag = (group << 5) + bit; 616 cmd = mtip_cmd_from_tag(dd, tag); 617 618 fis = (struct host_to_dev_fis *)cmd->command; 619 620 /* Should re-issue? */ 621 if (tag == MTIP_TAG_INTERNAL || 622 fis->command == ATA_CMD_SET_FEATURES) 623 reissue = 0; 624 else { 625 if (fail_all_ncq_cmds || 626 (fail_all_ncq_write && 627 fis->command == ATA_CMD_FPDMA_WRITE)) { 628 dev_warn(&dd->pdev->dev, 629 " Fail: %s w/tag %d [%s].\n", 630 fis->command == ATA_CMD_FPDMA_WRITE ? 631 "write" : "read", 632 tag, 633 fail_reason != NULL ? 634 fail_reason : "unknown"); 635 mtip_complete_command(cmd, BLK_STS_MEDIUM); 636 continue; 637 } 638 } 639 640 /* 641 * First check if this command has 642 * exceeded its retries. 643 */ 644 if (reissue && (cmd->retries-- > 0)) { 645 646 set_bit(tag, tagaccum); 647 648 /* Re-issue the command. */ 649 mtip_issue_ncq_command(port, tag); 650 651 continue; 652 } 653 654 /* Retire a command that will not be reissued */ 655 dev_warn(&port->dd->pdev->dev, 656 "retiring tag %d\n", tag); 657 658 mtip_complete_command(cmd, BLK_STS_IOERR); 659 } 660 } 661 print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt); 662 } 663 664 /* 665 * Handle a set device bits interrupt 666 */ 667 static inline void mtip_workq_sdbfx(struct mtip_port *port, int group, 668 u32 completed) 669 { 670 struct driver_data *dd = port->dd; 671 int tag, bit; 672 struct mtip_cmd *command; 673 674 if (!completed) { 675 WARN_ON_ONCE(!completed); 676 return; 677 } 678 /* clear completed status register in the hardware.*/ 679 writel(completed, port->completed[group]); 680 681 /* Process completed commands. */ 682 for (bit = 0; (bit < 32) && completed; bit++) { 683 if (completed & 0x01) { 684 tag = (group << 5) | bit; 685 686 /* skip internal command slot. */ 687 if (unlikely(tag == MTIP_TAG_INTERNAL)) 688 continue; 689 690 command = mtip_cmd_from_tag(dd, tag); 691 mtip_complete_command(command, 0); 692 } 693 completed >>= 1; 694 } 695 696 /* If last, re-enable interrupts */ 697 if (atomic_dec_return(&dd->irq_workers_active) == 0) 698 writel(0xffffffff, dd->mmio + HOST_IRQ_STAT); 699 } 700 701 /* 702 * Process legacy pio and d2h interrupts 703 */ 704 static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat) 705 { 706 struct mtip_port *port = dd->port; 707 struct mtip_cmd *cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL); 708 709 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) && cmd) { 710 int group = MTIP_TAG_INDEX(MTIP_TAG_INTERNAL); 711 int status = readl(port->cmd_issue[group]); 712 713 if (!(status & (1 << MTIP_TAG_BIT(MTIP_TAG_INTERNAL)))) 714 mtip_complete_command(cmd, 0); 715 } 716 } 717 718 /* 719 * Demux and handle errors 720 */ 721 static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat) 722 { 723 if (unlikely(port_stat & PORT_IRQ_CONNECT)) { 724 dev_warn(&dd->pdev->dev, 725 "Clearing PxSERR.DIAG.x\n"); 726 writel((1 << 26), dd->port->mmio + PORT_SCR_ERR); 727 } 728 729 if (unlikely(port_stat & PORT_IRQ_PHYRDY)) { 730 dev_warn(&dd->pdev->dev, 731 "Clearing PxSERR.DIAG.n\n"); 732 writel((1 << 16), dd->port->mmio + PORT_SCR_ERR); 733 } 734 735 if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) { 736 dev_warn(&dd->pdev->dev, 737 "Port stat errors %x unhandled\n", 738 (port_stat & ~PORT_IRQ_HANDLED)); 739 if (mtip_check_surprise_removal(dd->pdev)) 740 return; 741 } 742 if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) { 743 set_bit(MTIP_PF_EH_ACTIVE_BIT, &dd->port->flags); 744 wake_up_interruptible(&dd->port->svc_wait); 745 } 746 } 747 748 static inline irqreturn_t mtip_handle_irq(struct driver_data *data) 749 { 750 struct driver_data *dd = (struct driver_data *) data; 751 struct mtip_port *port = dd->port; 752 u32 hba_stat, port_stat; 753 int rv = IRQ_NONE; 754 int do_irq_enable = 1, i, workers; 755 struct mtip_work *twork; 756 757 hba_stat = readl(dd->mmio + HOST_IRQ_STAT); 758 if (hba_stat) { 759 rv = IRQ_HANDLED; 760 761 /* Acknowledge the interrupt status on the port.*/ 762 port_stat = readl(port->mmio + PORT_IRQ_STAT); 763 if (unlikely(port_stat == 0xFFFFFFFF)) { 764 mtip_check_surprise_removal(dd->pdev); 765 return IRQ_HANDLED; 766 } 767 writel(port_stat, port->mmio + PORT_IRQ_STAT); 768 769 /* Demux port status */ 770 if (likely(port_stat & PORT_IRQ_SDB_FIS)) { 771 do_irq_enable = 0; 772 WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0); 773 774 /* Start at 1: group zero is always local? */ 775 for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS; 776 i++) { 777 twork = &dd->work[i]; 778 twork->completed = readl(port->completed[i]); 779 if (twork->completed) 780 workers++; 781 } 782 783 atomic_set(&dd->irq_workers_active, workers); 784 if (workers) { 785 for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) { 786 twork = &dd->work[i]; 787 if (twork->completed) 788 queue_work_on( 789 twork->cpu_binding, 790 dd->isr_workq, 791 &twork->work); 792 } 793 794 if (likely(dd->work[0].completed)) 795 mtip_workq_sdbfx(port, 0, 796 dd->work[0].completed); 797 798 } else { 799 /* 800 * Chip quirk: SDB interrupt but nothing 801 * to complete 802 */ 803 do_irq_enable = 1; 804 } 805 } 806 807 if (unlikely(port_stat & PORT_IRQ_ERR)) { 808 if (unlikely(mtip_check_surprise_removal(dd->pdev))) { 809 /* don't proceed further */ 810 return IRQ_HANDLED; 811 } 812 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, 813 &dd->dd_flag)) 814 return rv; 815 816 mtip_process_errors(dd, port_stat & PORT_IRQ_ERR); 817 } 818 819 if (unlikely(port_stat & PORT_IRQ_LEGACY)) 820 mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY); 821 } 822 823 /* acknowledge interrupt */ 824 if (unlikely(do_irq_enable)) 825 writel(hba_stat, dd->mmio + HOST_IRQ_STAT); 826 827 return rv; 828 } 829 830 /* 831 * HBA interrupt subroutine. 832 * 833 * @irq IRQ number. 834 * @instance Pointer to the driver data structure. 835 * 836 * return value 837 * IRQ_HANDLED A HBA interrupt was pending and handled. 838 * IRQ_NONE This interrupt was not for the HBA. 839 */ 840 static irqreturn_t mtip_irq_handler(int irq, void *instance) 841 { 842 struct driver_data *dd = instance; 843 844 return mtip_handle_irq(dd); 845 } 846 847 static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag) 848 { 849 writel(1 << MTIP_TAG_BIT(tag), port->cmd_issue[MTIP_TAG_INDEX(tag)]); 850 } 851 852 static bool mtip_pause_ncq(struct mtip_port *port, 853 struct host_to_dev_fis *fis) 854 { 855 unsigned long task_file_data; 856 857 task_file_data = readl(port->mmio+PORT_TFDATA); 858 if ((task_file_data & 1)) 859 return false; 860 861 if (fis->command == ATA_CMD_SEC_ERASE_PREP) { 862 port->ic_pause_timer = jiffies; 863 return true; 864 } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) && 865 (fis->features == 0x03)) { 866 set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); 867 port->ic_pause_timer = jiffies; 868 return true; 869 } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) || 870 ((fis->command == 0xFC) && 871 (fis->features == 0x27 || fis->features == 0x72 || 872 fis->features == 0x62 || fis->features == 0x26))) { 873 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); 874 clear_bit(MTIP_DDF_REBUILD_FAILED_BIT, &port->dd->dd_flag); 875 /* Com reset after secure erase or lowlevel format */ 876 mtip_restart_port(port); 877 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); 878 return false; 879 } 880 881 return false; 882 } 883 884 static bool mtip_commands_active(struct mtip_port *port) 885 { 886 unsigned int active; 887 unsigned int n; 888 889 /* 890 * Ignore s_active bit 0 of array element 0. 891 * This bit will always be set 892 */ 893 active = readl(port->s_active[0]) & 0xFFFFFFFE; 894 for (n = 1; n < port->dd->slot_groups; n++) 895 active |= readl(port->s_active[n]); 896 897 return active != 0; 898 } 899 900 /* 901 * Wait for port to quiesce 902 * 903 * @port Pointer to port data structure 904 * @timeout Max duration to wait (ms) 905 * 906 * return value 907 * 0 Success 908 * -EBUSY Commands still active 909 */ 910 static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout) 911 { 912 unsigned long to; 913 bool active = true; 914 915 blk_mq_quiesce_queue(port->dd->queue); 916 917 to = jiffies + msecs_to_jiffies(timeout); 918 do { 919 if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) && 920 test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) { 921 msleep(20); 922 continue; /* svc thd is actively issuing commands */ 923 } 924 925 msleep(100); 926 927 if (mtip_check_surprise_removal(port->dd->pdev)) 928 goto err_fault; 929 930 active = mtip_commands_active(port); 931 if (!active) 932 break; 933 } while (time_before(jiffies, to)); 934 935 blk_mq_unquiesce_queue(port->dd->queue); 936 return active ? -EBUSY : 0; 937 err_fault: 938 blk_mq_unquiesce_queue(port->dd->queue); 939 return -EFAULT; 940 } 941 942 struct mtip_int_cmd { 943 int fis_len; 944 dma_addr_t buffer; 945 int buf_len; 946 u32 opts; 947 }; 948 949 /* 950 * Execute an internal command and wait for the completion. 951 * 952 * @port Pointer to the port data structure. 953 * @fis Pointer to the FIS that describes the command. 954 * @fis_len Length in WORDS of the FIS. 955 * @buffer DMA accessible for command data. 956 * @buf_len Length, in bytes, of the data buffer. 957 * @opts Command header options, excluding the FIS length 958 * and the number of PRD entries. 959 * @timeout Time in ms to wait for the command to complete. 960 * 961 * return value 962 * 0 Command completed successfully. 963 * -EFAULT The buffer address is not correctly aligned. 964 * -EBUSY Internal command or other IO in progress. 965 * -EAGAIN Time out waiting for command to complete. 966 */ 967 static int mtip_exec_internal_command(struct mtip_port *port, 968 struct host_to_dev_fis *fis, 969 int fis_len, 970 dma_addr_t buffer, 971 int buf_len, 972 u32 opts, 973 unsigned long timeout) 974 { 975 struct mtip_cmd *int_cmd; 976 struct driver_data *dd = port->dd; 977 struct request *rq; 978 struct mtip_int_cmd icmd = { 979 .fis_len = fis_len, 980 .buffer = buffer, 981 .buf_len = buf_len, 982 .opts = opts 983 }; 984 int rv = 0; 985 986 /* Make sure the buffer is 8 byte aligned. This is asic specific. */ 987 if (buffer & 0x00000007) { 988 dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n"); 989 return -EFAULT; 990 } 991 992 if (mtip_check_surprise_removal(dd->pdev)) 993 return -EFAULT; 994 995 rq = blk_mq_alloc_request(dd->queue, REQ_OP_DRV_IN, BLK_MQ_REQ_RESERVED); 996 if (IS_ERR(rq)) { 997 dbg_printk(MTIP_DRV_NAME "Unable to allocate tag for PIO cmd\n"); 998 return -EFAULT; 999 } 1000 1001 set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); 1002 1003 if (fis->command == ATA_CMD_SEC_ERASE_PREP) 1004 set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); 1005 1006 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); 1007 1008 if (fis->command != ATA_CMD_STANDBYNOW1) { 1009 /* wait for io to complete if non atomic */ 1010 if (mtip_quiesce_io(port, MTIP_QUIESCE_IO_TIMEOUT_MS) < 0) { 1011 dev_warn(&dd->pdev->dev, "Failed to quiesce IO\n"); 1012 blk_mq_free_request(rq); 1013 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); 1014 wake_up_interruptible(&port->svc_wait); 1015 return -EBUSY; 1016 } 1017 } 1018 1019 /* Copy the command to the command table */ 1020 int_cmd = blk_mq_rq_to_pdu(rq); 1021 int_cmd->icmd = &icmd; 1022 memcpy(int_cmd->command, fis, fis_len*4); 1023 1024 rq->timeout = timeout; 1025 1026 /* insert request and run queue */ 1027 blk_execute_rq(rq->q, NULL, rq, true); 1028 1029 if (int_cmd->status) { 1030 dev_err(&dd->pdev->dev, "Internal command [%02X] failed %d\n", 1031 fis->command, int_cmd->status); 1032 rv = -EIO; 1033 1034 if (mtip_check_surprise_removal(dd->pdev) || 1035 test_bit(MTIP_DDF_REMOVE_PENDING_BIT, 1036 &dd->dd_flag)) { 1037 dev_err(&dd->pdev->dev, 1038 "Internal command [%02X] wait returned due to SR\n", 1039 fis->command); 1040 rv = -ENXIO; 1041 goto exec_ic_exit; 1042 } 1043 mtip_device_reset(dd); /* recover from timeout issue */ 1044 rv = -EAGAIN; 1045 goto exec_ic_exit; 1046 } 1047 1048 if (readl(port->cmd_issue[MTIP_TAG_INDEX(MTIP_TAG_INTERNAL)]) 1049 & (1 << MTIP_TAG_BIT(MTIP_TAG_INTERNAL))) { 1050 rv = -ENXIO; 1051 if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) { 1052 mtip_device_reset(dd); 1053 rv = -EAGAIN; 1054 } 1055 } 1056 exec_ic_exit: 1057 /* Clear the allocated and active bits for the internal command. */ 1058 blk_mq_free_request(rq); 1059 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); 1060 if (rv >= 0 && mtip_pause_ncq(port, fis)) { 1061 /* NCQ paused */ 1062 return rv; 1063 } 1064 wake_up_interruptible(&port->svc_wait); 1065 1066 return rv; 1067 } 1068 1069 /* 1070 * Byte-swap ATA ID strings. 1071 * 1072 * ATA identify data contains strings in byte-swapped 16-bit words. 1073 * They must be swapped (on all architectures) to be usable as C strings. 1074 * This function swaps bytes in-place. 1075 * 1076 * @buf The buffer location of the string 1077 * @len The number of bytes to swap 1078 * 1079 * return value 1080 * None 1081 */ 1082 static inline void ata_swap_string(u16 *buf, unsigned int len) 1083 { 1084 int i; 1085 for (i = 0; i < (len/2); i++) 1086 be16_to_cpus(&buf[i]); 1087 } 1088 1089 static void mtip_set_timeout(struct driver_data *dd, 1090 struct host_to_dev_fis *fis, 1091 unsigned int *timeout, u8 erasemode) 1092 { 1093 switch (fis->command) { 1094 case ATA_CMD_DOWNLOAD_MICRO: 1095 *timeout = 120000; /* 2 minutes */ 1096 break; 1097 case ATA_CMD_SEC_ERASE_UNIT: 1098 case 0xFC: 1099 if (erasemode) 1100 *timeout = ((*(dd->port->identify + 90) * 2) * 60000); 1101 else 1102 *timeout = ((*(dd->port->identify + 89) * 2) * 60000); 1103 break; 1104 case ATA_CMD_STANDBYNOW1: 1105 *timeout = 120000; /* 2 minutes */ 1106 break; 1107 case 0xF7: 1108 case 0xFA: 1109 *timeout = 60000; /* 60 seconds */ 1110 break; 1111 case ATA_CMD_SMART: 1112 *timeout = 15000; /* 15 seconds */ 1113 break; 1114 default: 1115 *timeout = MTIP_IOCTL_CMD_TIMEOUT_MS; 1116 break; 1117 } 1118 } 1119 1120 /* 1121 * Request the device identity information. 1122 * 1123 * If a user space buffer is not specified, i.e. is NULL, the 1124 * identify information is still read from the drive and placed 1125 * into the identify data buffer (@e port->identify) in the 1126 * port data structure. 1127 * When the identify buffer contains valid identify information @e 1128 * port->identify_valid is non-zero. 1129 * 1130 * @port Pointer to the port structure. 1131 * @user_buffer A user space buffer where the identify data should be 1132 * copied. 1133 * 1134 * return value 1135 * 0 Command completed successfully. 1136 * -EFAULT An error occurred while coping data to the user buffer. 1137 * -1 Command failed. 1138 */ 1139 static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer) 1140 { 1141 int rv = 0; 1142 struct host_to_dev_fis fis; 1143 1144 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) 1145 return -EFAULT; 1146 1147 /* Build the FIS. */ 1148 memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1149 fis.type = 0x27; 1150 fis.opts = 1 << 7; 1151 fis.command = ATA_CMD_ID_ATA; 1152 1153 /* Set the identify information as invalid. */ 1154 port->identify_valid = 0; 1155 1156 /* Clear the identify information. */ 1157 memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS); 1158 1159 /* Execute the command. */ 1160 if (mtip_exec_internal_command(port, 1161 &fis, 1162 5, 1163 port->identify_dma, 1164 sizeof(u16) * ATA_ID_WORDS, 1165 0, 1166 MTIP_INT_CMD_TIMEOUT_MS) 1167 < 0) { 1168 rv = -1; 1169 goto out; 1170 } 1171 1172 /* 1173 * Perform any necessary byte-swapping. Yes, the kernel does in fact 1174 * perform field-sensitive swapping on the string fields. 1175 * See the kernel use of ata_id_string() for proof of this. 1176 */ 1177 #ifdef __LITTLE_ENDIAN 1178 ata_swap_string(port->identify + 27, 40); /* model string*/ 1179 ata_swap_string(port->identify + 23, 8); /* firmware string*/ 1180 ata_swap_string(port->identify + 10, 20); /* serial# string*/ 1181 #else 1182 { 1183 int i; 1184 for (i = 0; i < ATA_ID_WORDS; i++) 1185 port->identify[i] = le16_to_cpu(port->identify[i]); 1186 } 1187 #endif 1188 1189 /* Check security locked state */ 1190 if (port->identify[128] & 0x4) 1191 set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); 1192 else 1193 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); 1194 1195 /* Set the identify buffer as valid. */ 1196 port->identify_valid = 1; 1197 1198 if (user_buffer) { 1199 if (copy_to_user( 1200 user_buffer, 1201 port->identify, 1202 ATA_ID_WORDS * sizeof(u16))) { 1203 rv = -EFAULT; 1204 goto out; 1205 } 1206 } 1207 1208 out: 1209 return rv; 1210 } 1211 1212 /* 1213 * Issue a standby immediate command to the device. 1214 * 1215 * @port Pointer to the port structure. 1216 * 1217 * return value 1218 * 0 Command was executed successfully. 1219 * -1 An error occurred while executing the command. 1220 */ 1221 static int mtip_standby_immediate(struct mtip_port *port) 1222 { 1223 int rv; 1224 struct host_to_dev_fis fis; 1225 unsigned long start; 1226 unsigned int timeout; 1227 1228 /* Build the FIS. */ 1229 memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1230 fis.type = 0x27; 1231 fis.opts = 1 << 7; 1232 fis.command = ATA_CMD_STANDBYNOW1; 1233 1234 mtip_set_timeout(port->dd, &fis, &timeout, 0); 1235 1236 start = jiffies; 1237 rv = mtip_exec_internal_command(port, 1238 &fis, 1239 5, 1240 0, 1241 0, 1242 0, 1243 timeout); 1244 dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n", 1245 jiffies_to_msecs(jiffies - start)); 1246 if (rv) 1247 dev_warn(&port->dd->pdev->dev, 1248 "STANDBY IMMEDIATE command failed.\n"); 1249 1250 return rv; 1251 } 1252 1253 /* 1254 * Issue a READ LOG EXT command to the device. 1255 * 1256 * @port pointer to the port structure. 1257 * @page page number to fetch 1258 * @buffer pointer to buffer 1259 * @buffer_dma dma address corresponding to @buffer 1260 * @sectors page length to fetch, in sectors 1261 * 1262 * return value 1263 * @rv return value from mtip_exec_internal_command() 1264 */ 1265 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer, 1266 dma_addr_t buffer_dma, unsigned int sectors) 1267 { 1268 struct host_to_dev_fis fis; 1269 1270 memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1271 fis.type = 0x27; 1272 fis.opts = 1 << 7; 1273 fis.command = ATA_CMD_READ_LOG_EXT; 1274 fis.sect_count = sectors & 0xFF; 1275 fis.sect_cnt_ex = (sectors >> 8) & 0xFF; 1276 fis.lba_low = page; 1277 fis.lba_mid = 0; 1278 fis.device = ATA_DEVICE_OBS; 1279 1280 memset(buffer, 0, sectors * ATA_SECT_SIZE); 1281 1282 return mtip_exec_internal_command(port, 1283 &fis, 1284 5, 1285 buffer_dma, 1286 sectors * ATA_SECT_SIZE, 1287 0, 1288 MTIP_INT_CMD_TIMEOUT_MS); 1289 } 1290 1291 /* 1292 * Issue a SMART READ DATA command to the device. 1293 * 1294 * @port pointer to the port structure. 1295 * @buffer pointer to buffer 1296 * @buffer_dma dma address corresponding to @buffer 1297 * 1298 * return value 1299 * @rv return value from mtip_exec_internal_command() 1300 */ 1301 static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer, 1302 dma_addr_t buffer_dma) 1303 { 1304 struct host_to_dev_fis fis; 1305 1306 memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1307 fis.type = 0x27; 1308 fis.opts = 1 << 7; 1309 fis.command = ATA_CMD_SMART; 1310 fis.features = 0xD0; 1311 fis.sect_count = 1; 1312 fis.lba_mid = 0x4F; 1313 fis.lba_hi = 0xC2; 1314 fis.device = ATA_DEVICE_OBS; 1315 1316 return mtip_exec_internal_command(port, 1317 &fis, 1318 5, 1319 buffer_dma, 1320 ATA_SECT_SIZE, 1321 0, 1322 15000); 1323 } 1324 1325 /* 1326 * Get the value of a smart attribute 1327 * 1328 * @port pointer to the port structure 1329 * @id attribute number 1330 * @attrib pointer to return attrib information corresponding to @id 1331 * 1332 * return value 1333 * -EINVAL NULL buffer passed or unsupported attribute @id. 1334 * -EPERM Identify data not valid, SMART not supported or not enabled 1335 */ 1336 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id, 1337 struct smart_attr *attrib) 1338 { 1339 int rv, i; 1340 struct smart_attr *pattr; 1341 1342 if (!attrib) 1343 return -EINVAL; 1344 1345 if (!port->identify_valid) { 1346 dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n"); 1347 return -EPERM; 1348 } 1349 if (!(port->identify[82] & 0x1)) { 1350 dev_warn(&port->dd->pdev->dev, "SMART not supported\n"); 1351 return -EPERM; 1352 } 1353 if (!(port->identify[85] & 0x1)) { 1354 dev_warn(&port->dd->pdev->dev, "SMART not enabled\n"); 1355 return -EPERM; 1356 } 1357 1358 memset(port->smart_buf, 0, ATA_SECT_SIZE); 1359 rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma); 1360 if (rv) { 1361 dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n"); 1362 return rv; 1363 } 1364 1365 pattr = (struct smart_attr *)(port->smart_buf + 2); 1366 for (i = 0; i < 29; i++, pattr++) 1367 if (pattr->attr_id == id) { 1368 memcpy(attrib, pattr, sizeof(struct smart_attr)); 1369 break; 1370 } 1371 1372 if (i == 29) { 1373 dev_warn(&port->dd->pdev->dev, 1374 "Query for invalid SMART attribute ID\n"); 1375 rv = -EINVAL; 1376 } 1377 1378 return rv; 1379 } 1380 1381 /* 1382 * Get the drive capacity. 1383 * 1384 * @dd Pointer to the device data structure. 1385 * @sectors Pointer to the variable that will receive the sector count. 1386 * 1387 * return value 1388 * 1 Capacity was returned successfully. 1389 * 0 The identify information is invalid. 1390 */ 1391 static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors) 1392 { 1393 struct mtip_port *port = dd->port; 1394 u64 total, raw0, raw1, raw2, raw3; 1395 raw0 = port->identify[100]; 1396 raw1 = port->identify[101]; 1397 raw2 = port->identify[102]; 1398 raw3 = port->identify[103]; 1399 total = raw0 | raw1<<16 | raw2<<32 | raw3<<48; 1400 *sectors = total; 1401 return (bool) !!port->identify_valid; 1402 } 1403 1404 /* 1405 * Display the identify command data. 1406 * 1407 * @port Pointer to the port data structure. 1408 * 1409 * return value 1410 * None 1411 */ 1412 static void mtip_dump_identify(struct mtip_port *port) 1413 { 1414 sector_t sectors; 1415 unsigned short revid; 1416 char cbuf[42]; 1417 1418 if (!port->identify_valid) 1419 return; 1420 1421 strlcpy(cbuf, (char *)(port->identify+10), 21); 1422 dev_info(&port->dd->pdev->dev, 1423 "Serial No.: %s\n", cbuf); 1424 1425 strlcpy(cbuf, (char *)(port->identify+23), 9); 1426 dev_info(&port->dd->pdev->dev, 1427 "Firmware Ver.: %s\n", cbuf); 1428 1429 strlcpy(cbuf, (char *)(port->identify+27), 41); 1430 dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf); 1431 1432 dev_info(&port->dd->pdev->dev, "Security: %04x %s\n", 1433 port->identify[128], 1434 port->identify[128] & 0x4 ? "(LOCKED)" : ""); 1435 1436 if (mtip_hw_get_capacity(port->dd, §ors)) 1437 dev_info(&port->dd->pdev->dev, 1438 "Capacity: %llu sectors (%llu MB)\n", 1439 (u64)sectors, 1440 ((u64)sectors) * ATA_SECT_SIZE >> 20); 1441 1442 pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid); 1443 switch (revid & 0xFF) { 1444 case 0x1: 1445 strlcpy(cbuf, "A0", 3); 1446 break; 1447 case 0x3: 1448 strlcpy(cbuf, "A2", 3); 1449 break; 1450 default: 1451 strlcpy(cbuf, "?", 2); 1452 break; 1453 } 1454 dev_info(&port->dd->pdev->dev, 1455 "Card Type: %s\n", cbuf); 1456 } 1457 1458 /* 1459 * Map the commands scatter list into the command table. 1460 * 1461 * @command Pointer to the command. 1462 * @nents Number of scatter list entries. 1463 * 1464 * return value 1465 * None 1466 */ 1467 static inline void fill_command_sg(struct driver_data *dd, 1468 struct mtip_cmd *command, 1469 int nents) 1470 { 1471 int n; 1472 unsigned int dma_len; 1473 struct mtip_cmd_sg *command_sg; 1474 struct scatterlist *sg; 1475 1476 command_sg = command->command + AHCI_CMD_TBL_HDR_SZ; 1477 1478 for_each_sg(command->sg, sg, nents, n) { 1479 dma_len = sg_dma_len(sg); 1480 if (dma_len > 0x400000) 1481 dev_err(&dd->pdev->dev, 1482 "DMA segment length truncated\n"); 1483 command_sg->info = cpu_to_le32((dma_len-1) & 0x3FFFFF); 1484 command_sg->dba = cpu_to_le32(sg_dma_address(sg)); 1485 command_sg->dba_upper = 1486 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16); 1487 command_sg++; 1488 } 1489 } 1490 1491 /* 1492 * @brief Execute a drive command. 1493 * 1494 * return value 0 The command completed successfully. 1495 * return value -1 An error occurred while executing the command. 1496 */ 1497 static int exec_drive_task(struct mtip_port *port, u8 *command) 1498 { 1499 struct host_to_dev_fis fis; 1500 struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG); 1501 unsigned int to; 1502 1503 /* Build the FIS. */ 1504 memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1505 fis.type = 0x27; 1506 fis.opts = 1 << 7; 1507 fis.command = command[0]; 1508 fis.features = command[1]; 1509 fis.sect_count = command[2]; 1510 fis.sector = command[3]; 1511 fis.cyl_low = command[4]; 1512 fis.cyl_hi = command[5]; 1513 fis.device = command[6] & ~0x10; /* Clear the dev bit*/ 1514 1515 mtip_set_timeout(port->dd, &fis, &to, 0); 1516 1517 dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n", 1518 __func__, 1519 command[0], 1520 command[1], 1521 command[2], 1522 command[3], 1523 command[4], 1524 command[5], 1525 command[6]); 1526 1527 /* Execute the command. */ 1528 if (mtip_exec_internal_command(port, 1529 &fis, 1530 5, 1531 0, 1532 0, 1533 0, 1534 to) < 0) { 1535 return -1; 1536 } 1537 1538 command[0] = reply->command; /* Status*/ 1539 command[1] = reply->features; /* Error*/ 1540 command[4] = reply->cyl_low; 1541 command[5] = reply->cyl_hi; 1542 1543 dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n", 1544 __func__, 1545 command[0], 1546 command[1], 1547 command[4], 1548 command[5]); 1549 1550 return 0; 1551 } 1552 1553 /* 1554 * @brief Execute a drive command. 1555 * 1556 * @param port Pointer to the port data structure. 1557 * @param command Pointer to the user specified command parameters. 1558 * @param user_buffer Pointer to the user space buffer where read sector 1559 * data should be copied. 1560 * 1561 * return value 0 The command completed successfully. 1562 * return value -EFAULT An error occurred while copying the completion 1563 * data to the user space buffer. 1564 * return value -1 An error occurred while executing the command. 1565 */ 1566 static int exec_drive_command(struct mtip_port *port, u8 *command, 1567 void __user *user_buffer) 1568 { 1569 struct host_to_dev_fis fis; 1570 struct host_to_dev_fis *reply; 1571 u8 *buf = NULL; 1572 dma_addr_t dma_addr = 0; 1573 int rv = 0, xfer_sz = command[3]; 1574 unsigned int to; 1575 1576 if (xfer_sz) { 1577 if (!user_buffer) 1578 return -EFAULT; 1579 1580 buf = dma_alloc_coherent(&port->dd->pdev->dev, 1581 ATA_SECT_SIZE * xfer_sz, 1582 &dma_addr, 1583 GFP_KERNEL); 1584 if (!buf) { 1585 dev_err(&port->dd->pdev->dev, 1586 "Memory allocation failed (%d bytes)\n", 1587 ATA_SECT_SIZE * xfer_sz); 1588 return -ENOMEM; 1589 } 1590 memset(buf, 0, ATA_SECT_SIZE * xfer_sz); 1591 } 1592 1593 /* Build the FIS. */ 1594 memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1595 fis.type = 0x27; 1596 fis.opts = 1 << 7; 1597 fis.command = command[0]; 1598 fis.features = command[2]; 1599 fis.sect_count = command[3]; 1600 if (fis.command == ATA_CMD_SMART) { 1601 fis.sector = command[1]; 1602 fis.cyl_low = 0x4F; 1603 fis.cyl_hi = 0xC2; 1604 } 1605 1606 mtip_set_timeout(port->dd, &fis, &to, 0); 1607 1608 if (xfer_sz) 1609 reply = (port->rxfis + RX_FIS_PIO_SETUP); 1610 else 1611 reply = (port->rxfis + RX_FIS_D2H_REG); 1612 1613 dbg_printk(MTIP_DRV_NAME 1614 " %s: User Command: cmd %x, sect %x, " 1615 "feat %x, sectcnt %x\n", 1616 __func__, 1617 command[0], 1618 command[1], 1619 command[2], 1620 command[3]); 1621 1622 /* Execute the command. */ 1623 if (mtip_exec_internal_command(port, 1624 &fis, 1625 5, 1626 (xfer_sz ? dma_addr : 0), 1627 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0), 1628 0, 1629 to) 1630 < 0) { 1631 rv = -EFAULT; 1632 goto exit_drive_command; 1633 } 1634 1635 /* Collect the completion status. */ 1636 command[0] = reply->command; /* Status*/ 1637 command[1] = reply->features; /* Error*/ 1638 command[2] = reply->sect_count; 1639 1640 dbg_printk(MTIP_DRV_NAME 1641 " %s: Completion Status: stat %x, " 1642 "err %x, nsect %x\n", 1643 __func__, 1644 command[0], 1645 command[1], 1646 command[2]); 1647 1648 if (xfer_sz) { 1649 if (copy_to_user(user_buffer, 1650 buf, 1651 ATA_SECT_SIZE * command[3])) { 1652 rv = -EFAULT; 1653 goto exit_drive_command; 1654 } 1655 } 1656 exit_drive_command: 1657 if (buf) 1658 dma_free_coherent(&port->dd->pdev->dev, 1659 ATA_SECT_SIZE * xfer_sz, buf, dma_addr); 1660 return rv; 1661 } 1662 1663 /* 1664 * Indicates whether a command has a single sector payload. 1665 * 1666 * @command passed to the device to perform the certain event. 1667 * @features passed to the device to perform the certain event. 1668 * 1669 * return value 1670 * 1 command is one that always has a single sector payload, 1671 * regardless of the value in the Sector Count field. 1672 * 0 otherwise 1673 * 1674 */ 1675 static unsigned int implicit_sector(unsigned char command, 1676 unsigned char features) 1677 { 1678 unsigned int rv = 0; 1679 1680 /* list of commands that have an implicit sector count of 1 */ 1681 switch (command) { 1682 case ATA_CMD_SEC_SET_PASS: 1683 case ATA_CMD_SEC_UNLOCK: 1684 case ATA_CMD_SEC_ERASE_PREP: 1685 case ATA_CMD_SEC_ERASE_UNIT: 1686 case ATA_CMD_SEC_FREEZE_LOCK: 1687 case ATA_CMD_SEC_DISABLE_PASS: 1688 case ATA_CMD_PMP_READ: 1689 case ATA_CMD_PMP_WRITE: 1690 rv = 1; 1691 break; 1692 case ATA_CMD_SET_MAX: 1693 if (features == ATA_SET_MAX_UNLOCK) 1694 rv = 1; 1695 break; 1696 case ATA_CMD_SMART: 1697 if ((features == ATA_SMART_READ_VALUES) || 1698 (features == ATA_SMART_READ_THRESHOLDS)) 1699 rv = 1; 1700 break; 1701 case ATA_CMD_CONF_OVERLAY: 1702 if ((features == ATA_DCO_IDENTIFY) || 1703 (features == ATA_DCO_SET)) 1704 rv = 1; 1705 break; 1706 } 1707 return rv; 1708 } 1709 1710 /* 1711 * Executes a taskfile 1712 * See ide_taskfile_ioctl() for derivation 1713 */ 1714 static int exec_drive_taskfile(struct driver_data *dd, 1715 void __user *buf, 1716 ide_task_request_t *req_task, 1717 int outtotal) 1718 { 1719 struct host_to_dev_fis fis; 1720 struct host_to_dev_fis *reply; 1721 u8 *outbuf = NULL; 1722 u8 *inbuf = NULL; 1723 dma_addr_t outbuf_dma = 0; 1724 dma_addr_t inbuf_dma = 0; 1725 dma_addr_t dma_buffer = 0; 1726 int err = 0; 1727 unsigned int taskin = 0; 1728 unsigned int taskout = 0; 1729 u8 nsect = 0; 1730 unsigned int timeout; 1731 unsigned int force_single_sector; 1732 unsigned int transfer_size; 1733 unsigned long task_file_data; 1734 int intotal = outtotal + req_task->out_size; 1735 int erasemode = 0; 1736 1737 taskout = req_task->out_size; 1738 taskin = req_task->in_size; 1739 /* 130560 = 512 * 0xFF*/ 1740 if (taskin > 130560 || taskout > 130560) 1741 return -EINVAL; 1742 1743 if (taskout) { 1744 outbuf = memdup_user(buf + outtotal, taskout); 1745 if (IS_ERR(outbuf)) 1746 return PTR_ERR(outbuf); 1747 1748 outbuf_dma = dma_map_single(&dd->pdev->dev, outbuf, 1749 taskout, DMA_TO_DEVICE); 1750 if (dma_mapping_error(&dd->pdev->dev, outbuf_dma)) { 1751 err = -ENOMEM; 1752 goto abort; 1753 } 1754 dma_buffer = outbuf_dma; 1755 } 1756 1757 if (taskin) { 1758 inbuf = memdup_user(buf + intotal, taskin); 1759 if (IS_ERR(inbuf)) { 1760 err = PTR_ERR(inbuf); 1761 inbuf = NULL; 1762 goto abort; 1763 } 1764 inbuf_dma = dma_map_single(&dd->pdev->dev, inbuf, 1765 taskin, DMA_FROM_DEVICE); 1766 if (dma_mapping_error(&dd->pdev->dev, inbuf_dma)) { 1767 err = -ENOMEM; 1768 goto abort; 1769 } 1770 dma_buffer = inbuf_dma; 1771 } 1772 1773 /* only supports PIO and non-data commands from this ioctl. */ 1774 switch (req_task->data_phase) { 1775 case TASKFILE_OUT: 1776 nsect = taskout / ATA_SECT_SIZE; 1777 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); 1778 break; 1779 case TASKFILE_IN: 1780 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); 1781 break; 1782 case TASKFILE_NO_DATA: 1783 reply = (dd->port->rxfis + RX_FIS_D2H_REG); 1784 break; 1785 default: 1786 err = -EINVAL; 1787 goto abort; 1788 } 1789 1790 /* Build the FIS. */ 1791 memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1792 1793 fis.type = 0x27; 1794 fis.opts = 1 << 7; 1795 fis.command = req_task->io_ports[7]; 1796 fis.features = req_task->io_ports[1]; 1797 fis.sect_count = req_task->io_ports[2]; 1798 fis.lba_low = req_task->io_ports[3]; 1799 fis.lba_mid = req_task->io_ports[4]; 1800 fis.lba_hi = req_task->io_ports[5]; 1801 /* Clear the dev bit*/ 1802 fis.device = req_task->io_ports[6] & ~0x10; 1803 1804 if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) { 1805 req_task->in_flags.all = 1806 IDE_TASKFILE_STD_IN_FLAGS | 1807 (IDE_HOB_STD_IN_FLAGS << 8); 1808 fis.lba_low_ex = req_task->hob_ports[3]; 1809 fis.lba_mid_ex = req_task->hob_ports[4]; 1810 fis.lba_hi_ex = req_task->hob_ports[5]; 1811 fis.features_ex = req_task->hob_ports[1]; 1812 fis.sect_cnt_ex = req_task->hob_ports[2]; 1813 1814 } else { 1815 req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS; 1816 } 1817 1818 force_single_sector = implicit_sector(fis.command, fis.features); 1819 1820 if ((taskin || taskout) && (!fis.sect_count)) { 1821 if (nsect) 1822 fis.sect_count = nsect; 1823 else { 1824 if (!force_single_sector) { 1825 dev_warn(&dd->pdev->dev, 1826 "data movement but " 1827 "sect_count is 0\n"); 1828 err = -EINVAL; 1829 goto abort; 1830 } 1831 } 1832 } 1833 1834 dbg_printk(MTIP_DRV_NAME 1835 " %s: cmd %x, feat %x, nsect %x," 1836 " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x," 1837 " head/dev %x\n", 1838 __func__, 1839 fis.command, 1840 fis.features, 1841 fis.sect_count, 1842 fis.lba_low, 1843 fis.lba_mid, 1844 fis.lba_hi, 1845 fis.device); 1846 1847 /* check for erase mode support during secure erase.*/ 1848 if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf && 1849 (outbuf[0] & MTIP_SEC_ERASE_MODE)) { 1850 erasemode = 1; 1851 } 1852 1853 mtip_set_timeout(dd, &fis, &timeout, erasemode); 1854 1855 /* Determine the correct transfer size.*/ 1856 if (force_single_sector) 1857 transfer_size = ATA_SECT_SIZE; 1858 else 1859 transfer_size = ATA_SECT_SIZE * fis.sect_count; 1860 1861 /* Execute the command.*/ 1862 if (mtip_exec_internal_command(dd->port, 1863 &fis, 1864 5, 1865 dma_buffer, 1866 transfer_size, 1867 0, 1868 timeout) < 0) { 1869 err = -EIO; 1870 goto abort; 1871 } 1872 1873 task_file_data = readl(dd->port->mmio+PORT_TFDATA); 1874 1875 if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) { 1876 reply = dd->port->rxfis + RX_FIS_PIO_SETUP; 1877 req_task->io_ports[7] = reply->control; 1878 } else { 1879 reply = dd->port->rxfis + RX_FIS_D2H_REG; 1880 req_task->io_ports[7] = reply->command; 1881 } 1882 1883 /* reclaim the DMA buffers.*/ 1884 if (inbuf_dma) 1885 dma_unmap_single(&dd->pdev->dev, inbuf_dma, taskin, 1886 DMA_FROM_DEVICE); 1887 if (outbuf_dma) 1888 dma_unmap_single(&dd->pdev->dev, outbuf_dma, taskout, 1889 DMA_TO_DEVICE); 1890 inbuf_dma = 0; 1891 outbuf_dma = 0; 1892 1893 /* return the ATA registers to the caller.*/ 1894 req_task->io_ports[1] = reply->features; 1895 req_task->io_ports[2] = reply->sect_count; 1896 req_task->io_ports[3] = reply->lba_low; 1897 req_task->io_ports[4] = reply->lba_mid; 1898 req_task->io_ports[5] = reply->lba_hi; 1899 req_task->io_ports[6] = reply->device; 1900 1901 if (req_task->out_flags.all & 1) { 1902 1903 req_task->hob_ports[3] = reply->lba_low_ex; 1904 req_task->hob_ports[4] = reply->lba_mid_ex; 1905 req_task->hob_ports[5] = reply->lba_hi_ex; 1906 req_task->hob_ports[1] = reply->features_ex; 1907 req_task->hob_ports[2] = reply->sect_cnt_ex; 1908 } 1909 dbg_printk(MTIP_DRV_NAME 1910 " %s: Completion: stat %x," 1911 "err %x, sect_cnt %x, lbalo %x," 1912 "lbamid %x, lbahi %x, dev %x\n", 1913 __func__, 1914 req_task->io_ports[7], 1915 req_task->io_ports[1], 1916 req_task->io_ports[2], 1917 req_task->io_ports[3], 1918 req_task->io_ports[4], 1919 req_task->io_ports[5], 1920 req_task->io_ports[6]); 1921 1922 if (taskout) { 1923 if (copy_to_user(buf + outtotal, outbuf, taskout)) { 1924 err = -EFAULT; 1925 goto abort; 1926 } 1927 } 1928 if (taskin) { 1929 if (copy_to_user(buf + intotal, inbuf, taskin)) { 1930 err = -EFAULT; 1931 goto abort; 1932 } 1933 } 1934 abort: 1935 if (inbuf_dma) 1936 dma_unmap_single(&dd->pdev->dev, inbuf_dma, taskin, 1937 DMA_FROM_DEVICE); 1938 if (outbuf_dma) 1939 dma_unmap_single(&dd->pdev->dev, outbuf_dma, taskout, 1940 DMA_TO_DEVICE); 1941 kfree(outbuf); 1942 kfree(inbuf); 1943 1944 return err; 1945 } 1946 1947 /* 1948 * Handle IOCTL calls from the Block Layer. 1949 * 1950 * This function is called by the Block Layer when it receives an IOCTL 1951 * command that it does not understand. If the IOCTL command is not supported 1952 * this function returns -ENOTTY. 1953 * 1954 * @dd Pointer to the driver data structure. 1955 * @cmd IOCTL command passed from the Block Layer. 1956 * @arg IOCTL argument passed from the Block Layer. 1957 * 1958 * return value 1959 * 0 The IOCTL completed successfully. 1960 * -ENOTTY The specified command is not supported. 1961 * -EFAULT An error occurred copying data to a user space buffer. 1962 * -EIO An error occurred while executing the command. 1963 */ 1964 static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd, 1965 unsigned long arg) 1966 { 1967 switch (cmd) { 1968 case HDIO_GET_IDENTITY: 1969 { 1970 if (copy_to_user((void __user *)arg, dd->port->identify, 1971 sizeof(u16) * ATA_ID_WORDS)) 1972 return -EFAULT; 1973 break; 1974 } 1975 case HDIO_DRIVE_CMD: 1976 { 1977 u8 drive_command[4]; 1978 1979 /* Copy the user command info to our buffer. */ 1980 if (copy_from_user(drive_command, 1981 (void __user *) arg, 1982 sizeof(drive_command))) 1983 return -EFAULT; 1984 1985 /* Execute the drive command. */ 1986 if (exec_drive_command(dd->port, 1987 drive_command, 1988 (void __user *) (arg+4))) 1989 return -EIO; 1990 1991 /* Copy the status back to the users buffer. */ 1992 if (copy_to_user((void __user *) arg, 1993 drive_command, 1994 sizeof(drive_command))) 1995 return -EFAULT; 1996 1997 break; 1998 } 1999 case HDIO_DRIVE_TASK: 2000 { 2001 u8 drive_command[7]; 2002 2003 /* Copy the user command info to our buffer. */ 2004 if (copy_from_user(drive_command, 2005 (void __user *) arg, 2006 sizeof(drive_command))) 2007 return -EFAULT; 2008 2009 /* Execute the drive command. */ 2010 if (exec_drive_task(dd->port, drive_command)) 2011 return -EIO; 2012 2013 /* Copy the status back to the users buffer. */ 2014 if (copy_to_user((void __user *) arg, 2015 drive_command, 2016 sizeof(drive_command))) 2017 return -EFAULT; 2018 2019 break; 2020 } 2021 case HDIO_DRIVE_TASKFILE: { 2022 ide_task_request_t req_task; 2023 int ret, outtotal; 2024 2025 if (copy_from_user(&req_task, (void __user *) arg, 2026 sizeof(req_task))) 2027 return -EFAULT; 2028 2029 outtotal = sizeof(req_task); 2030 2031 ret = exec_drive_taskfile(dd, (void __user *) arg, 2032 &req_task, outtotal); 2033 2034 if (copy_to_user((void __user *) arg, &req_task, 2035 sizeof(req_task))) 2036 return -EFAULT; 2037 2038 return ret; 2039 } 2040 2041 default: 2042 return -EINVAL; 2043 } 2044 return 0; 2045 } 2046 2047 /* 2048 * Submit an IO to the hw 2049 * 2050 * This function is called by the block layer to issue an io 2051 * to the device. Upon completion, the callback function will 2052 * be called with the data parameter passed as the callback data. 2053 * 2054 * @dd Pointer to the driver data structure. 2055 * @start First sector to read. 2056 * @nsect Number of sectors to read. 2057 * @tag The tag of this read command. 2058 * @callback Pointer to the function that should be called 2059 * when the read completes. 2060 * @data Callback data passed to the callback function 2061 * when the read completes. 2062 * @dir Direction (read or write) 2063 * 2064 * return value 2065 * None 2066 */ 2067 static void mtip_hw_submit_io(struct driver_data *dd, struct request *rq, 2068 struct mtip_cmd *command, 2069 struct blk_mq_hw_ctx *hctx) 2070 { 2071 struct mtip_cmd_hdr *hdr = 2072 dd->port->command_list + sizeof(struct mtip_cmd_hdr) * rq->tag; 2073 struct host_to_dev_fis *fis; 2074 struct mtip_port *port = dd->port; 2075 int dma_dir = rq_data_dir(rq) == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE; 2076 u64 start = blk_rq_pos(rq); 2077 unsigned int nsect = blk_rq_sectors(rq); 2078 unsigned int nents; 2079 2080 /* Map the scatter list for DMA access */ 2081 nents = blk_rq_map_sg(hctx->queue, rq, command->sg); 2082 nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir); 2083 2084 prefetch(&port->flags); 2085 2086 command->scatter_ents = nents; 2087 2088 /* 2089 * The number of retries for this command before it is 2090 * reported as a failure to the upper layers. 2091 */ 2092 command->retries = MTIP_MAX_RETRIES; 2093 2094 /* Fill out fis */ 2095 fis = command->command; 2096 fis->type = 0x27; 2097 fis->opts = 1 << 7; 2098 if (dma_dir == DMA_FROM_DEVICE) 2099 fis->command = ATA_CMD_FPDMA_READ; 2100 else 2101 fis->command = ATA_CMD_FPDMA_WRITE; 2102 fis->lba_low = start & 0xFF; 2103 fis->lba_mid = (start >> 8) & 0xFF; 2104 fis->lba_hi = (start >> 16) & 0xFF; 2105 fis->lba_low_ex = (start >> 24) & 0xFF; 2106 fis->lba_mid_ex = (start >> 32) & 0xFF; 2107 fis->lba_hi_ex = (start >> 40) & 0xFF; 2108 fis->device = 1 << 6; 2109 fis->features = nsect & 0xFF; 2110 fis->features_ex = (nsect >> 8) & 0xFF; 2111 fis->sect_count = ((rq->tag << 3) | (rq->tag >> 5)); 2112 fis->sect_cnt_ex = 0; 2113 fis->control = 0; 2114 fis->res2 = 0; 2115 fis->res3 = 0; 2116 fill_command_sg(dd, command, nents); 2117 2118 if (unlikely(command->unaligned)) 2119 fis->device |= 1 << 7; 2120 2121 /* Populate the command header */ 2122 hdr->ctba = cpu_to_le32(command->command_dma & 0xFFFFFFFF); 2123 if (test_bit(MTIP_PF_HOST_CAP_64, &dd->port->flags)) 2124 hdr->ctbau = cpu_to_le32((command->command_dma >> 16) >> 16); 2125 hdr->opts = cpu_to_le32((nents << 16) | 5 | AHCI_CMD_PREFETCH); 2126 hdr->byte_count = 0; 2127 2128 command->direction = dma_dir; 2129 2130 /* 2131 * To prevent this command from being issued 2132 * if an internal command is in progress or error handling is active. 2133 */ 2134 if (unlikely(port->flags & MTIP_PF_PAUSE_IO)) { 2135 set_bit(rq->tag, port->cmds_to_issue); 2136 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags); 2137 return; 2138 } 2139 2140 /* Issue the command to the hardware */ 2141 mtip_issue_ncq_command(port, rq->tag); 2142 } 2143 2144 /* 2145 * Sysfs status dump. 2146 * 2147 * @dev Pointer to the device structure, passed by the kernrel. 2148 * @attr Pointer to the device_attribute structure passed by the kernel. 2149 * @buf Pointer to the char buffer that will receive the stats info. 2150 * 2151 * return value 2152 * The size, in bytes, of the data copied into buf. 2153 */ 2154 static ssize_t mtip_hw_show_status(struct device *dev, 2155 struct device_attribute *attr, 2156 char *buf) 2157 { 2158 struct driver_data *dd = dev_to_disk(dev)->private_data; 2159 int size = 0; 2160 2161 if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag)) 2162 size += sprintf(buf, "%s", "thermal_shutdown\n"); 2163 else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag)) 2164 size += sprintf(buf, "%s", "write_protect\n"); 2165 else 2166 size += sprintf(buf, "%s", "online\n"); 2167 2168 return size; 2169 } 2170 2171 static DEVICE_ATTR(status, 0444, mtip_hw_show_status, NULL); 2172 2173 /* debugsfs entries */ 2174 2175 static ssize_t show_device_status(struct device_driver *drv, char *buf) 2176 { 2177 int size = 0; 2178 struct driver_data *dd, *tmp; 2179 unsigned long flags; 2180 char id_buf[42]; 2181 u16 status = 0; 2182 2183 spin_lock_irqsave(&dev_lock, flags); 2184 size += sprintf(&buf[size], "Devices Present:\n"); 2185 list_for_each_entry_safe(dd, tmp, &online_list, online_list) { 2186 if (dd->pdev) { 2187 if (dd->port && 2188 dd->port->identify && 2189 dd->port->identify_valid) { 2190 strlcpy(id_buf, 2191 (char *) (dd->port->identify + 10), 21); 2192 status = *(dd->port->identify + 141); 2193 } else { 2194 memset(id_buf, 0, 42); 2195 status = 0; 2196 } 2197 2198 if (dd->port && 2199 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) { 2200 size += sprintf(&buf[size], 2201 " device %s %s (ftl rebuild %d %%)\n", 2202 dev_name(&dd->pdev->dev), 2203 id_buf, 2204 status); 2205 } else { 2206 size += sprintf(&buf[size], 2207 " device %s %s\n", 2208 dev_name(&dd->pdev->dev), 2209 id_buf); 2210 } 2211 } 2212 } 2213 2214 size += sprintf(&buf[size], "Devices Being Removed:\n"); 2215 list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) { 2216 if (dd->pdev) { 2217 if (dd->port && 2218 dd->port->identify && 2219 dd->port->identify_valid) { 2220 strlcpy(id_buf, 2221 (char *) (dd->port->identify+10), 21); 2222 status = *(dd->port->identify + 141); 2223 } else { 2224 memset(id_buf, 0, 42); 2225 status = 0; 2226 } 2227 2228 if (dd->port && 2229 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) { 2230 size += sprintf(&buf[size], 2231 " device %s %s (ftl rebuild %d %%)\n", 2232 dev_name(&dd->pdev->dev), 2233 id_buf, 2234 status); 2235 } else { 2236 size += sprintf(&buf[size], 2237 " device %s %s\n", 2238 dev_name(&dd->pdev->dev), 2239 id_buf); 2240 } 2241 } 2242 } 2243 spin_unlock_irqrestore(&dev_lock, flags); 2244 2245 return size; 2246 } 2247 2248 static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf, 2249 size_t len, loff_t *offset) 2250 { 2251 struct driver_data *dd = (struct driver_data *)f->private_data; 2252 int size = *offset; 2253 char *buf; 2254 int rv = 0; 2255 2256 if (!len || *offset) 2257 return 0; 2258 2259 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL); 2260 if (!buf) { 2261 dev_err(&dd->pdev->dev, 2262 "Memory allocation: status buffer\n"); 2263 return -ENOMEM; 2264 } 2265 2266 size += show_device_status(NULL, buf); 2267 2268 *offset = size <= len ? size : len; 2269 size = copy_to_user(ubuf, buf, *offset); 2270 if (size) 2271 rv = -EFAULT; 2272 2273 kfree(buf); 2274 return rv ? rv : *offset; 2275 } 2276 2277 static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf, 2278 size_t len, loff_t *offset) 2279 { 2280 struct driver_data *dd = (struct driver_data *)f->private_data; 2281 char *buf; 2282 u32 group_allocated; 2283 int size = *offset; 2284 int n, rv = 0; 2285 2286 if (!len || size) 2287 return 0; 2288 2289 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL); 2290 if (!buf) { 2291 dev_err(&dd->pdev->dev, 2292 "Memory allocation: register buffer\n"); 2293 return -ENOMEM; 2294 } 2295 2296 size += sprintf(&buf[size], "H/ S ACTive : [ 0x"); 2297 2298 for (n = dd->slot_groups-1; n >= 0; n--) 2299 size += sprintf(&buf[size], "%08X ", 2300 readl(dd->port->s_active[n])); 2301 2302 size += sprintf(&buf[size], "]\n"); 2303 size += sprintf(&buf[size], "H/ Command Issue : [ 0x"); 2304 2305 for (n = dd->slot_groups-1; n >= 0; n--) 2306 size += sprintf(&buf[size], "%08X ", 2307 readl(dd->port->cmd_issue[n])); 2308 2309 size += sprintf(&buf[size], "]\n"); 2310 size += sprintf(&buf[size], "H/ Completed : [ 0x"); 2311 2312 for (n = dd->slot_groups-1; n >= 0; n--) 2313 size += sprintf(&buf[size], "%08X ", 2314 readl(dd->port->completed[n])); 2315 2316 size += sprintf(&buf[size], "]\n"); 2317 size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n", 2318 readl(dd->port->mmio + PORT_IRQ_STAT)); 2319 size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n", 2320 readl(dd->mmio + HOST_IRQ_STAT)); 2321 size += sprintf(&buf[size], "\n"); 2322 2323 size += sprintf(&buf[size], "L/ Commands in Q : [ 0x"); 2324 2325 for (n = dd->slot_groups-1; n >= 0; n--) { 2326 if (sizeof(long) > sizeof(u32)) 2327 group_allocated = 2328 dd->port->cmds_to_issue[n/2] >> (32*(n&1)); 2329 else 2330 group_allocated = dd->port->cmds_to_issue[n]; 2331 size += sprintf(&buf[size], "%08X ", group_allocated); 2332 } 2333 size += sprintf(&buf[size], "]\n"); 2334 2335 *offset = size <= len ? size : len; 2336 size = copy_to_user(ubuf, buf, *offset); 2337 if (size) 2338 rv = -EFAULT; 2339 2340 kfree(buf); 2341 return rv ? rv : *offset; 2342 } 2343 2344 static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf, 2345 size_t len, loff_t *offset) 2346 { 2347 struct driver_data *dd = (struct driver_data *)f->private_data; 2348 char *buf; 2349 int size = *offset; 2350 int rv = 0; 2351 2352 if (!len || size) 2353 return 0; 2354 2355 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL); 2356 if (!buf) { 2357 dev_err(&dd->pdev->dev, 2358 "Memory allocation: flag buffer\n"); 2359 return -ENOMEM; 2360 } 2361 2362 size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n", 2363 dd->port->flags); 2364 size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n", 2365 dd->dd_flag); 2366 2367 *offset = size <= len ? size : len; 2368 size = copy_to_user(ubuf, buf, *offset); 2369 if (size) 2370 rv = -EFAULT; 2371 2372 kfree(buf); 2373 return rv ? rv : *offset; 2374 } 2375 2376 static const struct file_operations mtip_device_status_fops = { 2377 .owner = THIS_MODULE, 2378 .open = simple_open, 2379 .read = mtip_hw_read_device_status, 2380 .llseek = no_llseek, 2381 }; 2382 2383 static const struct file_operations mtip_regs_fops = { 2384 .owner = THIS_MODULE, 2385 .open = simple_open, 2386 .read = mtip_hw_read_registers, 2387 .llseek = no_llseek, 2388 }; 2389 2390 static const struct file_operations mtip_flags_fops = { 2391 .owner = THIS_MODULE, 2392 .open = simple_open, 2393 .read = mtip_hw_read_flags, 2394 .llseek = no_llseek, 2395 }; 2396 2397 /* 2398 * Create the sysfs related attributes. 2399 * 2400 * @dd Pointer to the driver data structure. 2401 * @kobj Pointer to the kobj for the block device. 2402 * 2403 * return value 2404 * 0 Operation completed successfully. 2405 * -EINVAL Invalid parameter. 2406 */ 2407 static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj) 2408 { 2409 if (!kobj || !dd) 2410 return -EINVAL; 2411 2412 if (sysfs_create_file(kobj, &dev_attr_status.attr)) 2413 dev_warn(&dd->pdev->dev, 2414 "Error creating 'status' sysfs entry\n"); 2415 return 0; 2416 } 2417 2418 /* 2419 * Remove the sysfs related attributes. 2420 * 2421 * @dd Pointer to the driver data structure. 2422 * @kobj Pointer to the kobj for the block device. 2423 * 2424 * return value 2425 * 0 Operation completed successfully. 2426 * -EINVAL Invalid parameter. 2427 */ 2428 static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj) 2429 { 2430 if (!kobj || !dd) 2431 return -EINVAL; 2432 2433 sysfs_remove_file(kobj, &dev_attr_status.attr); 2434 2435 return 0; 2436 } 2437 2438 static int mtip_hw_debugfs_init(struct driver_data *dd) 2439 { 2440 if (!dfs_parent) 2441 return -1; 2442 2443 dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent); 2444 if (IS_ERR_OR_NULL(dd->dfs_node)) { 2445 dev_warn(&dd->pdev->dev, 2446 "Error creating node %s under debugfs\n", 2447 dd->disk->disk_name); 2448 dd->dfs_node = NULL; 2449 return -1; 2450 } 2451 2452 debugfs_create_file("flags", 0444, dd->dfs_node, dd, &mtip_flags_fops); 2453 debugfs_create_file("registers", 0444, dd->dfs_node, dd, 2454 &mtip_regs_fops); 2455 2456 return 0; 2457 } 2458 2459 static void mtip_hw_debugfs_exit(struct driver_data *dd) 2460 { 2461 debugfs_remove_recursive(dd->dfs_node); 2462 } 2463 2464 /* 2465 * Perform any init/resume time hardware setup 2466 * 2467 * @dd Pointer to the driver data structure. 2468 * 2469 * return value 2470 * None 2471 */ 2472 static inline void hba_setup(struct driver_data *dd) 2473 { 2474 u32 hwdata; 2475 hwdata = readl(dd->mmio + HOST_HSORG); 2476 2477 /* interrupt bug workaround: use only 1 IS bit.*/ 2478 writel(hwdata | 2479 HSORG_DISABLE_SLOTGRP_INTR | 2480 HSORG_DISABLE_SLOTGRP_PXIS, 2481 dd->mmio + HOST_HSORG); 2482 } 2483 2484 static int mtip_device_unaligned_constrained(struct driver_data *dd) 2485 { 2486 return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0); 2487 } 2488 2489 /* 2490 * Detect the details of the product, and store anything needed 2491 * into the driver data structure. This includes product type and 2492 * version and number of slot groups. 2493 * 2494 * @dd Pointer to the driver data structure. 2495 * 2496 * return value 2497 * None 2498 */ 2499 static void mtip_detect_product(struct driver_data *dd) 2500 { 2501 u32 hwdata; 2502 unsigned int rev, slotgroups; 2503 2504 /* 2505 * HBA base + 0xFC [15:0] - vendor-specific hardware interface 2506 * info register: 2507 * [15:8] hardware/software interface rev# 2508 * [ 3] asic-style interface 2509 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style). 2510 */ 2511 hwdata = readl(dd->mmio + HOST_HSORG); 2512 2513 dd->product_type = MTIP_PRODUCT_UNKNOWN; 2514 dd->slot_groups = 1; 2515 2516 if (hwdata & 0x8) { 2517 dd->product_type = MTIP_PRODUCT_ASICFPGA; 2518 rev = (hwdata & HSORG_HWREV) >> 8; 2519 slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1; 2520 dev_info(&dd->pdev->dev, 2521 "ASIC-FPGA design, HS rev 0x%x, " 2522 "%i slot groups [%i slots]\n", 2523 rev, 2524 slotgroups, 2525 slotgroups * 32); 2526 2527 if (slotgroups > MTIP_MAX_SLOT_GROUPS) { 2528 dev_warn(&dd->pdev->dev, 2529 "Warning: driver only supports " 2530 "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS); 2531 slotgroups = MTIP_MAX_SLOT_GROUPS; 2532 } 2533 dd->slot_groups = slotgroups; 2534 return; 2535 } 2536 2537 dev_warn(&dd->pdev->dev, "Unrecognized product id\n"); 2538 } 2539 2540 /* 2541 * Blocking wait for FTL rebuild to complete 2542 * 2543 * @dd Pointer to the DRIVER_DATA structure. 2544 * 2545 * return value 2546 * 0 FTL rebuild completed successfully 2547 * -EFAULT FTL rebuild error/timeout/interruption 2548 */ 2549 static int mtip_ftl_rebuild_poll(struct driver_data *dd) 2550 { 2551 unsigned long timeout, cnt = 0, start; 2552 2553 dev_warn(&dd->pdev->dev, 2554 "FTL rebuild in progress. Polling for completion.\n"); 2555 2556 start = jiffies; 2557 timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS); 2558 2559 do { 2560 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, 2561 &dd->dd_flag))) 2562 return -EFAULT; 2563 if (mtip_check_surprise_removal(dd->pdev)) 2564 return -EFAULT; 2565 2566 if (mtip_get_identify(dd->port, NULL) < 0) 2567 return -EFAULT; 2568 2569 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == 2570 MTIP_FTL_REBUILD_MAGIC) { 2571 ssleep(1); 2572 /* Print message every 3 minutes */ 2573 if (cnt++ >= 180) { 2574 dev_warn(&dd->pdev->dev, 2575 "FTL rebuild in progress (%d secs).\n", 2576 jiffies_to_msecs(jiffies - start) / 1000); 2577 cnt = 0; 2578 } 2579 } else { 2580 dev_warn(&dd->pdev->dev, 2581 "FTL rebuild complete (%d secs).\n", 2582 jiffies_to_msecs(jiffies - start) / 1000); 2583 mtip_block_initialize(dd); 2584 return 0; 2585 } 2586 } while (time_before(jiffies, timeout)); 2587 2588 /* Check for timeout */ 2589 dev_err(&dd->pdev->dev, 2590 "Timed out waiting for FTL rebuild to complete (%d secs).\n", 2591 jiffies_to_msecs(jiffies - start) / 1000); 2592 return -EFAULT; 2593 } 2594 2595 static void mtip_softirq_done_fn(struct request *rq) 2596 { 2597 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); 2598 struct driver_data *dd = rq->q->queuedata; 2599 2600 /* Unmap the DMA scatter list entries */ 2601 dma_unmap_sg(&dd->pdev->dev, cmd->sg, cmd->scatter_ents, 2602 cmd->direction); 2603 2604 if (unlikely(cmd->unaligned)) 2605 atomic_inc(&dd->port->cmd_slot_unal); 2606 2607 blk_mq_end_request(rq, cmd->status); 2608 } 2609 2610 static bool mtip_abort_cmd(struct request *req, void *data, bool reserved) 2611 { 2612 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req); 2613 struct driver_data *dd = data; 2614 2615 dbg_printk(MTIP_DRV_NAME " Aborting request, tag = %d\n", req->tag); 2616 2617 clear_bit(req->tag, dd->port->cmds_to_issue); 2618 cmd->status = BLK_STS_IOERR; 2619 mtip_softirq_done_fn(req); 2620 return true; 2621 } 2622 2623 static bool mtip_queue_cmd(struct request *req, void *data, bool reserved) 2624 { 2625 struct driver_data *dd = data; 2626 2627 set_bit(req->tag, dd->port->cmds_to_issue); 2628 blk_abort_request(req); 2629 return true; 2630 } 2631 2632 /* 2633 * service thread to issue queued commands 2634 * 2635 * @data Pointer to the driver data structure. 2636 * 2637 * return value 2638 * 0 2639 */ 2640 2641 static int mtip_service_thread(void *data) 2642 { 2643 struct driver_data *dd = (struct driver_data *)data; 2644 unsigned long slot, slot_start, slot_wrap, to; 2645 unsigned int num_cmd_slots = dd->slot_groups * 32; 2646 struct mtip_port *port = dd->port; 2647 2648 while (1) { 2649 if (kthread_should_stop() || 2650 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags)) 2651 goto st_out; 2652 clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags); 2653 2654 /* 2655 * the condition is to check neither an internal command is 2656 * is in progress nor error handling is active 2657 */ 2658 wait_event_interruptible(port->svc_wait, (port->flags) && 2659 (port->flags & MTIP_PF_SVC_THD_WORK)); 2660 2661 if (kthread_should_stop() || 2662 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags)) 2663 goto st_out; 2664 2665 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, 2666 &dd->dd_flag))) 2667 goto st_out; 2668 2669 set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags); 2670 2671 restart_eh: 2672 /* Demux bits: start with error handling */ 2673 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) { 2674 mtip_handle_tfe(dd); 2675 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); 2676 } 2677 2678 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) 2679 goto restart_eh; 2680 2681 if (test_bit(MTIP_PF_TO_ACTIVE_BIT, &port->flags)) { 2682 to = jiffies + msecs_to_jiffies(5000); 2683 2684 do { 2685 mdelay(100); 2686 } while (atomic_read(&dd->irq_workers_active) != 0 && 2687 time_before(jiffies, to)); 2688 2689 if (atomic_read(&dd->irq_workers_active) != 0) 2690 dev_warn(&dd->pdev->dev, 2691 "Completion workers still active!"); 2692 2693 blk_mq_quiesce_queue(dd->queue); 2694 2695 blk_mq_tagset_busy_iter(&dd->tags, mtip_queue_cmd, dd); 2696 2697 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &dd->port->flags); 2698 2699 if (mtip_device_reset(dd)) 2700 blk_mq_tagset_busy_iter(&dd->tags, 2701 mtip_abort_cmd, dd); 2702 2703 clear_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags); 2704 2705 blk_mq_unquiesce_queue(dd->queue); 2706 } 2707 2708 if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) { 2709 slot = 1; 2710 /* used to restrict the loop to one iteration */ 2711 slot_start = num_cmd_slots; 2712 slot_wrap = 0; 2713 while (1) { 2714 slot = find_next_bit(port->cmds_to_issue, 2715 num_cmd_slots, slot); 2716 if (slot_wrap == 1) { 2717 if ((slot_start >= slot) || 2718 (slot >= num_cmd_slots)) 2719 break; 2720 } 2721 if (unlikely(slot_start == num_cmd_slots)) 2722 slot_start = slot; 2723 2724 if (unlikely(slot == num_cmd_slots)) { 2725 slot = 1; 2726 slot_wrap = 1; 2727 continue; 2728 } 2729 2730 /* Issue the command to the hardware */ 2731 mtip_issue_ncq_command(port, slot); 2732 2733 clear_bit(slot, port->cmds_to_issue); 2734 } 2735 2736 clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags); 2737 } 2738 2739 if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) { 2740 if (mtip_ftl_rebuild_poll(dd) == 0) 2741 clear_bit(MTIP_PF_REBUILD_BIT, &port->flags); 2742 } 2743 } 2744 2745 st_out: 2746 return 0; 2747 } 2748 2749 /* 2750 * DMA region teardown 2751 * 2752 * @dd Pointer to driver_data structure 2753 * 2754 * return value 2755 * None 2756 */ 2757 static void mtip_dma_free(struct driver_data *dd) 2758 { 2759 struct mtip_port *port = dd->port; 2760 2761 if (port->block1) 2762 dma_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ, 2763 port->block1, port->block1_dma); 2764 2765 if (port->command_list) { 2766 dma_free_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ, 2767 port->command_list, port->command_list_dma); 2768 } 2769 } 2770 2771 /* 2772 * DMA region setup 2773 * 2774 * @dd Pointer to driver_data structure 2775 * 2776 * return value 2777 * -ENOMEM Not enough free DMA region space to initialize driver 2778 */ 2779 static int mtip_dma_alloc(struct driver_data *dd) 2780 { 2781 struct mtip_port *port = dd->port; 2782 2783 /* Allocate dma memory for RX Fis, Identify, and Sector Bufffer */ 2784 port->block1 = 2785 dma_alloc_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ, 2786 &port->block1_dma, GFP_KERNEL); 2787 if (!port->block1) 2788 return -ENOMEM; 2789 memset(port->block1, 0, BLOCK_DMA_ALLOC_SZ); 2790 2791 /* Allocate dma memory for command list */ 2792 port->command_list = 2793 dma_alloc_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ, 2794 &port->command_list_dma, GFP_KERNEL); 2795 if (!port->command_list) { 2796 dma_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ, 2797 port->block1, port->block1_dma); 2798 port->block1 = NULL; 2799 port->block1_dma = 0; 2800 return -ENOMEM; 2801 } 2802 memset(port->command_list, 0, AHCI_CMD_TBL_SZ); 2803 2804 /* Setup all pointers into first DMA region */ 2805 port->rxfis = port->block1 + AHCI_RX_FIS_OFFSET; 2806 port->rxfis_dma = port->block1_dma + AHCI_RX_FIS_OFFSET; 2807 port->identify = port->block1 + AHCI_IDFY_OFFSET; 2808 port->identify_dma = port->block1_dma + AHCI_IDFY_OFFSET; 2809 port->log_buf = port->block1 + AHCI_SECTBUF_OFFSET; 2810 port->log_buf_dma = port->block1_dma + AHCI_SECTBUF_OFFSET; 2811 port->smart_buf = port->block1 + AHCI_SMARTBUF_OFFSET; 2812 port->smart_buf_dma = port->block1_dma + AHCI_SMARTBUF_OFFSET; 2813 2814 return 0; 2815 } 2816 2817 static int mtip_hw_get_identify(struct driver_data *dd) 2818 { 2819 struct smart_attr attr242; 2820 unsigned char *buf; 2821 int rv; 2822 2823 if (mtip_get_identify(dd->port, NULL) < 0) 2824 return -EFAULT; 2825 2826 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == 2827 MTIP_FTL_REBUILD_MAGIC) { 2828 set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags); 2829 return MTIP_FTL_REBUILD_MAGIC; 2830 } 2831 mtip_dump_identify(dd->port); 2832 2833 /* check write protect, over temp and rebuild statuses */ 2834 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ, 2835 dd->port->log_buf, 2836 dd->port->log_buf_dma, 1); 2837 if (rv) { 2838 dev_warn(&dd->pdev->dev, 2839 "Error in READ LOG EXT (10h) command\n"); 2840 /* non-critical error, don't fail the load */ 2841 } else { 2842 buf = (unsigned char *)dd->port->log_buf; 2843 if (buf[259] & 0x1) { 2844 dev_info(&dd->pdev->dev, 2845 "Write protect bit is set.\n"); 2846 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag); 2847 } 2848 if (buf[288] == 0xF7) { 2849 dev_info(&dd->pdev->dev, 2850 "Exceeded Tmax, drive in thermal shutdown.\n"); 2851 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag); 2852 } 2853 if (buf[288] == 0xBF) { 2854 dev_info(&dd->pdev->dev, 2855 "Drive indicates rebuild has failed.\n"); 2856 set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag); 2857 } 2858 } 2859 2860 /* get write protect progess */ 2861 memset(&attr242, 0, sizeof(struct smart_attr)); 2862 if (mtip_get_smart_attr(dd->port, 242, &attr242)) 2863 dev_warn(&dd->pdev->dev, 2864 "Unable to check write protect progress\n"); 2865 else 2866 dev_info(&dd->pdev->dev, 2867 "Write protect progress: %u%% (%u blocks)\n", 2868 attr242.cur, le32_to_cpu(attr242.data)); 2869 2870 return rv; 2871 } 2872 2873 /* 2874 * Called once for each card. 2875 * 2876 * @dd Pointer to the driver data structure. 2877 * 2878 * return value 2879 * 0 on success, else an error code. 2880 */ 2881 static int mtip_hw_init(struct driver_data *dd) 2882 { 2883 int i; 2884 int rv; 2885 unsigned long timeout, timetaken; 2886 2887 dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR]; 2888 2889 mtip_detect_product(dd); 2890 if (dd->product_type == MTIP_PRODUCT_UNKNOWN) { 2891 rv = -EIO; 2892 goto out1; 2893 } 2894 2895 hba_setup(dd); 2896 2897 dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL, 2898 dd->numa_node); 2899 if (!dd->port) { 2900 dev_err(&dd->pdev->dev, 2901 "Memory allocation: port structure\n"); 2902 return -ENOMEM; 2903 } 2904 2905 /* Continue workqueue setup */ 2906 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++) 2907 dd->work[i].port = dd->port; 2908 2909 /* Enable unaligned IO constraints for some devices */ 2910 if (mtip_device_unaligned_constrained(dd)) 2911 dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS; 2912 else 2913 dd->unal_qdepth = 0; 2914 2915 atomic_set(&dd->port->cmd_slot_unal, dd->unal_qdepth); 2916 2917 /* Spinlock to prevent concurrent issue */ 2918 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++) 2919 spin_lock_init(&dd->port->cmd_issue_lock[i]); 2920 2921 /* Set the port mmio base address. */ 2922 dd->port->mmio = dd->mmio + PORT_OFFSET; 2923 dd->port->dd = dd; 2924 2925 /* DMA allocations */ 2926 rv = mtip_dma_alloc(dd); 2927 if (rv < 0) 2928 goto out1; 2929 2930 /* Setup the pointers to the extended s_active and CI registers. */ 2931 for (i = 0; i < dd->slot_groups; i++) { 2932 dd->port->s_active[i] = 2933 dd->port->mmio + i*0x80 + PORT_SCR_ACT; 2934 dd->port->cmd_issue[i] = 2935 dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE; 2936 dd->port->completed[i] = 2937 dd->port->mmio + i*0x80 + PORT_SDBV; 2938 } 2939 2940 timetaken = jiffies; 2941 timeout = jiffies + msecs_to_jiffies(30000); 2942 while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) && 2943 time_before(jiffies, timeout)) { 2944 mdelay(100); 2945 } 2946 if (unlikely(mtip_check_surprise_removal(dd->pdev))) { 2947 timetaken = jiffies - timetaken; 2948 dev_warn(&dd->pdev->dev, 2949 "Surprise removal detected at %u ms\n", 2950 jiffies_to_msecs(timetaken)); 2951 rv = -ENODEV; 2952 goto out2 ; 2953 } 2954 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) { 2955 timetaken = jiffies - timetaken; 2956 dev_warn(&dd->pdev->dev, 2957 "Removal detected at %u ms\n", 2958 jiffies_to_msecs(timetaken)); 2959 rv = -EFAULT; 2960 goto out2; 2961 } 2962 2963 /* Conditionally reset the HBA. */ 2964 if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) { 2965 if (mtip_hba_reset(dd) < 0) { 2966 dev_err(&dd->pdev->dev, 2967 "Card did not reset within timeout\n"); 2968 rv = -EIO; 2969 goto out2; 2970 } 2971 } else { 2972 /* Clear any pending interrupts on the HBA */ 2973 writel(readl(dd->mmio + HOST_IRQ_STAT), 2974 dd->mmio + HOST_IRQ_STAT); 2975 } 2976 2977 mtip_init_port(dd->port); 2978 mtip_start_port(dd->port); 2979 2980 /* Setup the ISR and enable interrupts. */ 2981 rv = request_irq(dd->pdev->irq, mtip_irq_handler, IRQF_SHARED, 2982 dev_driver_string(&dd->pdev->dev), dd); 2983 if (rv) { 2984 dev_err(&dd->pdev->dev, 2985 "Unable to allocate IRQ %d\n", dd->pdev->irq); 2986 goto out2; 2987 } 2988 irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding)); 2989 2990 /* Enable interrupts on the HBA. */ 2991 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, 2992 dd->mmio + HOST_CTL); 2993 2994 init_waitqueue_head(&dd->port->svc_wait); 2995 2996 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) { 2997 rv = -EFAULT; 2998 goto out3; 2999 } 3000 3001 return rv; 3002 3003 out3: 3004 /* Disable interrupts on the HBA. */ 3005 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, 3006 dd->mmio + HOST_CTL); 3007 3008 /* Release the IRQ. */ 3009 irq_set_affinity_hint(dd->pdev->irq, NULL); 3010 free_irq(dd->pdev->irq, dd); 3011 3012 out2: 3013 mtip_deinit_port(dd->port); 3014 mtip_dma_free(dd); 3015 3016 out1: 3017 /* Free the memory allocated for the for structure. */ 3018 kfree(dd->port); 3019 3020 return rv; 3021 } 3022 3023 static int mtip_standby_drive(struct driver_data *dd) 3024 { 3025 int rv = 0; 3026 3027 if (dd->sr || !dd->port) 3028 return -ENODEV; 3029 /* 3030 * Send standby immediate (E0h) to the drive so that it 3031 * saves its state. 3032 */ 3033 if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags) && 3034 !test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag) && 3035 !test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag)) { 3036 rv = mtip_standby_immediate(dd->port); 3037 if (rv) 3038 dev_warn(&dd->pdev->dev, 3039 "STANDBY IMMEDIATE failed\n"); 3040 } 3041 return rv; 3042 } 3043 3044 /* 3045 * Called to deinitialize an interface. 3046 * 3047 * @dd Pointer to the driver data structure. 3048 * 3049 * return value 3050 * 0 3051 */ 3052 static int mtip_hw_exit(struct driver_data *dd) 3053 { 3054 if (!dd->sr) { 3055 /* de-initialize the port. */ 3056 mtip_deinit_port(dd->port); 3057 3058 /* Disable interrupts on the HBA. */ 3059 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, 3060 dd->mmio + HOST_CTL); 3061 } 3062 3063 /* Release the IRQ. */ 3064 irq_set_affinity_hint(dd->pdev->irq, NULL); 3065 free_irq(dd->pdev->irq, dd); 3066 msleep(1000); 3067 3068 /* Free dma regions */ 3069 mtip_dma_free(dd); 3070 3071 /* Free the memory allocated for the for structure. */ 3072 kfree(dd->port); 3073 dd->port = NULL; 3074 3075 return 0; 3076 } 3077 3078 /* 3079 * Issue a Standby Immediate command to the device. 3080 * 3081 * This function is called by the Block Layer just before the 3082 * system powers off during a shutdown. 3083 * 3084 * @dd Pointer to the driver data structure. 3085 * 3086 * return value 3087 * 0 3088 */ 3089 static int mtip_hw_shutdown(struct driver_data *dd) 3090 { 3091 /* 3092 * Send standby immediate (E0h) to the drive so that it 3093 * saves its state. 3094 */ 3095 mtip_standby_drive(dd); 3096 3097 return 0; 3098 } 3099 3100 /* 3101 * Suspend function 3102 * 3103 * This function is called by the Block Layer just before the 3104 * system hibernates. 3105 * 3106 * @dd Pointer to the driver data structure. 3107 * 3108 * return value 3109 * 0 Suspend was successful 3110 * -EFAULT Suspend was not successful 3111 */ 3112 static int mtip_hw_suspend(struct driver_data *dd) 3113 { 3114 /* 3115 * Send standby immediate (E0h) to the drive 3116 * so that it saves its state. 3117 */ 3118 if (mtip_standby_drive(dd) != 0) { 3119 dev_err(&dd->pdev->dev, 3120 "Failed standby-immediate command\n"); 3121 return -EFAULT; 3122 } 3123 3124 /* Disable interrupts on the HBA.*/ 3125 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, 3126 dd->mmio + HOST_CTL); 3127 mtip_deinit_port(dd->port); 3128 3129 return 0; 3130 } 3131 3132 /* 3133 * Resume function 3134 * 3135 * This function is called by the Block Layer as the 3136 * system resumes. 3137 * 3138 * @dd Pointer to the driver data structure. 3139 * 3140 * return value 3141 * 0 Resume was successful 3142 * -EFAULT Resume was not successful 3143 */ 3144 static int mtip_hw_resume(struct driver_data *dd) 3145 { 3146 /* Perform any needed hardware setup steps */ 3147 hba_setup(dd); 3148 3149 /* Reset the HBA */ 3150 if (mtip_hba_reset(dd) != 0) { 3151 dev_err(&dd->pdev->dev, 3152 "Unable to reset the HBA\n"); 3153 return -EFAULT; 3154 } 3155 3156 /* 3157 * Enable the port, DMA engine, and FIS reception specific 3158 * h/w in controller. 3159 */ 3160 mtip_init_port(dd->port); 3161 mtip_start_port(dd->port); 3162 3163 /* Enable interrupts on the HBA.*/ 3164 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, 3165 dd->mmio + HOST_CTL); 3166 3167 return 0; 3168 } 3169 3170 /* 3171 * Helper function for reusing disk name 3172 * upon hot insertion. 3173 */ 3174 static int rssd_disk_name_format(char *prefix, 3175 int index, 3176 char *buf, 3177 int buflen) 3178 { 3179 const int base = 'z' - 'a' + 1; 3180 char *begin = buf + strlen(prefix); 3181 char *end = buf + buflen; 3182 char *p; 3183 int unit; 3184 3185 p = end - 1; 3186 *p = '\0'; 3187 unit = base; 3188 do { 3189 if (p == begin) 3190 return -EINVAL; 3191 *--p = 'a' + (index % unit); 3192 index = (index / unit) - 1; 3193 } while (index >= 0); 3194 3195 memmove(begin, p, end - p); 3196 memcpy(buf, prefix, strlen(prefix)); 3197 3198 return 0; 3199 } 3200 3201 /* 3202 * Block layer IOCTL handler. 3203 * 3204 * @dev Pointer to the block_device structure. 3205 * @mode ignored 3206 * @cmd IOCTL command passed from the user application. 3207 * @arg Argument passed from the user application. 3208 * 3209 * return value 3210 * 0 IOCTL completed successfully. 3211 * -ENOTTY IOCTL not supported or invalid driver data 3212 * structure pointer. 3213 */ 3214 static int mtip_block_ioctl(struct block_device *dev, 3215 fmode_t mode, 3216 unsigned cmd, 3217 unsigned long arg) 3218 { 3219 struct driver_data *dd = dev->bd_disk->private_data; 3220 3221 if (!capable(CAP_SYS_ADMIN)) 3222 return -EACCES; 3223 3224 if (!dd) 3225 return -ENOTTY; 3226 3227 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) 3228 return -ENOTTY; 3229 3230 switch (cmd) { 3231 case BLKFLSBUF: 3232 return -ENOTTY; 3233 default: 3234 return mtip_hw_ioctl(dd, cmd, arg); 3235 } 3236 } 3237 3238 #ifdef CONFIG_COMPAT 3239 /* 3240 * Block layer compat IOCTL handler. 3241 * 3242 * @dev Pointer to the block_device structure. 3243 * @mode ignored 3244 * @cmd IOCTL command passed from the user application. 3245 * @arg Argument passed from the user application. 3246 * 3247 * return value 3248 * 0 IOCTL completed successfully. 3249 * -ENOTTY IOCTL not supported or invalid driver data 3250 * structure pointer. 3251 */ 3252 static int mtip_block_compat_ioctl(struct block_device *dev, 3253 fmode_t mode, 3254 unsigned cmd, 3255 unsigned long arg) 3256 { 3257 struct driver_data *dd = dev->bd_disk->private_data; 3258 3259 if (!capable(CAP_SYS_ADMIN)) 3260 return -EACCES; 3261 3262 if (!dd) 3263 return -ENOTTY; 3264 3265 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) 3266 return -ENOTTY; 3267 3268 switch (cmd) { 3269 case BLKFLSBUF: 3270 return -ENOTTY; 3271 case HDIO_DRIVE_TASKFILE: { 3272 struct mtip_compat_ide_task_request_s __user *compat_req_task; 3273 ide_task_request_t req_task; 3274 int compat_tasksize, outtotal, ret; 3275 3276 compat_tasksize = 3277 sizeof(struct mtip_compat_ide_task_request_s); 3278 3279 compat_req_task = 3280 (struct mtip_compat_ide_task_request_s __user *) arg; 3281 3282 if (copy_from_user(&req_task, (void __user *) arg, 3283 compat_tasksize - (2 * sizeof(compat_long_t)))) 3284 return -EFAULT; 3285 3286 if (get_user(req_task.out_size, &compat_req_task->out_size)) 3287 return -EFAULT; 3288 3289 if (get_user(req_task.in_size, &compat_req_task->in_size)) 3290 return -EFAULT; 3291 3292 outtotal = sizeof(struct mtip_compat_ide_task_request_s); 3293 3294 ret = exec_drive_taskfile(dd, (void __user *) arg, 3295 &req_task, outtotal); 3296 3297 if (copy_to_user((void __user *) arg, &req_task, 3298 compat_tasksize - 3299 (2 * sizeof(compat_long_t)))) 3300 return -EFAULT; 3301 3302 if (put_user(req_task.out_size, &compat_req_task->out_size)) 3303 return -EFAULT; 3304 3305 if (put_user(req_task.in_size, &compat_req_task->in_size)) 3306 return -EFAULT; 3307 3308 return ret; 3309 } 3310 default: 3311 return mtip_hw_ioctl(dd, cmd, arg); 3312 } 3313 } 3314 #endif 3315 3316 /* 3317 * Obtain the geometry of the device. 3318 * 3319 * You may think that this function is obsolete, but some applications, 3320 * fdisk for example still used CHS values. This function describes the 3321 * device as having 224 heads and 56 sectors per cylinder. These values are 3322 * chosen so that each cylinder is aligned on a 4KB boundary. Since a 3323 * partition is described in terms of a start and end cylinder this means 3324 * that each partition is also 4KB aligned. Non-aligned partitions adversely 3325 * affects performance. 3326 * 3327 * @dev Pointer to the block_device strucutre. 3328 * @geo Pointer to a hd_geometry structure. 3329 * 3330 * return value 3331 * 0 Operation completed successfully. 3332 * -ENOTTY An error occurred while reading the drive capacity. 3333 */ 3334 static int mtip_block_getgeo(struct block_device *dev, 3335 struct hd_geometry *geo) 3336 { 3337 struct driver_data *dd = dev->bd_disk->private_data; 3338 sector_t capacity; 3339 3340 if (!dd) 3341 return -ENOTTY; 3342 3343 if (!(mtip_hw_get_capacity(dd, &capacity))) { 3344 dev_warn(&dd->pdev->dev, 3345 "Could not get drive capacity.\n"); 3346 return -ENOTTY; 3347 } 3348 3349 geo->heads = 224; 3350 geo->sectors = 56; 3351 sector_div(capacity, (geo->heads * geo->sectors)); 3352 geo->cylinders = capacity; 3353 return 0; 3354 } 3355 3356 static int mtip_block_open(struct block_device *dev, fmode_t mode) 3357 { 3358 struct driver_data *dd; 3359 3360 if (dev && dev->bd_disk) { 3361 dd = (struct driver_data *) dev->bd_disk->private_data; 3362 3363 if (dd) { 3364 if (test_bit(MTIP_DDF_REMOVAL_BIT, 3365 &dd->dd_flag)) { 3366 return -ENODEV; 3367 } 3368 return 0; 3369 } 3370 } 3371 return -ENODEV; 3372 } 3373 3374 static void mtip_block_release(struct gendisk *disk, fmode_t mode) 3375 { 3376 } 3377 3378 /* 3379 * Block device operation function. 3380 * 3381 * This structure contains pointers to the functions required by the block 3382 * layer. 3383 */ 3384 static const struct block_device_operations mtip_block_ops = { 3385 .open = mtip_block_open, 3386 .release = mtip_block_release, 3387 .ioctl = mtip_block_ioctl, 3388 #ifdef CONFIG_COMPAT 3389 .compat_ioctl = mtip_block_compat_ioctl, 3390 #endif 3391 .getgeo = mtip_block_getgeo, 3392 .owner = THIS_MODULE 3393 }; 3394 3395 static inline bool is_se_active(struct driver_data *dd) 3396 { 3397 if (unlikely(test_bit(MTIP_PF_SE_ACTIVE_BIT, &dd->port->flags))) { 3398 if (dd->port->ic_pause_timer) { 3399 unsigned long to = dd->port->ic_pause_timer + 3400 msecs_to_jiffies(1000); 3401 if (time_after(jiffies, to)) { 3402 clear_bit(MTIP_PF_SE_ACTIVE_BIT, 3403 &dd->port->flags); 3404 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag); 3405 dd->port->ic_pause_timer = 0; 3406 wake_up_interruptible(&dd->port->svc_wait); 3407 return false; 3408 } 3409 } 3410 return true; 3411 } 3412 return false; 3413 } 3414 3415 static inline bool is_stopped(struct driver_data *dd, struct request *rq) 3416 { 3417 if (likely(!(dd->dd_flag & MTIP_DDF_STOP_IO))) 3418 return false; 3419 3420 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) 3421 return true; 3422 if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag)) 3423 return true; 3424 if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag) && 3425 rq_data_dir(rq)) 3426 return true; 3427 if (test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag)) 3428 return true; 3429 if (test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag)) 3430 return true; 3431 3432 return false; 3433 } 3434 3435 static bool mtip_check_unal_depth(struct blk_mq_hw_ctx *hctx, 3436 struct request *rq) 3437 { 3438 struct driver_data *dd = hctx->queue->queuedata; 3439 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); 3440 3441 if (rq_data_dir(rq) == READ || !dd->unal_qdepth) 3442 return false; 3443 3444 /* 3445 * If unaligned depth must be limited on this controller, mark it 3446 * as unaligned if the IO isn't on a 4k boundary (start of length). 3447 */ 3448 if (blk_rq_sectors(rq) <= 64) { 3449 if ((blk_rq_pos(rq) & 7) || (blk_rq_sectors(rq) & 7)) 3450 cmd->unaligned = 1; 3451 } 3452 3453 if (cmd->unaligned && atomic_dec_if_positive(&dd->port->cmd_slot_unal) >= 0) 3454 return true; 3455 3456 return false; 3457 } 3458 3459 static blk_status_t mtip_issue_reserved_cmd(struct blk_mq_hw_ctx *hctx, 3460 struct request *rq) 3461 { 3462 struct driver_data *dd = hctx->queue->queuedata; 3463 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); 3464 struct mtip_int_cmd *icmd = cmd->icmd; 3465 struct mtip_cmd_hdr *hdr = 3466 dd->port->command_list + sizeof(struct mtip_cmd_hdr) * rq->tag; 3467 struct mtip_cmd_sg *command_sg; 3468 3469 if (mtip_commands_active(dd->port)) 3470 return BLK_STS_DEV_RESOURCE; 3471 3472 hdr->ctba = cpu_to_le32(cmd->command_dma & 0xFFFFFFFF); 3473 if (test_bit(MTIP_PF_HOST_CAP_64, &dd->port->flags)) 3474 hdr->ctbau = cpu_to_le32((cmd->command_dma >> 16) >> 16); 3475 /* Populate the SG list */ 3476 hdr->opts = cpu_to_le32(icmd->opts | icmd->fis_len); 3477 if (icmd->buf_len) { 3478 command_sg = cmd->command + AHCI_CMD_TBL_HDR_SZ; 3479 3480 command_sg->info = cpu_to_le32((icmd->buf_len-1) & 0x3FFFFF); 3481 command_sg->dba = cpu_to_le32(icmd->buffer & 0xFFFFFFFF); 3482 command_sg->dba_upper = 3483 cpu_to_le32((icmd->buffer >> 16) >> 16); 3484 3485 hdr->opts |= cpu_to_le32((1 << 16)); 3486 } 3487 3488 /* Populate the command header */ 3489 hdr->byte_count = 0; 3490 3491 blk_mq_start_request(rq); 3492 mtip_issue_non_ncq_command(dd->port, rq->tag); 3493 return 0; 3494 } 3495 3496 static blk_status_t mtip_queue_rq(struct blk_mq_hw_ctx *hctx, 3497 const struct blk_mq_queue_data *bd) 3498 { 3499 struct driver_data *dd = hctx->queue->queuedata; 3500 struct request *rq = bd->rq; 3501 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); 3502 3503 if (blk_rq_is_passthrough(rq)) 3504 return mtip_issue_reserved_cmd(hctx, rq); 3505 3506 if (unlikely(mtip_check_unal_depth(hctx, rq))) 3507 return BLK_STS_DEV_RESOURCE; 3508 3509 if (is_se_active(dd) || is_stopped(dd, rq)) 3510 return BLK_STS_IOERR; 3511 3512 blk_mq_start_request(rq); 3513 3514 mtip_hw_submit_io(dd, rq, cmd, hctx); 3515 return BLK_STS_OK; 3516 } 3517 3518 static void mtip_free_cmd(struct blk_mq_tag_set *set, struct request *rq, 3519 unsigned int hctx_idx) 3520 { 3521 struct driver_data *dd = set->driver_data; 3522 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); 3523 3524 if (!cmd->command) 3525 return; 3526 3527 dma_free_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ, cmd->command, 3528 cmd->command_dma); 3529 } 3530 3531 static int mtip_init_cmd(struct blk_mq_tag_set *set, struct request *rq, 3532 unsigned int hctx_idx, unsigned int numa_node) 3533 { 3534 struct driver_data *dd = set->driver_data; 3535 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); 3536 3537 cmd->command = dma_alloc_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ, 3538 &cmd->command_dma, GFP_KERNEL); 3539 if (!cmd->command) 3540 return -ENOMEM; 3541 3542 memset(cmd->command, 0, CMD_DMA_ALLOC_SZ); 3543 3544 sg_init_table(cmd->sg, MTIP_MAX_SG); 3545 return 0; 3546 } 3547 3548 static enum blk_eh_timer_return mtip_cmd_timeout(struct request *req, 3549 bool reserved) 3550 { 3551 struct driver_data *dd = req->q->queuedata; 3552 3553 if (reserved) { 3554 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req); 3555 3556 cmd->status = BLK_STS_TIMEOUT; 3557 blk_mq_complete_request(req); 3558 return BLK_EH_DONE; 3559 } 3560 3561 if (test_bit(req->tag, dd->port->cmds_to_issue)) 3562 goto exit_handler; 3563 3564 if (test_and_set_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags)) 3565 goto exit_handler; 3566 3567 wake_up_interruptible(&dd->port->svc_wait); 3568 exit_handler: 3569 return BLK_EH_RESET_TIMER; 3570 } 3571 3572 static const struct blk_mq_ops mtip_mq_ops = { 3573 .queue_rq = mtip_queue_rq, 3574 .init_request = mtip_init_cmd, 3575 .exit_request = mtip_free_cmd, 3576 .complete = mtip_softirq_done_fn, 3577 .timeout = mtip_cmd_timeout, 3578 }; 3579 3580 /* 3581 * Block layer initialization function. 3582 * 3583 * This function is called once by the PCI layer for each P320 3584 * device that is connected to the system. 3585 * 3586 * @dd Pointer to the driver data structure. 3587 * 3588 * return value 3589 * 0 on success else an error code. 3590 */ 3591 static int mtip_block_initialize(struct driver_data *dd) 3592 { 3593 int rv = 0, wait_for_rebuild = 0; 3594 sector_t capacity; 3595 unsigned int index = 0; 3596 struct kobject *kobj; 3597 3598 if (dd->disk) 3599 goto skip_create_disk; /* hw init done, before rebuild */ 3600 3601 if (mtip_hw_init(dd)) { 3602 rv = -EINVAL; 3603 goto protocol_init_error; 3604 } 3605 3606 dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node); 3607 if (dd->disk == NULL) { 3608 dev_err(&dd->pdev->dev, 3609 "Unable to allocate gendisk structure\n"); 3610 rv = -EINVAL; 3611 goto alloc_disk_error; 3612 } 3613 3614 rv = ida_alloc(&rssd_index_ida, GFP_KERNEL); 3615 if (rv < 0) 3616 goto ida_get_error; 3617 index = rv; 3618 3619 rv = rssd_disk_name_format("rssd", 3620 index, 3621 dd->disk->disk_name, 3622 DISK_NAME_LEN); 3623 if (rv) 3624 goto disk_index_error; 3625 3626 dd->disk->major = dd->major; 3627 dd->disk->first_minor = index * MTIP_MAX_MINORS; 3628 dd->disk->minors = MTIP_MAX_MINORS; 3629 dd->disk->fops = &mtip_block_ops; 3630 dd->disk->private_data = dd; 3631 dd->index = index; 3632 3633 mtip_hw_debugfs_init(dd); 3634 3635 memset(&dd->tags, 0, sizeof(dd->tags)); 3636 dd->tags.ops = &mtip_mq_ops; 3637 dd->tags.nr_hw_queues = 1; 3638 dd->tags.queue_depth = MTIP_MAX_COMMAND_SLOTS; 3639 dd->tags.reserved_tags = 1; 3640 dd->tags.cmd_size = sizeof(struct mtip_cmd); 3641 dd->tags.numa_node = dd->numa_node; 3642 dd->tags.flags = BLK_MQ_F_SHOULD_MERGE; 3643 dd->tags.driver_data = dd; 3644 dd->tags.timeout = MTIP_NCQ_CMD_TIMEOUT_MS; 3645 3646 rv = blk_mq_alloc_tag_set(&dd->tags); 3647 if (rv) { 3648 dev_err(&dd->pdev->dev, 3649 "Unable to allocate request queue\n"); 3650 goto block_queue_alloc_tag_error; 3651 } 3652 3653 /* Allocate the request queue. */ 3654 dd->queue = blk_mq_init_queue(&dd->tags); 3655 if (IS_ERR(dd->queue)) { 3656 dev_err(&dd->pdev->dev, 3657 "Unable to allocate request queue\n"); 3658 rv = -ENOMEM; 3659 goto block_queue_alloc_init_error; 3660 } 3661 3662 dd->disk->queue = dd->queue; 3663 dd->queue->queuedata = dd; 3664 3665 skip_create_disk: 3666 /* Initialize the protocol layer. */ 3667 wait_for_rebuild = mtip_hw_get_identify(dd); 3668 if (wait_for_rebuild < 0) { 3669 dev_err(&dd->pdev->dev, 3670 "Protocol layer initialization failed\n"); 3671 rv = -EINVAL; 3672 goto init_hw_cmds_error; 3673 } 3674 3675 /* 3676 * if rebuild pending, start the service thread, and delay the block 3677 * queue creation and device_add_disk() 3678 */ 3679 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC) 3680 goto start_service_thread; 3681 3682 /* Set device limits. */ 3683 blk_queue_flag_set(QUEUE_FLAG_NONROT, dd->queue); 3684 blk_queue_flag_clear(QUEUE_FLAG_ADD_RANDOM, dd->queue); 3685 blk_queue_max_segments(dd->queue, MTIP_MAX_SG); 3686 blk_queue_physical_block_size(dd->queue, 4096); 3687 blk_queue_max_hw_sectors(dd->queue, 0xffff); 3688 blk_queue_max_segment_size(dd->queue, 0x400000); 3689 blk_queue_io_min(dd->queue, 4096); 3690 3691 /* Set the capacity of the device in 512 byte sectors. */ 3692 if (!(mtip_hw_get_capacity(dd, &capacity))) { 3693 dev_warn(&dd->pdev->dev, 3694 "Could not read drive capacity\n"); 3695 rv = -EIO; 3696 goto read_capacity_error; 3697 } 3698 set_capacity(dd->disk, capacity); 3699 3700 /* Enable the block device and add it to /dev */ 3701 device_add_disk(&dd->pdev->dev, dd->disk, NULL); 3702 3703 dd->bdev = bdget_disk(dd->disk, 0); 3704 /* 3705 * Now that the disk is active, initialize any sysfs attributes 3706 * managed by the protocol layer. 3707 */ 3708 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); 3709 if (kobj) { 3710 mtip_hw_sysfs_init(dd, kobj); 3711 kobject_put(kobj); 3712 } 3713 3714 if (dd->mtip_svc_handler) { 3715 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag); 3716 return rv; /* service thread created for handling rebuild */ 3717 } 3718 3719 start_service_thread: 3720 dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread, 3721 dd, dd->numa_node, 3722 "mtip_svc_thd_%02d", index); 3723 3724 if (IS_ERR(dd->mtip_svc_handler)) { 3725 dev_err(&dd->pdev->dev, "service thread failed to start\n"); 3726 dd->mtip_svc_handler = NULL; 3727 rv = -EFAULT; 3728 goto kthread_run_error; 3729 } 3730 wake_up_process(dd->mtip_svc_handler); 3731 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC) 3732 rv = wait_for_rebuild; 3733 3734 return rv; 3735 3736 kthread_run_error: 3737 bdput(dd->bdev); 3738 dd->bdev = NULL; 3739 3740 /* Delete our gendisk. This also removes the device from /dev */ 3741 del_gendisk(dd->disk); 3742 3743 read_capacity_error: 3744 init_hw_cmds_error: 3745 blk_cleanup_queue(dd->queue); 3746 block_queue_alloc_init_error: 3747 blk_mq_free_tag_set(&dd->tags); 3748 block_queue_alloc_tag_error: 3749 mtip_hw_debugfs_exit(dd); 3750 disk_index_error: 3751 ida_free(&rssd_index_ida, index); 3752 3753 ida_get_error: 3754 put_disk(dd->disk); 3755 3756 alloc_disk_error: 3757 mtip_hw_exit(dd); /* De-initialize the protocol layer. */ 3758 3759 protocol_init_error: 3760 return rv; 3761 } 3762 3763 static bool mtip_no_dev_cleanup(struct request *rq, void *data, bool reserv) 3764 { 3765 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); 3766 3767 cmd->status = BLK_STS_IOERR; 3768 blk_mq_complete_request(rq); 3769 return true; 3770 } 3771 3772 /* 3773 * Block layer deinitialization function. 3774 * 3775 * Called by the PCI layer as each P320 device is removed. 3776 * 3777 * @dd Pointer to the driver data structure. 3778 * 3779 * return value 3780 * 0 3781 */ 3782 static int mtip_block_remove(struct driver_data *dd) 3783 { 3784 struct kobject *kobj; 3785 3786 mtip_hw_debugfs_exit(dd); 3787 3788 if (dd->mtip_svc_handler) { 3789 set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags); 3790 wake_up_interruptible(&dd->port->svc_wait); 3791 kthread_stop(dd->mtip_svc_handler); 3792 } 3793 3794 /* Clean up the sysfs attributes, if created */ 3795 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) { 3796 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); 3797 if (kobj) { 3798 mtip_hw_sysfs_exit(dd, kobj); 3799 kobject_put(kobj); 3800 } 3801 } 3802 3803 if (!dd->sr) { 3804 /* 3805 * Explicitly wait here for IOs to quiesce, 3806 * as mtip_standby_drive usually won't wait for IOs. 3807 */ 3808 if (!mtip_quiesce_io(dd->port, MTIP_QUIESCE_IO_TIMEOUT_MS)) 3809 mtip_standby_drive(dd); 3810 } 3811 else 3812 dev_info(&dd->pdev->dev, "device %s surprise removal\n", 3813 dd->disk->disk_name); 3814 3815 blk_freeze_queue_start(dd->queue); 3816 blk_mq_quiesce_queue(dd->queue); 3817 blk_mq_tagset_busy_iter(&dd->tags, mtip_no_dev_cleanup, dd); 3818 blk_mq_unquiesce_queue(dd->queue); 3819 3820 /* 3821 * Delete our gendisk structure. This also removes the device 3822 * from /dev 3823 */ 3824 if (dd->bdev) { 3825 bdput(dd->bdev); 3826 dd->bdev = NULL; 3827 } 3828 if (dd->disk) { 3829 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) 3830 del_gendisk(dd->disk); 3831 if (dd->disk->queue) { 3832 blk_cleanup_queue(dd->queue); 3833 blk_mq_free_tag_set(&dd->tags); 3834 dd->queue = NULL; 3835 } 3836 put_disk(dd->disk); 3837 } 3838 dd->disk = NULL; 3839 3840 ida_free(&rssd_index_ida, dd->index); 3841 3842 /* De-initialize the protocol layer. */ 3843 mtip_hw_exit(dd); 3844 3845 return 0; 3846 } 3847 3848 /* 3849 * Function called by the PCI layer when just before the 3850 * machine shuts down. 3851 * 3852 * If a protocol layer shutdown function is present it will be called 3853 * by this function. 3854 * 3855 * @dd Pointer to the driver data structure. 3856 * 3857 * return value 3858 * 0 3859 */ 3860 static int mtip_block_shutdown(struct driver_data *dd) 3861 { 3862 mtip_hw_shutdown(dd); 3863 3864 /* Delete our gendisk structure, and cleanup the blk queue. */ 3865 if (dd->disk) { 3866 dev_info(&dd->pdev->dev, 3867 "Shutting down %s ...\n", dd->disk->disk_name); 3868 3869 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) 3870 del_gendisk(dd->disk); 3871 if (dd->disk->queue) { 3872 blk_cleanup_queue(dd->queue); 3873 blk_mq_free_tag_set(&dd->tags); 3874 } 3875 put_disk(dd->disk); 3876 dd->disk = NULL; 3877 dd->queue = NULL; 3878 } 3879 3880 ida_free(&rssd_index_ida, dd->index); 3881 return 0; 3882 } 3883 3884 static int mtip_block_suspend(struct driver_data *dd) 3885 { 3886 dev_info(&dd->pdev->dev, 3887 "Suspending %s ...\n", dd->disk->disk_name); 3888 mtip_hw_suspend(dd); 3889 return 0; 3890 } 3891 3892 static int mtip_block_resume(struct driver_data *dd) 3893 { 3894 dev_info(&dd->pdev->dev, "Resuming %s ...\n", 3895 dd->disk->disk_name); 3896 mtip_hw_resume(dd); 3897 return 0; 3898 } 3899 3900 static void drop_cpu(int cpu) 3901 { 3902 cpu_use[cpu]--; 3903 } 3904 3905 static int get_least_used_cpu_on_node(int node) 3906 { 3907 int cpu, least_used_cpu, least_cnt; 3908 const struct cpumask *node_mask; 3909 3910 node_mask = cpumask_of_node(node); 3911 least_used_cpu = cpumask_first(node_mask); 3912 least_cnt = cpu_use[least_used_cpu]; 3913 cpu = least_used_cpu; 3914 3915 for_each_cpu(cpu, node_mask) { 3916 if (cpu_use[cpu] < least_cnt) { 3917 least_used_cpu = cpu; 3918 least_cnt = cpu_use[cpu]; 3919 } 3920 } 3921 cpu_use[least_used_cpu]++; 3922 return least_used_cpu; 3923 } 3924 3925 /* Helper for selecting a node in round robin mode */ 3926 static inline int mtip_get_next_rr_node(void) 3927 { 3928 static int next_node = NUMA_NO_NODE; 3929 3930 if (next_node == NUMA_NO_NODE) { 3931 next_node = first_online_node; 3932 return next_node; 3933 } 3934 3935 next_node = next_online_node(next_node); 3936 if (next_node == MAX_NUMNODES) 3937 next_node = first_online_node; 3938 return next_node; 3939 } 3940 3941 static DEFINE_HANDLER(0); 3942 static DEFINE_HANDLER(1); 3943 static DEFINE_HANDLER(2); 3944 static DEFINE_HANDLER(3); 3945 static DEFINE_HANDLER(4); 3946 static DEFINE_HANDLER(5); 3947 static DEFINE_HANDLER(6); 3948 static DEFINE_HANDLER(7); 3949 3950 static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev) 3951 { 3952 int pos; 3953 unsigned short pcie_dev_ctrl; 3954 3955 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP); 3956 if (pos) { 3957 pci_read_config_word(pdev, 3958 pos + PCI_EXP_DEVCTL, 3959 &pcie_dev_ctrl); 3960 if (pcie_dev_ctrl & (1 << 11) || 3961 pcie_dev_ctrl & (1 << 4)) { 3962 dev_info(&dd->pdev->dev, 3963 "Disabling ERO/No-Snoop on bridge device %04x:%04x\n", 3964 pdev->vendor, pdev->device); 3965 pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN | 3966 PCI_EXP_DEVCTL_RELAX_EN); 3967 pci_write_config_word(pdev, 3968 pos + PCI_EXP_DEVCTL, 3969 pcie_dev_ctrl); 3970 } 3971 } 3972 } 3973 3974 static void mtip_fix_ero_nosnoop(struct driver_data *dd, struct pci_dev *pdev) 3975 { 3976 /* 3977 * This workaround is specific to AMD/ATI chipset with a PCI upstream 3978 * device with device id 0x5aXX 3979 */ 3980 if (pdev->bus && pdev->bus->self) { 3981 if (pdev->bus->self->vendor == PCI_VENDOR_ID_ATI && 3982 ((pdev->bus->self->device & 0xff00) == 0x5a00)) { 3983 mtip_disable_link_opts(dd, pdev->bus->self); 3984 } else { 3985 /* Check further up the topology */ 3986 struct pci_dev *parent_dev = pdev->bus->self; 3987 if (parent_dev->bus && 3988 parent_dev->bus->parent && 3989 parent_dev->bus->parent->self && 3990 parent_dev->bus->parent->self->vendor == 3991 PCI_VENDOR_ID_ATI && 3992 (parent_dev->bus->parent->self->device & 3993 0xff00) == 0x5a00) { 3994 mtip_disable_link_opts(dd, 3995 parent_dev->bus->parent->self); 3996 } 3997 } 3998 } 3999 } 4000 4001 /* 4002 * Called for each supported PCI device detected. 4003 * 4004 * This function allocates the private data structure, enables the 4005 * PCI device and then calls the block layer initialization function. 4006 * 4007 * return value 4008 * 0 on success else an error code. 4009 */ 4010 static int mtip_pci_probe(struct pci_dev *pdev, 4011 const struct pci_device_id *ent) 4012 { 4013 int rv = 0; 4014 struct driver_data *dd = NULL; 4015 char cpu_list[256]; 4016 const struct cpumask *node_mask; 4017 int cpu, i = 0, j = 0; 4018 int my_node = NUMA_NO_NODE; 4019 unsigned long flags; 4020 4021 /* Allocate memory for this devices private data. */ 4022 my_node = pcibus_to_node(pdev->bus); 4023 if (my_node != NUMA_NO_NODE) { 4024 if (!node_online(my_node)) 4025 my_node = mtip_get_next_rr_node(); 4026 } else { 4027 dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n"); 4028 my_node = mtip_get_next_rr_node(); 4029 } 4030 dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n", 4031 my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev), 4032 cpu_to_node(raw_smp_processor_id()), raw_smp_processor_id()); 4033 4034 dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node); 4035 if (dd == NULL) { 4036 dev_err(&pdev->dev, 4037 "Unable to allocate memory for driver data\n"); 4038 return -ENOMEM; 4039 } 4040 4041 /* Attach the private data to this PCI device. */ 4042 pci_set_drvdata(pdev, dd); 4043 4044 rv = pcim_enable_device(pdev); 4045 if (rv < 0) { 4046 dev_err(&pdev->dev, "Unable to enable device\n"); 4047 goto iomap_err; 4048 } 4049 4050 /* Map BAR5 to memory. */ 4051 rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME); 4052 if (rv < 0) { 4053 dev_err(&pdev->dev, "Unable to map regions\n"); 4054 goto iomap_err; 4055 } 4056 4057 rv = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 4058 if (rv) { 4059 dev_warn(&pdev->dev, "64-bit DMA enable failed\n"); 4060 goto setmask_err; 4061 } 4062 4063 /* Copy the info we may need later into the private data structure. */ 4064 dd->major = mtip_major; 4065 dd->instance = instance; 4066 dd->pdev = pdev; 4067 dd->numa_node = my_node; 4068 4069 INIT_LIST_HEAD(&dd->online_list); 4070 INIT_LIST_HEAD(&dd->remove_list); 4071 4072 memset(dd->workq_name, 0, 32); 4073 snprintf(dd->workq_name, 31, "mtipq%d", dd->instance); 4074 4075 dd->isr_workq = create_workqueue(dd->workq_name); 4076 if (!dd->isr_workq) { 4077 dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance); 4078 rv = -ENOMEM; 4079 goto setmask_err; 4080 } 4081 4082 memset(cpu_list, 0, sizeof(cpu_list)); 4083 4084 node_mask = cpumask_of_node(dd->numa_node); 4085 if (!cpumask_empty(node_mask)) { 4086 for_each_cpu(cpu, node_mask) 4087 { 4088 snprintf(&cpu_list[j], 256 - j, "%d ", cpu); 4089 j = strlen(cpu_list); 4090 } 4091 4092 dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n", 4093 dd->numa_node, 4094 topology_physical_package_id(cpumask_first(node_mask)), 4095 nr_cpus_node(dd->numa_node), 4096 cpu_list); 4097 } else 4098 dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n"); 4099 4100 dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node); 4101 dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n", 4102 cpu_to_node(dd->isr_binding), dd->isr_binding); 4103 4104 /* first worker context always runs in ISR */ 4105 dd->work[0].cpu_binding = dd->isr_binding; 4106 dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node); 4107 dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node); 4108 dd->work[3].cpu_binding = dd->work[0].cpu_binding; 4109 dd->work[4].cpu_binding = dd->work[1].cpu_binding; 4110 dd->work[5].cpu_binding = dd->work[2].cpu_binding; 4111 dd->work[6].cpu_binding = dd->work[2].cpu_binding; 4112 dd->work[7].cpu_binding = dd->work[1].cpu_binding; 4113 4114 /* Log the bindings */ 4115 for_each_present_cpu(cpu) { 4116 memset(cpu_list, 0, sizeof(cpu_list)); 4117 for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) { 4118 if (dd->work[i].cpu_binding == cpu) { 4119 snprintf(&cpu_list[j], 256 - j, "%d ", i); 4120 j = strlen(cpu_list); 4121 } 4122 } 4123 if (j) 4124 dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list); 4125 } 4126 4127 INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0); 4128 INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1); 4129 INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2); 4130 INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3); 4131 INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4); 4132 INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5); 4133 INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6); 4134 INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7); 4135 4136 pci_set_master(pdev); 4137 rv = pci_enable_msi(pdev); 4138 if (rv) { 4139 dev_warn(&pdev->dev, 4140 "Unable to enable MSI interrupt.\n"); 4141 goto msi_initialize_err; 4142 } 4143 4144 mtip_fix_ero_nosnoop(dd, pdev); 4145 4146 /* Initialize the block layer. */ 4147 rv = mtip_block_initialize(dd); 4148 if (rv < 0) { 4149 dev_err(&pdev->dev, 4150 "Unable to initialize block layer\n"); 4151 goto block_initialize_err; 4152 } 4153 4154 /* 4155 * Increment the instance count so that each device has a unique 4156 * instance number. 4157 */ 4158 instance++; 4159 if (rv != MTIP_FTL_REBUILD_MAGIC) 4160 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag); 4161 else 4162 rv = 0; /* device in rebuild state, return 0 from probe */ 4163 4164 /* Add to online list even if in ftl rebuild */ 4165 spin_lock_irqsave(&dev_lock, flags); 4166 list_add(&dd->online_list, &online_list); 4167 spin_unlock_irqrestore(&dev_lock, flags); 4168 4169 goto done; 4170 4171 block_initialize_err: 4172 pci_disable_msi(pdev); 4173 4174 msi_initialize_err: 4175 if (dd->isr_workq) { 4176 flush_workqueue(dd->isr_workq); 4177 destroy_workqueue(dd->isr_workq); 4178 drop_cpu(dd->work[0].cpu_binding); 4179 drop_cpu(dd->work[1].cpu_binding); 4180 drop_cpu(dd->work[2].cpu_binding); 4181 } 4182 setmask_err: 4183 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); 4184 4185 iomap_err: 4186 kfree(dd); 4187 pci_set_drvdata(pdev, NULL); 4188 return rv; 4189 done: 4190 return rv; 4191 } 4192 4193 /* 4194 * Called for each probed device when the device is removed or the 4195 * driver is unloaded. 4196 * 4197 * return value 4198 * None 4199 */ 4200 static void mtip_pci_remove(struct pci_dev *pdev) 4201 { 4202 struct driver_data *dd = pci_get_drvdata(pdev); 4203 unsigned long flags, to; 4204 4205 set_bit(MTIP_DDF_REMOVAL_BIT, &dd->dd_flag); 4206 4207 spin_lock_irqsave(&dev_lock, flags); 4208 list_del_init(&dd->online_list); 4209 list_add(&dd->remove_list, &removing_list); 4210 spin_unlock_irqrestore(&dev_lock, flags); 4211 4212 mtip_check_surprise_removal(pdev); 4213 synchronize_irq(dd->pdev->irq); 4214 4215 /* Spin until workers are done */ 4216 to = jiffies + msecs_to_jiffies(4000); 4217 do { 4218 msleep(20); 4219 } while (atomic_read(&dd->irq_workers_active) != 0 && 4220 time_before(jiffies, to)); 4221 4222 if (!dd->sr) 4223 fsync_bdev(dd->bdev); 4224 4225 if (atomic_read(&dd->irq_workers_active) != 0) { 4226 dev_warn(&dd->pdev->dev, 4227 "Completion workers still active!\n"); 4228 } 4229 4230 blk_set_queue_dying(dd->queue); 4231 set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag); 4232 4233 /* Clean up the block layer. */ 4234 mtip_block_remove(dd); 4235 4236 if (dd->isr_workq) { 4237 flush_workqueue(dd->isr_workq); 4238 destroy_workqueue(dd->isr_workq); 4239 drop_cpu(dd->work[0].cpu_binding); 4240 drop_cpu(dd->work[1].cpu_binding); 4241 drop_cpu(dd->work[2].cpu_binding); 4242 } 4243 4244 pci_disable_msi(pdev); 4245 4246 spin_lock_irqsave(&dev_lock, flags); 4247 list_del_init(&dd->remove_list); 4248 spin_unlock_irqrestore(&dev_lock, flags); 4249 4250 kfree(dd); 4251 4252 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); 4253 pci_set_drvdata(pdev, NULL); 4254 } 4255 4256 /* 4257 * Called for each probed device when the device is suspended. 4258 * 4259 * return value 4260 * 0 Success 4261 * <0 Error 4262 */ 4263 static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) 4264 { 4265 int rv = 0; 4266 struct driver_data *dd = pci_get_drvdata(pdev); 4267 4268 if (!dd) { 4269 dev_err(&pdev->dev, 4270 "Driver private datastructure is NULL\n"); 4271 return -EFAULT; 4272 } 4273 4274 set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag); 4275 4276 /* Disable ports & interrupts then send standby immediate */ 4277 rv = mtip_block_suspend(dd); 4278 if (rv < 0) { 4279 dev_err(&pdev->dev, 4280 "Failed to suspend controller\n"); 4281 return rv; 4282 } 4283 4284 /* 4285 * Save the pci config space to pdev structure & 4286 * disable the device 4287 */ 4288 pci_save_state(pdev); 4289 pci_disable_device(pdev); 4290 4291 /* Move to Low power state*/ 4292 pci_set_power_state(pdev, PCI_D3hot); 4293 4294 return rv; 4295 } 4296 4297 /* 4298 * Called for each probed device when the device is resumed. 4299 * 4300 * return value 4301 * 0 Success 4302 * <0 Error 4303 */ 4304 static int mtip_pci_resume(struct pci_dev *pdev) 4305 { 4306 int rv = 0; 4307 struct driver_data *dd; 4308 4309 dd = pci_get_drvdata(pdev); 4310 if (!dd) { 4311 dev_err(&pdev->dev, 4312 "Driver private datastructure is NULL\n"); 4313 return -EFAULT; 4314 } 4315 4316 /* Move the device to active State */ 4317 pci_set_power_state(pdev, PCI_D0); 4318 4319 /* Restore PCI configuration space */ 4320 pci_restore_state(pdev); 4321 4322 /* Enable the PCI device*/ 4323 rv = pcim_enable_device(pdev); 4324 if (rv < 0) { 4325 dev_err(&pdev->dev, 4326 "Failed to enable card during resume\n"); 4327 goto err; 4328 } 4329 pci_set_master(pdev); 4330 4331 /* 4332 * Calls hbaReset, initPort, & startPort function 4333 * then enables interrupts 4334 */ 4335 rv = mtip_block_resume(dd); 4336 if (rv < 0) 4337 dev_err(&pdev->dev, "Unable to resume\n"); 4338 4339 err: 4340 clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag); 4341 4342 return rv; 4343 } 4344 4345 /* 4346 * Shutdown routine 4347 * 4348 * return value 4349 * None 4350 */ 4351 static void mtip_pci_shutdown(struct pci_dev *pdev) 4352 { 4353 struct driver_data *dd = pci_get_drvdata(pdev); 4354 if (dd) 4355 mtip_block_shutdown(dd); 4356 } 4357 4358 /* Table of device ids supported by this driver. */ 4359 static const struct pci_device_id mtip_pci_tbl[] = { 4360 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) }, 4361 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) }, 4362 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) }, 4363 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) }, 4364 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) }, 4365 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) }, 4366 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) }, 4367 { 0 } 4368 }; 4369 4370 /* Structure that describes the PCI driver functions. */ 4371 static struct pci_driver mtip_pci_driver = { 4372 .name = MTIP_DRV_NAME, 4373 .id_table = mtip_pci_tbl, 4374 .probe = mtip_pci_probe, 4375 .remove = mtip_pci_remove, 4376 .suspend = mtip_pci_suspend, 4377 .resume = mtip_pci_resume, 4378 .shutdown = mtip_pci_shutdown, 4379 }; 4380 4381 MODULE_DEVICE_TABLE(pci, mtip_pci_tbl); 4382 4383 /* 4384 * Module initialization function. 4385 * 4386 * Called once when the module is loaded. This function allocates a major 4387 * block device number to the Cyclone devices and registers the PCI layer 4388 * of the driver. 4389 * 4390 * Return value 4391 * 0 on success else error code. 4392 */ 4393 static int __init mtip_init(void) 4394 { 4395 int error; 4396 4397 pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n"); 4398 4399 spin_lock_init(&dev_lock); 4400 4401 INIT_LIST_HEAD(&online_list); 4402 INIT_LIST_HEAD(&removing_list); 4403 4404 /* Allocate a major block device number to use with this driver. */ 4405 error = register_blkdev(0, MTIP_DRV_NAME); 4406 if (error <= 0) { 4407 pr_err("Unable to register block device (%d)\n", 4408 error); 4409 return -EBUSY; 4410 } 4411 mtip_major = error; 4412 4413 dfs_parent = debugfs_create_dir("rssd", NULL); 4414 if (IS_ERR_OR_NULL(dfs_parent)) { 4415 pr_warn("Error creating debugfs parent\n"); 4416 dfs_parent = NULL; 4417 } 4418 if (dfs_parent) { 4419 dfs_device_status = debugfs_create_file("device_status", 4420 0444, dfs_parent, NULL, 4421 &mtip_device_status_fops); 4422 if (IS_ERR_OR_NULL(dfs_device_status)) { 4423 pr_err("Error creating device_status node\n"); 4424 dfs_device_status = NULL; 4425 } 4426 } 4427 4428 /* Register our PCI operations. */ 4429 error = pci_register_driver(&mtip_pci_driver); 4430 if (error) { 4431 debugfs_remove(dfs_parent); 4432 unregister_blkdev(mtip_major, MTIP_DRV_NAME); 4433 } 4434 4435 return error; 4436 } 4437 4438 /* 4439 * Module de-initialization function. 4440 * 4441 * Called once when the module is unloaded. This function deallocates 4442 * the major block device number allocated by mtip_init() and 4443 * unregisters the PCI layer of the driver. 4444 * 4445 * Return value 4446 * none 4447 */ 4448 static void __exit mtip_exit(void) 4449 { 4450 /* Release the allocated major block device number. */ 4451 unregister_blkdev(mtip_major, MTIP_DRV_NAME); 4452 4453 /* Unregister the PCI driver. */ 4454 pci_unregister_driver(&mtip_pci_driver); 4455 4456 debugfs_remove_recursive(dfs_parent); 4457 } 4458 4459 MODULE_AUTHOR("Micron Technology, Inc"); 4460 MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver"); 4461 MODULE_LICENSE("GPL"); 4462 MODULE_VERSION(MTIP_DRV_VERSION); 4463 4464 module_init(mtip_init); 4465 module_exit(mtip_exit); 4466