1 /*
2  * Driver for the Micron P320 SSD
3  *   Copyright (C) 2011 Micron Technology, Inc.
4  *
5  * Portions of this code were derived from works subjected to the
6  * following copyright:
7  *    Copyright (C) 2009 Integrated Device Technology, Inc.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License, or
12  * (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  */
20 
21 #include <linux/pci.h>
22 #include <linux/interrupt.h>
23 #include <linux/ata.h>
24 #include <linux/delay.h>
25 #include <linux/hdreg.h>
26 #include <linux/uaccess.h>
27 #include <linux/random.h>
28 #include <linux/smp.h>
29 #include <linux/compat.h>
30 #include <linux/fs.h>
31 #include <linux/module.h>
32 #include <linux/genhd.h>
33 #include <linux/blkdev.h>
34 #include <linux/blk-mq.h>
35 #include <linux/bio.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/idr.h>
38 #include <linux/kthread.h>
39 #include <../drivers/ata/ahci.h>
40 #include <linux/export.h>
41 #include <linux/debugfs.h>
42 #include <linux/prefetch.h>
43 #include "mtip32xx.h"
44 
45 #define HW_CMD_SLOT_SZ		(MTIP_MAX_COMMAND_SLOTS * 32)
46 
47 /* DMA region containing RX Fis, Identify, RLE10, and SMART buffers */
48 #define AHCI_RX_FIS_SZ          0x100
49 #define AHCI_RX_FIS_OFFSET      0x0
50 #define AHCI_IDFY_SZ            ATA_SECT_SIZE
51 #define AHCI_IDFY_OFFSET        0x400
52 #define AHCI_SECTBUF_SZ         ATA_SECT_SIZE
53 #define AHCI_SECTBUF_OFFSET     0x800
54 #define AHCI_SMARTBUF_SZ        ATA_SECT_SIZE
55 #define AHCI_SMARTBUF_OFFSET    0xC00
56 /* 0x100 + 0x200 + 0x200 + 0x200 is smaller than 4k but we pad it out */
57 #define BLOCK_DMA_ALLOC_SZ      4096
58 
59 /* DMA region containing command table (should be 8192 bytes) */
60 #define AHCI_CMD_SLOT_SZ        sizeof(struct mtip_cmd_hdr)
61 #define AHCI_CMD_TBL_SZ         (MTIP_MAX_COMMAND_SLOTS * AHCI_CMD_SLOT_SZ)
62 #define AHCI_CMD_TBL_OFFSET     0x0
63 
64 /* DMA region per command (contains header and SGL) */
65 #define AHCI_CMD_TBL_HDR_SZ     0x80
66 #define AHCI_CMD_TBL_HDR_OFFSET 0x0
67 #define AHCI_CMD_TBL_SGL_SZ     (MTIP_MAX_SG * sizeof(struct mtip_cmd_sg))
68 #define AHCI_CMD_TBL_SGL_OFFSET AHCI_CMD_TBL_HDR_SZ
69 #define CMD_DMA_ALLOC_SZ        (AHCI_CMD_TBL_SGL_SZ + AHCI_CMD_TBL_HDR_SZ)
70 
71 
72 #define HOST_CAP_NZDMA		(1 << 19)
73 #define HOST_HSORG		0xFC
74 #define HSORG_DISABLE_SLOTGRP_INTR (1<<24)
75 #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16)
76 #define HSORG_HWREV		0xFF00
77 #define HSORG_STYLE		0x8
78 #define HSORG_SLOTGROUPS	0x7
79 
80 #define PORT_COMMAND_ISSUE	0x38
81 #define PORT_SDBV		0x7C
82 
83 #define PORT_OFFSET		0x100
84 #define PORT_MEM_SIZE		0x80
85 
86 #define PORT_IRQ_ERR \
87 	(PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \
88 	 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \
89 	 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \
90 	 PORT_IRQ_OVERFLOW)
91 #define PORT_IRQ_LEGACY \
92 	(PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS)
93 #define PORT_IRQ_HANDLED \
94 	(PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \
95 	 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \
96 	 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)
97 #define DEF_PORT_IRQ \
98 	(PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS)
99 
100 /* product numbers */
101 #define MTIP_PRODUCT_UNKNOWN	0x00
102 #define MTIP_PRODUCT_ASICFPGA	0x11
103 
104 /* Device instance number, incremented each time a device is probed. */
105 static int instance;
106 
107 struct list_head online_list;
108 struct list_head removing_list;
109 spinlock_t dev_lock;
110 
111 /*
112  * Global variable used to hold the major block device number
113  * allocated in mtip_init().
114  */
115 static int mtip_major;
116 static struct dentry *dfs_parent;
117 static struct dentry *dfs_device_status;
118 
119 static u32 cpu_use[NR_CPUS];
120 
121 static DEFINE_SPINLOCK(rssd_index_lock);
122 static DEFINE_IDA(rssd_index_ida);
123 
124 static int mtip_block_initialize(struct driver_data *dd);
125 
126 #ifdef CONFIG_COMPAT
127 struct mtip_compat_ide_task_request_s {
128 	__u8		io_ports[8];
129 	__u8		hob_ports[8];
130 	ide_reg_valid_t	out_flags;
131 	ide_reg_valid_t	in_flags;
132 	int		data_phase;
133 	int		req_cmd;
134 	compat_ulong_t	out_size;
135 	compat_ulong_t	in_size;
136 };
137 #endif
138 
139 /*
140  * This function check_for_surprise_removal is called
141  * while card is removed from the system and it will
142  * read the vendor id from the configration space
143  *
144  * @pdev Pointer to the pci_dev structure.
145  *
146  * return value
147  *	 true if device removed, else false
148  */
149 static bool mtip_check_surprise_removal(struct pci_dev *pdev)
150 {
151 	u16 vendor_id = 0;
152 	struct driver_data *dd = pci_get_drvdata(pdev);
153 
154 	if (dd->sr)
155 		return true;
156 
157        /* Read the vendorID from the configuration space */
158 	pci_read_config_word(pdev, 0x00, &vendor_id);
159 	if (vendor_id == 0xFFFF) {
160 		dd->sr = true;
161 		if (dd->queue)
162 			set_bit(QUEUE_FLAG_DEAD, &dd->queue->queue_flags);
163 		else
164 			dev_warn(&dd->pdev->dev,
165 				"%s: dd->queue is NULL\n", __func__);
166 		return true; /* device removed */
167 	}
168 
169 	return false; /* device present */
170 }
171 
172 static struct mtip_cmd *mtip_get_int_command(struct driver_data *dd)
173 {
174 	struct request *rq;
175 
176 	rq = blk_mq_alloc_request(dd->queue, 0, __GFP_RECLAIM, true);
177 	return blk_mq_rq_to_pdu(rq);
178 }
179 
180 static void mtip_put_int_command(struct driver_data *dd, struct mtip_cmd *cmd)
181 {
182 	blk_put_request(blk_mq_rq_from_pdu(cmd));
183 }
184 
185 /*
186  * Once we add support for one hctx per mtip group, this will change a bit
187  */
188 static struct request *mtip_rq_from_tag(struct driver_data *dd,
189 					unsigned int tag)
190 {
191 	struct blk_mq_hw_ctx *hctx = dd->queue->queue_hw_ctx[0];
192 
193 	return blk_mq_tag_to_rq(hctx->tags, tag);
194 }
195 
196 static struct mtip_cmd *mtip_cmd_from_tag(struct driver_data *dd,
197 					  unsigned int tag)
198 {
199 	struct request *rq = mtip_rq_from_tag(dd, tag);
200 
201 	return blk_mq_rq_to_pdu(rq);
202 }
203 
204 /*
205  * IO completion function.
206  *
207  * This completion function is called by the driver ISR when a
208  * command that was issued by the kernel completes. It first calls the
209  * asynchronous completion function which normally calls back into the block
210  * layer passing the asynchronous callback data, then unmaps the
211  * scatter list associated with the completed command, and finally
212  * clears the allocated bit associated with the completed command.
213  *
214  * @port   Pointer to the port data structure.
215  * @tag    Tag of the command.
216  * @data   Pointer to driver_data.
217  * @status Completion status.
218  *
219  * return value
220  *	None
221  */
222 static void mtip_async_complete(struct mtip_port *port,
223 				int tag, struct mtip_cmd *cmd, int status)
224 {
225 	struct driver_data *dd = port->dd;
226 	struct request *rq;
227 
228 	if (unlikely(!dd) || unlikely(!port))
229 		return;
230 
231 	if (unlikely(status == PORT_IRQ_TF_ERR)) {
232 		dev_warn(&port->dd->pdev->dev,
233 			"Command tag %d failed due to TFE\n", tag);
234 	}
235 
236 	/* Unmap the DMA scatter list entries */
237 	dma_unmap_sg(&dd->pdev->dev, cmd->sg, cmd->scatter_ents, cmd->direction);
238 
239 	rq = mtip_rq_from_tag(dd, tag);
240 
241 	if (unlikely(cmd->unaligned))
242 		up(&port->cmd_slot_unal);
243 
244 	blk_mq_end_request(rq, status ? -EIO : 0);
245 }
246 
247 /*
248  * Reset the HBA (without sleeping)
249  *
250  * @dd Pointer to the driver data structure.
251  *
252  * return value
253  *	0	The reset was successful.
254  *	-1	The HBA Reset bit did not clear.
255  */
256 static int mtip_hba_reset(struct driver_data *dd)
257 {
258 	unsigned long timeout;
259 
260 	/* Set the reset bit */
261 	writel(HOST_RESET, dd->mmio + HOST_CTL);
262 
263 	/* Flush */
264 	readl(dd->mmio + HOST_CTL);
265 
266 	/*
267 	 * Spin for up to 10 seconds waiting for reset acknowledgement. Spec
268 	 * is 1 sec but in LUN failure conditions, up to 10 secs are required
269 	 */
270 	timeout = jiffies + msecs_to_jiffies(10000);
271 	do {
272 		mdelay(10);
273 		if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
274 			return -1;
275 
276 	} while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
277 		 && time_before(jiffies, timeout));
278 
279 	if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
280 		return -1;
281 
282 	return 0;
283 }
284 
285 /*
286  * Issue a command to the hardware.
287  *
288  * Set the appropriate bit in the s_active and Command Issue hardware
289  * registers, causing hardware command processing to begin.
290  *
291  * @port Pointer to the port structure.
292  * @tag  The tag of the command to be issued.
293  *
294  * return value
295  *      None
296  */
297 static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)
298 {
299 	int group = tag >> 5;
300 
301 	/* guard SACT and CI registers */
302 	spin_lock(&port->cmd_issue_lock[group]);
303 	writel((1 << MTIP_TAG_BIT(tag)),
304 			port->s_active[MTIP_TAG_INDEX(tag)]);
305 	writel((1 << MTIP_TAG_BIT(tag)),
306 			port->cmd_issue[MTIP_TAG_INDEX(tag)]);
307 	spin_unlock(&port->cmd_issue_lock[group]);
308 }
309 
310 /*
311  * Enable/disable the reception of FIS
312  *
313  * @port   Pointer to the port data structure
314  * @enable 1 to enable, 0 to disable
315  *
316  * return value
317  *	Previous state: 1 enabled, 0 disabled
318  */
319 static int mtip_enable_fis(struct mtip_port *port, int enable)
320 {
321 	u32 tmp;
322 
323 	/* enable FIS reception */
324 	tmp = readl(port->mmio + PORT_CMD);
325 	if (enable)
326 		writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
327 	else
328 		writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
329 
330 	/* Flush */
331 	readl(port->mmio + PORT_CMD);
332 
333 	return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX));
334 }
335 
336 /*
337  * Enable/disable the DMA engine
338  *
339  * @port   Pointer to the port data structure
340  * @enable 1 to enable, 0 to disable
341  *
342  * return value
343  *	Previous state: 1 enabled, 0 disabled.
344  */
345 static int mtip_enable_engine(struct mtip_port *port, int enable)
346 {
347 	u32 tmp;
348 
349 	/* enable FIS reception */
350 	tmp = readl(port->mmio + PORT_CMD);
351 	if (enable)
352 		writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
353 	else
354 		writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
355 
356 	readl(port->mmio + PORT_CMD);
357 	return (((tmp & PORT_CMD_START) == PORT_CMD_START));
358 }
359 
360 /*
361  * Enables the port DMA engine and FIS reception.
362  *
363  * return value
364  *	None
365  */
366 static inline void mtip_start_port(struct mtip_port *port)
367 {
368 	/* Enable FIS reception */
369 	mtip_enable_fis(port, 1);
370 
371 	/* Enable the DMA engine */
372 	mtip_enable_engine(port, 1);
373 }
374 
375 /*
376  * Deinitialize a port by disabling port interrupts, the DMA engine,
377  * and FIS reception.
378  *
379  * @port Pointer to the port structure
380  *
381  * return value
382  *	None
383  */
384 static inline void mtip_deinit_port(struct mtip_port *port)
385 {
386 	/* Disable interrupts on this port */
387 	writel(0, port->mmio + PORT_IRQ_MASK);
388 
389 	/* Disable the DMA engine */
390 	mtip_enable_engine(port, 0);
391 
392 	/* Disable FIS reception */
393 	mtip_enable_fis(port, 0);
394 }
395 
396 /*
397  * Initialize a port.
398  *
399  * This function deinitializes the port by calling mtip_deinit_port() and
400  * then initializes it by setting the command header and RX FIS addresses,
401  * clearing the SError register and any pending port interrupts before
402  * re-enabling the default set of port interrupts.
403  *
404  * @port Pointer to the port structure.
405  *
406  * return value
407  *	None
408  */
409 static void mtip_init_port(struct mtip_port *port)
410 {
411 	int i;
412 	mtip_deinit_port(port);
413 
414 	/* Program the command list base and FIS base addresses */
415 	if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
416 		writel((port->command_list_dma >> 16) >> 16,
417 			 port->mmio + PORT_LST_ADDR_HI);
418 		writel((port->rxfis_dma >> 16) >> 16,
419 			 port->mmio + PORT_FIS_ADDR_HI);
420 	}
421 
422 	writel(port->command_list_dma & 0xFFFFFFFF,
423 			port->mmio + PORT_LST_ADDR);
424 	writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
425 
426 	/* Clear SError */
427 	writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
428 
429 	/* reset the completed registers.*/
430 	for (i = 0; i < port->dd->slot_groups; i++)
431 		writel(0xFFFFFFFF, port->completed[i]);
432 
433 	/* Clear any pending interrupts for this port */
434 	writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
435 
436 	/* Clear any pending interrupts on the HBA. */
437 	writel(readl(port->dd->mmio + HOST_IRQ_STAT),
438 					port->dd->mmio + HOST_IRQ_STAT);
439 
440 	/* Enable port interrupts */
441 	writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
442 }
443 
444 /*
445  * Restart a port
446  *
447  * @port Pointer to the port data structure.
448  *
449  * return value
450  *	None
451  */
452 static void mtip_restart_port(struct mtip_port *port)
453 {
454 	unsigned long timeout;
455 
456 	/* Disable the DMA engine */
457 	mtip_enable_engine(port, 0);
458 
459 	/* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */
460 	timeout = jiffies + msecs_to_jiffies(500);
461 	while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
462 		 && time_before(jiffies, timeout))
463 		;
464 
465 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
466 		return;
467 
468 	/*
469 	 * Chip quirk: escalate to hba reset if
470 	 * PxCMD.CR not clear after 500 ms
471 	 */
472 	if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
473 		dev_warn(&port->dd->pdev->dev,
474 			"PxCMD.CR not clear, escalating reset\n");
475 
476 		if (mtip_hba_reset(port->dd))
477 			dev_err(&port->dd->pdev->dev,
478 				"HBA reset escalation failed.\n");
479 
480 		/* 30 ms delay before com reset to quiesce chip */
481 		mdelay(30);
482 	}
483 
484 	dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n");
485 
486 	/* Set PxSCTL.DET */
487 	writel(readl(port->mmio + PORT_SCR_CTL) |
488 			 1, port->mmio + PORT_SCR_CTL);
489 	readl(port->mmio + PORT_SCR_CTL);
490 
491 	/* Wait 1 ms to quiesce chip function */
492 	timeout = jiffies + msecs_to_jiffies(1);
493 	while (time_before(jiffies, timeout))
494 		;
495 
496 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
497 		return;
498 
499 	/* Clear PxSCTL.DET */
500 	writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
501 			 port->mmio + PORT_SCR_CTL);
502 	readl(port->mmio + PORT_SCR_CTL);
503 
504 	/* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */
505 	timeout = jiffies + msecs_to_jiffies(500);
506 	while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
507 			 && time_before(jiffies, timeout))
508 		;
509 
510 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
511 		return;
512 
513 	if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
514 		dev_warn(&port->dd->pdev->dev,
515 			"COM reset failed\n");
516 
517 	mtip_init_port(port);
518 	mtip_start_port(port);
519 
520 }
521 
522 static int mtip_device_reset(struct driver_data *dd)
523 {
524 	int rv = 0;
525 
526 	if (mtip_check_surprise_removal(dd->pdev))
527 		return 0;
528 
529 	if (mtip_hba_reset(dd) < 0)
530 		rv = -EFAULT;
531 
532 	mdelay(1);
533 	mtip_init_port(dd->port);
534 	mtip_start_port(dd->port);
535 
536 	/* Enable interrupts on the HBA. */
537 	writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
538 					dd->mmio + HOST_CTL);
539 	return rv;
540 }
541 
542 /*
543  * Helper function for tag logging
544  */
545 static void print_tags(struct driver_data *dd,
546 			char *msg,
547 			unsigned long *tagbits,
548 			int cnt)
549 {
550 	unsigned char tagmap[128];
551 	int group, tagmap_len = 0;
552 
553 	memset(tagmap, 0, sizeof(tagmap));
554 	for (group = SLOTBITS_IN_LONGS; group > 0; group--)
555 		tagmap_len += sprintf(tagmap + tagmap_len, "%016lX ",
556 						tagbits[group-1]);
557 	dev_warn(&dd->pdev->dev,
558 			"%d command(s) %s: tagmap [%s]", cnt, msg, tagmap);
559 }
560 
561 /*
562  * Internal command completion callback function.
563  *
564  * This function is normally called by the driver ISR when an internal
565  * command completed. This function signals the command completion by
566  * calling complete().
567  *
568  * @port   Pointer to the port data structure.
569  * @tag    Tag of the command that has completed.
570  * @data   Pointer to a completion structure.
571  * @status Completion status.
572  *
573  * return value
574  *	None
575  */
576 static void mtip_completion(struct mtip_port *port,
577 			    int tag, struct mtip_cmd *command, int status)
578 {
579 	struct completion *waiting = command->comp_data;
580 	if (unlikely(status == PORT_IRQ_TF_ERR))
581 		dev_warn(&port->dd->pdev->dev,
582 			"Internal command %d completed with TFE\n", tag);
583 
584 	complete(waiting);
585 }
586 
587 static void mtip_null_completion(struct mtip_port *port,
588 			    int tag, struct mtip_cmd *command, int status)
589 {
590 }
591 
592 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
593 				dma_addr_t buffer_dma, unsigned int sectors);
594 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
595 						struct smart_attr *attrib);
596 /*
597  * Handle an error.
598  *
599  * @dd Pointer to the DRIVER_DATA structure.
600  *
601  * return value
602  *	None
603  */
604 static void mtip_handle_tfe(struct driver_data *dd)
605 {
606 	int group, tag, bit, reissue, rv;
607 	struct mtip_port *port;
608 	struct mtip_cmd  *cmd;
609 	u32 completed;
610 	struct host_to_dev_fis *fis;
611 	unsigned long tagaccum[SLOTBITS_IN_LONGS];
612 	unsigned int cmd_cnt = 0;
613 	unsigned char *buf;
614 	char *fail_reason = NULL;
615 	int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0;
616 
617 	dev_warn(&dd->pdev->dev, "Taskfile error\n");
618 
619 	port = dd->port;
620 
621 	set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
622 
623 	if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
624 		cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
625 		dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n");
626 
627 		if (cmd->comp_data && cmd->comp_func) {
628 			cmd->comp_func(port, MTIP_TAG_INTERNAL,
629 					cmd, PORT_IRQ_TF_ERR);
630 		}
631 		goto handle_tfe_exit;
632 	}
633 
634 	/* clear the tag accumulator */
635 	memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
636 
637 	/* Loop through all the groups */
638 	for (group = 0; group < dd->slot_groups; group++) {
639 		completed = readl(port->completed[group]);
640 
641 		dev_warn(&dd->pdev->dev, "g=%u, comp=%x\n", group, completed);
642 
643 		/* clear completed status register in the hardware.*/
644 		writel(completed, port->completed[group]);
645 
646 		/* Process successfully completed commands */
647 		for (bit = 0; bit < 32 && completed; bit++) {
648 			if (!(completed & (1<<bit)))
649 				continue;
650 			tag = (group << 5) + bit;
651 
652 			/* Skip the internal command slot */
653 			if (tag == MTIP_TAG_INTERNAL)
654 				continue;
655 
656 			cmd = mtip_cmd_from_tag(dd, tag);
657 			if (likely(cmd->comp_func)) {
658 				set_bit(tag, tagaccum);
659 				cmd_cnt++;
660 				cmd->comp_func(port, tag, cmd, 0);
661 			} else {
662 				dev_err(&port->dd->pdev->dev,
663 					"Missing completion func for tag %d",
664 					tag);
665 				if (mtip_check_surprise_removal(dd->pdev)) {
666 					/* don't proceed further */
667 					return;
668 				}
669 			}
670 		}
671 	}
672 
673 	print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt);
674 
675 	/* Restart the port */
676 	mdelay(20);
677 	mtip_restart_port(port);
678 
679 	/* Trying to determine the cause of the error */
680 	rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
681 				dd->port->log_buf,
682 				dd->port->log_buf_dma, 1);
683 	if (rv) {
684 		dev_warn(&dd->pdev->dev,
685 			"Error in READ LOG EXT (10h) command\n");
686 		/* non-critical error, don't fail the load */
687 	} else {
688 		buf = (unsigned char *)dd->port->log_buf;
689 		if (buf[259] & 0x1) {
690 			dev_info(&dd->pdev->dev,
691 				"Write protect bit is set.\n");
692 			set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
693 			fail_all_ncq_write = 1;
694 			fail_reason = "write protect";
695 		}
696 		if (buf[288] == 0xF7) {
697 			dev_info(&dd->pdev->dev,
698 				"Exceeded Tmax, drive in thermal shutdown.\n");
699 			set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
700 			fail_all_ncq_cmds = 1;
701 			fail_reason = "thermal shutdown";
702 		}
703 		if (buf[288] == 0xBF) {
704 			set_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag);
705 			dev_info(&dd->pdev->dev,
706 				"Drive indicates rebuild has failed. Secure erase required.\n");
707 			fail_all_ncq_cmds = 1;
708 			fail_reason = "rebuild failed";
709 		}
710 	}
711 
712 	/* clear the tag accumulator */
713 	memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
714 
715 	/* Loop through all the groups */
716 	for (group = 0; group < dd->slot_groups; group++) {
717 		for (bit = 0; bit < 32; bit++) {
718 			reissue = 1;
719 			tag = (group << 5) + bit;
720 			cmd = mtip_cmd_from_tag(dd, tag);
721 
722 			fis = (struct host_to_dev_fis *)cmd->command;
723 
724 			/* Should re-issue? */
725 			if (tag == MTIP_TAG_INTERNAL ||
726 			    fis->command == ATA_CMD_SET_FEATURES)
727 				reissue = 0;
728 			else {
729 				if (fail_all_ncq_cmds ||
730 					(fail_all_ncq_write &&
731 					fis->command == ATA_CMD_FPDMA_WRITE)) {
732 					dev_warn(&dd->pdev->dev,
733 					"  Fail: %s w/tag %d [%s].\n",
734 					fis->command == ATA_CMD_FPDMA_WRITE ?
735 						"write" : "read",
736 					tag,
737 					fail_reason != NULL ?
738 						fail_reason : "unknown");
739 					if (cmd->comp_func) {
740 						cmd->comp_func(port, tag,
741 							cmd, -ENODATA);
742 					}
743 					continue;
744 				}
745 			}
746 
747 			/*
748 			 * First check if this command has
749 			 *  exceeded its retries.
750 			 */
751 			if (reissue && (cmd->retries-- > 0)) {
752 
753 				set_bit(tag, tagaccum);
754 
755 				/* Re-issue the command. */
756 				mtip_issue_ncq_command(port, tag);
757 
758 				continue;
759 			}
760 
761 			/* Retire a command that will not be reissued */
762 			dev_warn(&port->dd->pdev->dev,
763 				"retiring tag %d\n", tag);
764 
765 			if (cmd->comp_func)
766 				cmd->comp_func(port, tag, cmd, PORT_IRQ_TF_ERR);
767 			else
768 				dev_warn(&port->dd->pdev->dev,
769 					"Bad completion for tag %d\n",
770 					tag);
771 		}
772 	}
773 	print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt);
774 
775 handle_tfe_exit:
776 	/* clear eh_active */
777 	clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
778 	wake_up_interruptible(&port->svc_wait);
779 }
780 
781 /*
782  * Handle a set device bits interrupt
783  */
784 static inline void mtip_workq_sdbfx(struct mtip_port *port, int group,
785 							u32 completed)
786 {
787 	struct driver_data *dd = port->dd;
788 	int tag, bit;
789 	struct mtip_cmd *command;
790 
791 	if (!completed) {
792 		WARN_ON_ONCE(!completed);
793 		return;
794 	}
795 	/* clear completed status register in the hardware.*/
796 	writel(completed, port->completed[group]);
797 
798 	/* Process completed commands. */
799 	for (bit = 0; (bit < 32) && completed; bit++) {
800 		if (completed & 0x01) {
801 			tag = (group << 5) | bit;
802 
803 			/* skip internal command slot. */
804 			if (unlikely(tag == MTIP_TAG_INTERNAL))
805 				continue;
806 
807 			command = mtip_cmd_from_tag(dd, tag);
808 			if (likely(command->comp_func))
809 				command->comp_func(port, tag, command, 0);
810 			else {
811 				dev_dbg(&dd->pdev->dev,
812 					"Null completion for tag %d",
813 					tag);
814 
815 				if (mtip_check_surprise_removal(
816 					dd->pdev)) {
817 					return;
818 				}
819 			}
820 		}
821 		completed >>= 1;
822 	}
823 
824 	/* If last, re-enable interrupts */
825 	if (atomic_dec_return(&dd->irq_workers_active) == 0)
826 		writel(0xffffffff, dd->mmio + HOST_IRQ_STAT);
827 }
828 
829 /*
830  * Process legacy pio and d2h interrupts
831  */
832 static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat)
833 {
834 	struct mtip_port *port = dd->port;
835 	struct mtip_cmd *cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
836 
837 	if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) &&
838 	    (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL])
839 		& (1 << MTIP_TAG_INTERNAL))) {
840 		if (cmd->comp_func) {
841 			cmd->comp_func(port, MTIP_TAG_INTERNAL, cmd, 0);
842 			return;
843 		}
844 	}
845 
846 	return;
847 }
848 
849 /*
850  * Demux and handle errors
851  */
852 static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat)
853 {
854 
855 	if (unlikely(port_stat & PORT_IRQ_CONNECT)) {
856 		dev_warn(&dd->pdev->dev,
857 			"Clearing PxSERR.DIAG.x\n");
858 		writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
859 	}
860 
861 	if (unlikely(port_stat & PORT_IRQ_PHYRDY)) {
862 		dev_warn(&dd->pdev->dev,
863 			"Clearing PxSERR.DIAG.n\n");
864 		writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
865 	}
866 
867 	if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) {
868 		dev_warn(&dd->pdev->dev,
869 			"Port stat errors %x unhandled\n",
870 			(port_stat & ~PORT_IRQ_HANDLED));
871 		if (mtip_check_surprise_removal(dd->pdev))
872 			return;
873 	}
874 	if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) {
875 		set_bit(MTIP_PF_EH_ACTIVE_BIT, &dd->port->flags);
876 		wake_up_interruptible(&dd->port->svc_wait);
877 	}
878 }
879 
880 static inline irqreturn_t mtip_handle_irq(struct driver_data *data)
881 {
882 	struct driver_data *dd = (struct driver_data *) data;
883 	struct mtip_port *port = dd->port;
884 	u32 hba_stat, port_stat;
885 	int rv = IRQ_NONE;
886 	int do_irq_enable = 1, i, workers;
887 	struct mtip_work *twork;
888 
889 	hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
890 	if (hba_stat) {
891 		rv = IRQ_HANDLED;
892 
893 		/* Acknowledge the interrupt status on the port.*/
894 		port_stat = readl(port->mmio + PORT_IRQ_STAT);
895 		if (unlikely(port_stat == 0xFFFFFFFF)) {
896 			mtip_check_surprise_removal(dd->pdev);
897 			return IRQ_HANDLED;
898 		}
899 		writel(port_stat, port->mmio + PORT_IRQ_STAT);
900 
901 		/* Demux port status */
902 		if (likely(port_stat & PORT_IRQ_SDB_FIS)) {
903 			do_irq_enable = 0;
904 			WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0);
905 
906 			/* Start at 1: group zero is always local? */
907 			for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS;
908 									i++) {
909 				twork = &dd->work[i];
910 				twork->completed = readl(port->completed[i]);
911 				if (twork->completed)
912 					workers++;
913 			}
914 
915 			atomic_set(&dd->irq_workers_active, workers);
916 			if (workers) {
917 				for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) {
918 					twork = &dd->work[i];
919 					if (twork->completed)
920 						queue_work_on(
921 							twork->cpu_binding,
922 							dd->isr_workq,
923 							&twork->work);
924 				}
925 
926 				if (likely(dd->work[0].completed))
927 					mtip_workq_sdbfx(port, 0,
928 							dd->work[0].completed);
929 
930 			} else {
931 				/*
932 				 * Chip quirk: SDB interrupt but nothing
933 				 * to complete
934 				 */
935 				do_irq_enable = 1;
936 			}
937 		}
938 
939 		if (unlikely(port_stat & PORT_IRQ_ERR)) {
940 			if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
941 				/* don't proceed further */
942 				return IRQ_HANDLED;
943 			}
944 			if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
945 							&dd->dd_flag))
946 				return rv;
947 
948 			mtip_process_errors(dd, port_stat & PORT_IRQ_ERR);
949 		}
950 
951 		if (unlikely(port_stat & PORT_IRQ_LEGACY))
952 			mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY);
953 	}
954 
955 	/* acknowledge interrupt */
956 	if (unlikely(do_irq_enable))
957 		writel(hba_stat, dd->mmio + HOST_IRQ_STAT);
958 
959 	return rv;
960 }
961 
962 /*
963  * HBA interrupt subroutine.
964  *
965  * @irq		IRQ number.
966  * @instance	Pointer to the driver data structure.
967  *
968  * return value
969  *	IRQ_HANDLED	A HBA interrupt was pending and handled.
970  *	IRQ_NONE	This interrupt was not for the HBA.
971  */
972 static irqreturn_t mtip_irq_handler(int irq, void *instance)
973 {
974 	struct driver_data *dd = instance;
975 
976 	return mtip_handle_irq(dd);
977 }
978 
979 static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag)
980 {
981 	writel(1 << MTIP_TAG_BIT(tag),
982 		port->cmd_issue[MTIP_TAG_INDEX(tag)]);
983 }
984 
985 static bool mtip_pause_ncq(struct mtip_port *port,
986 				struct host_to_dev_fis *fis)
987 {
988 	struct host_to_dev_fis *reply;
989 	unsigned long task_file_data;
990 
991 	reply = port->rxfis + RX_FIS_D2H_REG;
992 	task_file_data = readl(port->mmio+PORT_TFDATA);
993 
994 	if ((task_file_data & 1))
995 		return false;
996 
997 	if (fis->command == ATA_CMD_SEC_ERASE_PREP) {
998 		port->ic_pause_timer = jiffies;
999 		return true;
1000 	} else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) &&
1001 					(fis->features == 0x03)) {
1002 		set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1003 		port->ic_pause_timer = jiffies;
1004 		return true;
1005 	} else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) ||
1006 		((fis->command == 0xFC) &&
1007 			(fis->features == 0x27 || fis->features == 0x72 ||
1008 			 fis->features == 0x62 || fis->features == 0x26))) {
1009 		clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1010 		/* Com reset after secure erase or lowlevel format */
1011 		mtip_restart_port(port);
1012 		clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1013 		return false;
1014 	}
1015 
1016 	return false;
1017 }
1018 
1019 /*
1020  * Wait for port to quiesce
1021  *
1022  * @port    Pointer to port data structure
1023  * @timeout Max duration to wait (ms)
1024  *
1025  * return value
1026  *	0	Success
1027  *	-EBUSY  Commands still active
1028  */
1029 static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout)
1030 {
1031 	unsigned long to;
1032 	unsigned int n;
1033 	unsigned int active = 1;
1034 
1035 	blk_mq_stop_hw_queues(port->dd->queue);
1036 
1037 	to = jiffies + msecs_to_jiffies(timeout);
1038 	do {
1039 		if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) &&
1040 			test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
1041 			msleep(20);
1042 			continue; /* svc thd is actively issuing commands */
1043 		}
1044 
1045 		msleep(100);
1046 		if (mtip_check_surprise_removal(port->dd->pdev))
1047 			goto err_fault;
1048 		if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1049 			goto err_fault;
1050 
1051 		/*
1052 		 * Ignore s_active bit 0 of array element 0.
1053 		 * This bit will always be set
1054 		 */
1055 		active = readl(port->s_active[0]) & 0xFFFFFFFE;
1056 		for (n = 1; n < port->dd->slot_groups; n++)
1057 			active |= readl(port->s_active[n]);
1058 
1059 		if (!active)
1060 			break;
1061 	} while (time_before(jiffies, to));
1062 
1063 	blk_mq_start_stopped_hw_queues(port->dd->queue, true);
1064 	return active ? -EBUSY : 0;
1065 err_fault:
1066 	blk_mq_start_stopped_hw_queues(port->dd->queue, true);
1067 	return -EFAULT;
1068 }
1069 
1070 /*
1071  * Execute an internal command and wait for the completion.
1072  *
1073  * @port    Pointer to the port data structure.
1074  * @fis     Pointer to the FIS that describes the command.
1075  * @fis_len  Length in WORDS of the FIS.
1076  * @buffer  DMA accessible for command data.
1077  * @buf_len  Length, in bytes, of the data buffer.
1078  * @opts    Command header options, excluding the FIS length
1079  *             and the number of PRD entries.
1080  * @timeout Time in ms to wait for the command to complete.
1081  *
1082  * return value
1083  *	0	 Command completed successfully.
1084  *	-EFAULT  The buffer address is not correctly aligned.
1085  *	-EBUSY   Internal command or other IO in progress.
1086  *	-EAGAIN  Time out waiting for command to complete.
1087  */
1088 static int mtip_exec_internal_command(struct mtip_port *port,
1089 					struct host_to_dev_fis *fis,
1090 					int fis_len,
1091 					dma_addr_t buffer,
1092 					int buf_len,
1093 					u32 opts,
1094 					gfp_t atomic,
1095 					unsigned long timeout)
1096 {
1097 	struct mtip_cmd_sg *command_sg;
1098 	DECLARE_COMPLETION_ONSTACK(wait);
1099 	struct mtip_cmd *int_cmd;
1100 	struct driver_data *dd = port->dd;
1101 	int rv = 0;
1102 
1103 	/* Make sure the buffer is 8 byte aligned. This is asic specific. */
1104 	if (buffer & 0x00000007) {
1105 		dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n");
1106 		return -EFAULT;
1107 	}
1108 
1109 	int_cmd = mtip_get_int_command(dd);
1110 
1111 	set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1112 
1113 	if (fis->command == ATA_CMD_SEC_ERASE_PREP)
1114 		set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1115 
1116 	clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1117 
1118 	if (atomic == GFP_KERNEL) {
1119 		if (fis->command != ATA_CMD_STANDBYNOW1) {
1120 			/* wait for io to complete if non atomic */
1121 			if (mtip_quiesce_io(port,
1122 					MTIP_QUIESCE_IO_TIMEOUT_MS) < 0) {
1123 				dev_warn(&dd->pdev->dev,
1124 					"Failed to quiesce IO\n");
1125 				mtip_put_int_command(dd, int_cmd);
1126 				clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1127 				wake_up_interruptible(&port->svc_wait);
1128 				return -EBUSY;
1129 			}
1130 		}
1131 
1132 		/* Set the completion function and data for the command. */
1133 		int_cmd->comp_data = &wait;
1134 		int_cmd->comp_func = mtip_completion;
1135 
1136 	} else {
1137 		/* Clear completion - we're going to poll */
1138 		int_cmd->comp_data = NULL;
1139 		int_cmd->comp_func = mtip_null_completion;
1140 	}
1141 
1142 	/* Copy the command to the command table */
1143 	memcpy(int_cmd->command, fis, fis_len*4);
1144 
1145 	/* Populate the SG list */
1146 	int_cmd->command_header->opts =
1147 		 __force_bit2int cpu_to_le32(opts | fis_len);
1148 	if (buf_len) {
1149 		command_sg = int_cmd->command + AHCI_CMD_TBL_HDR_SZ;
1150 
1151 		command_sg->info =
1152 			__force_bit2int cpu_to_le32((buf_len-1) & 0x3FFFFF);
1153 		command_sg->dba	=
1154 			__force_bit2int cpu_to_le32(buffer & 0xFFFFFFFF);
1155 		command_sg->dba_upper =
1156 			__force_bit2int cpu_to_le32((buffer >> 16) >> 16);
1157 
1158 		int_cmd->command_header->opts |=
1159 			__force_bit2int cpu_to_le32((1 << 16));
1160 	}
1161 
1162 	/* Populate the command header */
1163 	int_cmd->command_header->byte_count = 0;
1164 
1165 	/* Issue the command to the hardware */
1166 	mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL);
1167 
1168 	if (atomic == GFP_KERNEL) {
1169 		/* Wait for the command to complete or timeout. */
1170 		if ((rv = wait_for_completion_interruptible_timeout(
1171 				&wait,
1172 				msecs_to_jiffies(timeout))) <= 0) {
1173 			if (rv == -ERESTARTSYS) { /* interrupted */
1174 				dev_err(&dd->pdev->dev,
1175 					"Internal command [%02X] was interrupted after %lu ms\n",
1176 					fis->command, timeout);
1177 				rv = -EINTR;
1178 				goto exec_ic_exit;
1179 			} else if (rv == 0) /* timeout */
1180 				dev_err(&dd->pdev->dev,
1181 					"Internal command did not complete [%02X] within timeout of  %lu ms\n",
1182 					fis->command, timeout);
1183 			else
1184 				dev_err(&dd->pdev->dev,
1185 					"Internal command [%02X] wait returned code [%d] after %lu ms - unhandled\n",
1186 					fis->command, rv, timeout);
1187 
1188 			if (mtip_check_surprise_removal(dd->pdev) ||
1189 				test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1190 						&dd->dd_flag)) {
1191 				dev_err(&dd->pdev->dev,
1192 					"Internal command [%02X] wait returned due to SR\n",
1193 					fis->command);
1194 				rv = -ENXIO;
1195 				goto exec_ic_exit;
1196 			}
1197 			mtip_device_reset(dd); /* recover from timeout issue */
1198 			rv = -EAGAIN;
1199 			goto exec_ic_exit;
1200 		}
1201 	} else {
1202 		u32 hba_stat, port_stat;
1203 
1204 		/* Spin for <timeout> checking if command still outstanding */
1205 		timeout = jiffies + msecs_to_jiffies(timeout);
1206 		while ((readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1207 				& (1 << MTIP_TAG_INTERNAL))
1208 				&& time_before(jiffies, timeout)) {
1209 			if (mtip_check_surprise_removal(dd->pdev)) {
1210 				rv = -ENXIO;
1211 				goto exec_ic_exit;
1212 			}
1213 			if ((fis->command != ATA_CMD_STANDBYNOW1) &&
1214 				test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1215 						&dd->dd_flag)) {
1216 				rv = -ENXIO;
1217 				goto exec_ic_exit;
1218 			}
1219 			port_stat = readl(port->mmio + PORT_IRQ_STAT);
1220 			if (!port_stat)
1221 				continue;
1222 
1223 			if (port_stat & PORT_IRQ_ERR) {
1224 				dev_err(&dd->pdev->dev,
1225 					"Internal command [%02X] failed\n",
1226 					fis->command);
1227 				mtip_device_reset(dd);
1228 				rv = -EIO;
1229 				goto exec_ic_exit;
1230 			} else {
1231 				writel(port_stat, port->mmio + PORT_IRQ_STAT);
1232 				hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
1233 				if (hba_stat)
1234 					writel(hba_stat,
1235 						dd->mmio + HOST_IRQ_STAT);
1236 			}
1237 			break;
1238 		}
1239 	}
1240 
1241 	if (readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1242 			& (1 << MTIP_TAG_INTERNAL)) {
1243 		rv = -ENXIO;
1244 		if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
1245 			mtip_device_reset(dd);
1246 			rv = -EAGAIN;
1247 		}
1248 	}
1249 exec_ic_exit:
1250 	/* Clear the allocated and active bits for the internal command. */
1251 	mtip_put_int_command(dd, int_cmd);
1252 	clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1253 	if (rv >= 0 && mtip_pause_ncq(port, fis)) {
1254 		/* NCQ paused */
1255 		return rv;
1256 	}
1257 	wake_up_interruptible(&port->svc_wait);
1258 
1259 	return rv;
1260 }
1261 
1262 /*
1263  * Byte-swap ATA ID strings.
1264  *
1265  * ATA identify data contains strings in byte-swapped 16-bit words.
1266  * They must be swapped (on all architectures) to be usable as C strings.
1267  * This function swaps bytes in-place.
1268  *
1269  * @buf The buffer location of the string
1270  * @len The number of bytes to swap
1271  *
1272  * return value
1273  *	None
1274  */
1275 static inline void ata_swap_string(u16 *buf, unsigned int len)
1276 {
1277 	int i;
1278 	for (i = 0; i < (len/2); i++)
1279 		be16_to_cpus(&buf[i]);
1280 }
1281 
1282 static void mtip_set_timeout(struct driver_data *dd,
1283 					struct host_to_dev_fis *fis,
1284 					unsigned int *timeout, u8 erasemode)
1285 {
1286 	switch (fis->command) {
1287 	case ATA_CMD_DOWNLOAD_MICRO:
1288 		*timeout = 120000; /* 2 minutes */
1289 		break;
1290 	case ATA_CMD_SEC_ERASE_UNIT:
1291 	case 0xFC:
1292 		if (erasemode)
1293 			*timeout = ((*(dd->port->identify + 90) * 2) * 60000);
1294 		else
1295 			*timeout = ((*(dd->port->identify + 89) * 2) * 60000);
1296 		break;
1297 	case ATA_CMD_STANDBYNOW1:
1298 		*timeout = 120000;  /* 2 minutes */
1299 		break;
1300 	case 0xF7:
1301 	case 0xFA:
1302 		*timeout = 60000;  /* 60 seconds */
1303 		break;
1304 	case ATA_CMD_SMART:
1305 		*timeout = 15000;  /* 15 seconds */
1306 		break;
1307 	default:
1308 		*timeout = MTIP_IOCTL_CMD_TIMEOUT_MS;
1309 		break;
1310 	}
1311 }
1312 
1313 /*
1314  * Request the device identity information.
1315  *
1316  * If a user space buffer is not specified, i.e. is NULL, the
1317  * identify information is still read from the drive and placed
1318  * into the identify data buffer (@e port->identify) in the
1319  * port data structure.
1320  * When the identify buffer contains valid identify information @e
1321  * port->identify_valid is non-zero.
1322  *
1323  * @port	 Pointer to the port structure.
1324  * @user_buffer  A user space buffer where the identify data should be
1325  *                    copied.
1326  *
1327  * return value
1328  *	0	Command completed successfully.
1329  *	-EFAULT An error occurred while coping data to the user buffer.
1330  *	-1	Command failed.
1331  */
1332 static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer)
1333 {
1334 	int rv = 0;
1335 	struct host_to_dev_fis fis;
1336 
1337 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1338 		return -EFAULT;
1339 
1340 	/* Build the FIS. */
1341 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1342 	fis.type	= 0x27;
1343 	fis.opts	= 1 << 7;
1344 	fis.command	= ATA_CMD_ID_ATA;
1345 
1346 	/* Set the identify information as invalid. */
1347 	port->identify_valid = 0;
1348 
1349 	/* Clear the identify information. */
1350 	memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS);
1351 
1352 	/* Execute the command. */
1353 	if (mtip_exec_internal_command(port,
1354 				&fis,
1355 				5,
1356 				port->identify_dma,
1357 				sizeof(u16) * ATA_ID_WORDS,
1358 				0,
1359 				GFP_KERNEL,
1360 				MTIP_INT_CMD_TIMEOUT_MS)
1361 				< 0) {
1362 		rv = -1;
1363 		goto out;
1364 	}
1365 
1366 	/*
1367 	 * Perform any necessary byte-swapping.  Yes, the kernel does in fact
1368 	 * perform field-sensitive swapping on the string fields.
1369 	 * See the kernel use of ata_id_string() for proof of this.
1370 	 */
1371 #ifdef __LITTLE_ENDIAN
1372 	ata_swap_string(port->identify + 27, 40);  /* model string*/
1373 	ata_swap_string(port->identify + 23, 8);   /* firmware string*/
1374 	ata_swap_string(port->identify + 10, 20);  /* serial# string*/
1375 #else
1376 	{
1377 		int i;
1378 		for (i = 0; i < ATA_ID_WORDS; i++)
1379 			port->identify[i] = le16_to_cpu(port->identify[i]);
1380 	}
1381 #endif
1382 
1383 	/* Check security locked state */
1384 	if (port->identify[128] & 0x4)
1385 		set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1386 	else
1387 		clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1388 
1389 #ifdef MTIP_TRIM /* Disabling TRIM support temporarily */
1390 	/* Demux ID.DRAT & ID.RZAT to determine trim support */
1391 	if (port->identify[69] & (1 << 14) && port->identify[69] & (1 << 5))
1392 		port->dd->trim_supp = true;
1393 	else
1394 #endif
1395 		port->dd->trim_supp = false;
1396 
1397 	/* Set the identify buffer as valid. */
1398 	port->identify_valid = 1;
1399 
1400 	if (user_buffer) {
1401 		if (copy_to_user(
1402 			user_buffer,
1403 			port->identify,
1404 			ATA_ID_WORDS * sizeof(u16))) {
1405 			rv = -EFAULT;
1406 			goto out;
1407 		}
1408 	}
1409 
1410 out:
1411 	return rv;
1412 }
1413 
1414 /*
1415  * Issue a standby immediate command to the device.
1416  *
1417  * @port Pointer to the port structure.
1418  *
1419  * return value
1420  *	0	Command was executed successfully.
1421  *	-1	An error occurred while executing the command.
1422  */
1423 static int mtip_standby_immediate(struct mtip_port *port)
1424 {
1425 	int rv;
1426 	struct host_to_dev_fis	fis;
1427 	unsigned long start;
1428 	unsigned int timeout;
1429 
1430 	/* Build the FIS. */
1431 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1432 	fis.type	= 0x27;
1433 	fis.opts	= 1 << 7;
1434 	fis.command	= ATA_CMD_STANDBYNOW1;
1435 
1436 	mtip_set_timeout(port->dd, &fis, &timeout, 0);
1437 
1438 	start = jiffies;
1439 	rv = mtip_exec_internal_command(port,
1440 					&fis,
1441 					5,
1442 					0,
1443 					0,
1444 					0,
1445 					GFP_ATOMIC,
1446 					timeout);
1447 	dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n",
1448 			jiffies_to_msecs(jiffies - start));
1449 	if (rv)
1450 		dev_warn(&port->dd->pdev->dev,
1451 			"STANDBY IMMEDIATE command failed.\n");
1452 
1453 	return rv;
1454 }
1455 
1456 /*
1457  * Issue a READ LOG EXT command to the device.
1458  *
1459  * @port	pointer to the port structure.
1460  * @page	page number to fetch
1461  * @buffer	pointer to buffer
1462  * @buffer_dma	dma address corresponding to @buffer
1463  * @sectors	page length to fetch, in sectors
1464  *
1465  * return value
1466  *	@rv	return value from mtip_exec_internal_command()
1467  */
1468 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
1469 				dma_addr_t buffer_dma, unsigned int sectors)
1470 {
1471 	struct host_to_dev_fis fis;
1472 
1473 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1474 	fis.type	= 0x27;
1475 	fis.opts	= 1 << 7;
1476 	fis.command	= ATA_CMD_READ_LOG_EXT;
1477 	fis.sect_count	= sectors & 0xFF;
1478 	fis.sect_cnt_ex	= (sectors >> 8) & 0xFF;
1479 	fis.lba_low	= page;
1480 	fis.lba_mid	= 0;
1481 	fis.device	= ATA_DEVICE_OBS;
1482 
1483 	memset(buffer, 0, sectors * ATA_SECT_SIZE);
1484 
1485 	return mtip_exec_internal_command(port,
1486 					&fis,
1487 					5,
1488 					buffer_dma,
1489 					sectors * ATA_SECT_SIZE,
1490 					0,
1491 					GFP_ATOMIC,
1492 					MTIP_INT_CMD_TIMEOUT_MS);
1493 }
1494 
1495 /*
1496  * Issue a SMART READ DATA command to the device.
1497  *
1498  * @port	pointer to the port structure.
1499  * @buffer	pointer to buffer
1500  * @buffer_dma	dma address corresponding to @buffer
1501  *
1502  * return value
1503  *	@rv	return value from mtip_exec_internal_command()
1504  */
1505 static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer,
1506 					dma_addr_t buffer_dma)
1507 {
1508 	struct host_to_dev_fis fis;
1509 
1510 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1511 	fis.type	= 0x27;
1512 	fis.opts	= 1 << 7;
1513 	fis.command	= ATA_CMD_SMART;
1514 	fis.features	= 0xD0;
1515 	fis.sect_count	= 1;
1516 	fis.lba_mid	= 0x4F;
1517 	fis.lba_hi	= 0xC2;
1518 	fis.device	= ATA_DEVICE_OBS;
1519 
1520 	return mtip_exec_internal_command(port,
1521 					&fis,
1522 					5,
1523 					buffer_dma,
1524 					ATA_SECT_SIZE,
1525 					0,
1526 					GFP_ATOMIC,
1527 					15000);
1528 }
1529 
1530 /*
1531  * Get the value of a smart attribute
1532  *
1533  * @port	pointer to the port structure
1534  * @id		attribute number
1535  * @attrib	pointer to return attrib information corresponding to @id
1536  *
1537  * return value
1538  *	-EINVAL	NULL buffer passed or unsupported attribute @id.
1539  *	-EPERM	Identify data not valid, SMART not supported or not enabled
1540  */
1541 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
1542 						struct smart_attr *attrib)
1543 {
1544 	int rv, i;
1545 	struct smart_attr *pattr;
1546 
1547 	if (!attrib)
1548 		return -EINVAL;
1549 
1550 	if (!port->identify_valid) {
1551 		dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n");
1552 		return -EPERM;
1553 	}
1554 	if (!(port->identify[82] & 0x1)) {
1555 		dev_warn(&port->dd->pdev->dev, "SMART not supported\n");
1556 		return -EPERM;
1557 	}
1558 	if (!(port->identify[85] & 0x1)) {
1559 		dev_warn(&port->dd->pdev->dev, "SMART not enabled\n");
1560 		return -EPERM;
1561 	}
1562 
1563 	memset(port->smart_buf, 0, ATA_SECT_SIZE);
1564 	rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma);
1565 	if (rv) {
1566 		dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n");
1567 		return rv;
1568 	}
1569 
1570 	pattr = (struct smart_attr *)(port->smart_buf + 2);
1571 	for (i = 0; i < 29; i++, pattr++)
1572 		if (pattr->attr_id == id) {
1573 			memcpy(attrib, pattr, sizeof(struct smart_attr));
1574 			break;
1575 		}
1576 
1577 	if (i == 29) {
1578 		dev_warn(&port->dd->pdev->dev,
1579 			"Query for invalid SMART attribute ID\n");
1580 		rv = -EINVAL;
1581 	}
1582 
1583 	return rv;
1584 }
1585 
1586 /*
1587  * Trim unused sectors
1588  *
1589  * @dd		pointer to driver_data structure
1590  * @lba		starting lba
1591  * @len		# of 512b sectors to trim
1592  *
1593  * return value
1594  *      -ENOMEM		Out of dma memory
1595  *      -EINVAL		Invalid parameters passed in, trim not supported
1596  *      -EIO		Error submitting trim request to hw
1597  */
1598 static int mtip_send_trim(struct driver_data *dd, unsigned int lba,
1599 				unsigned int len)
1600 {
1601 	int i, rv = 0;
1602 	u64 tlba, tlen, sect_left;
1603 	struct mtip_trim_entry *buf;
1604 	dma_addr_t dma_addr;
1605 	struct host_to_dev_fis fis;
1606 
1607 	if (!len || dd->trim_supp == false)
1608 		return -EINVAL;
1609 
1610 	/* Trim request too big */
1611 	WARN_ON(len > (MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES));
1612 
1613 	/* Trim request not aligned on 4k boundary */
1614 	WARN_ON(len % 8 != 0);
1615 
1616 	/* Warn if vu_trim structure is too big */
1617 	WARN_ON(sizeof(struct mtip_trim) > ATA_SECT_SIZE);
1618 
1619 	/* Allocate a DMA buffer for the trim structure */
1620 	buf = dmam_alloc_coherent(&dd->pdev->dev, ATA_SECT_SIZE, &dma_addr,
1621 								GFP_KERNEL);
1622 	if (!buf)
1623 		return -ENOMEM;
1624 	memset(buf, 0, ATA_SECT_SIZE);
1625 
1626 	for (i = 0, sect_left = len, tlba = lba;
1627 			i < MTIP_MAX_TRIM_ENTRIES && sect_left;
1628 			i++) {
1629 		tlen = (sect_left >= MTIP_MAX_TRIM_ENTRY_LEN ?
1630 					MTIP_MAX_TRIM_ENTRY_LEN :
1631 					sect_left);
1632 		buf[i].lba = __force_bit2int cpu_to_le32(tlba);
1633 		buf[i].range = __force_bit2int cpu_to_le16(tlen);
1634 		tlba += tlen;
1635 		sect_left -= tlen;
1636 	}
1637 	WARN_ON(sect_left != 0);
1638 
1639 	/* Build the fis */
1640 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1641 	fis.type       = 0x27;
1642 	fis.opts       = 1 << 7;
1643 	fis.command    = 0xfb;
1644 	fis.features   = 0x60;
1645 	fis.sect_count = 1;
1646 	fis.device     = ATA_DEVICE_OBS;
1647 
1648 	if (mtip_exec_internal_command(dd->port,
1649 					&fis,
1650 					5,
1651 					dma_addr,
1652 					ATA_SECT_SIZE,
1653 					0,
1654 					GFP_KERNEL,
1655 					MTIP_TRIM_TIMEOUT_MS) < 0)
1656 		rv = -EIO;
1657 
1658 	dmam_free_coherent(&dd->pdev->dev, ATA_SECT_SIZE, buf, dma_addr);
1659 	return rv;
1660 }
1661 
1662 /*
1663  * Get the drive capacity.
1664  *
1665  * @dd      Pointer to the device data structure.
1666  * @sectors Pointer to the variable that will receive the sector count.
1667  *
1668  * return value
1669  *	1 Capacity was returned successfully.
1670  *	0 The identify information is invalid.
1671  */
1672 static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors)
1673 {
1674 	struct mtip_port *port = dd->port;
1675 	u64 total, raw0, raw1, raw2, raw3;
1676 	raw0 = port->identify[100];
1677 	raw1 = port->identify[101];
1678 	raw2 = port->identify[102];
1679 	raw3 = port->identify[103];
1680 	total = raw0 | raw1<<16 | raw2<<32 | raw3<<48;
1681 	*sectors = total;
1682 	return (bool) !!port->identify_valid;
1683 }
1684 
1685 /*
1686  * Display the identify command data.
1687  *
1688  * @port Pointer to the port data structure.
1689  *
1690  * return value
1691  *	None
1692  */
1693 static void mtip_dump_identify(struct mtip_port *port)
1694 {
1695 	sector_t sectors;
1696 	unsigned short revid;
1697 	char cbuf[42];
1698 
1699 	if (!port->identify_valid)
1700 		return;
1701 
1702 	strlcpy(cbuf, (char *)(port->identify+10), 21);
1703 	dev_info(&port->dd->pdev->dev,
1704 		"Serial No.: %s\n", cbuf);
1705 
1706 	strlcpy(cbuf, (char *)(port->identify+23), 9);
1707 	dev_info(&port->dd->pdev->dev,
1708 		"Firmware Ver.: %s\n", cbuf);
1709 
1710 	strlcpy(cbuf, (char *)(port->identify+27), 41);
1711 	dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf);
1712 
1713 	dev_info(&port->dd->pdev->dev, "Security: %04x %s\n",
1714 		port->identify[128],
1715 		port->identify[128] & 0x4 ? "(LOCKED)" : "");
1716 
1717 	if (mtip_hw_get_capacity(port->dd, &sectors))
1718 		dev_info(&port->dd->pdev->dev,
1719 			"Capacity: %llu sectors (%llu MB)\n",
1720 			 (u64)sectors,
1721 			 ((u64)sectors) * ATA_SECT_SIZE >> 20);
1722 
1723 	pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid);
1724 	switch (revid & 0xFF) {
1725 	case 0x1:
1726 		strlcpy(cbuf, "A0", 3);
1727 		break;
1728 	case 0x3:
1729 		strlcpy(cbuf, "A2", 3);
1730 		break;
1731 	default:
1732 		strlcpy(cbuf, "?", 2);
1733 		break;
1734 	}
1735 	dev_info(&port->dd->pdev->dev,
1736 		"Card Type: %s\n", cbuf);
1737 }
1738 
1739 /*
1740  * Map the commands scatter list into the command table.
1741  *
1742  * @command Pointer to the command.
1743  * @nents Number of scatter list entries.
1744  *
1745  * return value
1746  *	None
1747  */
1748 static inline void fill_command_sg(struct driver_data *dd,
1749 				struct mtip_cmd *command,
1750 				int nents)
1751 {
1752 	int n;
1753 	unsigned int dma_len;
1754 	struct mtip_cmd_sg *command_sg;
1755 	struct scatterlist *sg = command->sg;
1756 
1757 	command_sg = command->command + AHCI_CMD_TBL_HDR_SZ;
1758 
1759 	for (n = 0; n < nents; n++) {
1760 		dma_len = sg_dma_len(sg);
1761 		if (dma_len > 0x400000)
1762 			dev_err(&dd->pdev->dev,
1763 				"DMA segment length truncated\n");
1764 		command_sg->info = __force_bit2int
1765 			cpu_to_le32((dma_len-1) & 0x3FFFFF);
1766 		command_sg->dba	= __force_bit2int
1767 			cpu_to_le32(sg_dma_address(sg));
1768 		command_sg->dba_upper = __force_bit2int
1769 			cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
1770 		command_sg++;
1771 		sg++;
1772 	}
1773 }
1774 
1775 /*
1776  * @brief Execute a drive command.
1777  *
1778  * return value 0 The command completed successfully.
1779  * return value -1 An error occurred while executing the command.
1780  */
1781 static int exec_drive_task(struct mtip_port *port, u8 *command)
1782 {
1783 	struct host_to_dev_fis	fis;
1784 	struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
1785 	unsigned int to;
1786 
1787 	/* Build the FIS. */
1788 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1789 	fis.type	= 0x27;
1790 	fis.opts	= 1 << 7;
1791 	fis.command	= command[0];
1792 	fis.features	= command[1];
1793 	fis.sect_count	= command[2];
1794 	fis.sector	= command[3];
1795 	fis.cyl_low	= command[4];
1796 	fis.cyl_hi	= command[5];
1797 	fis.device	= command[6] & ~0x10; /* Clear the dev bit*/
1798 
1799 	mtip_set_timeout(port->dd, &fis, &to, 0);
1800 
1801 	dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n",
1802 		__func__,
1803 		command[0],
1804 		command[1],
1805 		command[2],
1806 		command[3],
1807 		command[4],
1808 		command[5],
1809 		command[6]);
1810 
1811 	/* Execute the command. */
1812 	if (mtip_exec_internal_command(port,
1813 				 &fis,
1814 				 5,
1815 				 0,
1816 				 0,
1817 				 0,
1818 				 GFP_KERNEL,
1819 				 to) < 0) {
1820 		return -1;
1821 	}
1822 
1823 	command[0] = reply->command; /* Status*/
1824 	command[1] = reply->features; /* Error*/
1825 	command[4] = reply->cyl_low;
1826 	command[5] = reply->cyl_hi;
1827 
1828 	dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n",
1829 		__func__,
1830 		command[0],
1831 		command[1],
1832 		command[4],
1833 		command[5]);
1834 
1835 	return 0;
1836 }
1837 
1838 /*
1839  * @brief Execute a drive command.
1840  *
1841  * @param port Pointer to the port data structure.
1842  * @param command Pointer to the user specified command parameters.
1843  * @param user_buffer Pointer to the user space buffer where read sector
1844  *                   data should be copied.
1845  *
1846  * return value 0 The command completed successfully.
1847  * return value -EFAULT An error occurred while copying the completion
1848  *                 data to the user space buffer.
1849  * return value -1 An error occurred while executing the command.
1850  */
1851 static int exec_drive_command(struct mtip_port *port, u8 *command,
1852 				void __user *user_buffer)
1853 {
1854 	struct host_to_dev_fis	fis;
1855 	struct host_to_dev_fis *reply;
1856 	u8 *buf = NULL;
1857 	dma_addr_t dma_addr = 0;
1858 	int rv = 0, xfer_sz = command[3];
1859 	unsigned int to;
1860 
1861 	if (xfer_sz) {
1862 		if (!user_buffer)
1863 			return -EFAULT;
1864 
1865 		buf = dmam_alloc_coherent(&port->dd->pdev->dev,
1866 				ATA_SECT_SIZE * xfer_sz,
1867 				&dma_addr,
1868 				GFP_KERNEL);
1869 		if (!buf) {
1870 			dev_err(&port->dd->pdev->dev,
1871 				"Memory allocation failed (%d bytes)\n",
1872 				ATA_SECT_SIZE * xfer_sz);
1873 			return -ENOMEM;
1874 		}
1875 		memset(buf, 0, ATA_SECT_SIZE * xfer_sz);
1876 	}
1877 
1878 	/* Build the FIS. */
1879 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1880 	fis.type	= 0x27;
1881 	fis.opts	= 1 << 7;
1882 	fis.command	= command[0];
1883 	fis.features	= command[2];
1884 	fis.sect_count	= command[3];
1885 	if (fis.command == ATA_CMD_SMART) {
1886 		fis.sector	= command[1];
1887 		fis.cyl_low	= 0x4F;
1888 		fis.cyl_hi	= 0xC2;
1889 	}
1890 
1891 	mtip_set_timeout(port->dd, &fis, &to, 0);
1892 
1893 	if (xfer_sz)
1894 		reply = (port->rxfis + RX_FIS_PIO_SETUP);
1895 	else
1896 		reply = (port->rxfis + RX_FIS_D2H_REG);
1897 
1898 	dbg_printk(MTIP_DRV_NAME
1899 		" %s: User Command: cmd %x, sect %x, "
1900 		"feat %x, sectcnt %x\n",
1901 		__func__,
1902 		command[0],
1903 		command[1],
1904 		command[2],
1905 		command[3]);
1906 
1907 	/* Execute the command. */
1908 	if (mtip_exec_internal_command(port,
1909 				&fis,
1910 				 5,
1911 				 (xfer_sz ? dma_addr : 0),
1912 				 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0),
1913 				 0,
1914 				 GFP_KERNEL,
1915 				 to)
1916 				 < 0) {
1917 		rv = -EFAULT;
1918 		goto exit_drive_command;
1919 	}
1920 
1921 	/* Collect the completion status. */
1922 	command[0] = reply->command; /* Status*/
1923 	command[1] = reply->features; /* Error*/
1924 	command[2] = reply->sect_count;
1925 
1926 	dbg_printk(MTIP_DRV_NAME
1927 		" %s: Completion Status: stat %x, "
1928 		"err %x, nsect %x\n",
1929 		__func__,
1930 		command[0],
1931 		command[1],
1932 		command[2]);
1933 
1934 	if (xfer_sz) {
1935 		if (copy_to_user(user_buffer,
1936 				 buf,
1937 				 ATA_SECT_SIZE * command[3])) {
1938 			rv = -EFAULT;
1939 			goto exit_drive_command;
1940 		}
1941 	}
1942 exit_drive_command:
1943 	if (buf)
1944 		dmam_free_coherent(&port->dd->pdev->dev,
1945 				ATA_SECT_SIZE * xfer_sz, buf, dma_addr);
1946 	return rv;
1947 }
1948 
1949 /*
1950  *  Indicates whether a command has a single sector payload.
1951  *
1952  *  @command passed to the device to perform the certain event.
1953  *  @features passed to the device to perform the certain event.
1954  *
1955  *  return value
1956  *	1	command is one that always has a single sector payload,
1957  *		regardless of the value in the Sector Count field.
1958  *      0       otherwise
1959  *
1960  */
1961 static unsigned int implicit_sector(unsigned char command,
1962 				    unsigned char features)
1963 {
1964 	unsigned int rv = 0;
1965 
1966 	/* list of commands that have an implicit sector count of 1 */
1967 	switch (command) {
1968 	case ATA_CMD_SEC_SET_PASS:
1969 	case ATA_CMD_SEC_UNLOCK:
1970 	case ATA_CMD_SEC_ERASE_PREP:
1971 	case ATA_CMD_SEC_ERASE_UNIT:
1972 	case ATA_CMD_SEC_FREEZE_LOCK:
1973 	case ATA_CMD_SEC_DISABLE_PASS:
1974 	case ATA_CMD_PMP_READ:
1975 	case ATA_CMD_PMP_WRITE:
1976 		rv = 1;
1977 		break;
1978 	case ATA_CMD_SET_MAX:
1979 		if (features == ATA_SET_MAX_UNLOCK)
1980 			rv = 1;
1981 		break;
1982 	case ATA_CMD_SMART:
1983 		if ((features == ATA_SMART_READ_VALUES) ||
1984 				(features == ATA_SMART_READ_THRESHOLDS))
1985 			rv = 1;
1986 		break;
1987 	case ATA_CMD_CONF_OVERLAY:
1988 		if ((features == ATA_DCO_IDENTIFY) ||
1989 				(features == ATA_DCO_SET))
1990 			rv = 1;
1991 		break;
1992 	}
1993 	return rv;
1994 }
1995 
1996 /*
1997  * Executes a taskfile
1998  * See ide_taskfile_ioctl() for derivation
1999  */
2000 static int exec_drive_taskfile(struct driver_data *dd,
2001 			       void __user *buf,
2002 			       ide_task_request_t *req_task,
2003 			       int outtotal)
2004 {
2005 	struct host_to_dev_fis	fis;
2006 	struct host_to_dev_fis *reply;
2007 	u8 *outbuf = NULL;
2008 	u8 *inbuf = NULL;
2009 	dma_addr_t outbuf_dma = 0;
2010 	dma_addr_t inbuf_dma = 0;
2011 	dma_addr_t dma_buffer = 0;
2012 	int err = 0;
2013 	unsigned int taskin = 0;
2014 	unsigned int taskout = 0;
2015 	u8 nsect = 0;
2016 	unsigned int timeout;
2017 	unsigned int force_single_sector;
2018 	unsigned int transfer_size;
2019 	unsigned long task_file_data;
2020 	int intotal = outtotal + req_task->out_size;
2021 	int erasemode = 0;
2022 
2023 	taskout = req_task->out_size;
2024 	taskin = req_task->in_size;
2025 	/* 130560 = 512 * 0xFF*/
2026 	if (taskin > 130560 || taskout > 130560) {
2027 		err = -EINVAL;
2028 		goto abort;
2029 	}
2030 
2031 	if (taskout) {
2032 		outbuf = kzalloc(taskout, GFP_KERNEL);
2033 		if (outbuf == NULL) {
2034 			err = -ENOMEM;
2035 			goto abort;
2036 		}
2037 		if (copy_from_user(outbuf, buf + outtotal, taskout)) {
2038 			err = -EFAULT;
2039 			goto abort;
2040 		}
2041 		outbuf_dma = pci_map_single(dd->pdev,
2042 					 outbuf,
2043 					 taskout,
2044 					 DMA_TO_DEVICE);
2045 		if (outbuf_dma == 0) {
2046 			err = -ENOMEM;
2047 			goto abort;
2048 		}
2049 		dma_buffer = outbuf_dma;
2050 	}
2051 
2052 	if (taskin) {
2053 		inbuf = kzalloc(taskin, GFP_KERNEL);
2054 		if (inbuf == NULL) {
2055 			err = -ENOMEM;
2056 			goto abort;
2057 		}
2058 
2059 		if (copy_from_user(inbuf, buf + intotal, taskin)) {
2060 			err = -EFAULT;
2061 			goto abort;
2062 		}
2063 		inbuf_dma = pci_map_single(dd->pdev,
2064 					 inbuf,
2065 					 taskin, DMA_FROM_DEVICE);
2066 		if (inbuf_dma == 0) {
2067 			err = -ENOMEM;
2068 			goto abort;
2069 		}
2070 		dma_buffer = inbuf_dma;
2071 	}
2072 
2073 	/* only supports PIO and non-data commands from this ioctl. */
2074 	switch (req_task->data_phase) {
2075 	case TASKFILE_OUT:
2076 		nsect = taskout / ATA_SECT_SIZE;
2077 		reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2078 		break;
2079 	case TASKFILE_IN:
2080 		reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2081 		break;
2082 	case TASKFILE_NO_DATA:
2083 		reply = (dd->port->rxfis + RX_FIS_D2H_REG);
2084 		break;
2085 	default:
2086 		err = -EINVAL;
2087 		goto abort;
2088 	}
2089 
2090 	/* Build the FIS. */
2091 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
2092 
2093 	fis.type	= 0x27;
2094 	fis.opts	= 1 << 7;
2095 	fis.command	= req_task->io_ports[7];
2096 	fis.features	= req_task->io_ports[1];
2097 	fis.sect_count	= req_task->io_ports[2];
2098 	fis.lba_low	= req_task->io_ports[3];
2099 	fis.lba_mid	= req_task->io_ports[4];
2100 	fis.lba_hi	= req_task->io_ports[5];
2101 	 /* Clear the dev bit*/
2102 	fis.device	= req_task->io_ports[6] & ~0x10;
2103 
2104 	if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) {
2105 		req_task->in_flags.all	=
2106 			IDE_TASKFILE_STD_IN_FLAGS |
2107 			(IDE_HOB_STD_IN_FLAGS << 8);
2108 		fis.lba_low_ex		= req_task->hob_ports[3];
2109 		fis.lba_mid_ex		= req_task->hob_ports[4];
2110 		fis.lba_hi_ex		= req_task->hob_ports[5];
2111 		fis.features_ex		= req_task->hob_ports[1];
2112 		fis.sect_cnt_ex		= req_task->hob_ports[2];
2113 
2114 	} else {
2115 		req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS;
2116 	}
2117 
2118 	force_single_sector = implicit_sector(fis.command, fis.features);
2119 
2120 	if ((taskin || taskout) && (!fis.sect_count)) {
2121 		if (nsect)
2122 			fis.sect_count = nsect;
2123 		else {
2124 			if (!force_single_sector) {
2125 				dev_warn(&dd->pdev->dev,
2126 					"data movement but "
2127 					"sect_count is 0\n");
2128 					err = -EINVAL;
2129 					goto abort;
2130 			}
2131 		}
2132 	}
2133 
2134 	dbg_printk(MTIP_DRV_NAME
2135 		" %s: cmd %x, feat %x, nsect %x,"
2136 		" sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x,"
2137 		" head/dev %x\n",
2138 		__func__,
2139 		fis.command,
2140 		fis.features,
2141 		fis.sect_count,
2142 		fis.lba_low,
2143 		fis.lba_mid,
2144 		fis.lba_hi,
2145 		fis.device);
2146 
2147 	/* check for erase mode support during secure erase.*/
2148 	if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf &&
2149 					(outbuf[0] & MTIP_SEC_ERASE_MODE)) {
2150 		erasemode = 1;
2151 	}
2152 
2153 	mtip_set_timeout(dd, &fis, &timeout, erasemode);
2154 
2155 	/* Determine the correct transfer size.*/
2156 	if (force_single_sector)
2157 		transfer_size = ATA_SECT_SIZE;
2158 	else
2159 		transfer_size = ATA_SECT_SIZE * fis.sect_count;
2160 
2161 	/* Execute the command.*/
2162 	if (mtip_exec_internal_command(dd->port,
2163 				 &fis,
2164 				 5,
2165 				 dma_buffer,
2166 				 transfer_size,
2167 				 0,
2168 				 GFP_KERNEL,
2169 				 timeout) < 0) {
2170 		err = -EIO;
2171 		goto abort;
2172 	}
2173 
2174 	task_file_data = readl(dd->port->mmio+PORT_TFDATA);
2175 
2176 	if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) {
2177 		reply = dd->port->rxfis + RX_FIS_PIO_SETUP;
2178 		req_task->io_ports[7] = reply->control;
2179 	} else {
2180 		reply = dd->port->rxfis + RX_FIS_D2H_REG;
2181 		req_task->io_ports[7] = reply->command;
2182 	}
2183 
2184 	/* reclaim the DMA buffers.*/
2185 	if (inbuf_dma)
2186 		pci_unmap_single(dd->pdev, inbuf_dma,
2187 			taskin, DMA_FROM_DEVICE);
2188 	if (outbuf_dma)
2189 		pci_unmap_single(dd->pdev, outbuf_dma,
2190 			taskout, DMA_TO_DEVICE);
2191 	inbuf_dma  = 0;
2192 	outbuf_dma = 0;
2193 
2194 	/* return the ATA registers to the caller.*/
2195 	req_task->io_ports[1] = reply->features;
2196 	req_task->io_ports[2] = reply->sect_count;
2197 	req_task->io_ports[3] = reply->lba_low;
2198 	req_task->io_ports[4] = reply->lba_mid;
2199 	req_task->io_ports[5] = reply->lba_hi;
2200 	req_task->io_ports[6] = reply->device;
2201 
2202 	if (req_task->out_flags.all & 1)  {
2203 
2204 		req_task->hob_ports[3] = reply->lba_low_ex;
2205 		req_task->hob_ports[4] = reply->lba_mid_ex;
2206 		req_task->hob_ports[5] = reply->lba_hi_ex;
2207 		req_task->hob_ports[1] = reply->features_ex;
2208 		req_task->hob_ports[2] = reply->sect_cnt_ex;
2209 	}
2210 	dbg_printk(MTIP_DRV_NAME
2211 		" %s: Completion: stat %x,"
2212 		"err %x, sect_cnt %x, lbalo %x,"
2213 		"lbamid %x, lbahi %x, dev %x\n",
2214 		__func__,
2215 		req_task->io_ports[7],
2216 		req_task->io_ports[1],
2217 		req_task->io_ports[2],
2218 		req_task->io_ports[3],
2219 		req_task->io_ports[4],
2220 		req_task->io_ports[5],
2221 		req_task->io_ports[6]);
2222 
2223 	if (taskout) {
2224 		if (copy_to_user(buf + outtotal, outbuf, taskout)) {
2225 			err = -EFAULT;
2226 			goto abort;
2227 		}
2228 	}
2229 	if (taskin) {
2230 		if (copy_to_user(buf + intotal, inbuf, taskin)) {
2231 			err = -EFAULT;
2232 			goto abort;
2233 		}
2234 	}
2235 abort:
2236 	if (inbuf_dma)
2237 		pci_unmap_single(dd->pdev, inbuf_dma,
2238 					taskin, DMA_FROM_DEVICE);
2239 	if (outbuf_dma)
2240 		pci_unmap_single(dd->pdev, outbuf_dma,
2241 					taskout, DMA_TO_DEVICE);
2242 	kfree(outbuf);
2243 	kfree(inbuf);
2244 
2245 	return err;
2246 }
2247 
2248 /*
2249  * Handle IOCTL calls from the Block Layer.
2250  *
2251  * This function is called by the Block Layer when it receives an IOCTL
2252  * command that it does not understand. If the IOCTL command is not supported
2253  * this function returns -ENOTTY.
2254  *
2255  * @dd  Pointer to the driver data structure.
2256  * @cmd IOCTL command passed from the Block Layer.
2257  * @arg IOCTL argument passed from the Block Layer.
2258  *
2259  * return value
2260  *	0	The IOCTL completed successfully.
2261  *	-ENOTTY The specified command is not supported.
2262  *	-EFAULT An error occurred copying data to a user space buffer.
2263  *	-EIO	An error occurred while executing the command.
2264  */
2265 static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd,
2266 			 unsigned long arg)
2267 {
2268 	switch (cmd) {
2269 	case HDIO_GET_IDENTITY:
2270 	{
2271 		if (copy_to_user((void __user *)arg, dd->port->identify,
2272 						sizeof(u16) * ATA_ID_WORDS))
2273 			return -EFAULT;
2274 		break;
2275 	}
2276 	case HDIO_DRIVE_CMD:
2277 	{
2278 		u8 drive_command[4];
2279 
2280 		/* Copy the user command info to our buffer. */
2281 		if (copy_from_user(drive_command,
2282 					 (void __user *) arg,
2283 					 sizeof(drive_command)))
2284 			return -EFAULT;
2285 
2286 		/* Execute the drive command. */
2287 		if (exec_drive_command(dd->port,
2288 					 drive_command,
2289 					 (void __user *) (arg+4)))
2290 			return -EIO;
2291 
2292 		/* Copy the status back to the users buffer. */
2293 		if (copy_to_user((void __user *) arg,
2294 					 drive_command,
2295 					 sizeof(drive_command)))
2296 			return -EFAULT;
2297 
2298 		break;
2299 	}
2300 	case HDIO_DRIVE_TASK:
2301 	{
2302 		u8 drive_command[7];
2303 
2304 		/* Copy the user command info to our buffer. */
2305 		if (copy_from_user(drive_command,
2306 					 (void __user *) arg,
2307 					 sizeof(drive_command)))
2308 			return -EFAULT;
2309 
2310 		/* Execute the drive command. */
2311 		if (exec_drive_task(dd->port, drive_command))
2312 			return -EIO;
2313 
2314 		/* Copy the status back to the users buffer. */
2315 		if (copy_to_user((void __user *) arg,
2316 					 drive_command,
2317 					 sizeof(drive_command)))
2318 			return -EFAULT;
2319 
2320 		break;
2321 	}
2322 	case HDIO_DRIVE_TASKFILE: {
2323 		ide_task_request_t req_task;
2324 		int ret, outtotal;
2325 
2326 		if (copy_from_user(&req_task, (void __user *) arg,
2327 					sizeof(req_task)))
2328 			return -EFAULT;
2329 
2330 		outtotal = sizeof(req_task);
2331 
2332 		ret = exec_drive_taskfile(dd, (void __user *) arg,
2333 						&req_task, outtotal);
2334 
2335 		if (copy_to_user((void __user *) arg, &req_task,
2336 							sizeof(req_task)))
2337 			return -EFAULT;
2338 
2339 		return ret;
2340 	}
2341 
2342 	default:
2343 		return -EINVAL;
2344 	}
2345 	return 0;
2346 }
2347 
2348 /*
2349  * Submit an IO to the hw
2350  *
2351  * This function is called by the block layer to issue an io
2352  * to the device. Upon completion, the callback function will
2353  * be called with the data parameter passed as the callback data.
2354  *
2355  * @dd       Pointer to the driver data structure.
2356  * @start    First sector to read.
2357  * @nsect    Number of sectors to read.
2358  * @nents    Number of entries in scatter list for the read command.
2359  * @tag      The tag of this read command.
2360  * @callback Pointer to the function that should be called
2361  *	     when the read completes.
2362  * @data     Callback data passed to the callback function
2363  *	     when the read completes.
2364  * @dir      Direction (read or write)
2365  *
2366  * return value
2367  *	None
2368  */
2369 static void mtip_hw_submit_io(struct driver_data *dd, struct request *rq,
2370 			      struct mtip_cmd *command, int nents,
2371 			      struct blk_mq_hw_ctx *hctx)
2372 {
2373 	struct host_to_dev_fis	*fis;
2374 	struct mtip_port *port = dd->port;
2375 	int dma_dir = rq_data_dir(rq) == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
2376 	u64 start = blk_rq_pos(rq);
2377 	unsigned int nsect = blk_rq_sectors(rq);
2378 
2379 	/* Map the scatter list for DMA access */
2380 	nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir);
2381 
2382 	prefetch(&port->flags);
2383 
2384 	command->scatter_ents = nents;
2385 
2386 	/*
2387 	 * The number of retries for this command before it is
2388 	 * reported as a failure to the upper layers.
2389 	 */
2390 	command->retries = MTIP_MAX_RETRIES;
2391 
2392 	/* Fill out fis */
2393 	fis = command->command;
2394 	fis->type        = 0x27;
2395 	fis->opts        = 1 << 7;
2396 	if (dma_dir == DMA_FROM_DEVICE)
2397 		fis->command = ATA_CMD_FPDMA_READ;
2398 	else
2399 		fis->command = ATA_CMD_FPDMA_WRITE;
2400 	fis->lba_low     = start & 0xFF;
2401 	fis->lba_mid     = (start >> 8) & 0xFF;
2402 	fis->lba_hi      = (start >> 16) & 0xFF;
2403 	fis->lba_low_ex  = (start >> 24) & 0xFF;
2404 	fis->lba_mid_ex  = (start >> 32) & 0xFF;
2405 	fis->lba_hi_ex   = (start >> 40) & 0xFF;
2406 	fis->device	 = 1 << 6;
2407 	fis->features    = nsect & 0xFF;
2408 	fis->features_ex = (nsect >> 8) & 0xFF;
2409 	fis->sect_count  = ((rq->tag << 3) | (rq->tag >> 5));
2410 	fis->sect_cnt_ex = 0;
2411 	fis->control     = 0;
2412 	fis->res2        = 0;
2413 	fis->res3        = 0;
2414 	fill_command_sg(dd, command, nents);
2415 
2416 	if (unlikely(command->unaligned))
2417 		fis->device |= 1 << 7;
2418 
2419 	/* Populate the command header */
2420 	command->command_header->opts =
2421 			__force_bit2int cpu_to_le32(
2422 				(nents << 16) | 5 | AHCI_CMD_PREFETCH);
2423 	command->command_header->byte_count = 0;
2424 
2425 	/*
2426 	 * Set the completion function and data for the command
2427 	 * within this layer.
2428 	 */
2429 	command->comp_data = dd;
2430 	command->comp_func = mtip_async_complete;
2431 	command->direction = dma_dir;
2432 
2433 	/*
2434 	 * To prevent this command from being issued
2435 	 * if an internal command is in progress or error handling is active.
2436 	 */
2437 	if (unlikely(port->flags & MTIP_PF_PAUSE_IO)) {
2438 		set_bit(rq->tag, port->cmds_to_issue);
2439 		set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2440 		return;
2441 	}
2442 
2443 	/* Issue the command to the hardware */
2444 	mtip_issue_ncq_command(port, rq->tag);
2445 }
2446 
2447 /*
2448  * Sysfs status dump.
2449  *
2450  * @dev  Pointer to the device structure, passed by the kernrel.
2451  * @attr Pointer to the device_attribute structure passed by the kernel.
2452  * @buf  Pointer to the char buffer that will receive the stats info.
2453  *
2454  * return value
2455  *	The size, in bytes, of the data copied into buf.
2456  */
2457 static ssize_t mtip_hw_show_status(struct device *dev,
2458 				struct device_attribute *attr,
2459 				char *buf)
2460 {
2461 	struct driver_data *dd = dev_to_disk(dev)->private_data;
2462 	int size = 0;
2463 
2464 	if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
2465 		size += sprintf(buf, "%s", "thermal_shutdown\n");
2466 	else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
2467 		size += sprintf(buf, "%s", "write_protect\n");
2468 	else
2469 		size += sprintf(buf, "%s", "online\n");
2470 
2471 	return size;
2472 }
2473 
2474 static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL);
2475 
2476 /* debugsfs entries */
2477 
2478 static ssize_t show_device_status(struct device_driver *drv, char *buf)
2479 {
2480 	int size = 0;
2481 	struct driver_data *dd, *tmp;
2482 	unsigned long flags;
2483 	char id_buf[42];
2484 	u16 status = 0;
2485 
2486 	spin_lock_irqsave(&dev_lock, flags);
2487 	size += sprintf(&buf[size], "Devices Present:\n");
2488 	list_for_each_entry_safe(dd, tmp, &online_list, online_list) {
2489 		if (dd->pdev) {
2490 			if (dd->port &&
2491 			    dd->port->identify &&
2492 			    dd->port->identify_valid) {
2493 				strlcpy(id_buf,
2494 					(char *) (dd->port->identify + 10), 21);
2495 				status = *(dd->port->identify + 141);
2496 			} else {
2497 				memset(id_buf, 0, 42);
2498 				status = 0;
2499 			}
2500 
2501 			if (dd->port &&
2502 			    test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2503 				size += sprintf(&buf[size],
2504 					" device %s %s (ftl rebuild %d %%)\n",
2505 					dev_name(&dd->pdev->dev),
2506 					id_buf,
2507 					status);
2508 			} else {
2509 				size += sprintf(&buf[size],
2510 					" device %s %s\n",
2511 					dev_name(&dd->pdev->dev),
2512 					id_buf);
2513 			}
2514 		}
2515 	}
2516 
2517 	size += sprintf(&buf[size], "Devices Being Removed:\n");
2518 	list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) {
2519 		if (dd->pdev) {
2520 			if (dd->port &&
2521 			    dd->port->identify &&
2522 			    dd->port->identify_valid) {
2523 				strlcpy(id_buf,
2524 					(char *) (dd->port->identify+10), 21);
2525 				status = *(dd->port->identify + 141);
2526 			} else {
2527 				memset(id_buf, 0, 42);
2528 				status = 0;
2529 			}
2530 
2531 			if (dd->port &&
2532 			    test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2533 				size += sprintf(&buf[size],
2534 					" device %s %s (ftl rebuild %d %%)\n",
2535 					dev_name(&dd->pdev->dev),
2536 					id_buf,
2537 					status);
2538 			} else {
2539 				size += sprintf(&buf[size],
2540 					" device %s %s\n",
2541 					dev_name(&dd->pdev->dev),
2542 					id_buf);
2543 			}
2544 		}
2545 	}
2546 	spin_unlock_irqrestore(&dev_lock, flags);
2547 
2548 	return size;
2549 }
2550 
2551 static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf,
2552 						size_t len, loff_t *offset)
2553 {
2554 	struct driver_data *dd =  (struct driver_data *)f->private_data;
2555 	int size = *offset;
2556 	char *buf;
2557 	int rv = 0;
2558 
2559 	if (!len || *offset)
2560 		return 0;
2561 
2562 	buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2563 	if (!buf) {
2564 		dev_err(&dd->pdev->dev,
2565 			"Memory allocation: status buffer\n");
2566 		return -ENOMEM;
2567 	}
2568 
2569 	size += show_device_status(NULL, buf);
2570 
2571 	*offset = size <= len ? size : len;
2572 	size = copy_to_user(ubuf, buf, *offset);
2573 	if (size)
2574 		rv = -EFAULT;
2575 
2576 	kfree(buf);
2577 	return rv ? rv : *offset;
2578 }
2579 
2580 static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf,
2581 				  size_t len, loff_t *offset)
2582 {
2583 	struct driver_data *dd =  (struct driver_data *)f->private_data;
2584 	char *buf;
2585 	u32 group_allocated;
2586 	int size = *offset;
2587 	int n, rv = 0;
2588 
2589 	if (!len || size)
2590 		return 0;
2591 
2592 	buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2593 	if (!buf) {
2594 		dev_err(&dd->pdev->dev,
2595 			"Memory allocation: register buffer\n");
2596 		return -ENOMEM;
2597 	}
2598 
2599 	size += sprintf(&buf[size], "H/ S ACTive      : [ 0x");
2600 
2601 	for (n = dd->slot_groups-1; n >= 0; n--)
2602 		size += sprintf(&buf[size], "%08X ",
2603 					 readl(dd->port->s_active[n]));
2604 
2605 	size += sprintf(&buf[size], "]\n");
2606 	size += sprintf(&buf[size], "H/ Command Issue : [ 0x");
2607 
2608 	for (n = dd->slot_groups-1; n >= 0; n--)
2609 		size += sprintf(&buf[size], "%08X ",
2610 					readl(dd->port->cmd_issue[n]));
2611 
2612 	size += sprintf(&buf[size], "]\n");
2613 	size += sprintf(&buf[size], "H/ Completed     : [ 0x");
2614 
2615 	for (n = dd->slot_groups-1; n >= 0; n--)
2616 		size += sprintf(&buf[size], "%08X ",
2617 				readl(dd->port->completed[n]));
2618 
2619 	size += sprintf(&buf[size], "]\n");
2620 	size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n",
2621 				readl(dd->port->mmio + PORT_IRQ_STAT));
2622 	size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n",
2623 				readl(dd->mmio + HOST_IRQ_STAT));
2624 	size += sprintf(&buf[size], "\n");
2625 
2626 	size += sprintf(&buf[size], "L/ Commands in Q : [ 0x");
2627 
2628 	for (n = dd->slot_groups-1; n >= 0; n--) {
2629 		if (sizeof(long) > sizeof(u32))
2630 			group_allocated =
2631 				dd->port->cmds_to_issue[n/2] >> (32*(n&1));
2632 		else
2633 			group_allocated = dd->port->cmds_to_issue[n];
2634 		size += sprintf(&buf[size], "%08X ", group_allocated);
2635 	}
2636 	size += sprintf(&buf[size], "]\n");
2637 
2638 	*offset = size <= len ? size : len;
2639 	size = copy_to_user(ubuf, buf, *offset);
2640 	if (size)
2641 		rv = -EFAULT;
2642 
2643 	kfree(buf);
2644 	return rv ? rv : *offset;
2645 }
2646 
2647 static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf,
2648 				  size_t len, loff_t *offset)
2649 {
2650 	struct driver_data *dd =  (struct driver_data *)f->private_data;
2651 	char *buf;
2652 	int size = *offset;
2653 	int rv = 0;
2654 
2655 	if (!len || size)
2656 		return 0;
2657 
2658 	buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2659 	if (!buf) {
2660 		dev_err(&dd->pdev->dev,
2661 			"Memory allocation: flag buffer\n");
2662 		return -ENOMEM;
2663 	}
2664 
2665 	size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n",
2666 							dd->port->flags);
2667 	size += sprintf(&buf[size], "Flag-dd   : [ %08lX ]\n",
2668 							dd->dd_flag);
2669 
2670 	*offset = size <= len ? size : len;
2671 	size = copy_to_user(ubuf, buf, *offset);
2672 	if (size)
2673 		rv = -EFAULT;
2674 
2675 	kfree(buf);
2676 	return rv ? rv : *offset;
2677 }
2678 
2679 static const struct file_operations mtip_device_status_fops = {
2680 	.owner  = THIS_MODULE,
2681 	.open   = simple_open,
2682 	.read   = mtip_hw_read_device_status,
2683 	.llseek = no_llseek,
2684 };
2685 
2686 static const struct file_operations mtip_regs_fops = {
2687 	.owner  = THIS_MODULE,
2688 	.open   = simple_open,
2689 	.read   = mtip_hw_read_registers,
2690 	.llseek = no_llseek,
2691 };
2692 
2693 static const struct file_operations mtip_flags_fops = {
2694 	.owner  = THIS_MODULE,
2695 	.open   = simple_open,
2696 	.read   = mtip_hw_read_flags,
2697 	.llseek = no_llseek,
2698 };
2699 
2700 /*
2701  * Create the sysfs related attributes.
2702  *
2703  * @dd   Pointer to the driver data structure.
2704  * @kobj Pointer to the kobj for the block device.
2705  *
2706  * return value
2707  *	0	Operation completed successfully.
2708  *	-EINVAL Invalid parameter.
2709  */
2710 static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj)
2711 {
2712 	if (!kobj || !dd)
2713 		return -EINVAL;
2714 
2715 	if (sysfs_create_file(kobj, &dev_attr_status.attr))
2716 		dev_warn(&dd->pdev->dev,
2717 			"Error creating 'status' sysfs entry\n");
2718 	return 0;
2719 }
2720 
2721 /*
2722  * Remove the sysfs related attributes.
2723  *
2724  * @dd   Pointer to the driver data structure.
2725  * @kobj Pointer to the kobj for the block device.
2726  *
2727  * return value
2728  *	0	Operation completed successfully.
2729  *	-EINVAL Invalid parameter.
2730  */
2731 static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj)
2732 {
2733 	if (!kobj || !dd)
2734 		return -EINVAL;
2735 
2736 	sysfs_remove_file(kobj, &dev_attr_status.attr);
2737 
2738 	return 0;
2739 }
2740 
2741 static int mtip_hw_debugfs_init(struct driver_data *dd)
2742 {
2743 	if (!dfs_parent)
2744 		return -1;
2745 
2746 	dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent);
2747 	if (IS_ERR_OR_NULL(dd->dfs_node)) {
2748 		dev_warn(&dd->pdev->dev,
2749 			"Error creating node %s under debugfs\n",
2750 						dd->disk->disk_name);
2751 		dd->dfs_node = NULL;
2752 		return -1;
2753 	}
2754 
2755 	debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd,
2756 							&mtip_flags_fops);
2757 	debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd,
2758 							&mtip_regs_fops);
2759 
2760 	return 0;
2761 }
2762 
2763 static void mtip_hw_debugfs_exit(struct driver_data *dd)
2764 {
2765 	if (dd->dfs_node)
2766 		debugfs_remove_recursive(dd->dfs_node);
2767 }
2768 
2769 /*
2770  * Perform any init/resume time hardware setup
2771  *
2772  * @dd Pointer to the driver data structure.
2773  *
2774  * return value
2775  *	None
2776  */
2777 static inline void hba_setup(struct driver_data *dd)
2778 {
2779 	u32 hwdata;
2780 	hwdata = readl(dd->mmio + HOST_HSORG);
2781 
2782 	/* interrupt bug workaround: use only 1 IS bit.*/
2783 	writel(hwdata |
2784 		HSORG_DISABLE_SLOTGRP_INTR |
2785 		HSORG_DISABLE_SLOTGRP_PXIS,
2786 		dd->mmio + HOST_HSORG);
2787 }
2788 
2789 static int mtip_device_unaligned_constrained(struct driver_data *dd)
2790 {
2791 	return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0);
2792 }
2793 
2794 /*
2795  * Detect the details of the product, and store anything needed
2796  * into the driver data structure.  This includes product type and
2797  * version and number of slot groups.
2798  *
2799  * @dd Pointer to the driver data structure.
2800  *
2801  * return value
2802  *	None
2803  */
2804 static void mtip_detect_product(struct driver_data *dd)
2805 {
2806 	u32 hwdata;
2807 	unsigned int rev, slotgroups;
2808 
2809 	/*
2810 	 * HBA base + 0xFC [15:0] - vendor-specific hardware interface
2811 	 * info register:
2812 	 * [15:8] hardware/software interface rev#
2813 	 * [   3] asic-style interface
2814 	 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style).
2815 	 */
2816 	hwdata = readl(dd->mmio + HOST_HSORG);
2817 
2818 	dd->product_type = MTIP_PRODUCT_UNKNOWN;
2819 	dd->slot_groups = 1;
2820 
2821 	if (hwdata & 0x8) {
2822 		dd->product_type = MTIP_PRODUCT_ASICFPGA;
2823 		rev = (hwdata & HSORG_HWREV) >> 8;
2824 		slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1;
2825 		dev_info(&dd->pdev->dev,
2826 			"ASIC-FPGA design, HS rev 0x%x, "
2827 			"%i slot groups [%i slots]\n",
2828 			 rev,
2829 			 slotgroups,
2830 			 slotgroups * 32);
2831 
2832 		if (slotgroups > MTIP_MAX_SLOT_GROUPS) {
2833 			dev_warn(&dd->pdev->dev,
2834 				"Warning: driver only supports "
2835 				"%i slot groups.\n", MTIP_MAX_SLOT_GROUPS);
2836 			slotgroups = MTIP_MAX_SLOT_GROUPS;
2837 		}
2838 		dd->slot_groups = slotgroups;
2839 		return;
2840 	}
2841 
2842 	dev_warn(&dd->pdev->dev, "Unrecognized product id\n");
2843 }
2844 
2845 /*
2846  * Blocking wait for FTL rebuild to complete
2847  *
2848  * @dd Pointer to the DRIVER_DATA structure.
2849  *
2850  * return value
2851  *	0	FTL rebuild completed successfully
2852  *	-EFAULT FTL rebuild error/timeout/interruption
2853  */
2854 static int mtip_ftl_rebuild_poll(struct driver_data *dd)
2855 {
2856 	unsigned long timeout, cnt = 0, start;
2857 
2858 	dev_warn(&dd->pdev->dev,
2859 		"FTL rebuild in progress. Polling for completion.\n");
2860 
2861 	start = jiffies;
2862 	timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS);
2863 
2864 	do {
2865 		if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2866 				&dd->dd_flag)))
2867 			return -EFAULT;
2868 		if (mtip_check_surprise_removal(dd->pdev))
2869 			return -EFAULT;
2870 
2871 		if (mtip_get_identify(dd->port, NULL) < 0)
2872 			return -EFAULT;
2873 
2874 		if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2875 			MTIP_FTL_REBUILD_MAGIC) {
2876 			ssleep(1);
2877 			/* Print message every 3 minutes */
2878 			if (cnt++ >= 180) {
2879 				dev_warn(&dd->pdev->dev,
2880 				"FTL rebuild in progress (%d secs).\n",
2881 				jiffies_to_msecs(jiffies - start) / 1000);
2882 				cnt = 0;
2883 			}
2884 		} else {
2885 			dev_warn(&dd->pdev->dev,
2886 				"FTL rebuild complete (%d secs).\n",
2887 			jiffies_to_msecs(jiffies - start) / 1000);
2888 			mtip_block_initialize(dd);
2889 			return 0;
2890 		}
2891 	} while (time_before(jiffies, timeout));
2892 
2893 	/* Check for timeout */
2894 	dev_err(&dd->pdev->dev,
2895 		"Timed out waiting for FTL rebuild to complete (%d secs).\n",
2896 		jiffies_to_msecs(jiffies - start) / 1000);
2897 	return -EFAULT;
2898 }
2899 
2900 /*
2901  * service thread to issue queued commands
2902  *
2903  * @data Pointer to the driver data structure.
2904  *
2905  * return value
2906  *	0
2907  */
2908 
2909 static int mtip_service_thread(void *data)
2910 {
2911 	struct driver_data *dd = (struct driver_data *)data;
2912 	unsigned long slot, slot_start, slot_wrap;
2913 	unsigned int num_cmd_slots = dd->slot_groups * 32;
2914 	struct mtip_port *port = dd->port;
2915 
2916 	while (1) {
2917 		if (kthread_should_stop() ||
2918 			test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2919 			goto st_out;
2920 		clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2921 
2922 		/*
2923 		 * the condition is to check neither an internal command is
2924 		 * is in progress nor error handling is active
2925 		 */
2926 		wait_event_interruptible(port->svc_wait, (port->flags) &&
2927 			!(port->flags & MTIP_PF_PAUSE_IO));
2928 
2929 		set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2930 
2931 		if (kthread_should_stop() ||
2932 			test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2933 			goto st_out;
2934 
2935 		if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2936 				&dd->dd_flag)))
2937 			goto st_out;
2938 
2939 restart_eh:
2940 		/* Demux bits: start with error handling */
2941 		if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) {
2942 			mtip_handle_tfe(dd);
2943 			clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
2944 		}
2945 
2946 		if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags))
2947 			goto restart_eh;
2948 
2949 		if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
2950 			slot = 1;
2951 			/* used to restrict the loop to one iteration */
2952 			slot_start = num_cmd_slots;
2953 			slot_wrap = 0;
2954 			while (1) {
2955 				slot = find_next_bit(port->cmds_to_issue,
2956 						num_cmd_slots, slot);
2957 				if (slot_wrap == 1) {
2958 					if ((slot_start >= slot) ||
2959 						(slot >= num_cmd_slots))
2960 						break;
2961 				}
2962 				if (unlikely(slot_start == num_cmd_slots))
2963 					slot_start = slot;
2964 
2965 				if (unlikely(slot == num_cmd_slots)) {
2966 					slot = 1;
2967 					slot_wrap = 1;
2968 					continue;
2969 				}
2970 
2971 				/* Issue the command to the hardware */
2972 				mtip_issue_ncq_command(port, slot);
2973 
2974 				clear_bit(slot, port->cmds_to_issue);
2975 			}
2976 
2977 			clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2978 		}
2979 
2980 		if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) {
2981 			if (mtip_ftl_rebuild_poll(dd) < 0)
2982 				set_bit(MTIP_DDF_REBUILD_FAILED_BIT,
2983 							&dd->dd_flag);
2984 			clear_bit(MTIP_PF_REBUILD_BIT, &port->flags);
2985 		}
2986 	}
2987 
2988 st_out:
2989 	return 0;
2990 }
2991 
2992 /*
2993  * DMA region teardown
2994  *
2995  * @dd Pointer to driver_data structure
2996  *
2997  * return value
2998  *      None
2999  */
3000 static void mtip_dma_free(struct driver_data *dd)
3001 {
3002 	struct mtip_port *port = dd->port;
3003 
3004 	if (port->block1)
3005 		dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
3006 					port->block1, port->block1_dma);
3007 
3008 	if (port->command_list) {
3009 		dmam_free_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
3010 				port->command_list, port->command_list_dma);
3011 	}
3012 }
3013 
3014 /*
3015  * DMA region setup
3016  *
3017  * @dd Pointer to driver_data structure
3018  *
3019  * return value
3020  *      -ENOMEM Not enough free DMA region space to initialize driver
3021  */
3022 static int mtip_dma_alloc(struct driver_data *dd)
3023 {
3024 	struct mtip_port *port = dd->port;
3025 
3026 	/* Allocate dma memory for RX Fis, Identify, and Sector Bufffer */
3027 	port->block1 =
3028 		dmam_alloc_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
3029 					&port->block1_dma, GFP_KERNEL);
3030 	if (!port->block1)
3031 		return -ENOMEM;
3032 	memset(port->block1, 0, BLOCK_DMA_ALLOC_SZ);
3033 
3034 	/* Allocate dma memory for command list */
3035 	port->command_list =
3036 		dmam_alloc_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
3037 					&port->command_list_dma, GFP_KERNEL);
3038 	if (!port->command_list) {
3039 		dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
3040 					port->block1, port->block1_dma);
3041 		port->block1 = NULL;
3042 		port->block1_dma = 0;
3043 		return -ENOMEM;
3044 	}
3045 	memset(port->command_list, 0, AHCI_CMD_TBL_SZ);
3046 
3047 	/* Setup all pointers into first DMA region */
3048 	port->rxfis         = port->block1 + AHCI_RX_FIS_OFFSET;
3049 	port->rxfis_dma     = port->block1_dma + AHCI_RX_FIS_OFFSET;
3050 	port->identify      = port->block1 + AHCI_IDFY_OFFSET;
3051 	port->identify_dma  = port->block1_dma + AHCI_IDFY_OFFSET;
3052 	port->log_buf       = port->block1 + AHCI_SECTBUF_OFFSET;
3053 	port->log_buf_dma   = port->block1_dma + AHCI_SECTBUF_OFFSET;
3054 	port->smart_buf     = port->block1 + AHCI_SMARTBUF_OFFSET;
3055 	port->smart_buf_dma = port->block1_dma + AHCI_SMARTBUF_OFFSET;
3056 
3057 	return 0;
3058 }
3059 
3060 static int mtip_hw_get_identify(struct driver_data *dd)
3061 {
3062 	struct smart_attr attr242;
3063 	unsigned char *buf;
3064 	int rv;
3065 
3066 	if (mtip_get_identify(dd->port, NULL) < 0)
3067 		return -EFAULT;
3068 
3069 	if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
3070 		MTIP_FTL_REBUILD_MAGIC) {
3071 		set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags);
3072 		return MTIP_FTL_REBUILD_MAGIC;
3073 	}
3074 	mtip_dump_identify(dd->port);
3075 
3076 	/* check write protect, over temp and rebuild statuses */
3077 	rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
3078 				dd->port->log_buf,
3079 				dd->port->log_buf_dma, 1);
3080 	if (rv) {
3081 		dev_warn(&dd->pdev->dev,
3082 			"Error in READ LOG EXT (10h) command\n");
3083 		/* non-critical error, don't fail the load */
3084 	} else {
3085 		buf = (unsigned char *)dd->port->log_buf;
3086 		if (buf[259] & 0x1) {
3087 			dev_info(&dd->pdev->dev,
3088 				"Write protect bit is set.\n");
3089 			set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
3090 		}
3091 		if (buf[288] == 0xF7) {
3092 			dev_info(&dd->pdev->dev,
3093 				"Exceeded Tmax, drive in thermal shutdown.\n");
3094 			set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
3095 		}
3096 		if (buf[288] == 0xBF) {
3097 			dev_info(&dd->pdev->dev,
3098 				"Drive indicates rebuild has failed.\n");
3099 			/* TODO */
3100 		}
3101 	}
3102 
3103 	/* get write protect progess */
3104 	memset(&attr242, 0, sizeof(struct smart_attr));
3105 	if (mtip_get_smart_attr(dd->port, 242, &attr242))
3106 		dev_warn(&dd->pdev->dev,
3107 				"Unable to check write protect progress\n");
3108 	else
3109 		dev_info(&dd->pdev->dev,
3110 				"Write protect progress: %u%% (%u blocks)\n",
3111 				attr242.cur, le32_to_cpu(attr242.data));
3112 
3113 	return rv;
3114 }
3115 
3116 /*
3117  * Called once for each card.
3118  *
3119  * @dd Pointer to the driver data structure.
3120  *
3121  * return value
3122  *	0 on success, else an error code.
3123  */
3124 static int mtip_hw_init(struct driver_data *dd)
3125 {
3126 	int i;
3127 	int rv;
3128 	unsigned int num_command_slots;
3129 	unsigned long timeout, timetaken;
3130 
3131 	dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR];
3132 
3133 	mtip_detect_product(dd);
3134 	if (dd->product_type == MTIP_PRODUCT_UNKNOWN) {
3135 		rv = -EIO;
3136 		goto out1;
3137 	}
3138 	num_command_slots = dd->slot_groups * 32;
3139 
3140 	hba_setup(dd);
3141 
3142 	dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL,
3143 				dd->numa_node);
3144 	if (!dd->port) {
3145 		dev_err(&dd->pdev->dev,
3146 			"Memory allocation: port structure\n");
3147 		return -ENOMEM;
3148 	}
3149 
3150 	/* Continue workqueue setup */
3151 	for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3152 		dd->work[i].port = dd->port;
3153 
3154 	/* Enable unaligned IO constraints for some devices */
3155 	if (mtip_device_unaligned_constrained(dd))
3156 		dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS;
3157 	else
3158 		dd->unal_qdepth = 0;
3159 
3160 	sema_init(&dd->port->cmd_slot_unal, dd->unal_qdepth);
3161 
3162 	/* Spinlock to prevent concurrent issue */
3163 	for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3164 		spin_lock_init(&dd->port->cmd_issue_lock[i]);
3165 
3166 	/* Set the port mmio base address. */
3167 	dd->port->mmio	= dd->mmio + PORT_OFFSET;
3168 	dd->port->dd	= dd;
3169 
3170 	/* DMA allocations */
3171 	rv = mtip_dma_alloc(dd);
3172 	if (rv < 0)
3173 		goto out1;
3174 
3175 	/* Setup the pointers to the extended s_active and CI registers. */
3176 	for (i = 0; i < dd->slot_groups; i++) {
3177 		dd->port->s_active[i] =
3178 			dd->port->mmio + i*0x80 + PORT_SCR_ACT;
3179 		dd->port->cmd_issue[i] =
3180 			dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE;
3181 		dd->port->completed[i] =
3182 			dd->port->mmio + i*0x80 + PORT_SDBV;
3183 	}
3184 
3185 	timetaken = jiffies;
3186 	timeout = jiffies + msecs_to_jiffies(30000);
3187 	while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
3188 		 time_before(jiffies, timeout)) {
3189 		mdelay(100);
3190 	}
3191 	if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
3192 		timetaken = jiffies - timetaken;
3193 		dev_warn(&dd->pdev->dev,
3194 			"Surprise removal detected at %u ms\n",
3195 			jiffies_to_msecs(timetaken));
3196 		rv = -ENODEV;
3197 		goto out2 ;
3198 	}
3199 	if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
3200 		timetaken = jiffies - timetaken;
3201 		dev_warn(&dd->pdev->dev,
3202 			"Removal detected at %u ms\n",
3203 			jiffies_to_msecs(timetaken));
3204 		rv = -EFAULT;
3205 		goto out2;
3206 	}
3207 
3208 	/* Conditionally reset the HBA. */
3209 	if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) {
3210 		if (mtip_hba_reset(dd) < 0) {
3211 			dev_err(&dd->pdev->dev,
3212 				"Card did not reset within timeout\n");
3213 			rv = -EIO;
3214 			goto out2;
3215 		}
3216 	} else {
3217 		/* Clear any pending interrupts on the HBA */
3218 		writel(readl(dd->mmio + HOST_IRQ_STAT),
3219 			dd->mmio + HOST_IRQ_STAT);
3220 	}
3221 
3222 	mtip_init_port(dd->port);
3223 	mtip_start_port(dd->port);
3224 
3225 	/* Setup the ISR and enable interrupts. */
3226 	rv = devm_request_irq(&dd->pdev->dev,
3227 				dd->pdev->irq,
3228 				mtip_irq_handler,
3229 				IRQF_SHARED,
3230 				dev_driver_string(&dd->pdev->dev),
3231 				dd);
3232 
3233 	if (rv) {
3234 		dev_err(&dd->pdev->dev,
3235 			"Unable to allocate IRQ %d\n", dd->pdev->irq);
3236 		goto out2;
3237 	}
3238 	irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding));
3239 
3240 	/* Enable interrupts on the HBA. */
3241 	writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3242 					dd->mmio + HOST_CTL);
3243 
3244 	init_waitqueue_head(&dd->port->svc_wait);
3245 
3246 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
3247 		rv = -EFAULT;
3248 		goto out3;
3249 	}
3250 
3251 	return rv;
3252 
3253 out3:
3254 	/* Disable interrupts on the HBA. */
3255 	writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3256 			dd->mmio + HOST_CTL);
3257 
3258 	/* Release the IRQ. */
3259 	irq_set_affinity_hint(dd->pdev->irq, NULL);
3260 	devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3261 
3262 out2:
3263 	mtip_deinit_port(dd->port);
3264 	mtip_dma_free(dd);
3265 
3266 out1:
3267 	/* Free the memory allocated for the for structure. */
3268 	kfree(dd->port);
3269 
3270 	return rv;
3271 }
3272 
3273 static void mtip_standby_drive(struct driver_data *dd)
3274 {
3275 	if (dd->sr)
3276 		return;
3277 
3278 	/*
3279 	 * Send standby immediate (E0h) to the drive so that it
3280 	 * saves its state.
3281 	 */
3282 	if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags) &&
3283 	    !test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag))
3284 		if (mtip_standby_immediate(dd->port))
3285 			dev_warn(&dd->pdev->dev,
3286 				"STANDBY IMMEDIATE failed\n");
3287 }
3288 
3289 /*
3290  * Called to deinitialize an interface.
3291  *
3292  * @dd Pointer to the driver data structure.
3293  *
3294  * return value
3295  *	0
3296  */
3297 static int mtip_hw_exit(struct driver_data *dd)
3298 {
3299 	/*
3300 	 * Send standby immediate (E0h) to the drive so that it
3301 	 * saves its state.
3302 	 */
3303 	if (!dd->sr) {
3304 		/* de-initialize the port. */
3305 		mtip_deinit_port(dd->port);
3306 
3307 		/* Disable interrupts on the HBA. */
3308 		writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3309 				dd->mmio + HOST_CTL);
3310 	}
3311 
3312 	/* Release the IRQ. */
3313 	irq_set_affinity_hint(dd->pdev->irq, NULL);
3314 	devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3315 	msleep(1000);
3316 
3317 	/* Free dma regions */
3318 	mtip_dma_free(dd);
3319 
3320 	/* Free the memory allocated for the for structure. */
3321 	kfree(dd->port);
3322 	dd->port = NULL;
3323 
3324 	return 0;
3325 }
3326 
3327 /*
3328  * Issue a Standby Immediate command to the device.
3329  *
3330  * This function is called by the Block Layer just before the
3331  * system powers off during a shutdown.
3332  *
3333  * @dd Pointer to the driver data structure.
3334  *
3335  * return value
3336  *	0
3337  */
3338 static int mtip_hw_shutdown(struct driver_data *dd)
3339 {
3340 	/*
3341 	 * Send standby immediate (E0h) to the drive so that it
3342 	 * saves its state.
3343 	 */
3344 	if (!dd->sr && dd->port)
3345 		mtip_standby_immediate(dd->port);
3346 
3347 	return 0;
3348 }
3349 
3350 /*
3351  * Suspend function
3352  *
3353  * This function is called by the Block Layer just before the
3354  * system hibernates.
3355  *
3356  * @dd Pointer to the driver data structure.
3357  *
3358  * return value
3359  *	0	Suspend was successful
3360  *	-EFAULT Suspend was not successful
3361  */
3362 static int mtip_hw_suspend(struct driver_data *dd)
3363 {
3364 	/*
3365 	 * Send standby immediate (E0h) to the drive
3366 	 * so that it saves its state.
3367 	 */
3368 	if (mtip_standby_immediate(dd->port) != 0) {
3369 		dev_err(&dd->pdev->dev,
3370 			"Failed standby-immediate command\n");
3371 		return -EFAULT;
3372 	}
3373 
3374 	/* Disable interrupts on the HBA.*/
3375 	writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3376 			dd->mmio + HOST_CTL);
3377 	mtip_deinit_port(dd->port);
3378 
3379 	return 0;
3380 }
3381 
3382 /*
3383  * Resume function
3384  *
3385  * This function is called by the Block Layer as the
3386  * system resumes.
3387  *
3388  * @dd Pointer to the driver data structure.
3389  *
3390  * return value
3391  *	0	Resume was successful
3392  *      -EFAULT Resume was not successful
3393  */
3394 static int mtip_hw_resume(struct driver_data *dd)
3395 {
3396 	/* Perform any needed hardware setup steps */
3397 	hba_setup(dd);
3398 
3399 	/* Reset the HBA */
3400 	if (mtip_hba_reset(dd) != 0) {
3401 		dev_err(&dd->pdev->dev,
3402 			"Unable to reset the HBA\n");
3403 		return -EFAULT;
3404 	}
3405 
3406 	/*
3407 	 * Enable the port, DMA engine, and FIS reception specific
3408 	 * h/w in controller.
3409 	 */
3410 	mtip_init_port(dd->port);
3411 	mtip_start_port(dd->port);
3412 
3413 	/* Enable interrupts on the HBA.*/
3414 	writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3415 			dd->mmio + HOST_CTL);
3416 
3417 	return 0;
3418 }
3419 
3420 /*
3421  * Helper function for reusing disk name
3422  * upon hot insertion.
3423  */
3424 static int rssd_disk_name_format(char *prefix,
3425 				 int index,
3426 				 char *buf,
3427 				 int buflen)
3428 {
3429 	const int base = 'z' - 'a' + 1;
3430 	char *begin = buf + strlen(prefix);
3431 	char *end = buf + buflen;
3432 	char *p;
3433 	int unit;
3434 
3435 	p = end - 1;
3436 	*p = '\0';
3437 	unit = base;
3438 	do {
3439 		if (p == begin)
3440 			return -EINVAL;
3441 		*--p = 'a' + (index % unit);
3442 		index = (index / unit) - 1;
3443 	} while (index >= 0);
3444 
3445 	memmove(begin, p, end - p);
3446 	memcpy(buf, prefix, strlen(prefix));
3447 
3448 	return 0;
3449 }
3450 
3451 /*
3452  * Block layer IOCTL handler.
3453  *
3454  * @dev Pointer to the block_device structure.
3455  * @mode ignored
3456  * @cmd IOCTL command passed from the user application.
3457  * @arg Argument passed from the user application.
3458  *
3459  * return value
3460  *	0        IOCTL completed successfully.
3461  *	-ENOTTY  IOCTL not supported or invalid driver data
3462  *                 structure pointer.
3463  */
3464 static int mtip_block_ioctl(struct block_device *dev,
3465 			    fmode_t mode,
3466 			    unsigned cmd,
3467 			    unsigned long arg)
3468 {
3469 	struct driver_data *dd = dev->bd_disk->private_data;
3470 
3471 	if (!capable(CAP_SYS_ADMIN))
3472 		return -EACCES;
3473 
3474 	if (!dd)
3475 		return -ENOTTY;
3476 
3477 	if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3478 		return -ENOTTY;
3479 
3480 	switch (cmd) {
3481 	case BLKFLSBUF:
3482 		return -ENOTTY;
3483 	default:
3484 		return mtip_hw_ioctl(dd, cmd, arg);
3485 	}
3486 }
3487 
3488 #ifdef CONFIG_COMPAT
3489 /*
3490  * Block layer compat IOCTL handler.
3491  *
3492  * @dev Pointer to the block_device structure.
3493  * @mode ignored
3494  * @cmd IOCTL command passed from the user application.
3495  * @arg Argument passed from the user application.
3496  *
3497  * return value
3498  *	0        IOCTL completed successfully.
3499  *	-ENOTTY  IOCTL not supported or invalid driver data
3500  *                 structure pointer.
3501  */
3502 static int mtip_block_compat_ioctl(struct block_device *dev,
3503 			    fmode_t mode,
3504 			    unsigned cmd,
3505 			    unsigned long arg)
3506 {
3507 	struct driver_data *dd = dev->bd_disk->private_data;
3508 
3509 	if (!capable(CAP_SYS_ADMIN))
3510 		return -EACCES;
3511 
3512 	if (!dd)
3513 		return -ENOTTY;
3514 
3515 	if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3516 		return -ENOTTY;
3517 
3518 	switch (cmd) {
3519 	case BLKFLSBUF:
3520 		return -ENOTTY;
3521 	case HDIO_DRIVE_TASKFILE: {
3522 		struct mtip_compat_ide_task_request_s __user *compat_req_task;
3523 		ide_task_request_t req_task;
3524 		int compat_tasksize, outtotal, ret;
3525 
3526 		compat_tasksize =
3527 			sizeof(struct mtip_compat_ide_task_request_s);
3528 
3529 		compat_req_task =
3530 			(struct mtip_compat_ide_task_request_s __user *) arg;
3531 
3532 		if (copy_from_user(&req_task, (void __user *) arg,
3533 			compat_tasksize - (2 * sizeof(compat_long_t))))
3534 			return -EFAULT;
3535 
3536 		if (get_user(req_task.out_size, &compat_req_task->out_size))
3537 			return -EFAULT;
3538 
3539 		if (get_user(req_task.in_size, &compat_req_task->in_size))
3540 			return -EFAULT;
3541 
3542 		outtotal = sizeof(struct mtip_compat_ide_task_request_s);
3543 
3544 		ret = exec_drive_taskfile(dd, (void __user *) arg,
3545 						&req_task, outtotal);
3546 
3547 		if (copy_to_user((void __user *) arg, &req_task,
3548 				compat_tasksize -
3549 				(2 * sizeof(compat_long_t))))
3550 			return -EFAULT;
3551 
3552 		if (put_user(req_task.out_size, &compat_req_task->out_size))
3553 			return -EFAULT;
3554 
3555 		if (put_user(req_task.in_size, &compat_req_task->in_size))
3556 			return -EFAULT;
3557 
3558 		return ret;
3559 	}
3560 	default:
3561 		return mtip_hw_ioctl(dd, cmd, arg);
3562 	}
3563 }
3564 #endif
3565 
3566 /*
3567  * Obtain the geometry of the device.
3568  *
3569  * You may think that this function is obsolete, but some applications,
3570  * fdisk for example still used CHS values. This function describes the
3571  * device as having 224 heads and 56 sectors per cylinder. These values are
3572  * chosen so that each cylinder is aligned on a 4KB boundary. Since a
3573  * partition is described in terms of a start and end cylinder this means
3574  * that each partition is also 4KB aligned. Non-aligned partitions adversely
3575  * affects performance.
3576  *
3577  * @dev Pointer to the block_device strucutre.
3578  * @geo Pointer to a hd_geometry structure.
3579  *
3580  * return value
3581  *	0       Operation completed successfully.
3582  *	-ENOTTY An error occurred while reading the drive capacity.
3583  */
3584 static int mtip_block_getgeo(struct block_device *dev,
3585 				struct hd_geometry *geo)
3586 {
3587 	struct driver_data *dd = dev->bd_disk->private_data;
3588 	sector_t capacity;
3589 
3590 	if (!dd)
3591 		return -ENOTTY;
3592 
3593 	if (!(mtip_hw_get_capacity(dd, &capacity))) {
3594 		dev_warn(&dd->pdev->dev,
3595 			"Could not get drive capacity.\n");
3596 		return -ENOTTY;
3597 	}
3598 
3599 	geo->heads = 224;
3600 	geo->sectors = 56;
3601 	sector_div(capacity, (geo->heads * geo->sectors));
3602 	geo->cylinders = capacity;
3603 	return 0;
3604 }
3605 
3606 /*
3607  * Block device operation function.
3608  *
3609  * This structure contains pointers to the functions required by the block
3610  * layer.
3611  */
3612 static const struct block_device_operations mtip_block_ops = {
3613 	.ioctl		= mtip_block_ioctl,
3614 #ifdef CONFIG_COMPAT
3615 	.compat_ioctl	= mtip_block_compat_ioctl,
3616 #endif
3617 	.getgeo		= mtip_block_getgeo,
3618 	.owner		= THIS_MODULE
3619 };
3620 
3621 static inline bool is_se_active(struct driver_data *dd)
3622 {
3623 	if (unlikely(test_bit(MTIP_PF_SE_ACTIVE_BIT, &dd->port->flags))) {
3624 		if (dd->port->ic_pause_timer) {
3625 			unsigned long to = dd->port->ic_pause_timer +
3626 							msecs_to_jiffies(1000);
3627 			if (time_after(jiffies, to)) {
3628 				clear_bit(MTIP_PF_SE_ACTIVE_BIT,
3629 							&dd->port->flags);
3630 				clear_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag);
3631 				dd->port->ic_pause_timer = 0;
3632 				wake_up_interruptible(&dd->port->svc_wait);
3633 				return false;
3634 			}
3635 		}
3636 		return true;
3637 	}
3638 	return false;
3639 }
3640 
3641 /*
3642  * Block layer make request function.
3643  *
3644  * This function is called by the kernel to process a BIO for
3645  * the P320 device.
3646  *
3647  * @queue Pointer to the request queue. Unused other than to obtain
3648  *              the driver data structure.
3649  * @rq    Pointer to the request.
3650  *
3651  */
3652 static int mtip_submit_request(struct blk_mq_hw_ctx *hctx, struct request *rq)
3653 {
3654 	struct driver_data *dd = hctx->queue->queuedata;
3655 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3656 	unsigned int nents;
3657 
3658 	if (is_se_active(dd))
3659 		return -ENODATA;
3660 
3661 	if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) {
3662 		if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
3663 							&dd->dd_flag))) {
3664 			return -ENXIO;
3665 		}
3666 		if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) {
3667 			return -ENODATA;
3668 		}
3669 		if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT,
3670 							&dd->dd_flag) &&
3671 				rq_data_dir(rq))) {
3672 			return -ENODATA;
3673 		}
3674 		if (unlikely(test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag)))
3675 			return -ENODATA;
3676 		if (test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag))
3677 			return -ENXIO;
3678 	}
3679 
3680 	if (rq->cmd_flags & REQ_DISCARD) {
3681 		int err;
3682 
3683 		err = mtip_send_trim(dd, blk_rq_pos(rq), blk_rq_sectors(rq));
3684 		blk_mq_end_request(rq, err);
3685 		return 0;
3686 	}
3687 
3688 	/* Create the scatter list for this request. */
3689 	nents = blk_rq_map_sg(hctx->queue, rq, cmd->sg);
3690 
3691 	/* Issue the read/write. */
3692 	mtip_hw_submit_io(dd, rq, cmd, nents, hctx);
3693 	return 0;
3694 }
3695 
3696 static bool mtip_check_unal_depth(struct blk_mq_hw_ctx *hctx,
3697 				  struct request *rq)
3698 {
3699 	struct driver_data *dd = hctx->queue->queuedata;
3700 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3701 
3702 	if (rq_data_dir(rq) == READ || !dd->unal_qdepth)
3703 		return false;
3704 
3705 	/*
3706 	 * If unaligned depth must be limited on this controller, mark it
3707 	 * as unaligned if the IO isn't on a 4k boundary (start of length).
3708 	 */
3709 	if (blk_rq_sectors(rq) <= 64) {
3710 		if ((blk_rq_pos(rq) & 7) || (blk_rq_sectors(rq) & 7))
3711 			cmd->unaligned = 1;
3712 	}
3713 
3714 	if (cmd->unaligned && down_trylock(&dd->port->cmd_slot_unal))
3715 		return true;
3716 
3717 	return false;
3718 }
3719 
3720 static int mtip_queue_rq(struct blk_mq_hw_ctx *hctx,
3721 			 const struct blk_mq_queue_data *bd)
3722 {
3723 	struct request *rq = bd->rq;
3724 	int ret;
3725 
3726 	if (unlikely(mtip_check_unal_depth(hctx, rq)))
3727 		return BLK_MQ_RQ_QUEUE_BUSY;
3728 
3729 	blk_mq_start_request(rq);
3730 
3731 	ret = mtip_submit_request(hctx, rq);
3732 	if (likely(!ret))
3733 		return BLK_MQ_RQ_QUEUE_OK;
3734 
3735 	rq->errors = ret;
3736 	return BLK_MQ_RQ_QUEUE_ERROR;
3737 }
3738 
3739 static void mtip_free_cmd(void *data, struct request *rq,
3740 			  unsigned int hctx_idx, unsigned int request_idx)
3741 {
3742 	struct driver_data *dd = data;
3743 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3744 
3745 	if (!cmd->command)
3746 		return;
3747 
3748 	dmam_free_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
3749 				cmd->command, cmd->command_dma);
3750 }
3751 
3752 static int mtip_init_cmd(void *data, struct request *rq, unsigned int hctx_idx,
3753 			 unsigned int request_idx, unsigned int numa_node)
3754 {
3755 	struct driver_data *dd = data;
3756 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3757 	u32 host_cap_64 = readl(dd->mmio + HOST_CAP) & HOST_CAP_64;
3758 
3759 	/*
3760 	 * For flush requests, request_idx starts at the end of the
3761 	 * tag space.  Since we don't support FLUSH/FUA, simply return
3762 	 * 0 as there's nothing to be done.
3763 	 */
3764 	if (request_idx >= MTIP_MAX_COMMAND_SLOTS)
3765 		return 0;
3766 
3767 	cmd->command = dmam_alloc_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
3768 			&cmd->command_dma, GFP_KERNEL);
3769 	if (!cmd->command)
3770 		return -ENOMEM;
3771 
3772 	memset(cmd->command, 0, CMD_DMA_ALLOC_SZ);
3773 
3774 	/* Point the command headers at the command tables. */
3775 	cmd->command_header = dd->port->command_list +
3776 				(sizeof(struct mtip_cmd_hdr) * request_idx);
3777 	cmd->command_header_dma = dd->port->command_list_dma +
3778 				(sizeof(struct mtip_cmd_hdr) * request_idx);
3779 
3780 	if (host_cap_64)
3781 		cmd->command_header->ctbau = __force_bit2int cpu_to_le32((cmd->command_dma >> 16) >> 16);
3782 
3783 	cmd->command_header->ctba = __force_bit2int cpu_to_le32(cmd->command_dma & 0xFFFFFFFF);
3784 
3785 	sg_init_table(cmd->sg, MTIP_MAX_SG);
3786 	return 0;
3787 }
3788 
3789 static struct blk_mq_ops mtip_mq_ops = {
3790 	.queue_rq	= mtip_queue_rq,
3791 	.map_queue	= blk_mq_map_queue,
3792 	.init_request	= mtip_init_cmd,
3793 	.exit_request	= mtip_free_cmd,
3794 };
3795 
3796 /*
3797  * Block layer initialization function.
3798  *
3799  * This function is called once by the PCI layer for each P320
3800  * device that is connected to the system.
3801  *
3802  * @dd Pointer to the driver data structure.
3803  *
3804  * return value
3805  *	0 on success else an error code.
3806  */
3807 static int mtip_block_initialize(struct driver_data *dd)
3808 {
3809 	int rv = 0, wait_for_rebuild = 0;
3810 	sector_t capacity;
3811 	unsigned int index = 0;
3812 	struct kobject *kobj;
3813 
3814 	if (dd->disk)
3815 		goto skip_create_disk; /* hw init done, before rebuild */
3816 
3817 	if (mtip_hw_init(dd)) {
3818 		rv = -EINVAL;
3819 		goto protocol_init_error;
3820 	}
3821 
3822 	dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node);
3823 	if (dd->disk  == NULL) {
3824 		dev_err(&dd->pdev->dev,
3825 			"Unable to allocate gendisk structure\n");
3826 		rv = -EINVAL;
3827 		goto alloc_disk_error;
3828 	}
3829 
3830 	/* Generate the disk name, implemented same as in sd.c */
3831 	do {
3832 		if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL))
3833 			goto ida_get_error;
3834 
3835 		spin_lock(&rssd_index_lock);
3836 		rv = ida_get_new(&rssd_index_ida, &index);
3837 		spin_unlock(&rssd_index_lock);
3838 	} while (rv == -EAGAIN);
3839 
3840 	if (rv)
3841 		goto ida_get_error;
3842 
3843 	rv = rssd_disk_name_format("rssd",
3844 				index,
3845 				dd->disk->disk_name,
3846 				DISK_NAME_LEN);
3847 	if (rv)
3848 		goto disk_index_error;
3849 
3850 	dd->disk->driverfs_dev	= &dd->pdev->dev;
3851 	dd->disk->major		= dd->major;
3852 	dd->disk->first_minor	= index * MTIP_MAX_MINORS;
3853 	dd->disk->minors 	= MTIP_MAX_MINORS;
3854 	dd->disk->fops		= &mtip_block_ops;
3855 	dd->disk->private_data	= dd;
3856 	dd->index		= index;
3857 
3858 	mtip_hw_debugfs_init(dd);
3859 
3860 skip_create_disk:
3861 	memset(&dd->tags, 0, sizeof(dd->tags));
3862 	dd->tags.ops = &mtip_mq_ops;
3863 	dd->tags.nr_hw_queues = 1;
3864 	dd->tags.queue_depth = MTIP_MAX_COMMAND_SLOTS;
3865 	dd->tags.reserved_tags = 1;
3866 	dd->tags.cmd_size = sizeof(struct mtip_cmd);
3867 	dd->tags.numa_node = dd->numa_node;
3868 	dd->tags.flags = BLK_MQ_F_SHOULD_MERGE;
3869 	dd->tags.driver_data = dd;
3870 
3871 	rv = blk_mq_alloc_tag_set(&dd->tags);
3872 	if (rv) {
3873 		dev_err(&dd->pdev->dev,
3874 			"Unable to allocate request queue\n");
3875 		goto block_queue_alloc_init_error;
3876 	}
3877 
3878 	/* Allocate the request queue. */
3879 	dd->queue = blk_mq_init_queue(&dd->tags);
3880 	if (IS_ERR(dd->queue)) {
3881 		dev_err(&dd->pdev->dev,
3882 			"Unable to allocate request queue\n");
3883 		rv = -ENOMEM;
3884 		goto block_queue_alloc_init_error;
3885 	}
3886 
3887 	dd->disk->queue		= dd->queue;
3888 	dd->queue->queuedata	= dd;
3889 
3890 	/* Initialize the protocol layer. */
3891 	wait_for_rebuild = mtip_hw_get_identify(dd);
3892 	if (wait_for_rebuild < 0) {
3893 		dev_err(&dd->pdev->dev,
3894 			"Protocol layer initialization failed\n");
3895 		rv = -EINVAL;
3896 		goto init_hw_cmds_error;
3897 	}
3898 
3899 	/*
3900 	 * if rebuild pending, start the service thread, and delay the block
3901 	 * queue creation and add_disk()
3902 	 */
3903 	if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3904 		goto start_service_thread;
3905 
3906 	/* Set device limits. */
3907 	set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags);
3908 	clear_bit(QUEUE_FLAG_ADD_RANDOM, &dd->queue->queue_flags);
3909 	blk_queue_max_segments(dd->queue, MTIP_MAX_SG);
3910 	blk_queue_physical_block_size(dd->queue, 4096);
3911 	blk_queue_max_hw_sectors(dd->queue, 0xffff);
3912 	blk_queue_max_segment_size(dd->queue, 0x400000);
3913 	blk_queue_io_min(dd->queue, 4096);
3914 	blk_queue_bounce_limit(dd->queue, dd->pdev->dma_mask);
3915 
3916 	/*
3917 	 * write back cache is not supported in the device. FUA depends on
3918 	 * write back cache support, hence setting flush support to zero.
3919 	 */
3920 	blk_queue_flush(dd->queue, 0);
3921 
3922 	/* Signal trim support */
3923 	if (dd->trim_supp == true) {
3924 		set_bit(QUEUE_FLAG_DISCARD, &dd->queue->queue_flags);
3925 		dd->queue->limits.discard_granularity = 4096;
3926 		blk_queue_max_discard_sectors(dd->queue,
3927 			MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES);
3928 		dd->queue->limits.discard_zeroes_data = 0;
3929 	}
3930 
3931 	/* Set the capacity of the device in 512 byte sectors. */
3932 	if (!(mtip_hw_get_capacity(dd, &capacity))) {
3933 		dev_warn(&dd->pdev->dev,
3934 			"Could not read drive capacity\n");
3935 		rv = -EIO;
3936 		goto read_capacity_error;
3937 	}
3938 	set_capacity(dd->disk, capacity);
3939 
3940 	/* Enable the block device and add it to /dev */
3941 	add_disk(dd->disk);
3942 
3943 	dd->bdev = bdget_disk(dd->disk, 0);
3944 	/*
3945 	 * Now that the disk is active, initialize any sysfs attributes
3946 	 * managed by the protocol layer.
3947 	 */
3948 	kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3949 	if (kobj) {
3950 		mtip_hw_sysfs_init(dd, kobj);
3951 		kobject_put(kobj);
3952 	}
3953 
3954 	if (dd->mtip_svc_handler) {
3955 		set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
3956 		return rv; /* service thread created for handling rebuild */
3957 	}
3958 
3959 start_service_thread:
3960 	dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread,
3961 						dd, dd->numa_node,
3962 						"mtip_svc_thd_%02d", index);
3963 
3964 	if (IS_ERR(dd->mtip_svc_handler)) {
3965 		dev_err(&dd->pdev->dev, "service thread failed to start\n");
3966 		dd->mtip_svc_handler = NULL;
3967 		rv = -EFAULT;
3968 		goto kthread_run_error;
3969 	}
3970 	wake_up_process(dd->mtip_svc_handler);
3971 	if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3972 		rv = wait_for_rebuild;
3973 
3974 	return rv;
3975 
3976 kthread_run_error:
3977 	bdput(dd->bdev);
3978 	dd->bdev = NULL;
3979 
3980 	/* Delete our gendisk. This also removes the device from /dev */
3981 	del_gendisk(dd->disk);
3982 
3983 read_capacity_error:
3984 init_hw_cmds_error:
3985 	blk_cleanup_queue(dd->queue);
3986 	blk_mq_free_tag_set(&dd->tags);
3987 block_queue_alloc_init_error:
3988 	mtip_hw_debugfs_exit(dd);
3989 disk_index_error:
3990 	spin_lock(&rssd_index_lock);
3991 	ida_remove(&rssd_index_ida, index);
3992 	spin_unlock(&rssd_index_lock);
3993 
3994 ida_get_error:
3995 	put_disk(dd->disk);
3996 
3997 alloc_disk_error:
3998 	mtip_hw_exit(dd); /* De-initialize the protocol layer. */
3999 
4000 protocol_init_error:
4001 	return rv;
4002 }
4003 
4004 /*
4005  * Block layer deinitialization function.
4006  *
4007  * Called by the PCI layer as each P320 device is removed.
4008  *
4009  * @dd Pointer to the driver data structure.
4010  *
4011  * return value
4012  *	0
4013  */
4014 static int mtip_block_remove(struct driver_data *dd)
4015 {
4016 	struct kobject *kobj;
4017 
4018 	mtip_hw_debugfs_exit(dd);
4019 
4020 	if (dd->mtip_svc_handler) {
4021 		set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags);
4022 		wake_up_interruptible(&dd->port->svc_wait);
4023 		kthread_stop(dd->mtip_svc_handler);
4024 	}
4025 
4026 	/* Clean up the sysfs attributes, if created */
4027 	if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) {
4028 		kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
4029 		if (kobj) {
4030 			mtip_hw_sysfs_exit(dd, kobj);
4031 			kobject_put(kobj);
4032 		}
4033 	}
4034 
4035 	if (!dd->sr)
4036 		mtip_standby_drive(dd);
4037 	else
4038 		dev_info(&dd->pdev->dev, "device %s surprise removal\n",
4039 						dd->disk->disk_name);
4040 
4041 	/*
4042 	 * Delete our gendisk structure. This also removes the device
4043 	 * from /dev
4044 	 */
4045 	if (dd->bdev) {
4046 		bdput(dd->bdev);
4047 		dd->bdev = NULL;
4048 	}
4049 	if (dd->disk) {
4050 		del_gendisk(dd->disk);
4051 		if (dd->disk->queue) {
4052 			blk_cleanup_queue(dd->queue);
4053 			blk_mq_free_tag_set(&dd->tags);
4054 			dd->queue = NULL;
4055 		}
4056 		put_disk(dd->disk);
4057 	}
4058 	dd->disk  = NULL;
4059 
4060 	spin_lock(&rssd_index_lock);
4061 	ida_remove(&rssd_index_ida, dd->index);
4062 	spin_unlock(&rssd_index_lock);
4063 
4064 	/* De-initialize the protocol layer. */
4065 	mtip_hw_exit(dd);
4066 
4067 	return 0;
4068 }
4069 
4070 /*
4071  * Function called by the PCI layer when just before the
4072  * machine shuts down.
4073  *
4074  * If a protocol layer shutdown function is present it will be called
4075  * by this function.
4076  *
4077  * @dd Pointer to the driver data structure.
4078  *
4079  * return value
4080  *	0
4081  */
4082 static int mtip_block_shutdown(struct driver_data *dd)
4083 {
4084 	mtip_hw_shutdown(dd);
4085 
4086 	/* Delete our gendisk structure, and cleanup the blk queue. */
4087 	if (dd->disk) {
4088 		dev_info(&dd->pdev->dev,
4089 			"Shutting down %s ...\n", dd->disk->disk_name);
4090 
4091 		del_gendisk(dd->disk);
4092 		if (dd->disk->queue) {
4093 			blk_cleanup_queue(dd->queue);
4094 			blk_mq_free_tag_set(&dd->tags);
4095 		}
4096 		put_disk(dd->disk);
4097 		dd->disk  = NULL;
4098 		dd->queue = NULL;
4099 	}
4100 
4101 	spin_lock(&rssd_index_lock);
4102 	ida_remove(&rssd_index_ida, dd->index);
4103 	spin_unlock(&rssd_index_lock);
4104 	return 0;
4105 }
4106 
4107 static int mtip_block_suspend(struct driver_data *dd)
4108 {
4109 	dev_info(&dd->pdev->dev,
4110 		"Suspending %s ...\n", dd->disk->disk_name);
4111 	mtip_hw_suspend(dd);
4112 	return 0;
4113 }
4114 
4115 static int mtip_block_resume(struct driver_data *dd)
4116 {
4117 	dev_info(&dd->pdev->dev, "Resuming %s ...\n",
4118 		dd->disk->disk_name);
4119 	mtip_hw_resume(dd);
4120 	return 0;
4121 }
4122 
4123 static void drop_cpu(int cpu)
4124 {
4125 	cpu_use[cpu]--;
4126 }
4127 
4128 static int get_least_used_cpu_on_node(int node)
4129 {
4130 	int cpu, least_used_cpu, least_cnt;
4131 	const struct cpumask *node_mask;
4132 
4133 	node_mask = cpumask_of_node(node);
4134 	least_used_cpu = cpumask_first(node_mask);
4135 	least_cnt = cpu_use[least_used_cpu];
4136 	cpu = least_used_cpu;
4137 
4138 	for_each_cpu(cpu, node_mask) {
4139 		if (cpu_use[cpu] < least_cnt) {
4140 			least_used_cpu = cpu;
4141 			least_cnt = cpu_use[cpu];
4142 		}
4143 	}
4144 	cpu_use[least_used_cpu]++;
4145 	return least_used_cpu;
4146 }
4147 
4148 /* Helper for selecting a node in round robin mode */
4149 static inline int mtip_get_next_rr_node(void)
4150 {
4151 	static int next_node = -1;
4152 
4153 	if (next_node == -1) {
4154 		next_node = first_online_node;
4155 		return next_node;
4156 	}
4157 
4158 	next_node = next_online_node(next_node);
4159 	if (next_node == MAX_NUMNODES)
4160 		next_node = first_online_node;
4161 	return next_node;
4162 }
4163 
4164 static DEFINE_HANDLER(0);
4165 static DEFINE_HANDLER(1);
4166 static DEFINE_HANDLER(2);
4167 static DEFINE_HANDLER(3);
4168 static DEFINE_HANDLER(4);
4169 static DEFINE_HANDLER(5);
4170 static DEFINE_HANDLER(6);
4171 static DEFINE_HANDLER(7);
4172 
4173 static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev)
4174 {
4175 	int pos;
4176 	unsigned short pcie_dev_ctrl;
4177 
4178 	pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
4179 	if (pos) {
4180 		pci_read_config_word(pdev,
4181 			pos + PCI_EXP_DEVCTL,
4182 			&pcie_dev_ctrl);
4183 		if (pcie_dev_ctrl & (1 << 11) ||
4184 		    pcie_dev_ctrl & (1 << 4)) {
4185 			dev_info(&dd->pdev->dev,
4186 				"Disabling ERO/No-Snoop on bridge device %04x:%04x\n",
4187 					pdev->vendor, pdev->device);
4188 			pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN |
4189 						PCI_EXP_DEVCTL_RELAX_EN);
4190 			pci_write_config_word(pdev,
4191 				pos + PCI_EXP_DEVCTL,
4192 				pcie_dev_ctrl);
4193 		}
4194 	}
4195 }
4196 
4197 static void mtip_fix_ero_nosnoop(struct driver_data *dd, struct pci_dev *pdev)
4198 {
4199 	/*
4200 	 * This workaround is specific to AMD/ATI chipset with a PCI upstream
4201 	 * device with device id 0x5aXX
4202 	 */
4203 	if (pdev->bus && pdev->bus->self) {
4204 		if (pdev->bus->self->vendor == PCI_VENDOR_ID_ATI &&
4205 		    ((pdev->bus->self->device & 0xff00) == 0x5a00)) {
4206 			mtip_disable_link_opts(dd, pdev->bus->self);
4207 		} else {
4208 			/* Check further up the topology */
4209 			struct pci_dev *parent_dev = pdev->bus->self;
4210 			if (parent_dev->bus &&
4211 				parent_dev->bus->parent &&
4212 				parent_dev->bus->parent->self &&
4213 				parent_dev->bus->parent->self->vendor ==
4214 					 PCI_VENDOR_ID_ATI &&
4215 				(parent_dev->bus->parent->self->device &
4216 					0xff00) == 0x5a00) {
4217 				mtip_disable_link_opts(dd,
4218 					parent_dev->bus->parent->self);
4219 			}
4220 		}
4221 	}
4222 }
4223 
4224 /*
4225  * Called for each supported PCI device detected.
4226  *
4227  * This function allocates the private data structure, enables the
4228  * PCI device and then calls the block layer initialization function.
4229  *
4230  * return value
4231  *	0 on success else an error code.
4232  */
4233 static int mtip_pci_probe(struct pci_dev *pdev,
4234 			const struct pci_device_id *ent)
4235 {
4236 	int rv = 0;
4237 	struct driver_data *dd = NULL;
4238 	char cpu_list[256];
4239 	const struct cpumask *node_mask;
4240 	int cpu, i = 0, j = 0;
4241 	int my_node = NUMA_NO_NODE;
4242 	unsigned long flags;
4243 
4244 	/* Allocate memory for this devices private data. */
4245 	my_node = pcibus_to_node(pdev->bus);
4246 	if (my_node != NUMA_NO_NODE) {
4247 		if (!node_online(my_node))
4248 			my_node = mtip_get_next_rr_node();
4249 	} else {
4250 		dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n");
4251 		my_node = mtip_get_next_rr_node();
4252 	}
4253 	dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n",
4254 		my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev),
4255 		cpu_to_node(raw_smp_processor_id()), raw_smp_processor_id());
4256 
4257 	dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node);
4258 	if (dd == NULL) {
4259 		dev_err(&pdev->dev,
4260 			"Unable to allocate memory for driver data\n");
4261 		return -ENOMEM;
4262 	}
4263 
4264 	/* Attach the private data to this PCI device.  */
4265 	pci_set_drvdata(pdev, dd);
4266 
4267 	rv = pcim_enable_device(pdev);
4268 	if (rv < 0) {
4269 		dev_err(&pdev->dev, "Unable to enable device\n");
4270 		goto iomap_err;
4271 	}
4272 
4273 	/* Map BAR5 to memory. */
4274 	rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME);
4275 	if (rv < 0) {
4276 		dev_err(&pdev->dev, "Unable to map regions\n");
4277 		goto iomap_err;
4278 	}
4279 
4280 	if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
4281 		rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
4282 
4283 		if (rv) {
4284 			rv = pci_set_consistent_dma_mask(pdev,
4285 						DMA_BIT_MASK(32));
4286 			if (rv) {
4287 				dev_warn(&pdev->dev,
4288 					"64-bit DMA enable failed\n");
4289 				goto setmask_err;
4290 			}
4291 		}
4292 	}
4293 
4294 	/* Copy the info we may need later into the private data structure. */
4295 	dd->major	= mtip_major;
4296 	dd->instance	= instance;
4297 	dd->pdev	= pdev;
4298 	dd->numa_node	= my_node;
4299 
4300 	INIT_LIST_HEAD(&dd->online_list);
4301 	INIT_LIST_HEAD(&dd->remove_list);
4302 
4303 	memset(dd->workq_name, 0, 32);
4304 	snprintf(dd->workq_name, 31, "mtipq%d", dd->instance);
4305 
4306 	dd->isr_workq = create_workqueue(dd->workq_name);
4307 	if (!dd->isr_workq) {
4308 		dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance);
4309 		rv = -ENOMEM;
4310 		goto block_initialize_err;
4311 	}
4312 
4313 	memset(cpu_list, 0, sizeof(cpu_list));
4314 
4315 	node_mask = cpumask_of_node(dd->numa_node);
4316 	if (!cpumask_empty(node_mask)) {
4317 		for_each_cpu(cpu, node_mask)
4318 		{
4319 			snprintf(&cpu_list[j], 256 - j, "%d ", cpu);
4320 			j = strlen(cpu_list);
4321 		}
4322 
4323 		dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n",
4324 			dd->numa_node,
4325 			topology_physical_package_id(cpumask_first(node_mask)),
4326 			nr_cpus_node(dd->numa_node),
4327 			cpu_list);
4328 	} else
4329 		dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n");
4330 
4331 	dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node);
4332 	dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n",
4333 		cpu_to_node(dd->isr_binding), dd->isr_binding);
4334 
4335 	/* first worker context always runs in ISR */
4336 	dd->work[0].cpu_binding = dd->isr_binding;
4337 	dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4338 	dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4339 	dd->work[3].cpu_binding = dd->work[0].cpu_binding;
4340 	dd->work[4].cpu_binding = dd->work[1].cpu_binding;
4341 	dd->work[5].cpu_binding = dd->work[2].cpu_binding;
4342 	dd->work[6].cpu_binding = dd->work[2].cpu_binding;
4343 	dd->work[7].cpu_binding = dd->work[1].cpu_binding;
4344 
4345 	/* Log the bindings */
4346 	for_each_present_cpu(cpu) {
4347 		memset(cpu_list, 0, sizeof(cpu_list));
4348 		for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) {
4349 			if (dd->work[i].cpu_binding == cpu) {
4350 				snprintf(&cpu_list[j], 256 - j, "%d ", i);
4351 				j = strlen(cpu_list);
4352 			}
4353 		}
4354 		if (j)
4355 			dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list);
4356 	}
4357 
4358 	INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0);
4359 	INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1);
4360 	INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2);
4361 	INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3);
4362 	INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4);
4363 	INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5);
4364 	INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6);
4365 	INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7);
4366 
4367 	pci_set_master(pdev);
4368 	rv = pci_enable_msi(pdev);
4369 	if (rv) {
4370 		dev_warn(&pdev->dev,
4371 			"Unable to enable MSI interrupt.\n");
4372 		goto msi_initialize_err;
4373 	}
4374 
4375 	mtip_fix_ero_nosnoop(dd, pdev);
4376 
4377 	/* Initialize the block layer. */
4378 	rv = mtip_block_initialize(dd);
4379 	if (rv < 0) {
4380 		dev_err(&pdev->dev,
4381 			"Unable to initialize block layer\n");
4382 		goto block_initialize_err;
4383 	}
4384 
4385 	/*
4386 	 * Increment the instance count so that each device has a unique
4387 	 * instance number.
4388 	 */
4389 	instance++;
4390 	if (rv != MTIP_FTL_REBUILD_MAGIC)
4391 		set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
4392 	else
4393 		rv = 0; /* device in rebuild state, return 0 from probe */
4394 
4395 	/* Add to online list even if in ftl rebuild */
4396 	spin_lock_irqsave(&dev_lock, flags);
4397 	list_add(&dd->online_list, &online_list);
4398 	spin_unlock_irqrestore(&dev_lock, flags);
4399 
4400 	goto done;
4401 
4402 block_initialize_err:
4403 	pci_disable_msi(pdev);
4404 
4405 msi_initialize_err:
4406 	if (dd->isr_workq) {
4407 		flush_workqueue(dd->isr_workq);
4408 		destroy_workqueue(dd->isr_workq);
4409 		drop_cpu(dd->work[0].cpu_binding);
4410 		drop_cpu(dd->work[1].cpu_binding);
4411 		drop_cpu(dd->work[2].cpu_binding);
4412 	}
4413 setmask_err:
4414 	pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4415 
4416 iomap_err:
4417 	kfree(dd);
4418 	pci_set_drvdata(pdev, NULL);
4419 	return rv;
4420 done:
4421 	return rv;
4422 }
4423 
4424 /*
4425  * Called for each probed device when the device is removed or the
4426  * driver is unloaded.
4427  *
4428  * return value
4429  *	None
4430  */
4431 static void mtip_pci_remove(struct pci_dev *pdev)
4432 {
4433 	struct driver_data *dd = pci_get_drvdata(pdev);
4434 	unsigned long flags, to;
4435 
4436 	set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
4437 
4438 	spin_lock_irqsave(&dev_lock, flags);
4439 	list_del_init(&dd->online_list);
4440 	list_add(&dd->remove_list, &removing_list);
4441 	spin_unlock_irqrestore(&dev_lock, flags);
4442 
4443 	mtip_check_surprise_removal(pdev);
4444 	synchronize_irq(dd->pdev->irq);
4445 
4446 	/* Spin until workers are done */
4447 	to = jiffies + msecs_to_jiffies(4000);
4448 	do {
4449 		msleep(20);
4450 	} while (atomic_read(&dd->irq_workers_active) != 0 &&
4451 		time_before(jiffies, to));
4452 
4453 	if (atomic_read(&dd->irq_workers_active) != 0) {
4454 		dev_warn(&dd->pdev->dev,
4455 			"Completion workers still active!\n");
4456 	}
4457 
4458 	blk_mq_stop_hw_queues(dd->queue);
4459 	/* Clean up the block layer. */
4460 	mtip_block_remove(dd);
4461 
4462 	if (dd->isr_workq) {
4463 		flush_workqueue(dd->isr_workq);
4464 		destroy_workqueue(dd->isr_workq);
4465 		drop_cpu(dd->work[0].cpu_binding);
4466 		drop_cpu(dd->work[1].cpu_binding);
4467 		drop_cpu(dd->work[2].cpu_binding);
4468 	}
4469 
4470 	pci_disable_msi(pdev);
4471 
4472 	spin_lock_irqsave(&dev_lock, flags);
4473 	list_del_init(&dd->remove_list);
4474 	spin_unlock_irqrestore(&dev_lock, flags);
4475 
4476 	kfree(dd);
4477 
4478 	pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4479 	pci_set_drvdata(pdev, NULL);
4480 }
4481 
4482 /*
4483  * Called for each probed device when the device is suspended.
4484  *
4485  * return value
4486  *	0  Success
4487  *	<0 Error
4488  */
4489 static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
4490 {
4491 	int rv = 0;
4492 	struct driver_data *dd = pci_get_drvdata(pdev);
4493 
4494 	if (!dd) {
4495 		dev_err(&pdev->dev,
4496 			"Driver private datastructure is NULL\n");
4497 		return -EFAULT;
4498 	}
4499 
4500 	set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4501 
4502 	/* Disable ports & interrupts then send standby immediate */
4503 	rv = mtip_block_suspend(dd);
4504 	if (rv < 0) {
4505 		dev_err(&pdev->dev,
4506 			"Failed to suspend controller\n");
4507 		return rv;
4508 	}
4509 
4510 	/*
4511 	 * Save the pci config space to pdev structure &
4512 	 * disable the device
4513 	 */
4514 	pci_save_state(pdev);
4515 	pci_disable_device(pdev);
4516 
4517 	/* Move to Low power state*/
4518 	pci_set_power_state(pdev, PCI_D3hot);
4519 
4520 	return rv;
4521 }
4522 
4523 /*
4524  * Called for each probed device when the device is resumed.
4525  *
4526  * return value
4527  *      0  Success
4528  *      <0 Error
4529  */
4530 static int mtip_pci_resume(struct pci_dev *pdev)
4531 {
4532 	int rv = 0;
4533 	struct driver_data *dd;
4534 
4535 	dd = pci_get_drvdata(pdev);
4536 	if (!dd) {
4537 		dev_err(&pdev->dev,
4538 			"Driver private datastructure is NULL\n");
4539 		return -EFAULT;
4540 	}
4541 
4542 	/* Move the device to active State */
4543 	pci_set_power_state(pdev, PCI_D0);
4544 
4545 	/* Restore PCI configuration space */
4546 	pci_restore_state(pdev);
4547 
4548 	/* Enable the PCI device*/
4549 	rv = pcim_enable_device(pdev);
4550 	if (rv < 0) {
4551 		dev_err(&pdev->dev,
4552 			"Failed to enable card during resume\n");
4553 		goto err;
4554 	}
4555 	pci_set_master(pdev);
4556 
4557 	/*
4558 	 * Calls hbaReset, initPort, & startPort function
4559 	 * then enables interrupts
4560 	 */
4561 	rv = mtip_block_resume(dd);
4562 	if (rv < 0)
4563 		dev_err(&pdev->dev, "Unable to resume\n");
4564 
4565 err:
4566 	clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4567 
4568 	return rv;
4569 }
4570 
4571 /*
4572  * Shutdown routine
4573  *
4574  * return value
4575  *      None
4576  */
4577 static void mtip_pci_shutdown(struct pci_dev *pdev)
4578 {
4579 	struct driver_data *dd = pci_get_drvdata(pdev);
4580 	if (dd)
4581 		mtip_block_shutdown(dd);
4582 }
4583 
4584 /* Table of device ids supported by this driver. */
4585 static const struct pci_device_id mtip_pci_tbl[] = {
4586 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) },
4587 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) },
4588 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) },
4589 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) },
4590 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) },
4591 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) },
4592 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) },
4593 	{ 0 }
4594 };
4595 
4596 /* Structure that describes the PCI driver functions. */
4597 static struct pci_driver mtip_pci_driver = {
4598 	.name			= MTIP_DRV_NAME,
4599 	.id_table		= mtip_pci_tbl,
4600 	.probe			= mtip_pci_probe,
4601 	.remove			= mtip_pci_remove,
4602 	.suspend		= mtip_pci_suspend,
4603 	.resume			= mtip_pci_resume,
4604 	.shutdown		= mtip_pci_shutdown,
4605 };
4606 
4607 MODULE_DEVICE_TABLE(pci, mtip_pci_tbl);
4608 
4609 /*
4610  * Module initialization function.
4611  *
4612  * Called once when the module is loaded. This function allocates a major
4613  * block device number to the Cyclone devices and registers the PCI layer
4614  * of the driver.
4615  *
4616  * Return value
4617  *      0 on success else error code.
4618  */
4619 static int __init mtip_init(void)
4620 {
4621 	int error;
4622 
4623 	pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
4624 
4625 	spin_lock_init(&dev_lock);
4626 
4627 	INIT_LIST_HEAD(&online_list);
4628 	INIT_LIST_HEAD(&removing_list);
4629 
4630 	/* Allocate a major block device number to use with this driver. */
4631 	error = register_blkdev(0, MTIP_DRV_NAME);
4632 	if (error <= 0) {
4633 		pr_err("Unable to register block device (%d)\n",
4634 		error);
4635 		return -EBUSY;
4636 	}
4637 	mtip_major = error;
4638 
4639 	dfs_parent = debugfs_create_dir("rssd", NULL);
4640 	if (IS_ERR_OR_NULL(dfs_parent)) {
4641 		pr_warn("Error creating debugfs parent\n");
4642 		dfs_parent = NULL;
4643 	}
4644 	if (dfs_parent) {
4645 		dfs_device_status = debugfs_create_file("device_status",
4646 					S_IRUGO, dfs_parent, NULL,
4647 					&mtip_device_status_fops);
4648 		if (IS_ERR_OR_NULL(dfs_device_status)) {
4649 			pr_err("Error creating device_status node\n");
4650 			dfs_device_status = NULL;
4651 		}
4652 	}
4653 
4654 	/* Register our PCI operations. */
4655 	error = pci_register_driver(&mtip_pci_driver);
4656 	if (error) {
4657 		debugfs_remove(dfs_parent);
4658 		unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4659 	}
4660 
4661 	return error;
4662 }
4663 
4664 /*
4665  * Module de-initialization function.
4666  *
4667  * Called once when the module is unloaded. This function deallocates
4668  * the major block device number allocated by mtip_init() and
4669  * unregisters the PCI layer of the driver.
4670  *
4671  * Return value
4672  *      none
4673  */
4674 static void __exit mtip_exit(void)
4675 {
4676 	/* Release the allocated major block device number. */
4677 	unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4678 
4679 	/* Unregister the PCI driver. */
4680 	pci_unregister_driver(&mtip_pci_driver);
4681 
4682 	debugfs_remove_recursive(dfs_parent);
4683 }
4684 
4685 MODULE_AUTHOR("Micron Technology, Inc");
4686 MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver");
4687 MODULE_LICENSE("GPL");
4688 MODULE_VERSION(MTIP_DRV_VERSION);
4689 
4690 module_init(mtip_init);
4691 module_exit(mtip_exit);
4692