1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Driver for the Micron P320 SSD
4  *   Copyright (C) 2011 Micron Technology, Inc.
5  *
6  * Portions of this code were derived from works subjected to the
7  * following copyright:
8  *    Copyright (C) 2009 Integrated Device Technology, Inc.
9  */
10 
11 #include <linux/pci.h>
12 #include <linux/interrupt.h>
13 #include <linux/ata.h>
14 #include <linux/delay.h>
15 #include <linux/hdreg.h>
16 #include <linux/uaccess.h>
17 #include <linux/random.h>
18 #include <linux/smp.h>
19 #include <linux/compat.h>
20 #include <linux/fs.h>
21 #include <linux/module.h>
22 #include <linux/genhd.h>
23 #include <linux/blkdev.h>
24 #include <linux/blk-mq.h>
25 #include <linux/bio.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/idr.h>
28 #include <linux/kthread.h>
29 #include <../drivers/ata/ahci.h>
30 #include <linux/export.h>
31 #include <linux/debugfs.h>
32 #include <linux/prefetch.h>
33 #include <linux/numa.h>
34 #include "mtip32xx.h"
35 
36 #define HW_CMD_SLOT_SZ		(MTIP_MAX_COMMAND_SLOTS * 32)
37 
38 /* DMA region containing RX Fis, Identify, RLE10, and SMART buffers */
39 #define AHCI_RX_FIS_SZ          0x100
40 #define AHCI_RX_FIS_OFFSET      0x0
41 #define AHCI_IDFY_SZ            ATA_SECT_SIZE
42 #define AHCI_IDFY_OFFSET        0x400
43 #define AHCI_SECTBUF_SZ         ATA_SECT_SIZE
44 #define AHCI_SECTBUF_OFFSET     0x800
45 #define AHCI_SMARTBUF_SZ        ATA_SECT_SIZE
46 #define AHCI_SMARTBUF_OFFSET    0xC00
47 /* 0x100 + 0x200 + 0x200 + 0x200 is smaller than 4k but we pad it out */
48 #define BLOCK_DMA_ALLOC_SZ      4096
49 
50 /* DMA region containing command table (should be 8192 bytes) */
51 #define AHCI_CMD_SLOT_SZ        sizeof(struct mtip_cmd_hdr)
52 #define AHCI_CMD_TBL_SZ         (MTIP_MAX_COMMAND_SLOTS * AHCI_CMD_SLOT_SZ)
53 #define AHCI_CMD_TBL_OFFSET     0x0
54 
55 /* DMA region per command (contains header and SGL) */
56 #define AHCI_CMD_TBL_HDR_SZ     0x80
57 #define AHCI_CMD_TBL_HDR_OFFSET 0x0
58 #define AHCI_CMD_TBL_SGL_SZ     (MTIP_MAX_SG * sizeof(struct mtip_cmd_sg))
59 #define AHCI_CMD_TBL_SGL_OFFSET AHCI_CMD_TBL_HDR_SZ
60 #define CMD_DMA_ALLOC_SZ        (AHCI_CMD_TBL_SGL_SZ + AHCI_CMD_TBL_HDR_SZ)
61 
62 
63 #define HOST_CAP_NZDMA		(1 << 19)
64 #define HOST_HSORG		0xFC
65 #define HSORG_DISABLE_SLOTGRP_INTR (1<<24)
66 #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16)
67 #define HSORG_HWREV		0xFF00
68 #define HSORG_STYLE		0x8
69 #define HSORG_SLOTGROUPS	0x7
70 
71 #define PORT_COMMAND_ISSUE	0x38
72 #define PORT_SDBV		0x7C
73 
74 #define PORT_OFFSET		0x100
75 #define PORT_MEM_SIZE		0x80
76 
77 #define PORT_IRQ_ERR \
78 	(PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \
79 	 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \
80 	 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \
81 	 PORT_IRQ_OVERFLOW)
82 #define PORT_IRQ_LEGACY \
83 	(PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS)
84 #define PORT_IRQ_HANDLED \
85 	(PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \
86 	 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \
87 	 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)
88 #define DEF_PORT_IRQ \
89 	(PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS)
90 
91 /* product numbers */
92 #define MTIP_PRODUCT_UNKNOWN	0x00
93 #define MTIP_PRODUCT_ASICFPGA	0x11
94 
95 /* Device instance number, incremented each time a device is probed. */
96 static int instance;
97 
98 static struct list_head online_list;
99 static struct list_head removing_list;
100 static spinlock_t dev_lock;
101 
102 /*
103  * Global variable used to hold the major block device number
104  * allocated in mtip_init().
105  */
106 static int mtip_major;
107 static struct dentry *dfs_parent;
108 static struct dentry *dfs_device_status;
109 
110 static u32 cpu_use[NR_CPUS];
111 
112 static DEFINE_IDA(rssd_index_ida);
113 
114 static int mtip_block_initialize(struct driver_data *dd);
115 
116 #ifdef CONFIG_COMPAT
117 struct mtip_compat_ide_task_request_s {
118 	__u8		io_ports[8];
119 	__u8		hob_ports[8];
120 	ide_reg_valid_t	out_flags;
121 	ide_reg_valid_t	in_flags;
122 	int		data_phase;
123 	int		req_cmd;
124 	compat_ulong_t	out_size;
125 	compat_ulong_t	in_size;
126 };
127 #endif
128 
129 /*
130  * This function check_for_surprise_removal is called
131  * while card is removed from the system and it will
132  * read the vendor id from the configration space
133  *
134  * @pdev Pointer to the pci_dev structure.
135  *
136  * return value
137  *	 true if device removed, else false
138  */
139 static bool mtip_check_surprise_removal(struct pci_dev *pdev)
140 {
141 	u16 vendor_id = 0;
142 	struct driver_data *dd = pci_get_drvdata(pdev);
143 
144 	if (dd->sr)
145 		return true;
146 
147        /* Read the vendorID from the configuration space */
148 	pci_read_config_word(pdev, 0x00, &vendor_id);
149 	if (vendor_id == 0xFFFF) {
150 		dd->sr = true;
151 		if (dd->queue)
152 			blk_queue_flag_set(QUEUE_FLAG_DEAD, dd->queue);
153 		else
154 			dev_warn(&dd->pdev->dev,
155 				"%s: dd->queue is NULL\n", __func__);
156 		return true; /* device removed */
157 	}
158 
159 	return false; /* device present */
160 }
161 
162 static struct mtip_cmd *mtip_cmd_from_tag(struct driver_data *dd,
163 					  unsigned int tag)
164 {
165 	struct blk_mq_hw_ctx *hctx = dd->queue->queue_hw_ctx[0];
166 
167 	return blk_mq_rq_to_pdu(blk_mq_tag_to_rq(hctx->tags, tag));
168 }
169 
170 /*
171  * Reset the HBA (without sleeping)
172  *
173  * @dd Pointer to the driver data structure.
174  *
175  * return value
176  *	0	The reset was successful.
177  *	-1	The HBA Reset bit did not clear.
178  */
179 static int mtip_hba_reset(struct driver_data *dd)
180 {
181 	unsigned long timeout;
182 
183 	/* Set the reset bit */
184 	writel(HOST_RESET, dd->mmio + HOST_CTL);
185 
186 	/* Flush */
187 	readl(dd->mmio + HOST_CTL);
188 
189 	/*
190 	 * Spin for up to 10 seconds waiting for reset acknowledgement. Spec
191 	 * is 1 sec but in LUN failure conditions, up to 10 secs are required
192 	 */
193 	timeout = jiffies + msecs_to_jiffies(10000);
194 	do {
195 		mdelay(10);
196 		if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
197 			return -1;
198 
199 	} while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
200 		 && time_before(jiffies, timeout));
201 
202 	if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
203 		return -1;
204 
205 	return 0;
206 }
207 
208 /*
209  * Issue a command to the hardware.
210  *
211  * Set the appropriate bit in the s_active and Command Issue hardware
212  * registers, causing hardware command processing to begin.
213  *
214  * @port Pointer to the port structure.
215  * @tag  The tag of the command to be issued.
216  *
217  * return value
218  *      None
219  */
220 static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)
221 {
222 	int group = tag >> 5;
223 
224 	/* guard SACT and CI registers */
225 	spin_lock(&port->cmd_issue_lock[group]);
226 	writel((1 << MTIP_TAG_BIT(tag)),
227 			port->s_active[MTIP_TAG_INDEX(tag)]);
228 	writel((1 << MTIP_TAG_BIT(tag)),
229 			port->cmd_issue[MTIP_TAG_INDEX(tag)]);
230 	spin_unlock(&port->cmd_issue_lock[group]);
231 }
232 
233 /*
234  * Enable/disable the reception of FIS
235  *
236  * @port   Pointer to the port data structure
237  * @enable 1 to enable, 0 to disable
238  *
239  * return value
240  *	Previous state: 1 enabled, 0 disabled
241  */
242 static int mtip_enable_fis(struct mtip_port *port, int enable)
243 {
244 	u32 tmp;
245 
246 	/* enable FIS reception */
247 	tmp = readl(port->mmio + PORT_CMD);
248 	if (enable)
249 		writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
250 	else
251 		writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
252 
253 	/* Flush */
254 	readl(port->mmio + PORT_CMD);
255 
256 	return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX));
257 }
258 
259 /*
260  * Enable/disable the DMA engine
261  *
262  * @port   Pointer to the port data structure
263  * @enable 1 to enable, 0 to disable
264  *
265  * return value
266  *	Previous state: 1 enabled, 0 disabled.
267  */
268 static int mtip_enable_engine(struct mtip_port *port, int enable)
269 {
270 	u32 tmp;
271 
272 	/* enable FIS reception */
273 	tmp = readl(port->mmio + PORT_CMD);
274 	if (enable)
275 		writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
276 	else
277 		writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
278 
279 	readl(port->mmio + PORT_CMD);
280 	return (((tmp & PORT_CMD_START) == PORT_CMD_START));
281 }
282 
283 /*
284  * Enables the port DMA engine and FIS reception.
285  *
286  * return value
287  *	None
288  */
289 static inline void mtip_start_port(struct mtip_port *port)
290 {
291 	/* Enable FIS reception */
292 	mtip_enable_fis(port, 1);
293 
294 	/* Enable the DMA engine */
295 	mtip_enable_engine(port, 1);
296 }
297 
298 /*
299  * Deinitialize a port by disabling port interrupts, the DMA engine,
300  * and FIS reception.
301  *
302  * @port Pointer to the port structure
303  *
304  * return value
305  *	None
306  */
307 static inline void mtip_deinit_port(struct mtip_port *port)
308 {
309 	/* Disable interrupts on this port */
310 	writel(0, port->mmio + PORT_IRQ_MASK);
311 
312 	/* Disable the DMA engine */
313 	mtip_enable_engine(port, 0);
314 
315 	/* Disable FIS reception */
316 	mtip_enable_fis(port, 0);
317 }
318 
319 /*
320  * Initialize a port.
321  *
322  * This function deinitializes the port by calling mtip_deinit_port() and
323  * then initializes it by setting the command header and RX FIS addresses,
324  * clearing the SError register and any pending port interrupts before
325  * re-enabling the default set of port interrupts.
326  *
327  * @port Pointer to the port structure.
328  *
329  * return value
330  *	None
331  */
332 static void mtip_init_port(struct mtip_port *port)
333 {
334 	int i;
335 	mtip_deinit_port(port);
336 
337 	/* Program the command list base and FIS base addresses */
338 	if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
339 		writel((port->command_list_dma >> 16) >> 16,
340 			 port->mmio + PORT_LST_ADDR_HI);
341 		writel((port->rxfis_dma >> 16) >> 16,
342 			 port->mmio + PORT_FIS_ADDR_HI);
343 		set_bit(MTIP_PF_HOST_CAP_64, &port->flags);
344 	}
345 
346 	writel(port->command_list_dma & 0xFFFFFFFF,
347 			port->mmio + PORT_LST_ADDR);
348 	writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
349 
350 	/* Clear SError */
351 	writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
352 
353 	/* reset the completed registers.*/
354 	for (i = 0; i < port->dd->slot_groups; i++)
355 		writel(0xFFFFFFFF, port->completed[i]);
356 
357 	/* Clear any pending interrupts for this port */
358 	writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
359 
360 	/* Clear any pending interrupts on the HBA. */
361 	writel(readl(port->dd->mmio + HOST_IRQ_STAT),
362 					port->dd->mmio + HOST_IRQ_STAT);
363 
364 	/* Enable port interrupts */
365 	writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
366 }
367 
368 /*
369  * Restart a port
370  *
371  * @port Pointer to the port data structure.
372  *
373  * return value
374  *	None
375  */
376 static void mtip_restart_port(struct mtip_port *port)
377 {
378 	unsigned long timeout;
379 
380 	/* Disable the DMA engine */
381 	mtip_enable_engine(port, 0);
382 
383 	/* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */
384 	timeout = jiffies + msecs_to_jiffies(500);
385 	while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
386 		 && time_before(jiffies, timeout))
387 		;
388 
389 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
390 		return;
391 
392 	/*
393 	 * Chip quirk: escalate to hba reset if
394 	 * PxCMD.CR not clear after 500 ms
395 	 */
396 	if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
397 		dev_warn(&port->dd->pdev->dev,
398 			"PxCMD.CR not clear, escalating reset\n");
399 
400 		if (mtip_hba_reset(port->dd))
401 			dev_err(&port->dd->pdev->dev,
402 				"HBA reset escalation failed.\n");
403 
404 		/* 30 ms delay before com reset to quiesce chip */
405 		mdelay(30);
406 	}
407 
408 	dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n");
409 
410 	/* Set PxSCTL.DET */
411 	writel(readl(port->mmio + PORT_SCR_CTL) |
412 			 1, port->mmio + PORT_SCR_CTL);
413 	readl(port->mmio + PORT_SCR_CTL);
414 
415 	/* Wait 1 ms to quiesce chip function */
416 	timeout = jiffies + msecs_to_jiffies(1);
417 	while (time_before(jiffies, timeout))
418 		;
419 
420 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
421 		return;
422 
423 	/* Clear PxSCTL.DET */
424 	writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
425 			 port->mmio + PORT_SCR_CTL);
426 	readl(port->mmio + PORT_SCR_CTL);
427 
428 	/* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */
429 	timeout = jiffies + msecs_to_jiffies(500);
430 	while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
431 			 && time_before(jiffies, timeout))
432 		;
433 
434 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
435 		return;
436 
437 	if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
438 		dev_warn(&port->dd->pdev->dev,
439 			"COM reset failed\n");
440 
441 	mtip_init_port(port);
442 	mtip_start_port(port);
443 
444 }
445 
446 static int mtip_device_reset(struct driver_data *dd)
447 {
448 	int rv = 0;
449 
450 	if (mtip_check_surprise_removal(dd->pdev))
451 		return 0;
452 
453 	if (mtip_hba_reset(dd) < 0)
454 		rv = -EFAULT;
455 
456 	mdelay(1);
457 	mtip_init_port(dd->port);
458 	mtip_start_port(dd->port);
459 
460 	/* Enable interrupts on the HBA. */
461 	writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
462 					dd->mmio + HOST_CTL);
463 	return rv;
464 }
465 
466 /*
467  * Helper function for tag logging
468  */
469 static void print_tags(struct driver_data *dd,
470 			char *msg,
471 			unsigned long *tagbits,
472 			int cnt)
473 {
474 	unsigned char tagmap[128];
475 	int group, tagmap_len = 0;
476 
477 	memset(tagmap, 0, sizeof(tagmap));
478 	for (group = SLOTBITS_IN_LONGS; group > 0; group--)
479 		tagmap_len += sprintf(tagmap + tagmap_len, "%016lX ",
480 						tagbits[group-1]);
481 	dev_warn(&dd->pdev->dev,
482 			"%d command(s) %s: tagmap [%s]", cnt, msg, tagmap);
483 }
484 
485 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
486 				dma_addr_t buffer_dma, unsigned int sectors);
487 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
488 						struct smart_attr *attrib);
489 
490 static void mtip_complete_command(struct mtip_cmd *cmd, blk_status_t status)
491 {
492 	struct request *req = blk_mq_rq_from_pdu(cmd);
493 
494 	cmd->status = status;
495 	blk_mq_complete_request(req);
496 }
497 
498 /*
499  * Handle an error.
500  *
501  * @dd Pointer to the DRIVER_DATA structure.
502  *
503  * return value
504  *	None
505  */
506 static void mtip_handle_tfe(struct driver_data *dd)
507 {
508 	int group, tag, bit, reissue, rv;
509 	struct mtip_port *port;
510 	struct mtip_cmd  *cmd;
511 	u32 completed;
512 	struct host_to_dev_fis *fis;
513 	unsigned long tagaccum[SLOTBITS_IN_LONGS];
514 	unsigned int cmd_cnt = 0;
515 	unsigned char *buf;
516 	char *fail_reason = NULL;
517 	int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0;
518 
519 	dev_warn(&dd->pdev->dev, "Taskfile error\n");
520 
521 	port = dd->port;
522 
523 	if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
524 		cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
525 		dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n");
526 		mtip_complete_command(cmd, BLK_STS_IOERR);
527 		return;
528 	}
529 
530 	/* clear the tag accumulator */
531 	memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
532 
533 	/* Loop through all the groups */
534 	for (group = 0; group < dd->slot_groups; group++) {
535 		completed = readl(port->completed[group]);
536 
537 		dev_warn(&dd->pdev->dev, "g=%u, comp=%x\n", group, completed);
538 
539 		/* clear completed status register in the hardware.*/
540 		writel(completed, port->completed[group]);
541 
542 		/* Process successfully completed commands */
543 		for (bit = 0; bit < 32 && completed; bit++) {
544 			if (!(completed & (1<<bit)))
545 				continue;
546 			tag = (group << 5) + bit;
547 
548 			/* Skip the internal command slot */
549 			if (tag == MTIP_TAG_INTERNAL)
550 				continue;
551 
552 			cmd = mtip_cmd_from_tag(dd, tag);
553 			mtip_complete_command(cmd, 0);
554 			set_bit(tag, tagaccum);
555 			cmd_cnt++;
556 		}
557 	}
558 
559 	print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt);
560 
561 	/* Restart the port */
562 	mdelay(20);
563 	mtip_restart_port(port);
564 
565 	/* Trying to determine the cause of the error */
566 	rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
567 				dd->port->log_buf,
568 				dd->port->log_buf_dma, 1);
569 	if (rv) {
570 		dev_warn(&dd->pdev->dev,
571 			"Error in READ LOG EXT (10h) command\n");
572 		/* non-critical error, don't fail the load */
573 	} else {
574 		buf = (unsigned char *)dd->port->log_buf;
575 		if (buf[259] & 0x1) {
576 			dev_info(&dd->pdev->dev,
577 				"Write protect bit is set.\n");
578 			set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
579 			fail_all_ncq_write = 1;
580 			fail_reason = "write protect";
581 		}
582 		if (buf[288] == 0xF7) {
583 			dev_info(&dd->pdev->dev,
584 				"Exceeded Tmax, drive in thermal shutdown.\n");
585 			set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
586 			fail_all_ncq_cmds = 1;
587 			fail_reason = "thermal shutdown";
588 		}
589 		if (buf[288] == 0xBF) {
590 			set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag);
591 			dev_info(&dd->pdev->dev,
592 				"Drive indicates rebuild has failed. Secure erase required.\n");
593 			fail_all_ncq_cmds = 1;
594 			fail_reason = "rebuild failed";
595 		}
596 	}
597 
598 	/* clear the tag accumulator */
599 	memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
600 
601 	/* Loop through all the groups */
602 	for (group = 0; group < dd->slot_groups; group++) {
603 		for (bit = 0; bit < 32; bit++) {
604 			reissue = 1;
605 			tag = (group << 5) + bit;
606 			cmd = mtip_cmd_from_tag(dd, tag);
607 
608 			fis = (struct host_to_dev_fis *)cmd->command;
609 
610 			/* Should re-issue? */
611 			if (tag == MTIP_TAG_INTERNAL ||
612 			    fis->command == ATA_CMD_SET_FEATURES)
613 				reissue = 0;
614 			else {
615 				if (fail_all_ncq_cmds ||
616 					(fail_all_ncq_write &&
617 					fis->command == ATA_CMD_FPDMA_WRITE)) {
618 					dev_warn(&dd->pdev->dev,
619 					"  Fail: %s w/tag %d [%s].\n",
620 					fis->command == ATA_CMD_FPDMA_WRITE ?
621 						"write" : "read",
622 					tag,
623 					fail_reason != NULL ?
624 						fail_reason : "unknown");
625 					mtip_complete_command(cmd, BLK_STS_MEDIUM);
626 					continue;
627 				}
628 			}
629 
630 			/*
631 			 * First check if this command has
632 			 *  exceeded its retries.
633 			 */
634 			if (reissue && (cmd->retries-- > 0)) {
635 
636 				set_bit(tag, tagaccum);
637 
638 				/* Re-issue the command. */
639 				mtip_issue_ncq_command(port, tag);
640 
641 				continue;
642 			}
643 
644 			/* Retire a command that will not be reissued */
645 			dev_warn(&port->dd->pdev->dev,
646 				"retiring tag %d\n", tag);
647 
648 			mtip_complete_command(cmd, BLK_STS_IOERR);
649 		}
650 	}
651 	print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt);
652 }
653 
654 /*
655  * Handle a set device bits interrupt
656  */
657 static inline void mtip_workq_sdbfx(struct mtip_port *port, int group,
658 							u32 completed)
659 {
660 	struct driver_data *dd = port->dd;
661 	int tag, bit;
662 	struct mtip_cmd *command;
663 
664 	if (!completed) {
665 		WARN_ON_ONCE(!completed);
666 		return;
667 	}
668 	/* clear completed status register in the hardware.*/
669 	writel(completed, port->completed[group]);
670 
671 	/* Process completed commands. */
672 	for (bit = 0; (bit < 32) && completed; bit++) {
673 		if (completed & 0x01) {
674 			tag = (group << 5) | bit;
675 
676 			/* skip internal command slot. */
677 			if (unlikely(tag == MTIP_TAG_INTERNAL))
678 				continue;
679 
680 			command = mtip_cmd_from_tag(dd, tag);
681 			mtip_complete_command(command, 0);
682 		}
683 		completed >>= 1;
684 	}
685 
686 	/* If last, re-enable interrupts */
687 	if (atomic_dec_return(&dd->irq_workers_active) == 0)
688 		writel(0xffffffff, dd->mmio + HOST_IRQ_STAT);
689 }
690 
691 /*
692  * Process legacy pio and d2h interrupts
693  */
694 static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat)
695 {
696 	struct mtip_port *port = dd->port;
697 	struct mtip_cmd *cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
698 
699 	if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) && cmd) {
700 		int group = MTIP_TAG_INDEX(MTIP_TAG_INTERNAL);
701 		int status = readl(port->cmd_issue[group]);
702 
703 		if (!(status & (1 << MTIP_TAG_BIT(MTIP_TAG_INTERNAL))))
704 			mtip_complete_command(cmd, 0);
705 	}
706 }
707 
708 /*
709  * Demux and handle errors
710  */
711 static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat)
712 {
713 	if (unlikely(port_stat & PORT_IRQ_CONNECT)) {
714 		dev_warn(&dd->pdev->dev,
715 			"Clearing PxSERR.DIAG.x\n");
716 		writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
717 	}
718 
719 	if (unlikely(port_stat & PORT_IRQ_PHYRDY)) {
720 		dev_warn(&dd->pdev->dev,
721 			"Clearing PxSERR.DIAG.n\n");
722 		writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
723 	}
724 
725 	if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) {
726 		dev_warn(&dd->pdev->dev,
727 			"Port stat errors %x unhandled\n",
728 			(port_stat & ~PORT_IRQ_HANDLED));
729 		if (mtip_check_surprise_removal(dd->pdev))
730 			return;
731 	}
732 	if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) {
733 		set_bit(MTIP_PF_EH_ACTIVE_BIT, &dd->port->flags);
734 		wake_up_interruptible(&dd->port->svc_wait);
735 	}
736 }
737 
738 static inline irqreturn_t mtip_handle_irq(struct driver_data *data)
739 {
740 	struct driver_data *dd = (struct driver_data *) data;
741 	struct mtip_port *port = dd->port;
742 	u32 hba_stat, port_stat;
743 	int rv = IRQ_NONE;
744 	int do_irq_enable = 1, i, workers;
745 	struct mtip_work *twork;
746 
747 	hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
748 	if (hba_stat) {
749 		rv = IRQ_HANDLED;
750 
751 		/* Acknowledge the interrupt status on the port.*/
752 		port_stat = readl(port->mmio + PORT_IRQ_STAT);
753 		if (unlikely(port_stat == 0xFFFFFFFF)) {
754 			mtip_check_surprise_removal(dd->pdev);
755 			return IRQ_HANDLED;
756 		}
757 		writel(port_stat, port->mmio + PORT_IRQ_STAT);
758 
759 		/* Demux port status */
760 		if (likely(port_stat & PORT_IRQ_SDB_FIS)) {
761 			do_irq_enable = 0;
762 			WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0);
763 
764 			/* Start at 1: group zero is always local? */
765 			for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS;
766 									i++) {
767 				twork = &dd->work[i];
768 				twork->completed = readl(port->completed[i]);
769 				if (twork->completed)
770 					workers++;
771 			}
772 
773 			atomic_set(&dd->irq_workers_active, workers);
774 			if (workers) {
775 				for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) {
776 					twork = &dd->work[i];
777 					if (twork->completed)
778 						queue_work_on(
779 							twork->cpu_binding,
780 							dd->isr_workq,
781 							&twork->work);
782 				}
783 
784 				if (likely(dd->work[0].completed))
785 					mtip_workq_sdbfx(port, 0,
786 							dd->work[0].completed);
787 
788 			} else {
789 				/*
790 				 * Chip quirk: SDB interrupt but nothing
791 				 * to complete
792 				 */
793 				do_irq_enable = 1;
794 			}
795 		}
796 
797 		if (unlikely(port_stat & PORT_IRQ_ERR)) {
798 			if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
799 				/* don't proceed further */
800 				return IRQ_HANDLED;
801 			}
802 			if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
803 							&dd->dd_flag))
804 				return rv;
805 
806 			mtip_process_errors(dd, port_stat & PORT_IRQ_ERR);
807 		}
808 
809 		if (unlikely(port_stat & PORT_IRQ_LEGACY))
810 			mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY);
811 	}
812 
813 	/* acknowledge interrupt */
814 	if (unlikely(do_irq_enable))
815 		writel(hba_stat, dd->mmio + HOST_IRQ_STAT);
816 
817 	return rv;
818 }
819 
820 /*
821  * HBA interrupt subroutine.
822  *
823  * @irq		IRQ number.
824  * @instance	Pointer to the driver data structure.
825  *
826  * return value
827  *	IRQ_HANDLED	A HBA interrupt was pending and handled.
828  *	IRQ_NONE	This interrupt was not for the HBA.
829  */
830 static irqreturn_t mtip_irq_handler(int irq, void *instance)
831 {
832 	struct driver_data *dd = instance;
833 
834 	return mtip_handle_irq(dd);
835 }
836 
837 static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag)
838 {
839 	writel(1 << MTIP_TAG_BIT(tag), port->cmd_issue[MTIP_TAG_INDEX(tag)]);
840 }
841 
842 static bool mtip_pause_ncq(struct mtip_port *port,
843 				struct host_to_dev_fis *fis)
844 {
845 	unsigned long task_file_data;
846 
847 	task_file_data = readl(port->mmio+PORT_TFDATA);
848 	if ((task_file_data & 1))
849 		return false;
850 
851 	if (fis->command == ATA_CMD_SEC_ERASE_PREP) {
852 		port->ic_pause_timer = jiffies;
853 		return true;
854 	} else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) &&
855 					(fis->features == 0x03)) {
856 		set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
857 		port->ic_pause_timer = jiffies;
858 		return true;
859 	} else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) ||
860 		((fis->command == 0xFC) &&
861 			(fis->features == 0x27 || fis->features == 0x72 ||
862 			 fis->features == 0x62 || fis->features == 0x26))) {
863 		clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
864 		clear_bit(MTIP_DDF_REBUILD_FAILED_BIT, &port->dd->dd_flag);
865 		/* Com reset after secure erase or lowlevel format */
866 		mtip_restart_port(port);
867 		clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
868 		return false;
869 	}
870 
871 	return false;
872 }
873 
874 static bool mtip_commands_active(struct mtip_port *port)
875 {
876 	unsigned int active;
877 	unsigned int n;
878 
879 	/*
880 	 * Ignore s_active bit 0 of array element 0.
881 	 * This bit will always be set
882 	 */
883 	active = readl(port->s_active[0]) & 0xFFFFFFFE;
884 	for (n = 1; n < port->dd->slot_groups; n++)
885 		active |= readl(port->s_active[n]);
886 
887 	return active != 0;
888 }
889 
890 /*
891  * Wait for port to quiesce
892  *
893  * @port    Pointer to port data structure
894  * @timeout Max duration to wait (ms)
895  *
896  * return value
897  *	0	Success
898  *	-EBUSY  Commands still active
899  */
900 static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout)
901 {
902 	unsigned long to;
903 	bool active = true;
904 
905 	blk_mq_quiesce_queue(port->dd->queue);
906 
907 	to = jiffies + msecs_to_jiffies(timeout);
908 	do {
909 		if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) &&
910 			test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
911 			msleep(20);
912 			continue; /* svc thd is actively issuing commands */
913 		}
914 
915 		msleep(100);
916 
917 		if (mtip_check_surprise_removal(port->dd->pdev))
918 			goto err_fault;
919 
920 		active = mtip_commands_active(port);
921 		if (!active)
922 			break;
923 	} while (time_before(jiffies, to));
924 
925 	blk_mq_unquiesce_queue(port->dd->queue);
926 	return active ? -EBUSY : 0;
927 err_fault:
928 	blk_mq_unquiesce_queue(port->dd->queue);
929 	return -EFAULT;
930 }
931 
932 struct mtip_int_cmd {
933 	int fis_len;
934 	dma_addr_t buffer;
935 	int buf_len;
936 	u32 opts;
937 };
938 
939 /*
940  * Execute an internal command and wait for the completion.
941  *
942  * @port    Pointer to the port data structure.
943  * @fis     Pointer to the FIS that describes the command.
944  * @fis_len  Length in WORDS of the FIS.
945  * @buffer  DMA accessible for command data.
946  * @buf_len  Length, in bytes, of the data buffer.
947  * @opts    Command header options, excluding the FIS length
948  *             and the number of PRD entries.
949  * @timeout Time in ms to wait for the command to complete.
950  *
951  * return value
952  *	0	 Command completed successfully.
953  *	-EFAULT  The buffer address is not correctly aligned.
954  *	-EBUSY   Internal command or other IO in progress.
955  *	-EAGAIN  Time out waiting for command to complete.
956  */
957 static int mtip_exec_internal_command(struct mtip_port *port,
958 					struct host_to_dev_fis *fis,
959 					int fis_len,
960 					dma_addr_t buffer,
961 					int buf_len,
962 					u32 opts,
963 					unsigned long timeout)
964 {
965 	struct mtip_cmd *int_cmd;
966 	struct driver_data *dd = port->dd;
967 	struct request *rq;
968 	struct mtip_int_cmd icmd = {
969 		.fis_len = fis_len,
970 		.buffer = buffer,
971 		.buf_len = buf_len,
972 		.opts = opts
973 	};
974 	int rv = 0;
975 
976 	/* Make sure the buffer is 8 byte aligned. This is asic specific. */
977 	if (buffer & 0x00000007) {
978 		dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n");
979 		return -EFAULT;
980 	}
981 
982 	if (mtip_check_surprise_removal(dd->pdev))
983 		return -EFAULT;
984 
985 	rq = blk_mq_alloc_request(dd->queue, REQ_OP_DRV_IN, BLK_MQ_REQ_RESERVED);
986 	if (IS_ERR(rq)) {
987 		dbg_printk(MTIP_DRV_NAME "Unable to allocate tag for PIO cmd\n");
988 		return -EFAULT;
989 	}
990 
991 	set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
992 
993 	if (fis->command == ATA_CMD_SEC_ERASE_PREP)
994 		set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
995 
996 	clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
997 
998 	if (fis->command != ATA_CMD_STANDBYNOW1) {
999 		/* wait for io to complete if non atomic */
1000 		if (mtip_quiesce_io(port, MTIP_QUIESCE_IO_TIMEOUT_MS) < 0) {
1001 			dev_warn(&dd->pdev->dev, "Failed to quiesce IO\n");
1002 			blk_mq_free_request(rq);
1003 			clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1004 			wake_up_interruptible(&port->svc_wait);
1005 			return -EBUSY;
1006 		}
1007 	}
1008 
1009 	/* Copy the command to the command table */
1010 	int_cmd = blk_mq_rq_to_pdu(rq);
1011 	int_cmd->icmd = &icmd;
1012 	memcpy(int_cmd->command, fis, fis_len*4);
1013 
1014 	rq->timeout = timeout;
1015 
1016 	/* insert request and run queue */
1017 	blk_execute_rq(rq->q, NULL, rq, true);
1018 
1019 	if (int_cmd->status) {
1020 		dev_err(&dd->pdev->dev, "Internal command [%02X] failed %d\n",
1021 				fis->command, int_cmd->status);
1022 		rv = -EIO;
1023 
1024 		if (mtip_check_surprise_removal(dd->pdev) ||
1025 			test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1026 					&dd->dd_flag)) {
1027 			dev_err(&dd->pdev->dev,
1028 				"Internal command [%02X] wait returned due to SR\n",
1029 				fis->command);
1030 			rv = -ENXIO;
1031 			goto exec_ic_exit;
1032 		}
1033 		mtip_device_reset(dd); /* recover from timeout issue */
1034 		rv = -EAGAIN;
1035 		goto exec_ic_exit;
1036 	}
1037 
1038 	if (readl(port->cmd_issue[MTIP_TAG_INDEX(MTIP_TAG_INTERNAL)])
1039 			& (1 << MTIP_TAG_BIT(MTIP_TAG_INTERNAL))) {
1040 		rv = -ENXIO;
1041 		if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
1042 			mtip_device_reset(dd);
1043 			rv = -EAGAIN;
1044 		}
1045 	}
1046 exec_ic_exit:
1047 	/* Clear the allocated and active bits for the internal command. */
1048 	blk_mq_free_request(rq);
1049 	clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1050 	if (rv >= 0 && mtip_pause_ncq(port, fis)) {
1051 		/* NCQ paused */
1052 		return rv;
1053 	}
1054 	wake_up_interruptible(&port->svc_wait);
1055 
1056 	return rv;
1057 }
1058 
1059 /*
1060  * Byte-swap ATA ID strings.
1061  *
1062  * ATA identify data contains strings in byte-swapped 16-bit words.
1063  * They must be swapped (on all architectures) to be usable as C strings.
1064  * This function swaps bytes in-place.
1065  *
1066  * @buf The buffer location of the string
1067  * @len The number of bytes to swap
1068  *
1069  * return value
1070  *	None
1071  */
1072 static inline void ata_swap_string(u16 *buf, unsigned int len)
1073 {
1074 	int i;
1075 	for (i = 0; i < (len/2); i++)
1076 		be16_to_cpus(&buf[i]);
1077 }
1078 
1079 static void mtip_set_timeout(struct driver_data *dd,
1080 					struct host_to_dev_fis *fis,
1081 					unsigned int *timeout, u8 erasemode)
1082 {
1083 	switch (fis->command) {
1084 	case ATA_CMD_DOWNLOAD_MICRO:
1085 		*timeout = 120000; /* 2 minutes */
1086 		break;
1087 	case ATA_CMD_SEC_ERASE_UNIT:
1088 	case 0xFC:
1089 		if (erasemode)
1090 			*timeout = ((*(dd->port->identify + 90) * 2) * 60000);
1091 		else
1092 			*timeout = ((*(dd->port->identify + 89) * 2) * 60000);
1093 		break;
1094 	case ATA_CMD_STANDBYNOW1:
1095 		*timeout = 120000;  /* 2 minutes */
1096 		break;
1097 	case 0xF7:
1098 	case 0xFA:
1099 		*timeout = 60000;  /* 60 seconds */
1100 		break;
1101 	case ATA_CMD_SMART:
1102 		*timeout = 15000;  /* 15 seconds */
1103 		break;
1104 	default:
1105 		*timeout = MTIP_IOCTL_CMD_TIMEOUT_MS;
1106 		break;
1107 	}
1108 }
1109 
1110 /*
1111  * Request the device identity information.
1112  *
1113  * If a user space buffer is not specified, i.e. is NULL, the
1114  * identify information is still read from the drive and placed
1115  * into the identify data buffer (@e port->identify) in the
1116  * port data structure.
1117  * When the identify buffer contains valid identify information @e
1118  * port->identify_valid is non-zero.
1119  *
1120  * @port	 Pointer to the port structure.
1121  * @user_buffer  A user space buffer where the identify data should be
1122  *                    copied.
1123  *
1124  * return value
1125  *	0	Command completed successfully.
1126  *	-EFAULT An error occurred while coping data to the user buffer.
1127  *	-1	Command failed.
1128  */
1129 static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer)
1130 {
1131 	int rv = 0;
1132 	struct host_to_dev_fis fis;
1133 
1134 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1135 		return -EFAULT;
1136 
1137 	/* Build the FIS. */
1138 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1139 	fis.type	= 0x27;
1140 	fis.opts	= 1 << 7;
1141 	fis.command	= ATA_CMD_ID_ATA;
1142 
1143 	/* Set the identify information as invalid. */
1144 	port->identify_valid = 0;
1145 
1146 	/* Clear the identify information. */
1147 	memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS);
1148 
1149 	/* Execute the command. */
1150 	if (mtip_exec_internal_command(port,
1151 				&fis,
1152 				5,
1153 				port->identify_dma,
1154 				sizeof(u16) * ATA_ID_WORDS,
1155 				0,
1156 				MTIP_INT_CMD_TIMEOUT_MS)
1157 				< 0) {
1158 		rv = -1;
1159 		goto out;
1160 	}
1161 
1162 	/*
1163 	 * Perform any necessary byte-swapping.  Yes, the kernel does in fact
1164 	 * perform field-sensitive swapping on the string fields.
1165 	 * See the kernel use of ata_id_string() for proof of this.
1166 	 */
1167 #ifdef __LITTLE_ENDIAN
1168 	ata_swap_string(port->identify + 27, 40);  /* model string*/
1169 	ata_swap_string(port->identify + 23, 8);   /* firmware string*/
1170 	ata_swap_string(port->identify + 10, 20);  /* serial# string*/
1171 #else
1172 	{
1173 		int i;
1174 		for (i = 0; i < ATA_ID_WORDS; i++)
1175 			port->identify[i] = le16_to_cpu(port->identify[i]);
1176 	}
1177 #endif
1178 
1179 	/* Check security locked state */
1180 	if (port->identify[128] & 0x4)
1181 		set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1182 	else
1183 		clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1184 
1185 	/* Set the identify buffer as valid. */
1186 	port->identify_valid = 1;
1187 
1188 	if (user_buffer) {
1189 		if (copy_to_user(
1190 			user_buffer,
1191 			port->identify,
1192 			ATA_ID_WORDS * sizeof(u16))) {
1193 			rv = -EFAULT;
1194 			goto out;
1195 		}
1196 	}
1197 
1198 out:
1199 	return rv;
1200 }
1201 
1202 /*
1203  * Issue a standby immediate command to the device.
1204  *
1205  * @port Pointer to the port structure.
1206  *
1207  * return value
1208  *	0	Command was executed successfully.
1209  *	-1	An error occurred while executing the command.
1210  */
1211 static int mtip_standby_immediate(struct mtip_port *port)
1212 {
1213 	int rv;
1214 	struct host_to_dev_fis	fis;
1215 	unsigned long start;
1216 	unsigned int timeout;
1217 
1218 	/* Build the FIS. */
1219 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1220 	fis.type	= 0x27;
1221 	fis.opts	= 1 << 7;
1222 	fis.command	= ATA_CMD_STANDBYNOW1;
1223 
1224 	mtip_set_timeout(port->dd, &fis, &timeout, 0);
1225 
1226 	start = jiffies;
1227 	rv = mtip_exec_internal_command(port,
1228 					&fis,
1229 					5,
1230 					0,
1231 					0,
1232 					0,
1233 					timeout);
1234 	dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n",
1235 			jiffies_to_msecs(jiffies - start));
1236 	if (rv)
1237 		dev_warn(&port->dd->pdev->dev,
1238 			"STANDBY IMMEDIATE command failed.\n");
1239 
1240 	return rv;
1241 }
1242 
1243 /*
1244  * Issue a READ LOG EXT command to the device.
1245  *
1246  * @port	pointer to the port structure.
1247  * @page	page number to fetch
1248  * @buffer	pointer to buffer
1249  * @buffer_dma	dma address corresponding to @buffer
1250  * @sectors	page length to fetch, in sectors
1251  *
1252  * return value
1253  *	@rv	return value from mtip_exec_internal_command()
1254  */
1255 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
1256 				dma_addr_t buffer_dma, unsigned int sectors)
1257 {
1258 	struct host_to_dev_fis fis;
1259 
1260 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1261 	fis.type	= 0x27;
1262 	fis.opts	= 1 << 7;
1263 	fis.command	= ATA_CMD_READ_LOG_EXT;
1264 	fis.sect_count	= sectors & 0xFF;
1265 	fis.sect_cnt_ex	= (sectors >> 8) & 0xFF;
1266 	fis.lba_low	= page;
1267 	fis.lba_mid	= 0;
1268 	fis.device	= ATA_DEVICE_OBS;
1269 
1270 	memset(buffer, 0, sectors * ATA_SECT_SIZE);
1271 
1272 	return mtip_exec_internal_command(port,
1273 					&fis,
1274 					5,
1275 					buffer_dma,
1276 					sectors * ATA_SECT_SIZE,
1277 					0,
1278 					MTIP_INT_CMD_TIMEOUT_MS);
1279 }
1280 
1281 /*
1282  * Issue a SMART READ DATA command to the device.
1283  *
1284  * @port	pointer to the port structure.
1285  * @buffer	pointer to buffer
1286  * @buffer_dma	dma address corresponding to @buffer
1287  *
1288  * return value
1289  *	@rv	return value from mtip_exec_internal_command()
1290  */
1291 static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer,
1292 					dma_addr_t buffer_dma)
1293 {
1294 	struct host_to_dev_fis fis;
1295 
1296 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1297 	fis.type	= 0x27;
1298 	fis.opts	= 1 << 7;
1299 	fis.command	= ATA_CMD_SMART;
1300 	fis.features	= 0xD0;
1301 	fis.sect_count	= 1;
1302 	fis.lba_mid	= 0x4F;
1303 	fis.lba_hi	= 0xC2;
1304 	fis.device	= ATA_DEVICE_OBS;
1305 
1306 	return mtip_exec_internal_command(port,
1307 					&fis,
1308 					5,
1309 					buffer_dma,
1310 					ATA_SECT_SIZE,
1311 					0,
1312 					15000);
1313 }
1314 
1315 /*
1316  * Get the value of a smart attribute
1317  *
1318  * @port	pointer to the port structure
1319  * @id		attribute number
1320  * @attrib	pointer to return attrib information corresponding to @id
1321  *
1322  * return value
1323  *	-EINVAL	NULL buffer passed or unsupported attribute @id.
1324  *	-EPERM	Identify data not valid, SMART not supported or not enabled
1325  */
1326 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
1327 						struct smart_attr *attrib)
1328 {
1329 	int rv, i;
1330 	struct smart_attr *pattr;
1331 
1332 	if (!attrib)
1333 		return -EINVAL;
1334 
1335 	if (!port->identify_valid) {
1336 		dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n");
1337 		return -EPERM;
1338 	}
1339 	if (!(port->identify[82] & 0x1)) {
1340 		dev_warn(&port->dd->pdev->dev, "SMART not supported\n");
1341 		return -EPERM;
1342 	}
1343 	if (!(port->identify[85] & 0x1)) {
1344 		dev_warn(&port->dd->pdev->dev, "SMART not enabled\n");
1345 		return -EPERM;
1346 	}
1347 
1348 	memset(port->smart_buf, 0, ATA_SECT_SIZE);
1349 	rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma);
1350 	if (rv) {
1351 		dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n");
1352 		return rv;
1353 	}
1354 
1355 	pattr = (struct smart_attr *)(port->smart_buf + 2);
1356 	for (i = 0; i < 29; i++, pattr++)
1357 		if (pattr->attr_id == id) {
1358 			memcpy(attrib, pattr, sizeof(struct smart_attr));
1359 			break;
1360 		}
1361 
1362 	if (i == 29) {
1363 		dev_warn(&port->dd->pdev->dev,
1364 			"Query for invalid SMART attribute ID\n");
1365 		rv = -EINVAL;
1366 	}
1367 
1368 	return rv;
1369 }
1370 
1371 /*
1372  * Get the drive capacity.
1373  *
1374  * @dd      Pointer to the device data structure.
1375  * @sectors Pointer to the variable that will receive the sector count.
1376  *
1377  * return value
1378  *	1 Capacity was returned successfully.
1379  *	0 The identify information is invalid.
1380  */
1381 static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors)
1382 {
1383 	struct mtip_port *port = dd->port;
1384 	u64 total, raw0, raw1, raw2, raw3;
1385 	raw0 = port->identify[100];
1386 	raw1 = port->identify[101];
1387 	raw2 = port->identify[102];
1388 	raw3 = port->identify[103];
1389 	total = raw0 | raw1<<16 | raw2<<32 | raw3<<48;
1390 	*sectors = total;
1391 	return (bool) !!port->identify_valid;
1392 }
1393 
1394 /*
1395  * Display the identify command data.
1396  *
1397  * @port Pointer to the port data structure.
1398  *
1399  * return value
1400  *	None
1401  */
1402 static void mtip_dump_identify(struct mtip_port *port)
1403 {
1404 	sector_t sectors;
1405 	unsigned short revid;
1406 	char cbuf[42];
1407 
1408 	if (!port->identify_valid)
1409 		return;
1410 
1411 	strlcpy(cbuf, (char *)(port->identify+10), 21);
1412 	dev_info(&port->dd->pdev->dev,
1413 		"Serial No.: %s\n", cbuf);
1414 
1415 	strlcpy(cbuf, (char *)(port->identify+23), 9);
1416 	dev_info(&port->dd->pdev->dev,
1417 		"Firmware Ver.: %s\n", cbuf);
1418 
1419 	strlcpy(cbuf, (char *)(port->identify+27), 41);
1420 	dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf);
1421 
1422 	dev_info(&port->dd->pdev->dev, "Security: %04x %s\n",
1423 		port->identify[128],
1424 		port->identify[128] & 0x4 ? "(LOCKED)" : "");
1425 
1426 	if (mtip_hw_get_capacity(port->dd, &sectors))
1427 		dev_info(&port->dd->pdev->dev,
1428 			"Capacity: %llu sectors (%llu MB)\n",
1429 			 (u64)sectors,
1430 			 ((u64)sectors) * ATA_SECT_SIZE >> 20);
1431 
1432 	pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid);
1433 	switch (revid & 0xFF) {
1434 	case 0x1:
1435 		strlcpy(cbuf, "A0", 3);
1436 		break;
1437 	case 0x3:
1438 		strlcpy(cbuf, "A2", 3);
1439 		break;
1440 	default:
1441 		strlcpy(cbuf, "?", 2);
1442 		break;
1443 	}
1444 	dev_info(&port->dd->pdev->dev,
1445 		"Card Type: %s\n", cbuf);
1446 }
1447 
1448 /*
1449  * Map the commands scatter list into the command table.
1450  *
1451  * @command Pointer to the command.
1452  * @nents Number of scatter list entries.
1453  *
1454  * return value
1455  *	None
1456  */
1457 static inline void fill_command_sg(struct driver_data *dd,
1458 				struct mtip_cmd *command,
1459 				int nents)
1460 {
1461 	int n;
1462 	unsigned int dma_len;
1463 	struct mtip_cmd_sg *command_sg;
1464 	struct scatterlist *sg;
1465 
1466 	command_sg = command->command + AHCI_CMD_TBL_HDR_SZ;
1467 
1468 	for_each_sg(command->sg, sg, nents, n) {
1469 		dma_len = sg_dma_len(sg);
1470 		if (dma_len > 0x400000)
1471 			dev_err(&dd->pdev->dev,
1472 				"DMA segment length truncated\n");
1473 		command_sg->info = cpu_to_le32((dma_len-1) & 0x3FFFFF);
1474 		command_sg->dba	=  cpu_to_le32(sg_dma_address(sg));
1475 		command_sg->dba_upper =
1476 			cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
1477 		command_sg++;
1478 	}
1479 }
1480 
1481 /*
1482  * @brief Execute a drive command.
1483  *
1484  * return value 0 The command completed successfully.
1485  * return value -1 An error occurred while executing the command.
1486  */
1487 static int exec_drive_task(struct mtip_port *port, u8 *command)
1488 {
1489 	struct host_to_dev_fis	fis;
1490 	struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
1491 	unsigned int to;
1492 
1493 	/* Build the FIS. */
1494 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1495 	fis.type	= 0x27;
1496 	fis.opts	= 1 << 7;
1497 	fis.command	= command[0];
1498 	fis.features	= command[1];
1499 	fis.sect_count	= command[2];
1500 	fis.sector	= command[3];
1501 	fis.cyl_low	= command[4];
1502 	fis.cyl_hi	= command[5];
1503 	fis.device	= command[6] & ~0x10; /* Clear the dev bit*/
1504 
1505 	mtip_set_timeout(port->dd, &fis, &to, 0);
1506 
1507 	dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n",
1508 		__func__,
1509 		command[0],
1510 		command[1],
1511 		command[2],
1512 		command[3],
1513 		command[4],
1514 		command[5],
1515 		command[6]);
1516 
1517 	/* Execute the command. */
1518 	if (mtip_exec_internal_command(port,
1519 				 &fis,
1520 				 5,
1521 				 0,
1522 				 0,
1523 				 0,
1524 				 to) < 0) {
1525 		return -1;
1526 	}
1527 
1528 	command[0] = reply->command; /* Status*/
1529 	command[1] = reply->features; /* Error*/
1530 	command[4] = reply->cyl_low;
1531 	command[5] = reply->cyl_hi;
1532 
1533 	dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n",
1534 		__func__,
1535 		command[0],
1536 		command[1],
1537 		command[4],
1538 		command[5]);
1539 
1540 	return 0;
1541 }
1542 
1543 /*
1544  * @brief Execute a drive command.
1545  *
1546  * @param port Pointer to the port data structure.
1547  * @param command Pointer to the user specified command parameters.
1548  * @param user_buffer Pointer to the user space buffer where read sector
1549  *                   data should be copied.
1550  *
1551  * return value 0 The command completed successfully.
1552  * return value -EFAULT An error occurred while copying the completion
1553  *                 data to the user space buffer.
1554  * return value -1 An error occurred while executing the command.
1555  */
1556 static int exec_drive_command(struct mtip_port *port, u8 *command,
1557 				void __user *user_buffer)
1558 {
1559 	struct host_to_dev_fis	fis;
1560 	struct host_to_dev_fis *reply;
1561 	u8 *buf = NULL;
1562 	dma_addr_t dma_addr = 0;
1563 	int rv = 0, xfer_sz = command[3];
1564 	unsigned int to;
1565 
1566 	if (xfer_sz) {
1567 		if (!user_buffer)
1568 			return -EFAULT;
1569 
1570 		buf = dma_alloc_coherent(&port->dd->pdev->dev,
1571 				ATA_SECT_SIZE * xfer_sz,
1572 				&dma_addr,
1573 				GFP_KERNEL);
1574 		if (!buf) {
1575 			dev_err(&port->dd->pdev->dev,
1576 				"Memory allocation failed (%d bytes)\n",
1577 				ATA_SECT_SIZE * xfer_sz);
1578 			return -ENOMEM;
1579 		}
1580 		memset(buf, 0, ATA_SECT_SIZE * xfer_sz);
1581 	}
1582 
1583 	/* Build the FIS. */
1584 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1585 	fis.type	= 0x27;
1586 	fis.opts	= 1 << 7;
1587 	fis.command	= command[0];
1588 	fis.features	= command[2];
1589 	fis.sect_count	= command[3];
1590 	if (fis.command == ATA_CMD_SMART) {
1591 		fis.sector	= command[1];
1592 		fis.cyl_low	= 0x4F;
1593 		fis.cyl_hi	= 0xC2;
1594 	}
1595 
1596 	mtip_set_timeout(port->dd, &fis, &to, 0);
1597 
1598 	if (xfer_sz)
1599 		reply = (port->rxfis + RX_FIS_PIO_SETUP);
1600 	else
1601 		reply = (port->rxfis + RX_FIS_D2H_REG);
1602 
1603 	dbg_printk(MTIP_DRV_NAME
1604 		" %s: User Command: cmd %x, sect %x, "
1605 		"feat %x, sectcnt %x\n",
1606 		__func__,
1607 		command[0],
1608 		command[1],
1609 		command[2],
1610 		command[3]);
1611 
1612 	/* Execute the command. */
1613 	if (mtip_exec_internal_command(port,
1614 				&fis,
1615 				 5,
1616 				 (xfer_sz ? dma_addr : 0),
1617 				 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0),
1618 				 0,
1619 				 to)
1620 				 < 0) {
1621 		rv = -EFAULT;
1622 		goto exit_drive_command;
1623 	}
1624 
1625 	/* Collect the completion status. */
1626 	command[0] = reply->command; /* Status*/
1627 	command[1] = reply->features; /* Error*/
1628 	command[2] = reply->sect_count;
1629 
1630 	dbg_printk(MTIP_DRV_NAME
1631 		" %s: Completion Status: stat %x, "
1632 		"err %x, nsect %x\n",
1633 		__func__,
1634 		command[0],
1635 		command[1],
1636 		command[2]);
1637 
1638 	if (xfer_sz) {
1639 		if (copy_to_user(user_buffer,
1640 				 buf,
1641 				 ATA_SECT_SIZE * command[3])) {
1642 			rv = -EFAULT;
1643 			goto exit_drive_command;
1644 		}
1645 	}
1646 exit_drive_command:
1647 	if (buf)
1648 		dma_free_coherent(&port->dd->pdev->dev,
1649 				ATA_SECT_SIZE * xfer_sz, buf, dma_addr);
1650 	return rv;
1651 }
1652 
1653 /*
1654  *  Indicates whether a command has a single sector payload.
1655  *
1656  *  @command passed to the device to perform the certain event.
1657  *  @features passed to the device to perform the certain event.
1658  *
1659  *  return value
1660  *	1	command is one that always has a single sector payload,
1661  *		regardless of the value in the Sector Count field.
1662  *      0       otherwise
1663  *
1664  */
1665 static unsigned int implicit_sector(unsigned char command,
1666 				    unsigned char features)
1667 {
1668 	unsigned int rv = 0;
1669 
1670 	/* list of commands that have an implicit sector count of 1 */
1671 	switch (command) {
1672 	case ATA_CMD_SEC_SET_PASS:
1673 	case ATA_CMD_SEC_UNLOCK:
1674 	case ATA_CMD_SEC_ERASE_PREP:
1675 	case ATA_CMD_SEC_ERASE_UNIT:
1676 	case ATA_CMD_SEC_FREEZE_LOCK:
1677 	case ATA_CMD_SEC_DISABLE_PASS:
1678 	case ATA_CMD_PMP_READ:
1679 	case ATA_CMD_PMP_WRITE:
1680 		rv = 1;
1681 		break;
1682 	case ATA_CMD_SET_MAX:
1683 		if (features == ATA_SET_MAX_UNLOCK)
1684 			rv = 1;
1685 		break;
1686 	case ATA_CMD_SMART:
1687 		if ((features == ATA_SMART_READ_VALUES) ||
1688 				(features == ATA_SMART_READ_THRESHOLDS))
1689 			rv = 1;
1690 		break;
1691 	case ATA_CMD_CONF_OVERLAY:
1692 		if ((features == ATA_DCO_IDENTIFY) ||
1693 				(features == ATA_DCO_SET))
1694 			rv = 1;
1695 		break;
1696 	}
1697 	return rv;
1698 }
1699 
1700 /*
1701  * Executes a taskfile
1702  * See ide_taskfile_ioctl() for derivation
1703  */
1704 static int exec_drive_taskfile(struct driver_data *dd,
1705 			       void __user *buf,
1706 			       ide_task_request_t *req_task,
1707 			       int outtotal)
1708 {
1709 	struct host_to_dev_fis	fis;
1710 	struct host_to_dev_fis *reply;
1711 	u8 *outbuf = NULL;
1712 	u8 *inbuf = NULL;
1713 	dma_addr_t outbuf_dma = 0;
1714 	dma_addr_t inbuf_dma = 0;
1715 	dma_addr_t dma_buffer = 0;
1716 	int err = 0;
1717 	unsigned int taskin = 0;
1718 	unsigned int taskout = 0;
1719 	u8 nsect = 0;
1720 	unsigned int timeout;
1721 	unsigned int force_single_sector;
1722 	unsigned int transfer_size;
1723 	unsigned long task_file_data;
1724 	int intotal = outtotal + req_task->out_size;
1725 	int erasemode = 0;
1726 
1727 	taskout = req_task->out_size;
1728 	taskin = req_task->in_size;
1729 	/* 130560 = 512 * 0xFF*/
1730 	if (taskin > 130560 || taskout > 130560)
1731 		return -EINVAL;
1732 
1733 	if (taskout) {
1734 		outbuf = memdup_user(buf + outtotal, taskout);
1735 		if (IS_ERR(outbuf))
1736 			return PTR_ERR(outbuf);
1737 
1738 		outbuf_dma = dma_map_single(&dd->pdev->dev, outbuf,
1739 					    taskout, DMA_TO_DEVICE);
1740 		if (dma_mapping_error(&dd->pdev->dev, outbuf_dma)) {
1741 			err = -ENOMEM;
1742 			goto abort;
1743 		}
1744 		dma_buffer = outbuf_dma;
1745 	}
1746 
1747 	if (taskin) {
1748 		inbuf = memdup_user(buf + intotal, taskin);
1749 		if (IS_ERR(inbuf)) {
1750 			err = PTR_ERR(inbuf);
1751 			inbuf = NULL;
1752 			goto abort;
1753 		}
1754 		inbuf_dma = dma_map_single(&dd->pdev->dev, inbuf,
1755 					   taskin, DMA_FROM_DEVICE);
1756 		if (dma_mapping_error(&dd->pdev->dev, inbuf_dma)) {
1757 			err = -ENOMEM;
1758 			goto abort;
1759 		}
1760 		dma_buffer = inbuf_dma;
1761 	}
1762 
1763 	/* only supports PIO and non-data commands from this ioctl. */
1764 	switch (req_task->data_phase) {
1765 	case TASKFILE_OUT:
1766 		nsect = taskout / ATA_SECT_SIZE;
1767 		reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
1768 		break;
1769 	case TASKFILE_IN:
1770 		reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
1771 		break;
1772 	case TASKFILE_NO_DATA:
1773 		reply = (dd->port->rxfis + RX_FIS_D2H_REG);
1774 		break;
1775 	default:
1776 		err = -EINVAL;
1777 		goto abort;
1778 	}
1779 
1780 	/* Build the FIS. */
1781 	memset(&fis, 0, sizeof(struct host_to_dev_fis));
1782 
1783 	fis.type	= 0x27;
1784 	fis.opts	= 1 << 7;
1785 	fis.command	= req_task->io_ports[7];
1786 	fis.features	= req_task->io_ports[1];
1787 	fis.sect_count	= req_task->io_ports[2];
1788 	fis.lba_low	= req_task->io_ports[3];
1789 	fis.lba_mid	= req_task->io_ports[4];
1790 	fis.lba_hi	= req_task->io_ports[5];
1791 	 /* Clear the dev bit*/
1792 	fis.device	= req_task->io_ports[6] & ~0x10;
1793 
1794 	if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) {
1795 		req_task->in_flags.all	=
1796 			IDE_TASKFILE_STD_IN_FLAGS |
1797 			(IDE_HOB_STD_IN_FLAGS << 8);
1798 		fis.lba_low_ex		= req_task->hob_ports[3];
1799 		fis.lba_mid_ex		= req_task->hob_ports[4];
1800 		fis.lba_hi_ex		= req_task->hob_ports[5];
1801 		fis.features_ex		= req_task->hob_ports[1];
1802 		fis.sect_cnt_ex		= req_task->hob_ports[2];
1803 
1804 	} else {
1805 		req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS;
1806 	}
1807 
1808 	force_single_sector = implicit_sector(fis.command, fis.features);
1809 
1810 	if ((taskin || taskout) && (!fis.sect_count)) {
1811 		if (nsect)
1812 			fis.sect_count = nsect;
1813 		else {
1814 			if (!force_single_sector) {
1815 				dev_warn(&dd->pdev->dev,
1816 					"data movement but "
1817 					"sect_count is 0\n");
1818 				err = -EINVAL;
1819 				goto abort;
1820 			}
1821 		}
1822 	}
1823 
1824 	dbg_printk(MTIP_DRV_NAME
1825 		" %s: cmd %x, feat %x, nsect %x,"
1826 		" sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x,"
1827 		" head/dev %x\n",
1828 		__func__,
1829 		fis.command,
1830 		fis.features,
1831 		fis.sect_count,
1832 		fis.lba_low,
1833 		fis.lba_mid,
1834 		fis.lba_hi,
1835 		fis.device);
1836 
1837 	/* check for erase mode support during secure erase.*/
1838 	if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf &&
1839 					(outbuf[0] & MTIP_SEC_ERASE_MODE)) {
1840 		erasemode = 1;
1841 	}
1842 
1843 	mtip_set_timeout(dd, &fis, &timeout, erasemode);
1844 
1845 	/* Determine the correct transfer size.*/
1846 	if (force_single_sector)
1847 		transfer_size = ATA_SECT_SIZE;
1848 	else
1849 		transfer_size = ATA_SECT_SIZE * fis.sect_count;
1850 
1851 	/* Execute the command.*/
1852 	if (mtip_exec_internal_command(dd->port,
1853 				 &fis,
1854 				 5,
1855 				 dma_buffer,
1856 				 transfer_size,
1857 				 0,
1858 				 timeout) < 0) {
1859 		err = -EIO;
1860 		goto abort;
1861 	}
1862 
1863 	task_file_data = readl(dd->port->mmio+PORT_TFDATA);
1864 
1865 	if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) {
1866 		reply = dd->port->rxfis + RX_FIS_PIO_SETUP;
1867 		req_task->io_ports[7] = reply->control;
1868 	} else {
1869 		reply = dd->port->rxfis + RX_FIS_D2H_REG;
1870 		req_task->io_ports[7] = reply->command;
1871 	}
1872 
1873 	/* reclaim the DMA buffers.*/
1874 	if (inbuf_dma)
1875 		dma_unmap_single(&dd->pdev->dev, inbuf_dma, taskin,
1876 				 DMA_FROM_DEVICE);
1877 	if (outbuf_dma)
1878 		dma_unmap_single(&dd->pdev->dev, outbuf_dma, taskout,
1879 				 DMA_TO_DEVICE);
1880 	inbuf_dma  = 0;
1881 	outbuf_dma = 0;
1882 
1883 	/* return the ATA registers to the caller.*/
1884 	req_task->io_ports[1] = reply->features;
1885 	req_task->io_ports[2] = reply->sect_count;
1886 	req_task->io_ports[3] = reply->lba_low;
1887 	req_task->io_ports[4] = reply->lba_mid;
1888 	req_task->io_ports[5] = reply->lba_hi;
1889 	req_task->io_ports[6] = reply->device;
1890 
1891 	if (req_task->out_flags.all & 1)  {
1892 
1893 		req_task->hob_ports[3] = reply->lba_low_ex;
1894 		req_task->hob_ports[4] = reply->lba_mid_ex;
1895 		req_task->hob_ports[5] = reply->lba_hi_ex;
1896 		req_task->hob_ports[1] = reply->features_ex;
1897 		req_task->hob_ports[2] = reply->sect_cnt_ex;
1898 	}
1899 	dbg_printk(MTIP_DRV_NAME
1900 		" %s: Completion: stat %x,"
1901 		"err %x, sect_cnt %x, lbalo %x,"
1902 		"lbamid %x, lbahi %x, dev %x\n",
1903 		__func__,
1904 		req_task->io_ports[7],
1905 		req_task->io_ports[1],
1906 		req_task->io_ports[2],
1907 		req_task->io_ports[3],
1908 		req_task->io_ports[4],
1909 		req_task->io_ports[5],
1910 		req_task->io_ports[6]);
1911 
1912 	if (taskout) {
1913 		if (copy_to_user(buf + outtotal, outbuf, taskout)) {
1914 			err = -EFAULT;
1915 			goto abort;
1916 		}
1917 	}
1918 	if (taskin) {
1919 		if (copy_to_user(buf + intotal, inbuf, taskin)) {
1920 			err = -EFAULT;
1921 			goto abort;
1922 		}
1923 	}
1924 abort:
1925 	if (inbuf_dma)
1926 		dma_unmap_single(&dd->pdev->dev, inbuf_dma, taskin,
1927 				 DMA_FROM_DEVICE);
1928 	if (outbuf_dma)
1929 		dma_unmap_single(&dd->pdev->dev, outbuf_dma, taskout,
1930 				 DMA_TO_DEVICE);
1931 	kfree(outbuf);
1932 	kfree(inbuf);
1933 
1934 	return err;
1935 }
1936 
1937 /*
1938  * Handle IOCTL calls from the Block Layer.
1939  *
1940  * This function is called by the Block Layer when it receives an IOCTL
1941  * command that it does not understand. If the IOCTL command is not supported
1942  * this function returns -ENOTTY.
1943  *
1944  * @dd  Pointer to the driver data structure.
1945  * @cmd IOCTL command passed from the Block Layer.
1946  * @arg IOCTL argument passed from the Block Layer.
1947  *
1948  * return value
1949  *	0	The IOCTL completed successfully.
1950  *	-ENOTTY The specified command is not supported.
1951  *	-EFAULT An error occurred copying data to a user space buffer.
1952  *	-EIO	An error occurred while executing the command.
1953  */
1954 static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd,
1955 			 unsigned long arg)
1956 {
1957 	switch (cmd) {
1958 	case HDIO_GET_IDENTITY:
1959 	{
1960 		if (copy_to_user((void __user *)arg, dd->port->identify,
1961 						sizeof(u16) * ATA_ID_WORDS))
1962 			return -EFAULT;
1963 		break;
1964 	}
1965 	case HDIO_DRIVE_CMD:
1966 	{
1967 		u8 drive_command[4];
1968 
1969 		/* Copy the user command info to our buffer. */
1970 		if (copy_from_user(drive_command,
1971 					 (void __user *) arg,
1972 					 sizeof(drive_command)))
1973 			return -EFAULT;
1974 
1975 		/* Execute the drive command. */
1976 		if (exec_drive_command(dd->port,
1977 					 drive_command,
1978 					 (void __user *) (arg+4)))
1979 			return -EIO;
1980 
1981 		/* Copy the status back to the users buffer. */
1982 		if (copy_to_user((void __user *) arg,
1983 					 drive_command,
1984 					 sizeof(drive_command)))
1985 			return -EFAULT;
1986 
1987 		break;
1988 	}
1989 	case HDIO_DRIVE_TASK:
1990 	{
1991 		u8 drive_command[7];
1992 
1993 		/* Copy the user command info to our buffer. */
1994 		if (copy_from_user(drive_command,
1995 					 (void __user *) arg,
1996 					 sizeof(drive_command)))
1997 			return -EFAULT;
1998 
1999 		/* Execute the drive command. */
2000 		if (exec_drive_task(dd->port, drive_command))
2001 			return -EIO;
2002 
2003 		/* Copy the status back to the users buffer. */
2004 		if (copy_to_user((void __user *) arg,
2005 					 drive_command,
2006 					 sizeof(drive_command)))
2007 			return -EFAULT;
2008 
2009 		break;
2010 	}
2011 	case HDIO_DRIVE_TASKFILE: {
2012 		ide_task_request_t req_task;
2013 		int ret, outtotal;
2014 
2015 		if (copy_from_user(&req_task, (void __user *) arg,
2016 					sizeof(req_task)))
2017 			return -EFAULT;
2018 
2019 		outtotal = sizeof(req_task);
2020 
2021 		ret = exec_drive_taskfile(dd, (void __user *) arg,
2022 						&req_task, outtotal);
2023 
2024 		if (copy_to_user((void __user *) arg, &req_task,
2025 							sizeof(req_task)))
2026 			return -EFAULT;
2027 
2028 		return ret;
2029 	}
2030 
2031 	default:
2032 		return -EINVAL;
2033 	}
2034 	return 0;
2035 }
2036 
2037 /*
2038  * Submit an IO to the hw
2039  *
2040  * This function is called by the block layer to issue an io
2041  * to the device. Upon completion, the callback function will
2042  * be called with the data parameter passed as the callback data.
2043  *
2044  * @dd       Pointer to the driver data structure.
2045  * @start    First sector to read.
2046  * @nsect    Number of sectors to read.
2047  * @tag      The tag of this read command.
2048  * @callback Pointer to the function that should be called
2049  *	     when the read completes.
2050  * @data     Callback data passed to the callback function
2051  *	     when the read completes.
2052  * @dir      Direction (read or write)
2053  *
2054  * return value
2055  *	None
2056  */
2057 static void mtip_hw_submit_io(struct driver_data *dd, struct request *rq,
2058 			      struct mtip_cmd *command,
2059 			      struct blk_mq_hw_ctx *hctx)
2060 {
2061 	struct mtip_cmd_hdr *hdr =
2062 		dd->port->command_list + sizeof(struct mtip_cmd_hdr) * rq->tag;
2063 	struct host_to_dev_fis	*fis;
2064 	struct mtip_port *port = dd->port;
2065 	int dma_dir = rq_data_dir(rq) == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
2066 	u64 start = blk_rq_pos(rq);
2067 	unsigned int nsect = blk_rq_sectors(rq);
2068 	unsigned int nents;
2069 
2070 	/* Map the scatter list for DMA access */
2071 	nents = blk_rq_map_sg(hctx->queue, rq, command->sg);
2072 	nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir);
2073 
2074 	prefetch(&port->flags);
2075 
2076 	command->scatter_ents = nents;
2077 
2078 	/*
2079 	 * The number of retries for this command before it is
2080 	 * reported as a failure to the upper layers.
2081 	 */
2082 	command->retries = MTIP_MAX_RETRIES;
2083 
2084 	/* Fill out fis */
2085 	fis = command->command;
2086 	fis->type        = 0x27;
2087 	fis->opts        = 1 << 7;
2088 	if (dma_dir == DMA_FROM_DEVICE)
2089 		fis->command = ATA_CMD_FPDMA_READ;
2090 	else
2091 		fis->command = ATA_CMD_FPDMA_WRITE;
2092 	fis->lba_low     = start & 0xFF;
2093 	fis->lba_mid     = (start >> 8) & 0xFF;
2094 	fis->lba_hi      = (start >> 16) & 0xFF;
2095 	fis->lba_low_ex  = (start >> 24) & 0xFF;
2096 	fis->lba_mid_ex  = (start >> 32) & 0xFF;
2097 	fis->lba_hi_ex   = (start >> 40) & 0xFF;
2098 	fis->device	 = 1 << 6;
2099 	fis->features    = nsect & 0xFF;
2100 	fis->features_ex = (nsect >> 8) & 0xFF;
2101 	fis->sect_count  = ((rq->tag << 3) | (rq->tag >> 5));
2102 	fis->sect_cnt_ex = 0;
2103 	fis->control     = 0;
2104 	fis->res2        = 0;
2105 	fis->res3        = 0;
2106 	fill_command_sg(dd, command, nents);
2107 
2108 	if (unlikely(command->unaligned))
2109 		fis->device |= 1 << 7;
2110 
2111 	/* Populate the command header */
2112 	hdr->ctba = cpu_to_le32(command->command_dma & 0xFFFFFFFF);
2113 	if (test_bit(MTIP_PF_HOST_CAP_64, &dd->port->flags))
2114 		hdr->ctbau = cpu_to_le32((command->command_dma >> 16) >> 16);
2115 	hdr->opts = cpu_to_le32((nents << 16) | 5 | AHCI_CMD_PREFETCH);
2116 	hdr->byte_count = 0;
2117 
2118 	command->direction = dma_dir;
2119 
2120 	/*
2121 	 * To prevent this command from being issued
2122 	 * if an internal command is in progress or error handling is active.
2123 	 */
2124 	if (unlikely(port->flags & MTIP_PF_PAUSE_IO)) {
2125 		set_bit(rq->tag, port->cmds_to_issue);
2126 		set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2127 		return;
2128 	}
2129 
2130 	/* Issue the command to the hardware */
2131 	mtip_issue_ncq_command(port, rq->tag);
2132 }
2133 
2134 /*
2135  * Sysfs status dump.
2136  *
2137  * @dev  Pointer to the device structure, passed by the kernrel.
2138  * @attr Pointer to the device_attribute structure passed by the kernel.
2139  * @buf  Pointer to the char buffer that will receive the stats info.
2140  *
2141  * return value
2142  *	The size, in bytes, of the data copied into buf.
2143  */
2144 static ssize_t mtip_hw_show_status(struct device *dev,
2145 				struct device_attribute *attr,
2146 				char *buf)
2147 {
2148 	struct driver_data *dd = dev_to_disk(dev)->private_data;
2149 	int size = 0;
2150 
2151 	if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
2152 		size += sprintf(buf, "%s", "thermal_shutdown\n");
2153 	else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
2154 		size += sprintf(buf, "%s", "write_protect\n");
2155 	else
2156 		size += sprintf(buf, "%s", "online\n");
2157 
2158 	return size;
2159 }
2160 
2161 static DEVICE_ATTR(status, 0444, mtip_hw_show_status, NULL);
2162 
2163 /* debugsfs entries */
2164 
2165 static ssize_t show_device_status(struct device_driver *drv, char *buf)
2166 {
2167 	int size = 0;
2168 	struct driver_data *dd, *tmp;
2169 	unsigned long flags;
2170 	char id_buf[42];
2171 	u16 status = 0;
2172 
2173 	spin_lock_irqsave(&dev_lock, flags);
2174 	size += sprintf(&buf[size], "Devices Present:\n");
2175 	list_for_each_entry_safe(dd, tmp, &online_list, online_list) {
2176 		if (dd->pdev) {
2177 			if (dd->port &&
2178 			    dd->port->identify &&
2179 			    dd->port->identify_valid) {
2180 				strlcpy(id_buf,
2181 					(char *) (dd->port->identify + 10), 21);
2182 				status = *(dd->port->identify + 141);
2183 			} else {
2184 				memset(id_buf, 0, 42);
2185 				status = 0;
2186 			}
2187 
2188 			if (dd->port &&
2189 			    test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2190 				size += sprintf(&buf[size],
2191 					" device %s %s (ftl rebuild %d %%)\n",
2192 					dev_name(&dd->pdev->dev),
2193 					id_buf,
2194 					status);
2195 			} else {
2196 				size += sprintf(&buf[size],
2197 					" device %s %s\n",
2198 					dev_name(&dd->pdev->dev),
2199 					id_buf);
2200 			}
2201 		}
2202 	}
2203 
2204 	size += sprintf(&buf[size], "Devices Being Removed:\n");
2205 	list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) {
2206 		if (dd->pdev) {
2207 			if (dd->port &&
2208 			    dd->port->identify &&
2209 			    dd->port->identify_valid) {
2210 				strlcpy(id_buf,
2211 					(char *) (dd->port->identify+10), 21);
2212 				status = *(dd->port->identify + 141);
2213 			} else {
2214 				memset(id_buf, 0, 42);
2215 				status = 0;
2216 			}
2217 
2218 			if (dd->port &&
2219 			    test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2220 				size += sprintf(&buf[size],
2221 					" device %s %s (ftl rebuild %d %%)\n",
2222 					dev_name(&dd->pdev->dev),
2223 					id_buf,
2224 					status);
2225 			} else {
2226 				size += sprintf(&buf[size],
2227 					" device %s %s\n",
2228 					dev_name(&dd->pdev->dev),
2229 					id_buf);
2230 			}
2231 		}
2232 	}
2233 	spin_unlock_irqrestore(&dev_lock, flags);
2234 
2235 	return size;
2236 }
2237 
2238 static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf,
2239 						size_t len, loff_t *offset)
2240 {
2241 	struct driver_data *dd =  (struct driver_data *)f->private_data;
2242 	int size = *offset;
2243 	char *buf;
2244 	int rv = 0;
2245 
2246 	if (!len || *offset)
2247 		return 0;
2248 
2249 	buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2250 	if (!buf) {
2251 		dev_err(&dd->pdev->dev,
2252 			"Memory allocation: status buffer\n");
2253 		return -ENOMEM;
2254 	}
2255 
2256 	size += show_device_status(NULL, buf);
2257 
2258 	*offset = size <= len ? size : len;
2259 	size = copy_to_user(ubuf, buf, *offset);
2260 	if (size)
2261 		rv = -EFAULT;
2262 
2263 	kfree(buf);
2264 	return rv ? rv : *offset;
2265 }
2266 
2267 static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf,
2268 				  size_t len, loff_t *offset)
2269 {
2270 	struct driver_data *dd =  (struct driver_data *)f->private_data;
2271 	char *buf;
2272 	u32 group_allocated;
2273 	int size = *offset;
2274 	int n, rv = 0;
2275 
2276 	if (!len || size)
2277 		return 0;
2278 
2279 	buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2280 	if (!buf) {
2281 		dev_err(&dd->pdev->dev,
2282 			"Memory allocation: register buffer\n");
2283 		return -ENOMEM;
2284 	}
2285 
2286 	size += sprintf(&buf[size], "H/ S ACTive      : [ 0x");
2287 
2288 	for (n = dd->slot_groups-1; n >= 0; n--)
2289 		size += sprintf(&buf[size], "%08X ",
2290 					 readl(dd->port->s_active[n]));
2291 
2292 	size += sprintf(&buf[size], "]\n");
2293 	size += sprintf(&buf[size], "H/ Command Issue : [ 0x");
2294 
2295 	for (n = dd->slot_groups-1; n >= 0; n--)
2296 		size += sprintf(&buf[size], "%08X ",
2297 					readl(dd->port->cmd_issue[n]));
2298 
2299 	size += sprintf(&buf[size], "]\n");
2300 	size += sprintf(&buf[size], "H/ Completed     : [ 0x");
2301 
2302 	for (n = dd->slot_groups-1; n >= 0; n--)
2303 		size += sprintf(&buf[size], "%08X ",
2304 				readl(dd->port->completed[n]));
2305 
2306 	size += sprintf(&buf[size], "]\n");
2307 	size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n",
2308 				readl(dd->port->mmio + PORT_IRQ_STAT));
2309 	size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n",
2310 				readl(dd->mmio + HOST_IRQ_STAT));
2311 	size += sprintf(&buf[size], "\n");
2312 
2313 	size += sprintf(&buf[size], "L/ Commands in Q : [ 0x");
2314 
2315 	for (n = dd->slot_groups-1; n >= 0; n--) {
2316 		if (sizeof(long) > sizeof(u32))
2317 			group_allocated =
2318 				dd->port->cmds_to_issue[n/2] >> (32*(n&1));
2319 		else
2320 			group_allocated = dd->port->cmds_to_issue[n];
2321 		size += sprintf(&buf[size], "%08X ", group_allocated);
2322 	}
2323 	size += sprintf(&buf[size], "]\n");
2324 
2325 	*offset = size <= len ? size : len;
2326 	size = copy_to_user(ubuf, buf, *offset);
2327 	if (size)
2328 		rv = -EFAULT;
2329 
2330 	kfree(buf);
2331 	return rv ? rv : *offset;
2332 }
2333 
2334 static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf,
2335 				  size_t len, loff_t *offset)
2336 {
2337 	struct driver_data *dd =  (struct driver_data *)f->private_data;
2338 	char *buf;
2339 	int size = *offset;
2340 	int rv = 0;
2341 
2342 	if (!len || size)
2343 		return 0;
2344 
2345 	buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2346 	if (!buf) {
2347 		dev_err(&dd->pdev->dev,
2348 			"Memory allocation: flag buffer\n");
2349 		return -ENOMEM;
2350 	}
2351 
2352 	size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n",
2353 							dd->port->flags);
2354 	size += sprintf(&buf[size], "Flag-dd   : [ %08lX ]\n",
2355 							dd->dd_flag);
2356 
2357 	*offset = size <= len ? size : len;
2358 	size = copy_to_user(ubuf, buf, *offset);
2359 	if (size)
2360 		rv = -EFAULT;
2361 
2362 	kfree(buf);
2363 	return rv ? rv : *offset;
2364 }
2365 
2366 static const struct file_operations mtip_device_status_fops = {
2367 	.owner  = THIS_MODULE,
2368 	.open   = simple_open,
2369 	.read   = mtip_hw_read_device_status,
2370 	.llseek = no_llseek,
2371 };
2372 
2373 static const struct file_operations mtip_regs_fops = {
2374 	.owner  = THIS_MODULE,
2375 	.open   = simple_open,
2376 	.read   = mtip_hw_read_registers,
2377 	.llseek = no_llseek,
2378 };
2379 
2380 static const struct file_operations mtip_flags_fops = {
2381 	.owner  = THIS_MODULE,
2382 	.open   = simple_open,
2383 	.read   = mtip_hw_read_flags,
2384 	.llseek = no_llseek,
2385 };
2386 
2387 /*
2388  * Create the sysfs related attributes.
2389  *
2390  * @dd   Pointer to the driver data structure.
2391  * @kobj Pointer to the kobj for the block device.
2392  *
2393  * return value
2394  *	0	Operation completed successfully.
2395  *	-EINVAL Invalid parameter.
2396  */
2397 static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj)
2398 {
2399 	if (!kobj || !dd)
2400 		return -EINVAL;
2401 
2402 	if (sysfs_create_file(kobj, &dev_attr_status.attr))
2403 		dev_warn(&dd->pdev->dev,
2404 			"Error creating 'status' sysfs entry\n");
2405 	return 0;
2406 }
2407 
2408 /*
2409  * Remove the sysfs related attributes.
2410  *
2411  * @dd   Pointer to the driver data structure.
2412  * @kobj Pointer to the kobj for the block device.
2413  *
2414  * return value
2415  *	0	Operation completed successfully.
2416  *	-EINVAL Invalid parameter.
2417  */
2418 static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj)
2419 {
2420 	if (!kobj || !dd)
2421 		return -EINVAL;
2422 
2423 	sysfs_remove_file(kobj, &dev_attr_status.attr);
2424 
2425 	return 0;
2426 }
2427 
2428 static int mtip_hw_debugfs_init(struct driver_data *dd)
2429 {
2430 	if (!dfs_parent)
2431 		return -1;
2432 
2433 	dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent);
2434 	if (IS_ERR_OR_NULL(dd->dfs_node)) {
2435 		dev_warn(&dd->pdev->dev,
2436 			"Error creating node %s under debugfs\n",
2437 						dd->disk->disk_name);
2438 		dd->dfs_node = NULL;
2439 		return -1;
2440 	}
2441 
2442 	debugfs_create_file("flags", 0444, dd->dfs_node, dd, &mtip_flags_fops);
2443 	debugfs_create_file("registers", 0444, dd->dfs_node, dd,
2444 			    &mtip_regs_fops);
2445 
2446 	return 0;
2447 }
2448 
2449 static void mtip_hw_debugfs_exit(struct driver_data *dd)
2450 {
2451 	debugfs_remove_recursive(dd->dfs_node);
2452 }
2453 
2454 /*
2455  * Perform any init/resume time hardware setup
2456  *
2457  * @dd Pointer to the driver data structure.
2458  *
2459  * return value
2460  *	None
2461  */
2462 static inline void hba_setup(struct driver_data *dd)
2463 {
2464 	u32 hwdata;
2465 	hwdata = readl(dd->mmio + HOST_HSORG);
2466 
2467 	/* interrupt bug workaround: use only 1 IS bit.*/
2468 	writel(hwdata |
2469 		HSORG_DISABLE_SLOTGRP_INTR |
2470 		HSORG_DISABLE_SLOTGRP_PXIS,
2471 		dd->mmio + HOST_HSORG);
2472 }
2473 
2474 static int mtip_device_unaligned_constrained(struct driver_data *dd)
2475 {
2476 	return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0);
2477 }
2478 
2479 /*
2480  * Detect the details of the product, and store anything needed
2481  * into the driver data structure.  This includes product type and
2482  * version and number of slot groups.
2483  *
2484  * @dd Pointer to the driver data structure.
2485  *
2486  * return value
2487  *	None
2488  */
2489 static void mtip_detect_product(struct driver_data *dd)
2490 {
2491 	u32 hwdata;
2492 	unsigned int rev, slotgroups;
2493 
2494 	/*
2495 	 * HBA base + 0xFC [15:0] - vendor-specific hardware interface
2496 	 * info register:
2497 	 * [15:8] hardware/software interface rev#
2498 	 * [   3] asic-style interface
2499 	 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style).
2500 	 */
2501 	hwdata = readl(dd->mmio + HOST_HSORG);
2502 
2503 	dd->product_type = MTIP_PRODUCT_UNKNOWN;
2504 	dd->slot_groups = 1;
2505 
2506 	if (hwdata & 0x8) {
2507 		dd->product_type = MTIP_PRODUCT_ASICFPGA;
2508 		rev = (hwdata & HSORG_HWREV) >> 8;
2509 		slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1;
2510 		dev_info(&dd->pdev->dev,
2511 			"ASIC-FPGA design, HS rev 0x%x, "
2512 			"%i slot groups [%i slots]\n",
2513 			 rev,
2514 			 slotgroups,
2515 			 slotgroups * 32);
2516 
2517 		if (slotgroups > MTIP_MAX_SLOT_GROUPS) {
2518 			dev_warn(&dd->pdev->dev,
2519 				"Warning: driver only supports "
2520 				"%i slot groups.\n", MTIP_MAX_SLOT_GROUPS);
2521 			slotgroups = MTIP_MAX_SLOT_GROUPS;
2522 		}
2523 		dd->slot_groups = slotgroups;
2524 		return;
2525 	}
2526 
2527 	dev_warn(&dd->pdev->dev, "Unrecognized product id\n");
2528 }
2529 
2530 /*
2531  * Blocking wait for FTL rebuild to complete
2532  *
2533  * @dd Pointer to the DRIVER_DATA structure.
2534  *
2535  * return value
2536  *	0	FTL rebuild completed successfully
2537  *	-EFAULT FTL rebuild error/timeout/interruption
2538  */
2539 static int mtip_ftl_rebuild_poll(struct driver_data *dd)
2540 {
2541 	unsigned long timeout, cnt = 0, start;
2542 
2543 	dev_warn(&dd->pdev->dev,
2544 		"FTL rebuild in progress. Polling for completion.\n");
2545 
2546 	start = jiffies;
2547 	timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS);
2548 
2549 	do {
2550 		if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2551 				&dd->dd_flag)))
2552 			return -EFAULT;
2553 		if (mtip_check_surprise_removal(dd->pdev))
2554 			return -EFAULT;
2555 
2556 		if (mtip_get_identify(dd->port, NULL) < 0)
2557 			return -EFAULT;
2558 
2559 		if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2560 			MTIP_FTL_REBUILD_MAGIC) {
2561 			ssleep(1);
2562 			/* Print message every 3 minutes */
2563 			if (cnt++ >= 180) {
2564 				dev_warn(&dd->pdev->dev,
2565 				"FTL rebuild in progress (%d secs).\n",
2566 				jiffies_to_msecs(jiffies - start) / 1000);
2567 				cnt = 0;
2568 			}
2569 		} else {
2570 			dev_warn(&dd->pdev->dev,
2571 				"FTL rebuild complete (%d secs).\n",
2572 			jiffies_to_msecs(jiffies - start) / 1000);
2573 			mtip_block_initialize(dd);
2574 			return 0;
2575 		}
2576 	} while (time_before(jiffies, timeout));
2577 
2578 	/* Check for timeout */
2579 	dev_err(&dd->pdev->dev,
2580 		"Timed out waiting for FTL rebuild to complete (%d secs).\n",
2581 		jiffies_to_msecs(jiffies - start) / 1000);
2582 	return -EFAULT;
2583 }
2584 
2585 static void mtip_softirq_done_fn(struct request *rq)
2586 {
2587 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
2588 	struct driver_data *dd = rq->q->queuedata;
2589 
2590 	/* Unmap the DMA scatter list entries */
2591 	dma_unmap_sg(&dd->pdev->dev, cmd->sg, cmd->scatter_ents,
2592 							cmd->direction);
2593 
2594 	if (unlikely(cmd->unaligned))
2595 		atomic_inc(&dd->port->cmd_slot_unal);
2596 
2597 	blk_mq_end_request(rq, cmd->status);
2598 }
2599 
2600 static bool mtip_abort_cmd(struct request *req, void *data, bool reserved)
2601 {
2602 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req);
2603 	struct driver_data *dd = data;
2604 
2605 	dbg_printk(MTIP_DRV_NAME " Aborting request, tag = %d\n", req->tag);
2606 
2607 	clear_bit(req->tag, dd->port->cmds_to_issue);
2608 	cmd->status = BLK_STS_IOERR;
2609 	mtip_softirq_done_fn(req);
2610 	return true;
2611 }
2612 
2613 static bool mtip_queue_cmd(struct request *req, void *data, bool reserved)
2614 {
2615 	struct driver_data *dd = data;
2616 
2617 	set_bit(req->tag, dd->port->cmds_to_issue);
2618 	blk_abort_request(req);
2619 	return true;
2620 }
2621 
2622 /*
2623  * service thread to issue queued commands
2624  *
2625  * @data Pointer to the driver data structure.
2626  *
2627  * return value
2628  *	0
2629  */
2630 
2631 static int mtip_service_thread(void *data)
2632 {
2633 	struct driver_data *dd = (struct driver_data *)data;
2634 	unsigned long slot, slot_start, slot_wrap, to;
2635 	unsigned int num_cmd_slots = dd->slot_groups * 32;
2636 	struct mtip_port *port = dd->port;
2637 
2638 	while (1) {
2639 		if (kthread_should_stop() ||
2640 			test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2641 			goto st_out;
2642 		clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2643 
2644 		/*
2645 		 * the condition is to check neither an internal command is
2646 		 * is in progress nor error handling is active
2647 		 */
2648 		wait_event_interruptible(port->svc_wait, (port->flags) &&
2649 			(port->flags & MTIP_PF_SVC_THD_WORK));
2650 
2651 		if (kthread_should_stop() ||
2652 			test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2653 			goto st_out;
2654 
2655 		if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2656 				&dd->dd_flag)))
2657 			goto st_out;
2658 
2659 		set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2660 
2661 restart_eh:
2662 		/* Demux bits: start with error handling */
2663 		if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) {
2664 			mtip_handle_tfe(dd);
2665 			clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
2666 		}
2667 
2668 		if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags))
2669 			goto restart_eh;
2670 
2671 		if (test_bit(MTIP_PF_TO_ACTIVE_BIT, &port->flags)) {
2672 			to = jiffies + msecs_to_jiffies(5000);
2673 
2674 			do {
2675 				mdelay(100);
2676 			} while (atomic_read(&dd->irq_workers_active) != 0 &&
2677 				time_before(jiffies, to));
2678 
2679 			if (atomic_read(&dd->irq_workers_active) != 0)
2680 				dev_warn(&dd->pdev->dev,
2681 					"Completion workers still active!");
2682 
2683 			blk_mq_quiesce_queue(dd->queue);
2684 
2685 			blk_mq_tagset_busy_iter(&dd->tags, mtip_queue_cmd, dd);
2686 
2687 			set_bit(MTIP_PF_ISSUE_CMDS_BIT, &dd->port->flags);
2688 
2689 			if (mtip_device_reset(dd))
2690 				blk_mq_tagset_busy_iter(&dd->tags,
2691 							mtip_abort_cmd, dd);
2692 
2693 			clear_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags);
2694 
2695 			blk_mq_unquiesce_queue(dd->queue);
2696 		}
2697 
2698 		if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
2699 			slot = 1;
2700 			/* used to restrict the loop to one iteration */
2701 			slot_start = num_cmd_slots;
2702 			slot_wrap = 0;
2703 			while (1) {
2704 				slot = find_next_bit(port->cmds_to_issue,
2705 						num_cmd_slots, slot);
2706 				if (slot_wrap == 1) {
2707 					if ((slot_start >= slot) ||
2708 						(slot >= num_cmd_slots))
2709 						break;
2710 				}
2711 				if (unlikely(slot_start == num_cmd_slots))
2712 					slot_start = slot;
2713 
2714 				if (unlikely(slot == num_cmd_slots)) {
2715 					slot = 1;
2716 					slot_wrap = 1;
2717 					continue;
2718 				}
2719 
2720 				/* Issue the command to the hardware */
2721 				mtip_issue_ncq_command(port, slot);
2722 
2723 				clear_bit(slot, port->cmds_to_issue);
2724 			}
2725 
2726 			clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2727 		}
2728 
2729 		if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) {
2730 			if (mtip_ftl_rebuild_poll(dd) == 0)
2731 				clear_bit(MTIP_PF_REBUILD_BIT, &port->flags);
2732 		}
2733 	}
2734 
2735 st_out:
2736 	return 0;
2737 }
2738 
2739 /*
2740  * DMA region teardown
2741  *
2742  * @dd Pointer to driver_data structure
2743  *
2744  * return value
2745  *      None
2746  */
2747 static void mtip_dma_free(struct driver_data *dd)
2748 {
2749 	struct mtip_port *port = dd->port;
2750 
2751 	if (port->block1)
2752 		dma_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
2753 					port->block1, port->block1_dma);
2754 
2755 	if (port->command_list) {
2756 		dma_free_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
2757 				port->command_list, port->command_list_dma);
2758 	}
2759 }
2760 
2761 /*
2762  * DMA region setup
2763  *
2764  * @dd Pointer to driver_data structure
2765  *
2766  * return value
2767  *      -ENOMEM Not enough free DMA region space to initialize driver
2768  */
2769 static int mtip_dma_alloc(struct driver_data *dd)
2770 {
2771 	struct mtip_port *port = dd->port;
2772 
2773 	/* Allocate dma memory for RX Fis, Identify, and Sector Bufffer */
2774 	port->block1 =
2775 		dma_alloc_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
2776 					&port->block1_dma, GFP_KERNEL);
2777 	if (!port->block1)
2778 		return -ENOMEM;
2779 	memset(port->block1, 0, BLOCK_DMA_ALLOC_SZ);
2780 
2781 	/* Allocate dma memory for command list */
2782 	port->command_list =
2783 		dma_alloc_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
2784 					&port->command_list_dma, GFP_KERNEL);
2785 	if (!port->command_list) {
2786 		dma_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
2787 					port->block1, port->block1_dma);
2788 		port->block1 = NULL;
2789 		port->block1_dma = 0;
2790 		return -ENOMEM;
2791 	}
2792 	memset(port->command_list, 0, AHCI_CMD_TBL_SZ);
2793 
2794 	/* Setup all pointers into first DMA region */
2795 	port->rxfis         = port->block1 + AHCI_RX_FIS_OFFSET;
2796 	port->rxfis_dma     = port->block1_dma + AHCI_RX_FIS_OFFSET;
2797 	port->identify      = port->block1 + AHCI_IDFY_OFFSET;
2798 	port->identify_dma  = port->block1_dma + AHCI_IDFY_OFFSET;
2799 	port->log_buf       = port->block1 + AHCI_SECTBUF_OFFSET;
2800 	port->log_buf_dma   = port->block1_dma + AHCI_SECTBUF_OFFSET;
2801 	port->smart_buf     = port->block1 + AHCI_SMARTBUF_OFFSET;
2802 	port->smart_buf_dma = port->block1_dma + AHCI_SMARTBUF_OFFSET;
2803 
2804 	return 0;
2805 }
2806 
2807 static int mtip_hw_get_identify(struct driver_data *dd)
2808 {
2809 	struct smart_attr attr242;
2810 	unsigned char *buf;
2811 	int rv;
2812 
2813 	if (mtip_get_identify(dd->port, NULL) < 0)
2814 		return -EFAULT;
2815 
2816 	if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2817 		MTIP_FTL_REBUILD_MAGIC) {
2818 		set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags);
2819 		return MTIP_FTL_REBUILD_MAGIC;
2820 	}
2821 	mtip_dump_identify(dd->port);
2822 
2823 	/* check write protect, over temp and rebuild statuses */
2824 	rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
2825 				dd->port->log_buf,
2826 				dd->port->log_buf_dma, 1);
2827 	if (rv) {
2828 		dev_warn(&dd->pdev->dev,
2829 			"Error in READ LOG EXT (10h) command\n");
2830 		/* non-critical error, don't fail the load */
2831 	} else {
2832 		buf = (unsigned char *)dd->port->log_buf;
2833 		if (buf[259] & 0x1) {
2834 			dev_info(&dd->pdev->dev,
2835 				"Write protect bit is set.\n");
2836 			set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
2837 		}
2838 		if (buf[288] == 0xF7) {
2839 			dev_info(&dd->pdev->dev,
2840 				"Exceeded Tmax, drive in thermal shutdown.\n");
2841 			set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
2842 		}
2843 		if (buf[288] == 0xBF) {
2844 			dev_info(&dd->pdev->dev,
2845 				"Drive indicates rebuild has failed.\n");
2846 			set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag);
2847 		}
2848 	}
2849 
2850 	/* get write protect progess */
2851 	memset(&attr242, 0, sizeof(struct smart_attr));
2852 	if (mtip_get_smart_attr(dd->port, 242, &attr242))
2853 		dev_warn(&dd->pdev->dev,
2854 				"Unable to check write protect progress\n");
2855 	else
2856 		dev_info(&dd->pdev->dev,
2857 				"Write protect progress: %u%% (%u blocks)\n",
2858 				attr242.cur, le32_to_cpu(attr242.data));
2859 
2860 	return rv;
2861 }
2862 
2863 /*
2864  * Called once for each card.
2865  *
2866  * @dd Pointer to the driver data structure.
2867  *
2868  * return value
2869  *	0 on success, else an error code.
2870  */
2871 static int mtip_hw_init(struct driver_data *dd)
2872 {
2873 	int i;
2874 	int rv;
2875 	unsigned long timeout, timetaken;
2876 
2877 	dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR];
2878 
2879 	mtip_detect_product(dd);
2880 	if (dd->product_type == MTIP_PRODUCT_UNKNOWN) {
2881 		rv = -EIO;
2882 		goto out1;
2883 	}
2884 
2885 	hba_setup(dd);
2886 
2887 	dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL,
2888 				dd->numa_node);
2889 	if (!dd->port) {
2890 		dev_err(&dd->pdev->dev,
2891 			"Memory allocation: port structure\n");
2892 		return -ENOMEM;
2893 	}
2894 
2895 	/* Continue workqueue setup */
2896 	for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
2897 		dd->work[i].port = dd->port;
2898 
2899 	/* Enable unaligned IO constraints for some devices */
2900 	if (mtip_device_unaligned_constrained(dd))
2901 		dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS;
2902 	else
2903 		dd->unal_qdepth = 0;
2904 
2905 	atomic_set(&dd->port->cmd_slot_unal, dd->unal_qdepth);
2906 
2907 	/* Spinlock to prevent concurrent issue */
2908 	for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
2909 		spin_lock_init(&dd->port->cmd_issue_lock[i]);
2910 
2911 	/* Set the port mmio base address. */
2912 	dd->port->mmio	= dd->mmio + PORT_OFFSET;
2913 	dd->port->dd	= dd;
2914 
2915 	/* DMA allocations */
2916 	rv = mtip_dma_alloc(dd);
2917 	if (rv < 0)
2918 		goto out1;
2919 
2920 	/* Setup the pointers to the extended s_active and CI registers. */
2921 	for (i = 0; i < dd->slot_groups; i++) {
2922 		dd->port->s_active[i] =
2923 			dd->port->mmio + i*0x80 + PORT_SCR_ACT;
2924 		dd->port->cmd_issue[i] =
2925 			dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE;
2926 		dd->port->completed[i] =
2927 			dd->port->mmio + i*0x80 + PORT_SDBV;
2928 	}
2929 
2930 	timetaken = jiffies;
2931 	timeout = jiffies + msecs_to_jiffies(30000);
2932 	while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
2933 		 time_before(jiffies, timeout)) {
2934 		mdelay(100);
2935 	}
2936 	if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
2937 		timetaken = jiffies - timetaken;
2938 		dev_warn(&dd->pdev->dev,
2939 			"Surprise removal detected at %u ms\n",
2940 			jiffies_to_msecs(timetaken));
2941 		rv = -ENODEV;
2942 		goto out2 ;
2943 	}
2944 	if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
2945 		timetaken = jiffies - timetaken;
2946 		dev_warn(&dd->pdev->dev,
2947 			"Removal detected at %u ms\n",
2948 			jiffies_to_msecs(timetaken));
2949 		rv = -EFAULT;
2950 		goto out2;
2951 	}
2952 
2953 	/* Conditionally reset the HBA. */
2954 	if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) {
2955 		if (mtip_hba_reset(dd) < 0) {
2956 			dev_err(&dd->pdev->dev,
2957 				"Card did not reset within timeout\n");
2958 			rv = -EIO;
2959 			goto out2;
2960 		}
2961 	} else {
2962 		/* Clear any pending interrupts on the HBA */
2963 		writel(readl(dd->mmio + HOST_IRQ_STAT),
2964 			dd->mmio + HOST_IRQ_STAT);
2965 	}
2966 
2967 	mtip_init_port(dd->port);
2968 	mtip_start_port(dd->port);
2969 
2970 	/* Setup the ISR and enable interrupts. */
2971 	rv = request_irq(dd->pdev->irq, mtip_irq_handler, IRQF_SHARED,
2972 			 dev_driver_string(&dd->pdev->dev), dd);
2973 	if (rv) {
2974 		dev_err(&dd->pdev->dev,
2975 			"Unable to allocate IRQ %d\n", dd->pdev->irq);
2976 		goto out2;
2977 	}
2978 	irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding));
2979 
2980 	/* Enable interrupts on the HBA. */
2981 	writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
2982 					dd->mmio + HOST_CTL);
2983 
2984 	init_waitqueue_head(&dd->port->svc_wait);
2985 
2986 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
2987 		rv = -EFAULT;
2988 		goto out3;
2989 	}
2990 
2991 	return rv;
2992 
2993 out3:
2994 	/* Disable interrupts on the HBA. */
2995 	writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
2996 			dd->mmio + HOST_CTL);
2997 
2998 	/* Release the IRQ. */
2999 	irq_set_affinity_hint(dd->pdev->irq, NULL);
3000 	free_irq(dd->pdev->irq, dd);
3001 
3002 out2:
3003 	mtip_deinit_port(dd->port);
3004 	mtip_dma_free(dd);
3005 
3006 out1:
3007 	/* Free the memory allocated for the for structure. */
3008 	kfree(dd->port);
3009 
3010 	return rv;
3011 }
3012 
3013 static int mtip_standby_drive(struct driver_data *dd)
3014 {
3015 	int rv = 0;
3016 
3017 	if (dd->sr || !dd->port)
3018 		return -ENODEV;
3019 	/*
3020 	 * Send standby immediate (E0h) to the drive so that it
3021 	 * saves its state.
3022 	 */
3023 	if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags) &&
3024 	    !test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag) &&
3025 	    !test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag)) {
3026 		rv = mtip_standby_immediate(dd->port);
3027 		if (rv)
3028 			dev_warn(&dd->pdev->dev,
3029 				"STANDBY IMMEDIATE failed\n");
3030 	}
3031 	return rv;
3032 }
3033 
3034 /*
3035  * Called to deinitialize an interface.
3036  *
3037  * @dd Pointer to the driver data structure.
3038  *
3039  * return value
3040  *	0
3041  */
3042 static int mtip_hw_exit(struct driver_data *dd)
3043 {
3044 	if (!dd->sr) {
3045 		/* de-initialize the port. */
3046 		mtip_deinit_port(dd->port);
3047 
3048 		/* Disable interrupts on the HBA. */
3049 		writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3050 				dd->mmio + HOST_CTL);
3051 	}
3052 
3053 	/* Release the IRQ. */
3054 	irq_set_affinity_hint(dd->pdev->irq, NULL);
3055 	free_irq(dd->pdev->irq, dd);
3056 	msleep(1000);
3057 
3058 	/* Free dma regions */
3059 	mtip_dma_free(dd);
3060 
3061 	/* Free the memory allocated for the for structure. */
3062 	kfree(dd->port);
3063 	dd->port = NULL;
3064 
3065 	return 0;
3066 }
3067 
3068 /*
3069  * Issue a Standby Immediate command to the device.
3070  *
3071  * This function is called by the Block Layer just before the
3072  * system powers off during a shutdown.
3073  *
3074  * @dd Pointer to the driver data structure.
3075  *
3076  * return value
3077  *	0
3078  */
3079 static int mtip_hw_shutdown(struct driver_data *dd)
3080 {
3081 	/*
3082 	 * Send standby immediate (E0h) to the drive so that it
3083 	 * saves its state.
3084 	 */
3085 	mtip_standby_drive(dd);
3086 
3087 	return 0;
3088 }
3089 
3090 /*
3091  * Suspend function
3092  *
3093  * This function is called by the Block Layer just before the
3094  * system hibernates.
3095  *
3096  * @dd Pointer to the driver data structure.
3097  *
3098  * return value
3099  *	0	Suspend was successful
3100  *	-EFAULT Suspend was not successful
3101  */
3102 static int mtip_hw_suspend(struct driver_data *dd)
3103 {
3104 	/*
3105 	 * Send standby immediate (E0h) to the drive
3106 	 * so that it saves its state.
3107 	 */
3108 	if (mtip_standby_drive(dd) != 0) {
3109 		dev_err(&dd->pdev->dev,
3110 			"Failed standby-immediate command\n");
3111 		return -EFAULT;
3112 	}
3113 
3114 	/* Disable interrupts on the HBA.*/
3115 	writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3116 			dd->mmio + HOST_CTL);
3117 	mtip_deinit_port(dd->port);
3118 
3119 	return 0;
3120 }
3121 
3122 /*
3123  * Resume function
3124  *
3125  * This function is called by the Block Layer as the
3126  * system resumes.
3127  *
3128  * @dd Pointer to the driver data structure.
3129  *
3130  * return value
3131  *	0	Resume was successful
3132  *      -EFAULT Resume was not successful
3133  */
3134 static int mtip_hw_resume(struct driver_data *dd)
3135 {
3136 	/* Perform any needed hardware setup steps */
3137 	hba_setup(dd);
3138 
3139 	/* Reset the HBA */
3140 	if (mtip_hba_reset(dd) != 0) {
3141 		dev_err(&dd->pdev->dev,
3142 			"Unable to reset the HBA\n");
3143 		return -EFAULT;
3144 	}
3145 
3146 	/*
3147 	 * Enable the port, DMA engine, and FIS reception specific
3148 	 * h/w in controller.
3149 	 */
3150 	mtip_init_port(dd->port);
3151 	mtip_start_port(dd->port);
3152 
3153 	/* Enable interrupts on the HBA.*/
3154 	writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3155 			dd->mmio + HOST_CTL);
3156 
3157 	return 0;
3158 }
3159 
3160 /*
3161  * Helper function for reusing disk name
3162  * upon hot insertion.
3163  */
3164 static int rssd_disk_name_format(char *prefix,
3165 				 int index,
3166 				 char *buf,
3167 				 int buflen)
3168 {
3169 	const int base = 'z' - 'a' + 1;
3170 	char *begin = buf + strlen(prefix);
3171 	char *end = buf + buflen;
3172 	char *p;
3173 	int unit;
3174 
3175 	p = end - 1;
3176 	*p = '\0';
3177 	unit = base;
3178 	do {
3179 		if (p == begin)
3180 			return -EINVAL;
3181 		*--p = 'a' + (index % unit);
3182 		index = (index / unit) - 1;
3183 	} while (index >= 0);
3184 
3185 	memmove(begin, p, end - p);
3186 	memcpy(buf, prefix, strlen(prefix));
3187 
3188 	return 0;
3189 }
3190 
3191 /*
3192  * Block layer IOCTL handler.
3193  *
3194  * @dev Pointer to the block_device structure.
3195  * @mode ignored
3196  * @cmd IOCTL command passed from the user application.
3197  * @arg Argument passed from the user application.
3198  *
3199  * return value
3200  *	0        IOCTL completed successfully.
3201  *	-ENOTTY  IOCTL not supported or invalid driver data
3202  *                 structure pointer.
3203  */
3204 static int mtip_block_ioctl(struct block_device *dev,
3205 			    fmode_t mode,
3206 			    unsigned cmd,
3207 			    unsigned long arg)
3208 {
3209 	struct driver_data *dd = dev->bd_disk->private_data;
3210 
3211 	if (!capable(CAP_SYS_ADMIN))
3212 		return -EACCES;
3213 
3214 	if (!dd)
3215 		return -ENOTTY;
3216 
3217 	if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3218 		return -ENOTTY;
3219 
3220 	switch (cmd) {
3221 	case BLKFLSBUF:
3222 		return -ENOTTY;
3223 	default:
3224 		return mtip_hw_ioctl(dd, cmd, arg);
3225 	}
3226 }
3227 
3228 #ifdef CONFIG_COMPAT
3229 /*
3230  * Block layer compat IOCTL handler.
3231  *
3232  * @dev Pointer to the block_device structure.
3233  * @mode ignored
3234  * @cmd IOCTL command passed from the user application.
3235  * @arg Argument passed from the user application.
3236  *
3237  * return value
3238  *	0        IOCTL completed successfully.
3239  *	-ENOTTY  IOCTL not supported or invalid driver data
3240  *                 structure pointer.
3241  */
3242 static int mtip_block_compat_ioctl(struct block_device *dev,
3243 			    fmode_t mode,
3244 			    unsigned cmd,
3245 			    unsigned long arg)
3246 {
3247 	struct driver_data *dd = dev->bd_disk->private_data;
3248 
3249 	if (!capable(CAP_SYS_ADMIN))
3250 		return -EACCES;
3251 
3252 	if (!dd)
3253 		return -ENOTTY;
3254 
3255 	if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3256 		return -ENOTTY;
3257 
3258 	switch (cmd) {
3259 	case BLKFLSBUF:
3260 		return -ENOTTY;
3261 	case HDIO_DRIVE_TASKFILE: {
3262 		struct mtip_compat_ide_task_request_s __user *compat_req_task;
3263 		ide_task_request_t req_task;
3264 		int compat_tasksize, outtotal, ret;
3265 
3266 		compat_tasksize =
3267 			sizeof(struct mtip_compat_ide_task_request_s);
3268 
3269 		compat_req_task =
3270 			(struct mtip_compat_ide_task_request_s __user *) arg;
3271 
3272 		if (copy_from_user(&req_task, (void __user *) arg,
3273 			compat_tasksize - (2 * sizeof(compat_long_t))))
3274 			return -EFAULT;
3275 
3276 		if (get_user(req_task.out_size, &compat_req_task->out_size))
3277 			return -EFAULT;
3278 
3279 		if (get_user(req_task.in_size, &compat_req_task->in_size))
3280 			return -EFAULT;
3281 
3282 		outtotal = sizeof(struct mtip_compat_ide_task_request_s);
3283 
3284 		ret = exec_drive_taskfile(dd, (void __user *) arg,
3285 						&req_task, outtotal);
3286 
3287 		if (copy_to_user((void __user *) arg, &req_task,
3288 				compat_tasksize -
3289 				(2 * sizeof(compat_long_t))))
3290 			return -EFAULT;
3291 
3292 		if (put_user(req_task.out_size, &compat_req_task->out_size))
3293 			return -EFAULT;
3294 
3295 		if (put_user(req_task.in_size, &compat_req_task->in_size))
3296 			return -EFAULT;
3297 
3298 		return ret;
3299 	}
3300 	default:
3301 		return mtip_hw_ioctl(dd, cmd, arg);
3302 	}
3303 }
3304 #endif
3305 
3306 /*
3307  * Obtain the geometry of the device.
3308  *
3309  * You may think that this function is obsolete, but some applications,
3310  * fdisk for example still used CHS values. This function describes the
3311  * device as having 224 heads and 56 sectors per cylinder. These values are
3312  * chosen so that each cylinder is aligned on a 4KB boundary. Since a
3313  * partition is described in terms of a start and end cylinder this means
3314  * that each partition is also 4KB aligned. Non-aligned partitions adversely
3315  * affects performance.
3316  *
3317  * @dev Pointer to the block_device strucutre.
3318  * @geo Pointer to a hd_geometry structure.
3319  *
3320  * return value
3321  *	0       Operation completed successfully.
3322  *	-ENOTTY An error occurred while reading the drive capacity.
3323  */
3324 static int mtip_block_getgeo(struct block_device *dev,
3325 				struct hd_geometry *geo)
3326 {
3327 	struct driver_data *dd = dev->bd_disk->private_data;
3328 	sector_t capacity;
3329 
3330 	if (!dd)
3331 		return -ENOTTY;
3332 
3333 	if (!(mtip_hw_get_capacity(dd, &capacity))) {
3334 		dev_warn(&dd->pdev->dev,
3335 			"Could not get drive capacity.\n");
3336 		return -ENOTTY;
3337 	}
3338 
3339 	geo->heads = 224;
3340 	geo->sectors = 56;
3341 	sector_div(capacity, (geo->heads * geo->sectors));
3342 	geo->cylinders = capacity;
3343 	return 0;
3344 }
3345 
3346 static int mtip_block_open(struct block_device *dev, fmode_t mode)
3347 {
3348 	struct driver_data *dd;
3349 
3350 	if (dev && dev->bd_disk) {
3351 		dd = (struct driver_data *) dev->bd_disk->private_data;
3352 
3353 		if (dd) {
3354 			if (test_bit(MTIP_DDF_REMOVAL_BIT,
3355 							&dd->dd_flag)) {
3356 				return -ENODEV;
3357 			}
3358 			return 0;
3359 		}
3360 	}
3361 	return -ENODEV;
3362 }
3363 
3364 static void mtip_block_release(struct gendisk *disk, fmode_t mode)
3365 {
3366 }
3367 
3368 /*
3369  * Block device operation function.
3370  *
3371  * This structure contains pointers to the functions required by the block
3372  * layer.
3373  */
3374 static const struct block_device_operations mtip_block_ops = {
3375 	.open		= mtip_block_open,
3376 	.release	= mtip_block_release,
3377 	.ioctl		= mtip_block_ioctl,
3378 #ifdef CONFIG_COMPAT
3379 	.compat_ioctl	= mtip_block_compat_ioctl,
3380 #endif
3381 	.getgeo		= mtip_block_getgeo,
3382 	.owner		= THIS_MODULE
3383 };
3384 
3385 static inline bool is_se_active(struct driver_data *dd)
3386 {
3387 	if (unlikely(test_bit(MTIP_PF_SE_ACTIVE_BIT, &dd->port->flags))) {
3388 		if (dd->port->ic_pause_timer) {
3389 			unsigned long to = dd->port->ic_pause_timer +
3390 							msecs_to_jiffies(1000);
3391 			if (time_after(jiffies, to)) {
3392 				clear_bit(MTIP_PF_SE_ACTIVE_BIT,
3393 							&dd->port->flags);
3394 				clear_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag);
3395 				dd->port->ic_pause_timer = 0;
3396 				wake_up_interruptible(&dd->port->svc_wait);
3397 				return false;
3398 			}
3399 		}
3400 		return true;
3401 	}
3402 	return false;
3403 }
3404 
3405 static inline bool is_stopped(struct driver_data *dd, struct request *rq)
3406 {
3407 	if (likely(!(dd->dd_flag & MTIP_DDF_STOP_IO)))
3408 		return false;
3409 
3410 	if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
3411 		return true;
3412 	if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
3413 		return true;
3414 	if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag) &&
3415 	    rq_data_dir(rq))
3416 		return true;
3417 	if (test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag))
3418 		return true;
3419 	if (test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag))
3420 		return true;
3421 
3422 	return false;
3423 }
3424 
3425 static bool mtip_check_unal_depth(struct blk_mq_hw_ctx *hctx,
3426 				  struct request *rq)
3427 {
3428 	struct driver_data *dd = hctx->queue->queuedata;
3429 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3430 
3431 	if (rq_data_dir(rq) == READ || !dd->unal_qdepth)
3432 		return false;
3433 
3434 	/*
3435 	 * If unaligned depth must be limited on this controller, mark it
3436 	 * as unaligned if the IO isn't on a 4k boundary (start of length).
3437 	 */
3438 	if (blk_rq_sectors(rq) <= 64) {
3439 		if ((blk_rq_pos(rq) & 7) || (blk_rq_sectors(rq) & 7))
3440 			cmd->unaligned = 1;
3441 	}
3442 
3443 	if (cmd->unaligned && atomic_dec_if_positive(&dd->port->cmd_slot_unal) >= 0)
3444 		return true;
3445 
3446 	return false;
3447 }
3448 
3449 static blk_status_t mtip_issue_reserved_cmd(struct blk_mq_hw_ctx *hctx,
3450 		struct request *rq)
3451 {
3452 	struct driver_data *dd = hctx->queue->queuedata;
3453 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3454 	struct mtip_int_cmd *icmd = cmd->icmd;
3455 	struct mtip_cmd_hdr *hdr =
3456 		dd->port->command_list + sizeof(struct mtip_cmd_hdr) * rq->tag;
3457 	struct mtip_cmd_sg *command_sg;
3458 
3459 	if (mtip_commands_active(dd->port))
3460 		return BLK_STS_DEV_RESOURCE;
3461 
3462 	hdr->ctba = cpu_to_le32(cmd->command_dma & 0xFFFFFFFF);
3463 	if (test_bit(MTIP_PF_HOST_CAP_64, &dd->port->flags))
3464 		hdr->ctbau = cpu_to_le32((cmd->command_dma >> 16) >> 16);
3465 	/* Populate the SG list */
3466 	hdr->opts = cpu_to_le32(icmd->opts | icmd->fis_len);
3467 	if (icmd->buf_len) {
3468 		command_sg = cmd->command + AHCI_CMD_TBL_HDR_SZ;
3469 
3470 		command_sg->info = cpu_to_le32((icmd->buf_len-1) & 0x3FFFFF);
3471 		command_sg->dba	= cpu_to_le32(icmd->buffer & 0xFFFFFFFF);
3472 		command_sg->dba_upper =
3473 			cpu_to_le32((icmd->buffer >> 16) >> 16);
3474 
3475 		hdr->opts |= cpu_to_le32((1 << 16));
3476 	}
3477 
3478 	/* Populate the command header */
3479 	hdr->byte_count = 0;
3480 
3481 	blk_mq_start_request(rq);
3482 	mtip_issue_non_ncq_command(dd->port, rq->tag);
3483 	return 0;
3484 }
3485 
3486 static blk_status_t mtip_queue_rq(struct blk_mq_hw_ctx *hctx,
3487 			 const struct blk_mq_queue_data *bd)
3488 {
3489 	struct driver_data *dd = hctx->queue->queuedata;
3490 	struct request *rq = bd->rq;
3491 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3492 
3493 	if (blk_rq_is_passthrough(rq))
3494 		return mtip_issue_reserved_cmd(hctx, rq);
3495 
3496 	if (unlikely(mtip_check_unal_depth(hctx, rq)))
3497 		return BLK_STS_DEV_RESOURCE;
3498 
3499 	if (is_se_active(dd) || is_stopped(dd, rq))
3500 		return BLK_STS_IOERR;
3501 
3502 	blk_mq_start_request(rq);
3503 
3504 	mtip_hw_submit_io(dd, rq, cmd, hctx);
3505 	return BLK_STS_OK;
3506 }
3507 
3508 static void mtip_free_cmd(struct blk_mq_tag_set *set, struct request *rq,
3509 			  unsigned int hctx_idx)
3510 {
3511 	struct driver_data *dd = set->driver_data;
3512 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3513 
3514 	if (!cmd->command)
3515 		return;
3516 
3517 	dma_free_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ, cmd->command,
3518 			  cmd->command_dma);
3519 }
3520 
3521 static int mtip_init_cmd(struct blk_mq_tag_set *set, struct request *rq,
3522 			 unsigned int hctx_idx, unsigned int numa_node)
3523 {
3524 	struct driver_data *dd = set->driver_data;
3525 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3526 
3527 	cmd->command = dma_alloc_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
3528 			&cmd->command_dma, GFP_KERNEL);
3529 	if (!cmd->command)
3530 		return -ENOMEM;
3531 
3532 	memset(cmd->command, 0, CMD_DMA_ALLOC_SZ);
3533 
3534 	sg_init_table(cmd->sg, MTIP_MAX_SG);
3535 	return 0;
3536 }
3537 
3538 static enum blk_eh_timer_return mtip_cmd_timeout(struct request *req,
3539 								bool reserved)
3540 {
3541 	struct driver_data *dd = req->q->queuedata;
3542 
3543 	if (reserved) {
3544 		struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req);
3545 
3546 		cmd->status = BLK_STS_TIMEOUT;
3547 		blk_mq_complete_request(req);
3548 		return BLK_EH_DONE;
3549 	}
3550 
3551 	if (test_bit(req->tag, dd->port->cmds_to_issue))
3552 		goto exit_handler;
3553 
3554 	if (test_and_set_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags))
3555 		goto exit_handler;
3556 
3557 	wake_up_interruptible(&dd->port->svc_wait);
3558 exit_handler:
3559 	return BLK_EH_RESET_TIMER;
3560 }
3561 
3562 static const struct blk_mq_ops mtip_mq_ops = {
3563 	.queue_rq	= mtip_queue_rq,
3564 	.init_request	= mtip_init_cmd,
3565 	.exit_request	= mtip_free_cmd,
3566 	.complete	= mtip_softirq_done_fn,
3567 	.timeout        = mtip_cmd_timeout,
3568 };
3569 
3570 /*
3571  * Block layer initialization function.
3572  *
3573  * This function is called once by the PCI layer for each P320
3574  * device that is connected to the system.
3575  *
3576  * @dd Pointer to the driver data structure.
3577  *
3578  * return value
3579  *	0 on success else an error code.
3580  */
3581 static int mtip_block_initialize(struct driver_data *dd)
3582 {
3583 	int rv = 0, wait_for_rebuild = 0;
3584 	sector_t capacity;
3585 	unsigned int index = 0;
3586 	struct kobject *kobj;
3587 
3588 	if (dd->disk)
3589 		goto skip_create_disk; /* hw init done, before rebuild */
3590 
3591 	if (mtip_hw_init(dd)) {
3592 		rv = -EINVAL;
3593 		goto protocol_init_error;
3594 	}
3595 
3596 	dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node);
3597 	if (dd->disk  == NULL) {
3598 		dev_err(&dd->pdev->dev,
3599 			"Unable to allocate gendisk structure\n");
3600 		rv = -EINVAL;
3601 		goto alloc_disk_error;
3602 	}
3603 
3604 	rv = ida_alloc(&rssd_index_ida, GFP_KERNEL);
3605 	if (rv < 0)
3606 		goto ida_get_error;
3607 	index = rv;
3608 
3609 	rv = rssd_disk_name_format("rssd",
3610 				index,
3611 				dd->disk->disk_name,
3612 				DISK_NAME_LEN);
3613 	if (rv)
3614 		goto disk_index_error;
3615 
3616 	dd->disk->major		= dd->major;
3617 	dd->disk->first_minor	= index * MTIP_MAX_MINORS;
3618 	dd->disk->minors 	= MTIP_MAX_MINORS;
3619 	dd->disk->fops		= &mtip_block_ops;
3620 	dd->disk->private_data	= dd;
3621 	dd->index		= index;
3622 
3623 	mtip_hw_debugfs_init(dd);
3624 
3625 	memset(&dd->tags, 0, sizeof(dd->tags));
3626 	dd->tags.ops = &mtip_mq_ops;
3627 	dd->tags.nr_hw_queues = 1;
3628 	dd->tags.queue_depth = MTIP_MAX_COMMAND_SLOTS;
3629 	dd->tags.reserved_tags = 1;
3630 	dd->tags.cmd_size = sizeof(struct mtip_cmd);
3631 	dd->tags.numa_node = dd->numa_node;
3632 	dd->tags.flags = BLK_MQ_F_SHOULD_MERGE;
3633 	dd->tags.driver_data = dd;
3634 	dd->tags.timeout = MTIP_NCQ_CMD_TIMEOUT_MS;
3635 
3636 	rv = blk_mq_alloc_tag_set(&dd->tags);
3637 	if (rv) {
3638 		dev_err(&dd->pdev->dev,
3639 			"Unable to allocate request queue\n");
3640 		goto block_queue_alloc_tag_error;
3641 	}
3642 
3643 	/* Allocate the request queue. */
3644 	dd->queue = blk_mq_init_queue(&dd->tags);
3645 	if (IS_ERR(dd->queue)) {
3646 		dev_err(&dd->pdev->dev,
3647 			"Unable to allocate request queue\n");
3648 		rv = -ENOMEM;
3649 		goto block_queue_alloc_init_error;
3650 	}
3651 
3652 	dd->disk->queue		= dd->queue;
3653 	dd->queue->queuedata	= dd;
3654 
3655 skip_create_disk:
3656 	/* Initialize the protocol layer. */
3657 	wait_for_rebuild = mtip_hw_get_identify(dd);
3658 	if (wait_for_rebuild < 0) {
3659 		dev_err(&dd->pdev->dev,
3660 			"Protocol layer initialization failed\n");
3661 		rv = -EINVAL;
3662 		goto init_hw_cmds_error;
3663 	}
3664 
3665 	/*
3666 	 * if rebuild pending, start the service thread, and delay the block
3667 	 * queue creation and device_add_disk()
3668 	 */
3669 	if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3670 		goto start_service_thread;
3671 
3672 	/* Set device limits. */
3673 	blk_queue_flag_set(QUEUE_FLAG_NONROT, dd->queue);
3674 	blk_queue_flag_clear(QUEUE_FLAG_ADD_RANDOM, dd->queue);
3675 	blk_queue_max_segments(dd->queue, MTIP_MAX_SG);
3676 	blk_queue_physical_block_size(dd->queue, 4096);
3677 	blk_queue_max_hw_sectors(dd->queue, 0xffff);
3678 	blk_queue_max_segment_size(dd->queue, 0x400000);
3679 	blk_queue_io_min(dd->queue, 4096);
3680 
3681 	/* Set the capacity of the device in 512 byte sectors. */
3682 	if (!(mtip_hw_get_capacity(dd, &capacity))) {
3683 		dev_warn(&dd->pdev->dev,
3684 			"Could not read drive capacity\n");
3685 		rv = -EIO;
3686 		goto read_capacity_error;
3687 	}
3688 	set_capacity(dd->disk, capacity);
3689 
3690 	/* Enable the block device and add it to /dev */
3691 	device_add_disk(&dd->pdev->dev, dd->disk, NULL);
3692 
3693 	dd->bdev = bdget_disk(dd->disk, 0);
3694 	/*
3695 	 * Now that the disk is active, initialize any sysfs attributes
3696 	 * managed by the protocol layer.
3697 	 */
3698 	kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3699 	if (kobj) {
3700 		mtip_hw_sysfs_init(dd, kobj);
3701 		kobject_put(kobj);
3702 	}
3703 
3704 	if (dd->mtip_svc_handler) {
3705 		set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
3706 		return rv; /* service thread created for handling rebuild */
3707 	}
3708 
3709 start_service_thread:
3710 	dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread,
3711 						dd, dd->numa_node,
3712 						"mtip_svc_thd_%02d", index);
3713 
3714 	if (IS_ERR(dd->mtip_svc_handler)) {
3715 		dev_err(&dd->pdev->dev, "service thread failed to start\n");
3716 		dd->mtip_svc_handler = NULL;
3717 		rv = -EFAULT;
3718 		goto kthread_run_error;
3719 	}
3720 	wake_up_process(dd->mtip_svc_handler);
3721 	if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3722 		rv = wait_for_rebuild;
3723 
3724 	return rv;
3725 
3726 kthread_run_error:
3727 	bdput(dd->bdev);
3728 	dd->bdev = NULL;
3729 
3730 	/* Delete our gendisk. This also removes the device from /dev */
3731 	del_gendisk(dd->disk);
3732 
3733 read_capacity_error:
3734 init_hw_cmds_error:
3735 	blk_cleanup_queue(dd->queue);
3736 block_queue_alloc_init_error:
3737 	blk_mq_free_tag_set(&dd->tags);
3738 block_queue_alloc_tag_error:
3739 	mtip_hw_debugfs_exit(dd);
3740 disk_index_error:
3741 	ida_free(&rssd_index_ida, index);
3742 
3743 ida_get_error:
3744 	put_disk(dd->disk);
3745 
3746 alloc_disk_error:
3747 	mtip_hw_exit(dd); /* De-initialize the protocol layer. */
3748 
3749 protocol_init_error:
3750 	return rv;
3751 }
3752 
3753 static bool mtip_no_dev_cleanup(struct request *rq, void *data, bool reserv)
3754 {
3755 	struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3756 
3757 	cmd->status = BLK_STS_IOERR;
3758 	blk_mq_complete_request(rq);
3759 	return true;
3760 }
3761 
3762 /*
3763  * Block layer deinitialization function.
3764  *
3765  * Called by the PCI layer as each P320 device is removed.
3766  *
3767  * @dd Pointer to the driver data structure.
3768  *
3769  * return value
3770  *	0
3771  */
3772 static int mtip_block_remove(struct driver_data *dd)
3773 {
3774 	struct kobject *kobj;
3775 
3776 	mtip_hw_debugfs_exit(dd);
3777 
3778 	if (dd->mtip_svc_handler) {
3779 		set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags);
3780 		wake_up_interruptible(&dd->port->svc_wait);
3781 		kthread_stop(dd->mtip_svc_handler);
3782 	}
3783 
3784 	/* Clean up the sysfs attributes, if created */
3785 	if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) {
3786 		kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3787 		if (kobj) {
3788 			mtip_hw_sysfs_exit(dd, kobj);
3789 			kobject_put(kobj);
3790 		}
3791 	}
3792 
3793 	if (!dd->sr) {
3794 		/*
3795 		 * Explicitly wait here for IOs to quiesce,
3796 		 * as mtip_standby_drive usually won't wait for IOs.
3797 		 */
3798 		if (!mtip_quiesce_io(dd->port, MTIP_QUIESCE_IO_TIMEOUT_MS))
3799 			mtip_standby_drive(dd);
3800 	}
3801 	else
3802 		dev_info(&dd->pdev->dev, "device %s surprise removal\n",
3803 						dd->disk->disk_name);
3804 
3805 	blk_freeze_queue_start(dd->queue);
3806 	blk_mq_quiesce_queue(dd->queue);
3807 	blk_mq_tagset_busy_iter(&dd->tags, mtip_no_dev_cleanup, dd);
3808 	blk_mq_unquiesce_queue(dd->queue);
3809 
3810 	/*
3811 	 * Delete our gendisk structure. This also removes the device
3812 	 * from /dev
3813 	 */
3814 	if (dd->bdev) {
3815 		bdput(dd->bdev);
3816 		dd->bdev = NULL;
3817 	}
3818 	if (dd->disk) {
3819 		if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag))
3820 			del_gendisk(dd->disk);
3821 		if (dd->disk->queue) {
3822 			blk_cleanup_queue(dd->queue);
3823 			blk_mq_free_tag_set(&dd->tags);
3824 			dd->queue = NULL;
3825 		}
3826 		put_disk(dd->disk);
3827 	}
3828 	dd->disk  = NULL;
3829 
3830 	ida_free(&rssd_index_ida, dd->index);
3831 
3832 	/* De-initialize the protocol layer. */
3833 	mtip_hw_exit(dd);
3834 
3835 	return 0;
3836 }
3837 
3838 /*
3839  * Function called by the PCI layer when just before the
3840  * machine shuts down.
3841  *
3842  * If a protocol layer shutdown function is present it will be called
3843  * by this function.
3844  *
3845  * @dd Pointer to the driver data structure.
3846  *
3847  * return value
3848  *	0
3849  */
3850 static int mtip_block_shutdown(struct driver_data *dd)
3851 {
3852 	mtip_hw_shutdown(dd);
3853 
3854 	/* Delete our gendisk structure, and cleanup the blk queue. */
3855 	if (dd->disk) {
3856 		dev_info(&dd->pdev->dev,
3857 			"Shutting down %s ...\n", dd->disk->disk_name);
3858 
3859 		if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag))
3860 			del_gendisk(dd->disk);
3861 		if (dd->disk->queue) {
3862 			blk_cleanup_queue(dd->queue);
3863 			blk_mq_free_tag_set(&dd->tags);
3864 		}
3865 		put_disk(dd->disk);
3866 		dd->disk  = NULL;
3867 		dd->queue = NULL;
3868 	}
3869 
3870 	ida_free(&rssd_index_ida, dd->index);
3871 	return 0;
3872 }
3873 
3874 static int mtip_block_suspend(struct driver_data *dd)
3875 {
3876 	dev_info(&dd->pdev->dev,
3877 		"Suspending %s ...\n", dd->disk->disk_name);
3878 	mtip_hw_suspend(dd);
3879 	return 0;
3880 }
3881 
3882 static int mtip_block_resume(struct driver_data *dd)
3883 {
3884 	dev_info(&dd->pdev->dev, "Resuming %s ...\n",
3885 		dd->disk->disk_name);
3886 	mtip_hw_resume(dd);
3887 	return 0;
3888 }
3889 
3890 static void drop_cpu(int cpu)
3891 {
3892 	cpu_use[cpu]--;
3893 }
3894 
3895 static int get_least_used_cpu_on_node(int node)
3896 {
3897 	int cpu, least_used_cpu, least_cnt;
3898 	const struct cpumask *node_mask;
3899 
3900 	node_mask = cpumask_of_node(node);
3901 	least_used_cpu = cpumask_first(node_mask);
3902 	least_cnt = cpu_use[least_used_cpu];
3903 	cpu = least_used_cpu;
3904 
3905 	for_each_cpu(cpu, node_mask) {
3906 		if (cpu_use[cpu] < least_cnt) {
3907 			least_used_cpu = cpu;
3908 			least_cnt = cpu_use[cpu];
3909 		}
3910 	}
3911 	cpu_use[least_used_cpu]++;
3912 	return least_used_cpu;
3913 }
3914 
3915 /* Helper for selecting a node in round robin mode */
3916 static inline int mtip_get_next_rr_node(void)
3917 {
3918 	static int next_node = NUMA_NO_NODE;
3919 
3920 	if (next_node == NUMA_NO_NODE) {
3921 		next_node = first_online_node;
3922 		return next_node;
3923 	}
3924 
3925 	next_node = next_online_node(next_node);
3926 	if (next_node == MAX_NUMNODES)
3927 		next_node = first_online_node;
3928 	return next_node;
3929 }
3930 
3931 static DEFINE_HANDLER(0);
3932 static DEFINE_HANDLER(1);
3933 static DEFINE_HANDLER(2);
3934 static DEFINE_HANDLER(3);
3935 static DEFINE_HANDLER(4);
3936 static DEFINE_HANDLER(5);
3937 static DEFINE_HANDLER(6);
3938 static DEFINE_HANDLER(7);
3939 
3940 static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev)
3941 {
3942 	int pos;
3943 	unsigned short pcie_dev_ctrl;
3944 
3945 	pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
3946 	if (pos) {
3947 		pci_read_config_word(pdev,
3948 			pos + PCI_EXP_DEVCTL,
3949 			&pcie_dev_ctrl);
3950 		if (pcie_dev_ctrl & (1 << 11) ||
3951 		    pcie_dev_ctrl & (1 << 4)) {
3952 			dev_info(&dd->pdev->dev,
3953 				"Disabling ERO/No-Snoop on bridge device %04x:%04x\n",
3954 					pdev->vendor, pdev->device);
3955 			pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN |
3956 						PCI_EXP_DEVCTL_RELAX_EN);
3957 			pci_write_config_word(pdev,
3958 				pos + PCI_EXP_DEVCTL,
3959 				pcie_dev_ctrl);
3960 		}
3961 	}
3962 }
3963 
3964 static void mtip_fix_ero_nosnoop(struct driver_data *dd, struct pci_dev *pdev)
3965 {
3966 	/*
3967 	 * This workaround is specific to AMD/ATI chipset with a PCI upstream
3968 	 * device with device id 0x5aXX
3969 	 */
3970 	if (pdev->bus && pdev->bus->self) {
3971 		if (pdev->bus->self->vendor == PCI_VENDOR_ID_ATI &&
3972 		    ((pdev->bus->self->device & 0xff00) == 0x5a00)) {
3973 			mtip_disable_link_opts(dd, pdev->bus->self);
3974 		} else {
3975 			/* Check further up the topology */
3976 			struct pci_dev *parent_dev = pdev->bus->self;
3977 			if (parent_dev->bus &&
3978 				parent_dev->bus->parent &&
3979 				parent_dev->bus->parent->self &&
3980 				parent_dev->bus->parent->self->vendor ==
3981 					 PCI_VENDOR_ID_ATI &&
3982 				(parent_dev->bus->parent->self->device &
3983 					0xff00) == 0x5a00) {
3984 				mtip_disable_link_opts(dd,
3985 					parent_dev->bus->parent->self);
3986 			}
3987 		}
3988 	}
3989 }
3990 
3991 /*
3992  * Called for each supported PCI device detected.
3993  *
3994  * This function allocates the private data structure, enables the
3995  * PCI device and then calls the block layer initialization function.
3996  *
3997  * return value
3998  *	0 on success else an error code.
3999  */
4000 static int mtip_pci_probe(struct pci_dev *pdev,
4001 			const struct pci_device_id *ent)
4002 {
4003 	int rv = 0;
4004 	struct driver_data *dd = NULL;
4005 	char cpu_list[256];
4006 	const struct cpumask *node_mask;
4007 	int cpu, i = 0, j = 0;
4008 	int my_node = NUMA_NO_NODE;
4009 	unsigned long flags;
4010 
4011 	/* Allocate memory for this devices private data. */
4012 	my_node = pcibus_to_node(pdev->bus);
4013 	if (my_node != NUMA_NO_NODE) {
4014 		if (!node_online(my_node))
4015 			my_node = mtip_get_next_rr_node();
4016 	} else {
4017 		dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n");
4018 		my_node = mtip_get_next_rr_node();
4019 	}
4020 	dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n",
4021 		my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev),
4022 		cpu_to_node(raw_smp_processor_id()), raw_smp_processor_id());
4023 
4024 	dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node);
4025 	if (dd == NULL) {
4026 		dev_err(&pdev->dev,
4027 			"Unable to allocate memory for driver data\n");
4028 		return -ENOMEM;
4029 	}
4030 
4031 	/* Attach the private data to this PCI device.  */
4032 	pci_set_drvdata(pdev, dd);
4033 
4034 	rv = pcim_enable_device(pdev);
4035 	if (rv < 0) {
4036 		dev_err(&pdev->dev, "Unable to enable device\n");
4037 		goto iomap_err;
4038 	}
4039 
4040 	/* Map BAR5 to memory. */
4041 	rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME);
4042 	if (rv < 0) {
4043 		dev_err(&pdev->dev, "Unable to map regions\n");
4044 		goto iomap_err;
4045 	}
4046 
4047 	rv = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
4048 	if (rv) {
4049 		dev_warn(&pdev->dev, "64-bit DMA enable failed\n");
4050 		goto setmask_err;
4051 	}
4052 
4053 	/* Copy the info we may need later into the private data structure. */
4054 	dd->major	= mtip_major;
4055 	dd->instance	= instance;
4056 	dd->pdev	= pdev;
4057 	dd->numa_node	= my_node;
4058 
4059 	INIT_LIST_HEAD(&dd->online_list);
4060 	INIT_LIST_HEAD(&dd->remove_list);
4061 
4062 	memset(dd->workq_name, 0, 32);
4063 	snprintf(dd->workq_name, 31, "mtipq%d", dd->instance);
4064 
4065 	dd->isr_workq = create_workqueue(dd->workq_name);
4066 	if (!dd->isr_workq) {
4067 		dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance);
4068 		rv = -ENOMEM;
4069 		goto setmask_err;
4070 	}
4071 
4072 	memset(cpu_list, 0, sizeof(cpu_list));
4073 
4074 	node_mask = cpumask_of_node(dd->numa_node);
4075 	if (!cpumask_empty(node_mask)) {
4076 		for_each_cpu(cpu, node_mask)
4077 		{
4078 			snprintf(&cpu_list[j], 256 - j, "%d ", cpu);
4079 			j = strlen(cpu_list);
4080 		}
4081 
4082 		dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n",
4083 			dd->numa_node,
4084 			topology_physical_package_id(cpumask_first(node_mask)),
4085 			nr_cpus_node(dd->numa_node),
4086 			cpu_list);
4087 	} else
4088 		dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n");
4089 
4090 	dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node);
4091 	dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n",
4092 		cpu_to_node(dd->isr_binding), dd->isr_binding);
4093 
4094 	/* first worker context always runs in ISR */
4095 	dd->work[0].cpu_binding = dd->isr_binding;
4096 	dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4097 	dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4098 	dd->work[3].cpu_binding = dd->work[0].cpu_binding;
4099 	dd->work[4].cpu_binding = dd->work[1].cpu_binding;
4100 	dd->work[5].cpu_binding = dd->work[2].cpu_binding;
4101 	dd->work[6].cpu_binding = dd->work[2].cpu_binding;
4102 	dd->work[7].cpu_binding = dd->work[1].cpu_binding;
4103 
4104 	/* Log the bindings */
4105 	for_each_present_cpu(cpu) {
4106 		memset(cpu_list, 0, sizeof(cpu_list));
4107 		for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) {
4108 			if (dd->work[i].cpu_binding == cpu) {
4109 				snprintf(&cpu_list[j], 256 - j, "%d ", i);
4110 				j = strlen(cpu_list);
4111 			}
4112 		}
4113 		if (j)
4114 			dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list);
4115 	}
4116 
4117 	INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0);
4118 	INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1);
4119 	INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2);
4120 	INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3);
4121 	INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4);
4122 	INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5);
4123 	INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6);
4124 	INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7);
4125 
4126 	pci_set_master(pdev);
4127 	rv = pci_enable_msi(pdev);
4128 	if (rv) {
4129 		dev_warn(&pdev->dev,
4130 			"Unable to enable MSI interrupt.\n");
4131 		goto msi_initialize_err;
4132 	}
4133 
4134 	mtip_fix_ero_nosnoop(dd, pdev);
4135 
4136 	/* Initialize the block layer. */
4137 	rv = mtip_block_initialize(dd);
4138 	if (rv < 0) {
4139 		dev_err(&pdev->dev,
4140 			"Unable to initialize block layer\n");
4141 		goto block_initialize_err;
4142 	}
4143 
4144 	/*
4145 	 * Increment the instance count so that each device has a unique
4146 	 * instance number.
4147 	 */
4148 	instance++;
4149 	if (rv != MTIP_FTL_REBUILD_MAGIC)
4150 		set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
4151 	else
4152 		rv = 0; /* device in rebuild state, return 0 from probe */
4153 
4154 	/* Add to online list even if in ftl rebuild */
4155 	spin_lock_irqsave(&dev_lock, flags);
4156 	list_add(&dd->online_list, &online_list);
4157 	spin_unlock_irqrestore(&dev_lock, flags);
4158 
4159 	goto done;
4160 
4161 block_initialize_err:
4162 	pci_disable_msi(pdev);
4163 
4164 msi_initialize_err:
4165 	if (dd->isr_workq) {
4166 		flush_workqueue(dd->isr_workq);
4167 		destroy_workqueue(dd->isr_workq);
4168 		drop_cpu(dd->work[0].cpu_binding);
4169 		drop_cpu(dd->work[1].cpu_binding);
4170 		drop_cpu(dd->work[2].cpu_binding);
4171 	}
4172 setmask_err:
4173 	pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4174 
4175 iomap_err:
4176 	kfree(dd);
4177 	pci_set_drvdata(pdev, NULL);
4178 	return rv;
4179 done:
4180 	return rv;
4181 }
4182 
4183 /*
4184  * Called for each probed device when the device is removed or the
4185  * driver is unloaded.
4186  *
4187  * return value
4188  *	None
4189  */
4190 static void mtip_pci_remove(struct pci_dev *pdev)
4191 {
4192 	struct driver_data *dd = pci_get_drvdata(pdev);
4193 	unsigned long flags, to;
4194 
4195 	set_bit(MTIP_DDF_REMOVAL_BIT, &dd->dd_flag);
4196 
4197 	spin_lock_irqsave(&dev_lock, flags);
4198 	list_del_init(&dd->online_list);
4199 	list_add(&dd->remove_list, &removing_list);
4200 	spin_unlock_irqrestore(&dev_lock, flags);
4201 
4202 	mtip_check_surprise_removal(pdev);
4203 	synchronize_irq(dd->pdev->irq);
4204 
4205 	/* Spin until workers are done */
4206 	to = jiffies + msecs_to_jiffies(4000);
4207 	do {
4208 		msleep(20);
4209 	} while (atomic_read(&dd->irq_workers_active) != 0 &&
4210 		time_before(jiffies, to));
4211 
4212 	if (!dd->sr)
4213 		fsync_bdev(dd->bdev);
4214 
4215 	if (atomic_read(&dd->irq_workers_active) != 0) {
4216 		dev_warn(&dd->pdev->dev,
4217 			"Completion workers still active!\n");
4218 	}
4219 
4220 	blk_set_queue_dying(dd->queue);
4221 	set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
4222 
4223 	/* Clean up the block layer. */
4224 	mtip_block_remove(dd);
4225 
4226 	if (dd->isr_workq) {
4227 		flush_workqueue(dd->isr_workq);
4228 		destroy_workqueue(dd->isr_workq);
4229 		drop_cpu(dd->work[0].cpu_binding);
4230 		drop_cpu(dd->work[1].cpu_binding);
4231 		drop_cpu(dd->work[2].cpu_binding);
4232 	}
4233 
4234 	pci_disable_msi(pdev);
4235 
4236 	spin_lock_irqsave(&dev_lock, flags);
4237 	list_del_init(&dd->remove_list);
4238 	spin_unlock_irqrestore(&dev_lock, flags);
4239 
4240 	kfree(dd);
4241 
4242 	pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4243 	pci_set_drvdata(pdev, NULL);
4244 }
4245 
4246 /*
4247  * Called for each probed device when the device is suspended.
4248  *
4249  * return value
4250  *	0  Success
4251  *	<0 Error
4252  */
4253 static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
4254 {
4255 	int rv = 0;
4256 	struct driver_data *dd = pci_get_drvdata(pdev);
4257 
4258 	if (!dd) {
4259 		dev_err(&pdev->dev,
4260 			"Driver private datastructure is NULL\n");
4261 		return -EFAULT;
4262 	}
4263 
4264 	set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4265 
4266 	/* Disable ports & interrupts then send standby immediate */
4267 	rv = mtip_block_suspend(dd);
4268 	if (rv < 0) {
4269 		dev_err(&pdev->dev,
4270 			"Failed to suspend controller\n");
4271 		return rv;
4272 	}
4273 
4274 	/*
4275 	 * Save the pci config space to pdev structure &
4276 	 * disable the device
4277 	 */
4278 	pci_save_state(pdev);
4279 	pci_disable_device(pdev);
4280 
4281 	/* Move to Low power state*/
4282 	pci_set_power_state(pdev, PCI_D3hot);
4283 
4284 	return rv;
4285 }
4286 
4287 /*
4288  * Called for each probed device when the device is resumed.
4289  *
4290  * return value
4291  *      0  Success
4292  *      <0 Error
4293  */
4294 static int mtip_pci_resume(struct pci_dev *pdev)
4295 {
4296 	int rv = 0;
4297 	struct driver_data *dd;
4298 
4299 	dd = pci_get_drvdata(pdev);
4300 	if (!dd) {
4301 		dev_err(&pdev->dev,
4302 			"Driver private datastructure is NULL\n");
4303 		return -EFAULT;
4304 	}
4305 
4306 	/* Move the device to active State */
4307 	pci_set_power_state(pdev, PCI_D0);
4308 
4309 	/* Restore PCI configuration space */
4310 	pci_restore_state(pdev);
4311 
4312 	/* Enable the PCI device*/
4313 	rv = pcim_enable_device(pdev);
4314 	if (rv < 0) {
4315 		dev_err(&pdev->dev,
4316 			"Failed to enable card during resume\n");
4317 		goto err;
4318 	}
4319 	pci_set_master(pdev);
4320 
4321 	/*
4322 	 * Calls hbaReset, initPort, & startPort function
4323 	 * then enables interrupts
4324 	 */
4325 	rv = mtip_block_resume(dd);
4326 	if (rv < 0)
4327 		dev_err(&pdev->dev, "Unable to resume\n");
4328 
4329 err:
4330 	clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4331 
4332 	return rv;
4333 }
4334 
4335 /*
4336  * Shutdown routine
4337  *
4338  * return value
4339  *      None
4340  */
4341 static void mtip_pci_shutdown(struct pci_dev *pdev)
4342 {
4343 	struct driver_data *dd = pci_get_drvdata(pdev);
4344 	if (dd)
4345 		mtip_block_shutdown(dd);
4346 }
4347 
4348 /* Table of device ids supported by this driver. */
4349 static const struct pci_device_id mtip_pci_tbl[] = {
4350 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) },
4351 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) },
4352 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) },
4353 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) },
4354 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) },
4355 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) },
4356 	{ PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) },
4357 	{ 0 }
4358 };
4359 
4360 /* Structure that describes the PCI driver functions. */
4361 static struct pci_driver mtip_pci_driver = {
4362 	.name			= MTIP_DRV_NAME,
4363 	.id_table		= mtip_pci_tbl,
4364 	.probe			= mtip_pci_probe,
4365 	.remove			= mtip_pci_remove,
4366 	.suspend		= mtip_pci_suspend,
4367 	.resume			= mtip_pci_resume,
4368 	.shutdown		= mtip_pci_shutdown,
4369 };
4370 
4371 MODULE_DEVICE_TABLE(pci, mtip_pci_tbl);
4372 
4373 /*
4374  * Module initialization function.
4375  *
4376  * Called once when the module is loaded. This function allocates a major
4377  * block device number to the Cyclone devices and registers the PCI layer
4378  * of the driver.
4379  *
4380  * Return value
4381  *      0 on success else error code.
4382  */
4383 static int __init mtip_init(void)
4384 {
4385 	int error;
4386 
4387 	pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
4388 
4389 	spin_lock_init(&dev_lock);
4390 
4391 	INIT_LIST_HEAD(&online_list);
4392 	INIT_LIST_HEAD(&removing_list);
4393 
4394 	/* Allocate a major block device number to use with this driver. */
4395 	error = register_blkdev(0, MTIP_DRV_NAME);
4396 	if (error <= 0) {
4397 		pr_err("Unable to register block device (%d)\n",
4398 		error);
4399 		return -EBUSY;
4400 	}
4401 	mtip_major = error;
4402 
4403 	dfs_parent = debugfs_create_dir("rssd", NULL);
4404 	if (IS_ERR_OR_NULL(dfs_parent)) {
4405 		pr_warn("Error creating debugfs parent\n");
4406 		dfs_parent = NULL;
4407 	}
4408 	if (dfs_parent) {
4409 		dfs_device_status = debugfs_create_file("device_status",
4410 					0444, dfs_parent, NULL,
4411 					&mtip_device_status_fops);
4412 		if (IS_ERR_OR_NULL(dfs_device_status)) {
4413 			pr_err("Error creating device_status node\n");
4414 			dfs_device_status = NULL;
4415 		}
4416 	}
4417 
4418 	/* Register our PCI operations. */
4419 	error = pci_register_driver(&mtip_pci_driver);
4420 	if (error) {
4421 		debugfs_remove(dfs_parent);
4422 		unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4423 	}
4424 
4425 	return error;
4426 }
4427 
4428 /*
4429  * Module de-initialization function.
4430  *
4431  * Called once when the module is unloaded. This function deallocates
4432  * the major block device number allocated by mtip_init() and
4433  * unregisters the PCI layer of the driver.
4434  *
4435  * Return value
4436  *      none
4437  */
4438 static void __exit mtip_exit(void)
4439 {
4440 	/* Release the allocated major block device number. */
4441 	unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4442 
4443 	/* Unregister the PCI driver. */
4444 	pci_unregister_driver(&mtip_pci_driver);
4445 
4446 	debugfs_remove_recursive(dfs_parent);
4447 }
4448 
4449 MODULE_AUTHOR("Micron Technology, Inc");
4450 MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver");
4451 MODULE_LICENSE("GPL");
4452 MODULE_VERSION(MTIP_DRV_VERSION);
4453 
4454 module_init(mtip_init);
4455 module_exit(mtip_exit);
4456