xref: /openbmc/linux/drivers/bcma/scan.c (revision cd5d5810)
1 /*
2  * Broadcom specific AMBA
3  * Bus scanning
4  *
5  * Licensed under the GNU/GPL. See COPYING for details.
6  */
7 
8 #include "scan.h"
9 #include "bcma_private.h"
10 
11 #include <linux/bcma/bcma.h>
12 #include <linux/bcma/bcma_regs.h>
13 #include <linux/pci.h>
14 #include <linux/io.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/slab.h>
17 
18 struct bcma_device_id_name {
19 	u16 id;
20 	const char *name;
21 };
22 
23 static const struct bcma_device_id_name bcma_arm_device_names[] = {
24 	{ BCMA_CORE_4706_MAC_GBIT_COMMON, "BCM4706 GBit MAC Common" },
25 	{ BCMA_CORE_ARM_1176, "ARM 1176" },
26 	{ BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
27 	{ BCMA_CORE_ARM_CM3, "ARM CM3" },
28 };
29 
30 static const struct bcma_device_id_name bcma_bcm_device_names[] = {
31 	{ BCMA_CORE_OOB_ROUTER, "OOB Router" },
32 	{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
33 	{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
34 	{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
35 	{ BCMA_CORE_PCIEG2, "PCIe Gen 2" },
36 	{ BCMA_CORE_DMA, "DMA" },
37 	{ BCMA_CORE_SDIO3, "SDIO3" },
38 	{ BCMA_CORE_USB20, "USB 2.0" },
39 	{ BCMA_CORE_USB30, "USB 3.0" },
40 	{ BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" },
41 	{ BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" },
42 	{ BCMA_CORE_ROM, "ROM" },
43 	{ BCMA_CORE_NAND, "NAND flash controller" },
44 	{ BCMA_CORE_QSPI, "SPI flash controller" },
45 	{ BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" },
46 	{ BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
47 	{ BCMA_CORE_AMEMC, "AMEMC (DDR)" },
48 	{ BCMA_CORE_ALTA, "ALTA (I2S)" },
49 	{ BCMA_CORE_INVALID, "Invalid" },
50 	{ BCMA_CORE_CHIPCOMMON, "ChipCommon" },
51 	{ BCMA_CORE_ILINE20, "ILine 20" },
52 	{ BCMA_CORE_SRAM, "SRAM" },
53 	{ BCMA_CORE_SDRAM, "SDRAM" },
54 	{ BCMA_CORE_PCI, "PCI" },
55 	{ BCMA_CORE_ETHERNET, "Fast Ethernet" },
56 	{ BCMA_CORE_V90, "V90" },
57 	{ BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" },
58 	{ BCMA_CORE_ADSL, "ADSL" },
59 	{ BCMA_CORE_ILINE100, "ILine 100" },
60 	{ BCMA_CORE_IPSEC, "IPSEC" },
61 	{ BCMA_CORE_UTOPIA, "UTOPIA" },
62 	{ BCMA_CORE_PCMCIA, "PCMCIA" },
63 	{ BCMA_CORE_INTERNAL_MEM, "Internal Memory" },
64 	{ BCMA_CORE_MEMC_SDRAM, "MEMC SDRAM" },
65 	{ BCMA_CORE_OFDM, "OFDM" },
66 	{ BCMA_CORE_EXTIF, "EXTIF" },
67 	{ BCMA_CORE_80211, "IEEE 802.11" },
68 	{ BCMA_CORE_PHY_A, "PHY A" },
69 	{ BCMA_CORE_PHY_B, "PHY B" },
70 	{ BCMA_CORE_PHY_G, "PHY G" },
71 	{ BCMA_CORE_USB11_HOST, "USB 1.1 Host" },
72 	{ BCMA_CORE_USB11_DEV, "USB 1.1 Device" },
73 	{ BCMA_CORE_USB20_HOST, "USB 2.0 Host" },
74 	{ BCMA_CORE_USB20_DEV, "USB 2.0 Device" },
75 	{ BCMA_CORE_SDIO_HOST, "SDIO Host" },
76 	{ BCMA_CORE_ROBOSWITCH, "Roboswitch" },
77 	{ BCMA_CORE_PARA_ATA, "PATA" },
78 	{ BCMA_CORE_SATA_XORDMA, "SATA XOR-DMA" },
79 	{ BCMA_CORE_ETHERNET_GBIT, "GBit Ethernet" },
80 	{ BCMA_CORE_PCIE, "PCIe" },
81 	{ BCMA_CORE_PHY_N, "PHY N" },
82 	{ BCMA_CORE_SRAM_CTL, "SRAM Controller" },
83 	{ BCMA_CORE_MINI_MACPHY, "Mini MACPHY" },
84 	{ BCMA_CORE_PHY_LP, "PHY LP" },
85 	{ BCMA_CORE_PMU, "PMU" },
86 	{ BCMA_CORE_PHY_SSN, "PHY SSN" },
87 	{ BCMA_CORE_SDIO_DEV, "SDIO Device" },
88 	{ BCMA_CORE_PHY_HT, "PHY HT" },
89 	{ BCMA_CORE_MAC_GBIT, "GBit MAC" },
90 	{ BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
91 	{ BCMA_CORE_PCIE_RC, "PCIe Root Complex" },
92 	{ BCMA_CORE_OCP_OCP_BRIDGE, "OCP to OCP Bridge" },
93 	{ BCMA_CORE_SHARED_COMMON, "Common Shared" },
94 	{ BCMA_CORE_OCP_AHB_BRIDGE, "OCP to AHB Bridge" },
95 	{ BCMA_CORE_SPI_HOST, "SPI Host" },
96 	{ BCMA_CORE_I2S, "I2S" },
97 	{ BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" },
98 	{ BCMA_CORE_SHIM, "SHIM" },
99 	{ BCMA_CORE_PCIE2, "PCIe Gen2" },
100 	{ BCMA_CORE_ARM_CR4, "ARM CR4" },
101 	{ BCMA_CORE_DEFAULT, "Default" },
102 };
103 
104 static const struct bcma_device_id_name bcma_mips_device_names[] = {
105 	{ BCMA_CORE_MIPS, "MIPS" },
106 	{ BCMA_CORE_MIPS_3302, "MIPS 3302" },
107 	{ BCMA_CORE_MIPS_74K, "MIPS 74K" },
108 };
109 
110 static const char *bcma_device_name(const struct bcma_device_id *id)
111 {
112 	const struct bcma_device_id_name *names;
113 	int size, i;
114 
115 	/* search manufacturer specific names */
116 	switch (id->manuf) {
117 	case BCMA_MANUF_ARM:
118 		names = bcma_arm_device_names;
119 		size = ARRAY_SIZE(bcma_arm_device_names);
120 		break;
121 	case BCMA_MANUF_BCM:
122 		names = bcma_bcm_device_names;
123 		size = ARRAY_SIZE(bcma_bcm_device_names);
124 		break;
125 	case BCMA_MANUF_MIPS:
126 		names = bcma_mips_device_names;
127 		size = ARRAY_SIZE(bcma_mips_device_names);
128 		break;
129 	default:
130 		return "UNKNOWN";
131 	}
132 
133 	for (i = 0; i < size; i++) {
134 		if (names[i].id == id->id)
135 			return names[i].name;
136 	}
137 
138 	return "UNKNOWN";
139 }
140 
141 static u32 bcma_scan_read32(struct bcma_bus *bus, u8 current_coreidx,
142 		       u16 offset)
143 {
144 	return readl(bus->mmio + offset);
145 }
146 
147 static void bcma_scan_switch_core(struct bcma_bus *bus, u32 addr)
148 {
149 	if (bus->hosttype == BCMA_HOSTTYPE_PCI)
150 		pci_write_config_dword(bus->host_pci, BCMA_PCI_BAR0_WIN,
151 				       addr);
152 }
153 
154 static u32 bcma_erom_get_ent(struct bcma_bus *bus, u32 __iomem **eromptr)
155 {
156 	u32 ent = readl(*eromptr);
157 	(*eromptr)++;
158 	return ent;
159 }
160 
161 static void bcma_erom_push_ent(u32 __iomem **eromptr)
162 {
163 	(*eromptr)--;
164 }
165 
166 static s32 bcma_erom_get_ci(struct bcma_bus *bus, u32 __iomem **eromptr)
167 {
168 	u32 ent = bcma_erom_get_ent(bus, eromptr);
169 	if (!(ent & SCAN_ER_VALID))
170 		return -ENOENT;
171 	if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_CI)
172 		return -ENOENT;
173 	return ent;
174 }
175 
176 static bool bcma_erom_is_end(struct bcma_bus *bus, u32 __iomem **eromptr)
177 {
178 	u32 ent = bcma_erom_get_ent(bus, eromptr);
179 	bcma_erom_push_ent(eromptr);
180 	return (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID));
181 }
182 
183 static bool bcma_erom_is_bridge(struct bcma_bus *bus, u32 __iomem **eromptr)
184 {
185 	u32 ent = bcma_erom_get_ent(bus, eromptr);
186 	bcma_erom_push_ent(eromptr);
187 	return (((ent & SCAN_ER_VALID)) &&
188 		((ent & SCAN_ER_TAGX) == SCAN_ER_TAG_ADDR) &&
189 		((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE));
190 }
191 
192 static void bcma_erom_skip_component(struct bcma_bus *bus, u32 __iomem **eromptr)
193 {
194 	u32 ent;
195 	while (1) {
196 		ent = bcma_erom_get_ent(bus, eromptr);
197 		if ((ent & SCAN_ER_VALID) &&
198 		    ((ent & SCAN_ER_TAG) == SCAN_ER_TAG_CI))
199 			break;
200 		if (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID))
201 			break;
202 	}
203 	bcma_erom_push_ent(eromptr);
204 }
205 
206 static s32 bcma_erom_get_mst_port(struct bcma_bus *bus, u32 __iomem **eromptr)
207 {
208 	u32 ent = bcma_erom_get_ent(bus, eromptr);
209 	if (!(ent & SCAN_ER_VALID))
210 		return -ENOENT;
211 	if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_MP)
212 		return -ENOENT;
213 	return ent;
214 }
215 
216 static u32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
217 				  u32 type, u8 port)
218 {
219 	u32 addrl, addrh, sizel, sizeh = 0;
220 	u32 size;
221 
222 	u32 ent = bcma_erom_get_ent(bus, eromptr);
223 	if ((!(ent & SCAN_ER_VALID)) ||
224 	    ((ent & SCAN_ER_TAGX) != SCAN_ER_TAG_ADDR) ||
225 	    ((ent & SCAN_ADDR_TYPE) != type) ||
226 	    (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
227 		bcma_erom_push_ent(eromptr);
228 		return (u32)-EINVAL;
229 	}
230 
231 	addrl = ent & SCAN_ADDR_ADDR;
232 	if (ent & SCAN_ADDR_AG32)
233 		addrh = bcma_erom_get_ent(bus, eromptr);
234 	else
235 		addrh = 0;
236 
237 	if ((ent & SCAN_ADDR_SZ) == SCAN_ADDR_SZ_SZD) {
238 		size = bcma_erom_get_ent(bus, eromptr);
239 		sizel = size & SCAN_SIZE_SZ;
240 		if (size & SCAN_SIZE_SG32)
241 			sizeh = bcma_erom_get_ent(bus, eromptr);
242 	} else
243 		sizel = SCAN_ADDR_SZ_BASE <<
244 				((ent & SCAN_ADDR_SZ) >> SCAN_ADDR_SZ_SHIFT);
245 
246 	return addrl;
247 }
248 
249 static struct bcma_device *bcma_find_core_by_index(struct bcma_bus *bus,
250 						   u16 index)
251 {
252 	struct bcma_device *core;
253 
254 	list_for_each_entry(core, &bus->cores, list) {
255 		if (core->core_index == index)
256 			return core;
257 	}
258 	return NULL;
259 }
260 
261 static struct bcma_device *bcma_find_core_reverse(struct bcma_bus *bus, u16 coreid)
262 {
263 	struct bcma_device *core;
264 
265 	list_for_each_entry_reverse(core, &bus->cores, list) {
266 		if (core->id.id == coreid)
267 			return core;
268 	}
269 	return NULL;
270 }
271 
272 #define IS_ERR_VALUE_U32(x) ((x) >= (u32)-MAX_ERRNO)
273 
274 static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
275 			      struct bcma_device_id *match, int core_num,
276 			      struct bcma_device *core)
277 {
278 	u32 tmp;
279 	u8 i, j;
280 	s32 cia, cib;
281 	u8 ports[2], wrappers[2];
282 
283 	/* get CIs */
284 	cia = bcma_erom_get_ci(bus, eromptr);
285 	if (cia < 0) {
286 		bcma_erom_push_ent(eromptr);
287 		if (bcma_erom_is_end(bus, eromptr))
288 			return -ESPIPE;
289 		return -EILSEQ;
290 	}
291 	cib = bcma_erom_get_ci(bus, eromptr);
292 	if (cib < 0)
293 		return -EILSEQ;
294 
295 	/* parse CIs */
296 	core->id.class = (cia & SCAN_CIA_CLASS) >> SCAN_CIA_CLASS_SHIFT;
297 	core->id.id = (cia & SCAN_CIA_ID) >> SCAN_CIA_ID_SHIFT;
298 	core->id.manuf = (cia & SCAN_CIA_MANUF) >> SCAN_CIA_MANUF_SHIFT;
299 	ports[0] = (cib & SCAN_CIB_NMP) >> SCAN_CIB_NMP_SHIFT;
300 	ports[1] = (cib & SCAN_CIB_NSP) >> SCAN_CIB_NSP_SHIFT;
301 	wrappers[0] = (cib & SCAN_CIB_NMW) >> SCAN_CIB_NMW_SHIFT;
302 	wrappers[1] = (cib & SCAN_CIB_NSW) >> SCAN_CIB_NSW_SHIFT;
303 	core->id.rev = (cib & SCAN_CIB_REV) >> SCAN_CIB_REV_SHIFT;
304 
305 	if (((core->id.manuf == BCMA_MANUF_ARM) &&
306 	     (core->id.id == 0xFFF)) ||
307 	    (ports[1] == 0)) {
308 		bcma_erom_skip_component(bus, eromptr);
309 		return -ENXIO;
310 	}
311 
312 	/* check if component is a core at all */
313 	if (wrappers[0] + wrappers[1] == 0) {
314 		/* Some specific cores don't need wrappers */
315 		switch (core->id.id) {
316 		case BCMA_CORE_4706_MAC_GBIT_COMMON:
317 		/* Not used yet: case BCMA_CORE_OOB_ROUTER: */
318 			break;
319 		default:
320 			bcma_erom_skip_component(bus, eromptr);
321 			return -ENXIO;
322 		}
323 	}
324 
325 	if (bcma_erom_is_bridge(bus, eromptr)) {
326 		bcma_erom_skip_component(bus, eromptr);
327 		return -ENXIO;
328 	}
329 
330 	if (bcma_find_core_by_index(bus, core_num)) {
331 		bcma_erom_skip_component(bus, eromptr);
332 		return -ENODEV;
333 	}
334 
335 	if (match && ((match->manuf != BCMA_ANY_MANUF &&
336 	      match->manuf != core->id.manuf) ||
337 	     (match->id != BCMA_ANY_ID && match->id != core->id.id) ||
338 	     (match->rev != BCMA_ANY_REV && match->rev != core->id.rev) ||
339 	     (match->class != BCMA_ANY_CLASS && match->class != core->id.class)
340 	    )) {
341 		bcma_erom_skip_component(bus, eromptr);
342 		return -ENODEV;
343 	}
344 
345 	/* get & parse master ports */
346 	for (i = 0; i < ports[0]; i++) {
347 		s32 mst_port_d = bcma_erom_get_mst_port(bus, eromptr);
348 		if (mst_port_d < 0)
349 			return -EILSEQ;
350 	}
351 
352 	/* First Slave Address Descriptor should be port 0:
353 	 * the main register space for the core
354 	 */
355 	tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0);
356 	if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) {
357 		/* Try again to see if it is a bridge */
358 		tmp = bcma_erom_get_addr_desc(bus, eromptr,
359 					      SCAN_ADDR_TYPE_BRIDGE, 0);
360 		if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) {
361 			return -EILSEQ;
362 		} else {
363 			bcma_info(bus, "Bridge found\n");
364 			return -ENXIO;
365 		}
366 	}
367 	core->addr = tmp;
368 
369 	/* get & parse slave ports */
370 	for (i = 0; i < ports[1]; i++) {
371 		for (j = 0; ; j++) {
372 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
373 				SCAN_ADDR_TYPE_SLAVE, i);
374 			if (IS_ERR_VALUE_U32(tmp)) {
375 				/* no more entries for port _i_ */
376 				/* pr_debug("erom: slave port %d "
377 				 * "has %d descriptors\n", i, j); */
378 				break;
379 			} else {
380 				if (i == 0 && j == 0)
381 					core->addr1 = tmp;
382 			}
383 		}
384 	}
385 
386 	/* get & parse master wrappers */
387 	for (i = 0; i < wrappers[0]; i++) {
388 		for (j = 0; ; j++) {
389 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
390 				SCAN_ADDR_TYPE_MWRAP, i);
391 			if (IS_ERR_VALUE_U32(tmp)) {
392 				/* no more entries for port _i_ */
393 				/* pr_debug("erom: master wrapper %d "
394 				 * "has %d descriptors\n", i, j); */
395 				break;
396 			} else {
397 				if (i == 0 && j == 0)
398 					core->wrap = tmp;
399 			}
400 		}
401 	}
402 
403 	/* get & parse slave wrappers */
404 	for (i = 0; i < wrappers[1]; i++) {
405 		u8 hack = (ports[1] == 1) ? 0 : 1;
406 		for (j = 0; ; j++) {
407 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
408 				SCAN_ADDR_TYPE_SWRAP, i + hack);
409 			if (IS_ERR_VALUE_U32(tmp)) {
410 				/* no more entries for port _i_ */
411 				/* pr_debug("erom: master wrapper %d "
412 				 * has %d descriptors\n", i, j); */
413 				break;
414 			} else {
415 				if (wrappers[0] == 0 && !i && !j)
416 					core->wrap = tmp;
417 			}
418 		}
419 	}
420 	if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
421 		core->io_addr = ioremap_nocache(core->addr, BCMA_CORE_SIZE);
422 		if (!core->io_addr)
423 			return -ENOMEM;
424 		core->io_wrap = ioremap_nocache(core->wrap, BCMA_CORE_SIZE);
425 		if (!core->io_wrap) {
426 			iounmap(core->io_addr);
427 			return -ENOMEM;
428 		}
429 	}
430 	return 0;
431 }
432 
433 void bcma_init_bus(struct bcma_bus *bus)
434 {
435 	s32 tmp;
436 	struct bcma_chipinfo *chipinfo = &(bus->chipinfo);
437 
438 	if (bus->init_done)
439 		return;
440 
441 	INIT_LIST_HEAD(&bus->cores);
442 	bus->nr_cores = 0;
443 
444 	bcma_scan_switch_core(bus, BCMA_ADDR_BASE);
445 
446 	tmp = bcma_scan_read32(bus, 0, BCMA_CC_ID);
447 	chipinfo->id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT;
448 	chipinfo->rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT;
449 	chipinfo->pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT;
450 	bcma_info(bus, "Found chip with id 0x%04X, rev 0x%02X and package 0x%02X\n",
451 		  chipinfo->id, chipinfo->rev, chipinfo->pkg);
452 
453 	bus->init_done = true;
454 }
455 
456 int bcma_bus_scan(struct bcma_bus *bus)
457 {
458 	u32 erombase;
459 	u32 __iomem *eromptr, *eromend;
460 
461 	int err, core_num = 0;
462 
463 	bcma_init_bus(bus);
464 
465 	erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
466 	if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
467 		eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
468 		if (!eromptr)
469 			return -ENOMEM;
470 	} else {
471 		eromptr = bus->mmio;
472 	}
473 
474 	eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
475 
476 	bcma_scan_switch_core(bus, erombase);
477 
478 	while (eromptr < eromend) {
479 		struct bcma_device *other_core;
480 		struct bcma_device *core = kzalloc(sizeof(*core), GFP_KERNEL);
481 		if (!core) {
482 			err = -ENOMEM;
483 			goto out;
484 		}
485 		INIT_LIST_HEAD(&core->list);
486 		core->bus = bus;
487 
488 		err = bcma_get_next_core(bus, &eromptr, NULL, core_num, core);
489 		if (err < 0) {
490 			kfree(core);
491 			if (err == -ENODEV) {
492 				core_num++;
493 				continue;
494 			} else if (err == -ENXIO) {
495 				continue;
496 			} else if (err == -ESPIPE) {
497 				break;
498 			}
499 			goto out;
500 		}
501 
502 		core->core_index = core_num++;
503 		bus->nr_cores++;
504 		other_core = bcma_find_core_reverse(bus, core->id.id);
505 		core->core_unit = (other_core == NULL) ? 0 : other_core->core_unit + 1;
506 
507 		bcma_info(bus, "Core %d found: %s (manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
508 			  core->core_index, bcma_device_name(&core->id),
509 			  core->id.manuf, core->id.id, core->id.rev,
510 			  core->id.class);
511 
512 		list_add_tail(&core->list, &bus->cores);
513 	}
514 
515 	err = 0;
516 out:
517 	if (bus->hosttype == BCMA_HOSTTYPE_SOC)
518 		iounmap(eromptr);
519 
520 	return err;
521 }
522 
523 int __init bcma_bus_scan_early(struct bcma_bus *bus,
524 			       struct bcma_device_id *match,
525 			       struct bcma_device *core)
526 {
527 	u32 erombase;
528 	u32 __iomem *eromptr, *eromend;
529 
530 	int err = -ENODEV;
531 	int core_num = 0;
532 
533 	erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
534 	if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
535 		eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
536 		if (!eromptr)
537 			return -ENOMEM;
538 	} else {
539 		eromptr = bus->mmio;
540 	}
541 
542 	eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
543 
544 	bcma_scan_switch_core(bus, erombase);
545 
546 	while (eromptr < eromend) {
547 		memset(core, 0, sizeof(*core));
548 		INIT_LIST_HEAD(&core->list);
549 		core->bus = bus;
550 
551 		err = bcma_get_next_core(bus, &eromptr, match, core_num, core);
552 		if (err == -ENODEV) {
553 			core_num++;
554 			continue;
555 		} else if (err == -ENXIO)
556 			continue;
557 		else if (err == -ESPIPE)
558 			break;
559 		else if (err < 0)
560 			goto out;
561 
562 		core->core_index = core_num++;
563 		bus->nr_cores++;
564 		bcma_info(bus, "Core %d found: %s (manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
565 			  core->core_index, bcma_device_name(&core->id),
566 			  core->id.manuf, core->id.id, core->id.rev,
567 			  core->id.class);
568 
569 		list_add_tail(&core->list, &bus->cores);
570 		err = 0;
571 		break;
572 	}
573 
574 out:
575 	if (bus->hosttype == BCMA_HOSTTYPE_SOC)
576 		iounmap(eromptr);
577 
578 	return err;
579 }
580