1 /* 2 * Broadcom specific AMBA 3 * Bus scanning 4 * 5 * Licensed under the GNU/GPL. See COPYING for details. 6 */ 7 8 #include "scan.h" 9 #include "bcma_private.h" 10 11 #include <linux/bcma/bcma.h> 12 #include <linux/bcma/bcma_regs.h> 13 #include <linux/pci.h> 14 #include <linux/io.h> 15 #include <linux/dma-mapping.h> 16 #include <linux/slab.h> 17 18 struct bcma_device_id_name { 19 u16 id; 20 const char *name; 21 }; 22 23 static const struct bcma_device_id_name bcma_arm_device_names[] = { 24 { BCMA_CORE_ARM_1176, "ARM 1176" }, 25 { BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" }, 26 { BCMA_CORE_ARM_CM3, "ARM CM3" }, 27 }; 28 29 static const struct bcma_device_id_name bcma_bcm_device_names[] = { 30 { BCMA_CORE_OOB_ROUTER, "OOB Router" }, 31 { BCMA_CORE_INVALID, "Invalid" }, 32 { BCMA_CORE_CHIPCOMMON, "ChipCommon" }, 33 { BCMA_CORE_ILINE20, "ILine 20" }, 34 { BCMA_CORE_SRAM, "SRAM" }, 35 { BCMA_CORE_SDRAM, "SDRAM" }, 36 { BCMA_CORE_PCI, "PCI" }, 37 { BCMA_CORE_ETHERNET, "Fast Ethernet" }, 38 { BCMA_CORE_V90, "V90" }, 39 { BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" }, 40 { BCMA_CORE_ADSL, "ADSL" }, 41 { BCMA_CORE_ILINE100, "ILine 100" }, 42 { BCMA_CORE_IPSEC, "IPSEC" }, 43 { BCMA_CORE_UTOPIA, "UTOPIA" }, 44 { BCMA_CORE_PCMCIA, "PCMCIA" }, 45 { BCMA_CORE_INTERNAL_MEM, "Internal Memory" }, 46 { BCMA_CORE_MEMC_SDRAM, "MEMC SDRAM" }, 47 { BCMA_CORE_OFDM, "OFDM" }, 48 { BCMA_CORE_EXTIF, "EXTIF" }, 49 { BCMA_CORE_80211, "IEEE 802.11" }, 50 { BCMA_CORE_PHY_A, "PHY A" }, 51 { BCMA_CORE_PHY_B, "PHY B" }, 52 { BCMA_CORE_PHY_G, "PHY G" }, 53 { BCMA_CORE_USB11_HOST, "USB 1.1 Host" }, 54 { BCMA_CORE_USB11_DEV, "USB 1.1 Device" }, 55 { BCMA_CORE_USB20_HOST, "USB 2.0 Host" }, 56 { BCMA_CORE_USB20_DEV, "USB 2.0 Device" }, 57 { BCMA_CORE_SDIO_HOST, "SDIO Host" }, 58 { BCMA_CORE_ROBOSWITCH, "Roboswitch" }, 59 { BCMA_CORE_PARA_ATA, "PATA" }, 60 { BCMA_CORE_SATA_XORDMA, "SATA XOR-DMA" }, 61 { BCMA_CORE_ETHERNET_GBIT, "GBit Ethernet" }, 62 { BCMA_CORE_PCIE, "PCIe" }, 63 { BCMA_CORE_PHY_N, "PHY N" }, 64 { BCMA_CORE_SRAM_CTL, "SRAM Controller" }, 65 { BCMA_CORE_MINI_MACPHY, "Mini MACPHY" }, 66 { BCMA_CORE_PHY_LP, "PHY LP" }, 67 { BCMA_CORE_PMU, "PMU" }, 68 { BCMA_CORE_PHY_SSN, "PHY SSN" }, 69 { BCMA_CORE_SDIO_DEV, "SDIO Device" }, 70 { BCMA_CORE_PHY_HT, "PHY HT" }, 71 { BCMA_CORE_MAC_GBIT, "GBit MAC" }, 72 { BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" }, 73 { BCMA_CORE_PCIE_RC, "PCIe Root Complex" }, 74 { BCMA_CORE_OCP_OCP_BRIDGE, "OCP to OCP Bridge" }, 75 { BCMA_CORE_SHARED_COMMON, "Common Shared" }, 76 { BCMA_CORE_OCP_AHB_BRIDGE, "OCP to AHB Bridge" }, 77 { BCMA_CORE_SPI_HOST, "SPI Host" }, 78 { BCMA_CORE_I2S, "I2S" }, 79 { BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" }, 80 { BCMA_CORE_SHIM, "SHIM" }, 81 { BCMA_CORE_DEFAULT, "Default" }, 82 }; 83 84 static const struct bcma_device_id_name bcma_mips_device_names[] = { 85 { BCMA_CORE_MIPS, "MIPS" }, 86 { BCMA_CORE_MIPS_3302, "MIPS 3302" }, 87 { BCMA_CORE_MIPS_74K, "MIPS 74K" }, 88 }; 89 90 static const char *bcma_device_name(const struct bcma_device_id *id) 91 { 92 const struct bcma_device_id_name *names; 93 int size, i; 94 95 /* search manufacturer specific names */ 96 switch (id->manuf) { 97 case BCMA_MANUF_ARM: 98 names = bcma_arm_device_names; 99 size = ARRAY_SIZE(bcma_arm_device_names); 100 break; 101 case BCMA_MANUF_BCM: 102 names = bcma_bcm_device_names; 103 size = ARRAY_SIZE(bcma_bcm_device_names); 104 break; 105 case BCMA_MANUF_MIPS: 106 names = bcma_mips_device_names; 107 size = ARRAY_SIZE(bcma_mips_device_names); 108 break; 109 default: 110 return "UNKNOWN"; 111 } 112 113 for (i = 0; i < size; i++) { 114 if (names[i].id == id->id) 115 return names[i].name; 116 } 117 118 return "UNKNOWN"; 119 } 120 121 static u32 bcma_scan_read32(struct bcma_bus *bus, u8 current_coreidx, 122 u16 offset) 123 { 124 return readl(bus->mmio + offset); 125 } 126 127 static void bcma_scan_switch_core(struct bcma_bus *bus, u32 addr) 128 { 129 if (bus->hosttype == BCMA_HOSTTYPE_PCI) 130 pci_write_config_dword(bus->host_pci, BCMA_PCI_BAR0_WIN, 131 addr); 132 } 133 134 static u32 bcma_erom_get_ent(struct bcma_bus *bus, u32 **eromptr) 135 { 136 u32 ent = readl(*eromptr); 137 (*eromptr)++; 138 return ent; 139 } 140 141 static void bcma_erom_push_ent(u32 **eromptr) 142 { 143 (*eromptr)--; 144 } 145 146 static s32 bcma_erom_get_ci(struct bcma_bus *bus, u32 **eromptr) 147 { 148 u32 ent = bcma_erom_get_ent(bus, eromptr); 149 if (!(ent & SCAN_ER_VALID)) 150 return -ENOENT; 151 if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_CI) 152 return -ENOENT; 153 return ent; 154 } 155 156 static bool bcma_erom_is_end(struct bcma_bus *bus, u32 **eromptr) 157 { 158 u32 ent = bcma_erom_get_ent(bus, eromptr); 159 bcma_erom_push_ent(eromptr); 160 return (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID)); 161 } 162 163 static bool bcma_erom_is_bridge(struct bcma_bus *bus, u32 **eromptr) 164 { 165 u32 ent = bcma_erom_get_ent(bus, eromptr); 166 bcma_erom_push_ent(eromptr); 167 return (((ent & SCAN_ER_VALID)) && 168 ((ent & SCAN_ER_TAGX) == SCAN_ER_TAG_ADDR) && 169 ((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE)); 170 } 171 172 static void bcma_erom_skip_component(struct bcma_bus *bus, u32 **eromptr) 173 { 174 u32 ent; 175 while (1) { 176 ent = bcma_erom_get_ent(bus, eromptr); 177 if ((ent & SCAN_ER_VALID) && 178 ((ent & SCAN_ER_TAG) == SCAN_ER_TAG_CI)) 179 break; 180 if (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID)) 181 break; 182 } 183 bcma_erom_push_ent(eromptr); 184 } 185 186 static s32 bcma_erom_get_mst_port(struct bcma_bus *bus, u32 **eromptr) 187 { 188 u32 ent = bcma_erom_get_ent(bus, eromptr); 189 if (!(ent & SCAN_ER_VALID)) 190 return -ENOENT; 191 if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_MP) 192 return -ENOENT; 193 return ent; 194 } 195 196 static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr, 197 u32 type, u8 port) 198 { 199 u32 addrl, addrh, sizel, sizeh = 0; 200 u32 size; 201 202 u32 ent = bcma_erom_get_ent(bus, eromptr); 203 if ((!(ent & SCAN_ER_VALID)) || 204 ((ent & SCAN_ER_TAGX) != SCAN_ER_TAG_ADDR) || 205 ((ent & SCAN_ADDR_TYPE) != type) || 206 (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) { 207 bcma_erom_push_ent(eromptr); 208 return -EINVAL; 209 } 210 211 addrl = ent & SCAN_ADDR_ADDR; 212 if (ent & SCAN_ADDR_AG32) 213 addrh = bcma_erom_get_ent(bus, eromptr); 214 else 215 addrh = 0; 216 217 if ((ent & SCAN_ADDR_SZ) == SCAN_ADDR_SZ_SZD) { 218 size = bcma_erom_get_ent(bus, eromptr); 219 sizel = size & SCAN_SIZE_SZ; 220 if (size & SCAN_SIZE_SG32) 221 sizeh = bcma_erom_get_ent(bus, eromptr); 222 } else 223 sizel = SCAN_ADDR_SZ_BASE << 224 ((ent & SCAN_ADDR_SZ) >> SCAN_ADDR_SZ_SHIFT); 225 226 return addrl; 227 } 228 229 static struct bcma_device *bcma_find_core_by_index(struct bcma_bus *bus, 230 u16 index) 231 { 232 struct bcma_device *core; 233 234 list_for_each_entry(core, &bus->cores, list) { 235 if (core->core_index == index) 236 return core; 237 } 238 return NULL; 239 } 240 241 static struct bcma_device *bcma_find_core_reverse(struct bcma_bus *bus, u16 coreid) 242 { 243 struct bcma_device *core; 244 245 list_for_each_entry_reverse(core, &bus->cores, list) { 246 if (core->id.id == coreid) 247 return core; 248 } 249 return NULL; 250 } 251 252 static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr, 253 struct bcma_device_id *match, int core_num, 254 struct bcma_device *core) 255 { 256 s32 tmp; 257 u8 i, j; 258 s32 cia, cib; 259 u8 ports[2], wrappers[2]; 260 261 /* get CIs */ 262 cia = bcma_erom_get_ci(bus, eromptr); 263 if (cia < 0) { 264 bcma_erom_push_ent(eromptr); 265 if (bcma_erom_is_end(bus, eromptr)) 266 return -ESPIPE; 267 return -EILSEQ; 268 } 269 cib = bcma_erom_get_ci(bus, eromptr); 270 if (cib < 0) 271 return -EILSEQ; 272 273 /* parse CIs */ 274 core->id.class = (cia & SCAN_CIA_CLASS) >> SCAN_CIA_CLASS_SHIFT; 275 core->id.id = (cia & SCAN_CIA_ID) >> SCAN_CIA_ID_SHIFT; 276 core->id.manuf = (cia & SCAN_CIA_MANUF) >> SCAN_CIA_MANUF_SHIFT; 277 ports[0] = (cib & SCAN_CIB_NMP) >> SCAN_CIB_NMP_SHIFT; 278 ports[1] = (cib & SCAN_CIB_NSP) >> SCAN_CIB_NSP_SHIFT; 279 wrappers[0] = (cib & SCAN_CIB_NMW) >> SCAN_CIB_NMW_SHIFT; 280 wrappers[1] = (cib & SCAN_CIB_NSW) >> SCAN_CIB_NSW_SHIFT; 281 core->id.rev = (cib & SCAN_CIB_REV) >> SCAN_CIB_REV_SHIFT; 282 283 if (((core->id.manuf == BCMA_MANUF_ARM) && 284 (core->id.id == 0xFFF)) || 285 (ports[1] == 0)) { 286 bcma_erom_skip_component(bus, eromptr); 287 return -ENXIO; 288 } 289 290 /* check if component is a core at all */ 291 if (wrappers[0] + wrappers[1] == 0) { 292 /* we could save addrl of the router 293 if (cid == BCMA_CORE_OOB_ROUTER) 294 */ 295 bcma_erom_skip_component(bus, eromptr); 296 return -ENXIO; 297 } 298 299 if (bcma_erom_is_bridge(bus, eromptr)) { 300 bcma_erom_skip_component(bus, eromptr); 301 return -ENXIO; 302 } 303 304 if (bcma_find_core_by_index(bus, core_num)) { 305 bcma_erom_skip_component(bus, eromptr); 306 return -ENODEV; 307 } 308 309 if (match && ((match->manuf != BCMA_ANY_MANUF && 310 match->manuf != core->id.manuf) || 311 (match->id != BCMA_ANY_ID && match->id != core->id.id) || 312 (match->rev != BCMA_ANY_REV && match->rev != core->id.rev) || 313 (match->class != BCMA_ANY_CLASS && match->class != core->id.class) 314 )) { 315 bcma_erom_skip_component(bus, eromptr); 316 return -ENODEV; 317 } 318 319 /* get & parse master ports */ 320 for (i = 0; i < ports[0]; i++) { 321 s32 mst_port_d = bcma_erom_get_mst_port(bus, eromptr); 322 if (mst_port_d < 0) 323 return -EILSEQ; 324 } 325 326 /* First Slave Address Descriptor should be port 0: 327 * the main register space for the core 328 */ 329 tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0); 330 if (tmp <= 0) { 331 /* Try again to see if it is a bridge */ 332 tmp = bcma_erom_get_addr_desc(bus, eromptr, 333 SCAN_ADDR_TYPE_BRIDGE, 0); 334 if (tmp <= 0) { 335 return -EILSEQ; 336 } else { 337 pr_info("Bridge found\n"); 338 return -ENXIO; 339 } 340 } 341 core->addr = tmp; 342 343 /* get & parse slave ports */ 344 for (i = 0; i < ports[1]; i++) { 345 for (j = 0; ; j++) { 346 tmp = bcma_erom_get_addr_desc(bus, eromptr, 347 SCAN_ADDR_TYPE_SLAVE, i); 348 if (tmp < 0) { 349 /* no more entries for port _i_ */ 350 /* pr_debug("erom: slave port %d " 351 * "has %d descriptors\n", i, j); */ 352 break; 353 } else { 354 if (i == 0 && j == 0) 355 core->addr1 = tmp; 356 } 357 } 358 } 359 360 /* get & parse master wrappers */ 361 for (i = 0; i < wrappers[0]; i++) { 362 for (j = 0; ; j++) { 363 tmp = bcma_erom_get_addr_desc(bus, eromptr, 364 SCAN_ADDR_TYPE_MWRAP, i); 365 if (tmp < 0) { 366 /* no more entries for port _i_ */ 367 /* pr_debug("erom: master wrapper %d " 368 * "has %d descriptors\n", i, j); */ 369 break; 370 } else { 371 if (i == 0 && j == 0) 372 core->wrap = tmp; 373 } 374 } 375 } 376 377 /* get & parse slave wrappers */ 378 for (i = 0; i < wrappers[1]; i++) { 379 u8 hack = (ports[1] == 1) ? 0 : 1; 380 for (j = 0; ; j++) { 381 tmp = bcma_erom_get_addr_desc(bus, eromptr, 382 SCAN_ADDR_TYPE_SWRAP, i + hack); 383 if (tmp < 0) { 384 /* no more entries for port _i_ */ 385 /* pr_debug("erom: master wrapper %d " 386 * has %d descriptors\n", i, j); */ 387 break; 388 } else { 389 if (wrappers[0] == 0 && !i && !j) 390 core->wrap = tmp; 391 } 392 } 393 } 394 if (bus->hosttype == BCMA_HOSTTYPE_SOC) { 395 core->io_addr = ioremap_nocache(core->addr, BCMA_CORE_SIZE); 396 if (!core->io_addr) 397 return -ENOMEM; 398 core->io_wrap = ioremap_nocache(core->wrap, BCMA_CORE_SIZE); 399 if (!core->io_wrap) { 400 iounmap(core->io_addr); 401 return -ENOMEM; 402 } 403 } 404 return 0; 405 } 406 407 void bcma_init_bus(struct bcma_bus *bus) 408 { 409 s32 tmp; 410 struct bcma_chipinfo *chipinfo = &(bus->chipinfo); 411 412 if (bus->init_done) 413 return; 414 415 INIT_LIST_HEAD(&bus->cores); 416 bus->nr_cores = 0; 417 418 bcma_scan_switch_core(bus, BCMA_ADDR_BASE); 419 420 tmp = bcma_scan_read32(bus, 0, BCMA_CC_ID); 421 chipinfo->id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT; 422 chipinfo->rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT; 423 chipinfo->pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT; 424 pr_info("Found chip with id 0x%04X, rev 0x%02X and package 0x%02X\n", 425 chipinfo->id, chipinfo->rev, chipinfo->pkg); 426 427 bus->init_done = true; 428 } 429 430 int bcma_bus_scan(struct bcma_bus *bus) 431 { 432 u32 erombase; 433 u32 __iomem *eromptr, *eromend; 434 435 int err, core_num = 0; 436 437 bcma_init_bus(bus); 438 439 erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM); 440 if (bus->hosttype == BCMA_HOSTTYPE_SOC) { 441 eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE); 442 if (!eromptr) 443 return -ENOMEM; 444 } else { 445 eromptr = bus->mmio; 446 } 447 448 eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32); 449 450 bcma_scan_switch_core(bus, erombase); 451 452 while (eromptr < eromend) { 453 struct bcma_device *other_core; 454 struct bcma_device *core = kzalloc(sizeof(*core), GFP_KERNEL); 455 if (!core) 456 return -ENOMEM; 457 INIT_LIST_HEAD(&core->list); 458 core->bus = bus; 459 460 err = bcma_get_next_core(bus, &eromptr, NULL, core_num, core); 461 if (err < 0) { 462 kfree(core); 463 if (err == -ENODEV) { 464 core_num++; 465 continue; 466 } else if (err == -ENXIO) { 467 continue; 468 } else if (err == -ESPIPE) { 469 break; 470 } 471 return err; 472 } 473 474 core->core_index = core_num++; 475 bus->nr_cores++; 476 other_core = bcma_find_core_reverse(bus, core->id.id); 477 core->core_unit = (other_core == NULL) ? 0 : other_core->core_unit + 1; 478 479 pr_info("Core %d found: %s " 480 "(manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n", 481 core->core_index, bcma_device_name(&core->id), 482 core->id.manuf, core->id.id, core->id.rev, 483 core->id.class); 484 485 list_add(&core->list, &bus->cores); 486 } 487 488 if (bus->hosttype == BCMA_HOSTTYPE_SOC) 489 iounmap(eromptr); 490 491 return 0; 492 } 493 494 int __init bcma_bus_scan_early(struct bcma_bus *bus, 495 struct bcma_device_id *match, 496 struct bcma_device *core) 497 { 498 u32 erombase; 499 u32 __iomem *eromptr, *eromend; 500 501 int err = -ENODEV; 502 int core_num = 0; 503 504 erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM); 505 if (bus->hosttype == BCMA_HOSTTYPE_SOC) { 506 eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE); 507 if (!eromptr) 508 return -ENOMEM; 509 } else { 510 eromptr = bus->mmio; 511 } 512 513 eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32); 514 515 bcma_scan_switch_core(bus, erombase); 516 517 while (eromptr < eromend) { 518 memset(core, 0, sizeof(*core)); 519 INIT_LIST_HEAD(&core->list); 520 core->bus = bus; 521 522 err = bcma_get_next_core(bus, &eromptr, match, core_num, core); 523 if (err == -ENODEV) { 524 core_num++; 525 continue; 526 } else if (err == -ENXIO) 527 continue; 528 else if (err == -ESPIPE) 529 break; 530 else if (err < 0) 531 return err; 532 533 core->core_index = core_num++; 534 bus->nr_cores++; 535 pr_info("Core %d found: %s " 536 "(manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n", 537 core->core_index, bcma_device_name(&core->id), 538 core->id.manuf, core->id.id, core->id.rev, 539 core->id.class); 540 541 list_add(&core->list, &bus->cores); 542 err = 0; 543 break; 544 } 545 546 if (bus->hosttype == BCMA_HOSTTYPE_SOC) 547 iounmap(eromptr); 548 549 return err; 550 } 551