1 /* 2 * Broadcom specific AMBA 3 * ChipCommon core driver 4 * 5 * Copyright 2005, Broadcom Corporation 6 * Copyright 2006, 2007, Michael Buesch <m@bues.ch> 7 * 8 * Licensed under the GNU/GPL. See COPYING for details. 9 */ 10 11 #include "bcma_private.h" 12 #include <linux/bcma/bcma.h> 13 14 static inline u32 bcma_cc_write32_masked(struct bcma_drv_cc *cc, u16 offset, 15 u32 mask, u32 value) 16 { 17 value &= mask; 18 value |= bcma_cc_read32(cc, offset) & ~mask; 19 bcma_cc_write32(cc, offset, value); 20 21 return value; 22 } 23 24 void bcma_core_chipcommon_init(struct bcma_drv_cc *cc) 25 { 26 u32 leddc_on = 10; 27 u32 leddc_off = 90; 28 29 if (cc->core->id.rev >= 11) 30 cc->status = bcma_cc_read32(cc, BCMA_CC_CHIPSTAT); 31 cc->capabilities = bcma_cc_read32(cc, BCMA_CC_CAP); 32 if (cc->core->id.rev >= 35) 33 cc->capabilities_ext = bcma_cc_read32(cc, BCMA_CC_CAP_EXT); 34 35 if (cc->core->id.rev >= 20) { 36 bcma_cc_write32(cc, BCMA_CC_GPIOPULLUP, 0); 37 bcma_cc_write32(cc, BCMA_CC_GPIOPULLDOWN, 0); 38 } 39 40 if (cc->capabilities & BCMA_CC_CAP_PMU) 41 bcma_pmu_init(cc); 42 if (cc->capabilities & BCMA_CC_CAP_PCTL) 43 pr_err("Power control not implemented!\n"); 44 45 if (cc->core->id.rev >= 16) { 46 if (cc->core->bus->sprom.leddc_on_time && 47 cc->core->bus->sprom.leddc_off_time) { 48 leddc_on = cc->core->bus->sprom.leddc_on_time; 49 leddc_off = cc->core->bus->sprom.leddc_off_time; 50 } 51 bcma_cc_write32(cc, BCMA_CC_GPIOTIMER, 52 ((leddc_on << BCMA_CC_GPIOTIMER_ONTIME_SHIFT) | 53 (leddc_off << BCMA_CC_GPIOTIMER_OFFTIME_SHIFT))); 54 } 55 } 56 57 /* Set chip watchdog reset timer to fire in 'ticks' backplane cycles */ 58 void bcma_chipco_watchdog_timer_set(struct bcma_drv_cc *cc, u32 ticks) 59 { 60 /* instant NMI */ 61 bcma_cc_write32(cc, BCMA_CC_WATCHDOG, ticks); 62 } 63 64 void bcma_chipco_irq_mask(struct bcma_drv_cc *cc, u32 mask, u32 value) 65 { 66 bcma_cc_write32_masked(cc, BCMA_CC_IRQMASK, mask, value); 67 } 68 69 u32 bcma_chipco_irq_status(struct bcma_drv_cc *cc, u32 mask) 70 { 71 return bcma_cc_read32(cc, BCMA_CC_IRQSTAT) & mask; 72 } 73 74 u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask) 75 { 76 return bcma_cc_read32(cc, BCMA_CC_GPIOIN) & mask; 77 } 78 79 u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value) 80 { 81 return bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUT, mask, value); 82 } 83 84 u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value) 85 { 86 return bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUTEN, mask, value); 87 } 88 89 u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask, u32 value) 90 { 91 return bcma_cc_write32_masked(cc, BCMA_CC_GPIOCTL, mask, value); 92 } 93 EXPORT_SYMBOL_GPL(bcma_chipco_gpio_control); 94 95 u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask, u32 value) 96 { 97 return bcma_cc_write32_masked(cc, BCMA_CC_GPIOIRQ, mask, value); 98 } 99 100 u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value) 101 { 102 return bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value); 103 } 104