1 /* 2 * Broadcom specific AMBA 3 * Core ops 4 * 5 * Licensed under the GNU/GPL. See COPYING for details. 6 */ 7 8 #include "bcma_private.h" 9 #include <linux/export.h> 10 #include <linux/bcma/bcma.h> 11 12 bool bcma_core_is_enabled(struct bcma_device *core) 13 { 14 if ((bcma_aread32(core, BCMA_IOCTL) & (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC)) 15 != BCMA_IOCTL_CLK) 16 return false; 17 if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET) 18 return false; 19 return true; 20 } 21 EXPORT_SYMBOL_GPL(bcma_core_is_enabled); 22 23 void bcma_core_disable(struct bcma_device *core, u32 flags) 24 { 25 if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET) 26 return; 27 28 bcma_awrite32(core, BCMA_IOCTL, flags); 29 bcma_aread32(core, BCMA_IOCTL); 30 udelay(10); 31 32 bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET); 33 bcma_aread32(core, BCMA_RESET_CTL); 34 udelay(1); 35 } 36 EXPORT_SYMBOL_GPL(bcma_core_disable); 37 38 int bcma_core_enable(struct bcma_device *core, u32 flags) 39 { 40 bcma_core_disable(core, flags); 41 42 bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC | flags)); 43 bcma_aread32(core, BCMA_IOCTL); 44 45 bcma_awrite32(core, BCMA_RESET_CTL, 0); 46 udelay(1); 47 48 bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | flags)); 49 bcma_aread32(core, BCMA_IOCTL); 50 udelay(1); 51 52 return 0; 53 } 54 EXPORT_SYMBOL_GPL(bcma_core_enable); 55 56 void bcma_core_set_clockmode(struct bcma_device *core, 57 enum bcma_clkmode clkmode) 58 { 59 u16 i; 60 61 WARN_ON(core->id.id != BCMA_CORE_CHIPCOMMON && 62 core->id.id != BCMA_CORE_PCIE && 63 core->id.id != BCMA_CORE_80211); 64 65 switch (clkmode) { 66 case BCMA_CLKMODE_FAST: 67 bcma_set32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT); 68 usleep_range(64, 300); 69 for (i = 0; i < 1500; i++) { 70 if (bcma_read32(core, BCMA_CLKCTLST) & 71 BCMA_CLKCTLST_HAVEHT) { 72 i = 0; 73 break; 74 } 75 udelay(10); 76 } 77 if (i) 78 bcma_err(core->bus, "HT force timeout\n"); 79 break; 80 case BCMA_CLKMODE_DYNAMIC: 81 bcma_set32(core, BCMA_CLKCTLST, ~BCMA_CLKCTLST_FORCEHT); 82 break; 83 } 84 } 85 EXPORT_SYMBOL_GPL(bcma_core_set_clockmode); 86 87 void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status, bool on) 88 { 89 u16 i; 90 91 WARN_ON(req & ~BCMA_CLKCTLST_EXTRESREQ); 92 WARN_ON(status & ~BCMA_CLKCTLST_EXTRESST); 93 94 if (on) { 95 bcma_set32(core, BCMA_CLKCTLST, req); 96 for (i = 0; i < 10000; i++) { 97 if ((bcma_read32(core, BCMA_CLKCTLST) & status) == 98 status) { 99 i = 0; 100 break; 101 } 102 udelay(10); 103 } 104 if (i) 105 bcma_err(core->bus, "PLL enable timeout\n"); 106 } else { 107 /* 108 * Mask the PLL but don't wait for it to be disabled. PLL may be 109 * shared between cores and will be still up if there is another 110 * core using it. 111 */ 112 bcma_mask32(core, BCMA_CLKCTLST, ~req); 113 bcma_read32(core, BCMA_CLKCTLST); 114 } 115 } 116 EXPORT_SYMBOL_GPL(bcma_core_pll_ctl); 117 118 u32 bcma_core_dma_translation(struct bcma_device *core) 119 { 120 switch (core->bus->hosttype) { 121 case BCMA_HOSTTYPE_SOC: 122 return 0; 123 case BCMA_HOSTTYPE_PCI: 124 if (bcma_aread32(core, BCMA_IOST) & BCMA_IOST_DMA64) 125 return BCMA_DMA_TRANSLATION_DMA64_CMT; 126 else 127 return BCMA_DMA_TRANSLATION_DMA32_CMT; 128 default: 129 bcma_err(core->bus, "DMA translation unknown for host %d\n", 130 core->bus->hosttype); 131 } 132 return BCMA_DMA_TRANSLATION_NONE; 133 } 134 EXPORT_SYMBOL(bcma_core_dma_translation); 135